WO2021119930A1

WO2021119930A1 - Chip package and fabrication method therefor

Info

Publication number: WO2021119930A1
Application number: PCT/CN2019/125682
Authority: WO
Inventors: 胡骁; 张弛; 蒋尚轩; 郑见涛; 赵南; 任亦纬; 蔡树杰; 吴维哲; 邹坤; 黄文濬
Original assignee: 华为技术有限公司
Priority date: 2019-12-16
Filing date: 2019-12-16
Publication date: 2021-06-24
Also published as: CN114787990A

Abstract

A chip package and a fabrication method therefor, which relate to the technical field of chip packages, and which are used to mitigate the deformation of a heat dissipation sheet (40) caused by the deformation of a substrate (10), thus preventing a thermal interface material layer (30) from cracking. The chip package comprises a substrate (10), and a chip (20), a thermal interface material layer (30), and a heat dissipation sheet (40) that are stacked and arranged in succession on a first surface of the substrate (10), as well as a reinforcement ring (50) disposed on the first surface. The reinforcement ring (50) encircles the chip (20), and is spaced apart from the chip (20), the thermal interface material layer (30), and the heat dissipation sheet (40). The fabrication method for the chip package comprises: encapsulating the chip (20) on the substrate (10), and forming the thermal interface material layer (30) on the chip (20); forming the heat dissipation sheet (40) on the thermal interface material layer (30); and forming the reinforcement ring (50) on the substrate (10), so that the reinforcement ring (50) encircles the chip (20), and the reinforcement ring (50) is spaced apart from the chip (20), the thermal interface material layer (30), and the heat dissipation sheet (40).

Description

芯片封装及其制作方法Chip packaging and manufacturing method thereof

技术领域Technical field

本申请涉及芯片封装技术领域,尤其涉及一种芯片封装及其制作方法。This application relates to the technical field of chip packaging, and in particular to a chip packaging and a manufacturing method thereof.

背景技术Background technique

随着人工智能和高速数据通信需求的增加，其所采用的芯片的功耗急剧增加，导致芯片在工作时会产生大量的热，这些热量如果不能及时排放到芯片外，将会影响芯片的性能和使用寿命。With the increasing demand for artificial intelligence and high-speed data communication, the power consumption of the chips used has increased sharply, resulting in a large amount of heat generated when the chip is working. If this heat cannot be discharged to the outside of the chip in time, it will affect the performance of the chip. And service life.

目前，通常利用设置在芯片上的散热片将芯片工作时产生的热量排放到芯片外；此外，为了进一步提高芯片的散热性能，在散热片和芯片之间设置热界面材料层，利用热界面材料层来降低芯片与散热片之间的接触热阻。At present, the heat sink provided on the chip is usually used to discharge the heat generated when the chip is working to the outside of the chip; in addition, in order to further improve the heat dissipation performance of the chip, a thermal interface material layer is set between the heat sink and the chip, and the thermal interface material is used. Layer to reduce the contact thermal resistance between the chip and the heat sink.

不过，用于承载芯片的基板易发生翘曲变形，基板变形会引起散热片变形，导致热界面材料层中产生裂纹，裂纹产生后热界面材料层的导热路径被中断，进而导致芯片和散热片之间的接触热阻增加，降低芯片的散热性能。However, the substrate used to carry the chip is prone to warpage and deformation. The deformation of the substrate will cause the heat sink to deform, resulting in cracks in the thermal interface material layer. After the crack occurs, the thermal interface material layer's heat conduction path will be interrupted, which will cause the chip and the heat sink. The thermal resistance of the contact increases, which reduces the heat dissipation performance of the chip.

发明内容Summary of the invention

本申请实施例提供了一种芯片封装及其制作方法，用于减轻基板变形引起的散热片变形，进而防止热界面材料层出现裂纹。The embodiments of the present application provide a chip package and a manufacturing method thereof, which are used to reduce the deformation of the heat sink caused by the deformation of the substrate, thereby preventing cracks in the thermal interface material layer.

第一方面，本申请实施例提供了一种芯片封装，该芯片封装包括基板、芯片、热界面材料层、散热片和补强环，其中，芯片、热界面材料层和散热片依次堆叠设置于基板的第一表面上，芯片位于底层并与基板的第一表面接触；补强环设置于基板的第一表面上并环绕芯片设置，补强环与芯片、热界面材料层和散热片之间具有间隔。In the first aspect, the embodiments of the present application provide a chip package. The chip package includes a substrate, a chip, a thermal interface material layer, a heat sink, and a reinforcing ring, wherein the chip, the thermal interface material layer, and the heat sink are stacked in sequence in On the first surface of the substrate, the chip is located on the bottom layer and is in contact with the first surface of the substrate; the reinforcing ring is arranged on the first surface of the substrate and surrounds the chip, between the reinforcing ring and the chip, the thermal interface material layer and the heat sink With intervals.

具有上述结构的芯片封装中，利用补强环能够增强基板的强度，提高基板的抗变形能力，而且，如果基板发生变形，由于补强环单独设置于芯片的***，并与芯片、热界面材料层和散热片不接触，因此，基板的变形不会经散热片传递给热界面材料层，防止热界面材料层内部或其上下界面出现裂纹，确保热界面材料层的导热性能，进而可以确保低芯片的散热性能。此外，由于芯片工作时和工作后的热胀冷缩产生的应力，这些应力会传递到基板中，利用补强环可以降低这些应力对基板的影响，从而降低基板因应力发生变形的风险。In the chip package with the above structure, the reinforcement ring can enhance the strength of the substrate and improve the resistance to deformation of the substrate. Moreover, if the substrate is deformed, the reinforcement ring is separately provided on the periphery of the chip and interacts with the chip and the thermal interface material. The layer and the heat sink are not in contact. Therefore, the deformation of the substrate will not be transferred to the thermal interface material layer through the heat sink, preventing cracks in the thermal interface material layer or its upper and lower interfaces, ensuring the thermal conductivity of the thermal interface material layer, thereby ensuring low The heat dissipation performance of the chip. In addition, due to the stresses generated by the thermal expansion and contraction of the chip during operation and after operation, these stresses will be transmitted to the substrate. The use of the reinforcing ring can reduce the influence of these stresses on the substrate, thereby reducing the risk of deformation of the substrate due to stress.

在一种可能的实现方式中，所述补强环为环形凸起。如此设计，利用补强环可以增强基板的强度，提高基板的抗变形能力。In a possible implementation manner, the reinforcing ring is an annular protrusion. With such a design, the use of the reinforcing ring can enhance the strength of the substrate and improve the resistance to deformation of the substrate.

在一种可能的实现方式中，所述散热片为柔性散热片。In a possible implementation manner, the heat sink is a flexible heat sink.

采用柔性散热片，使得散热片具有可变形的能力，因此，利用散热片的变形可以吸收应力，保护热界面材料层的完整性，确保热界面材料层的导热性能。此外，利用散热片的变形，使得散热片可以跟随芯片和热界面材料层一起变形，降低散热片和芯片对热界面材料层的撕扯力，防止热界面材料层出现裂纹，确保热界面材料层的导热性能。The use of flexible heat sinks makes the heat sinks deformable. Therefore, the deformation of the heat sinks can absorb stress, protect the integrity of the thermal interface material layer, and ensure the thermal conductivity of the thermal interface material layer. In addition, the use of the deformation of the heat sink allows the heat sink to deform along with the chip and the thermal interface material layer, reduces the tearing force of the heat sink and the chip to the thermal interface material layer, prevents cracks in the thermal interface material layer, and ensures the thermal interface material layer Thermal conductivity.

在一种可能的实现方式中，所述芯片包括设置于所述基板上的裸芯片，以及覆盖在所述裸芯片的侧面上的封装层，所述封装层朝向所述热界面材料层的面与所述裸芯片朝向所述热界面材料层的面平齐。In a possible implementation manner, the chip includes a bare chip disposed on the substrate, and an encapsulation layer covering a side surface of the bare chip, and the encapsulation layer faces the surface of the thermal interface material layer. It is flush with the surface of the bare chip facing the thermal interface material layer.

如此设计，封装层包裹在芯片的四周，可以提升芯片的承压能力，降低包装运输过程中跌落导致的芯片断裂的风险。With this design, the packaging layer is wrapped around the chip, which can improve the pressure-bearing capacity of the chip and reduce the risk of chip breakage caused by falling during packaging and transportation.

在进一步的可能实现方式中，所述封装层包括围坝塑封层和嵌设于所述围坝塑封层内的填充塑封层。In a further possible implementation manner, the encapsulation layer includes a dam plastic encapsulation layer and a filling plastic encapsulation layer embedded in the dam plastic encapsulation layer.

在另一种可能的实现方式中，所述热界面材料层包括与所述芯片接合的第一金属层，与所述散热片接合的第二金属层，以及位于所述第一金属层和所述第二金属层之间的导热层，所述导热层分别与所述第一金属层和第二金属层接合。In another possible implementation manner, the thermal interface material layer includes a first metal layer bonded to the chip, a second metal layer bonded to the heat sink, and located between the first metal layer and the heat sink. The heat-conducting layer between the second metal layers, the heat-conducting layer is respectively joined with the first metal layer and the second metal layer.

如此设计，利用第一金属层可以提高芯片的顶面和导热层中金属颗粒之间的接合强度，利用第二金属层可以提高散热片的底面和导热层中金属颗粒之间的接合强度，此外，利用第一金属层和第二金属层，能够填充芯片面向散热片的表面和散热片面向芯片的表面中的空气隙，降低了这两个表面之间的接触热阻，提高芯片的散热性能。With this design, the use of the first metal layer can increase the bonding strength between the top surface of the chip and the metal particles in the heat-conducting layer, and the second metal layer can increase the bonding strength between the bottom surface of the heat sink and the metal particles in the heat-conducting layer. , The use of the first metal layer and the second metal layer can fill the air gap between the surface of the chip facing the heat sink and the surface of the heat sink facing the chip, reducing the contact thermal resistance between the two surfaces and improving the heat dissipation performance of the chip .

在一种可能的实现方式中，所述导热层包括基材层以及均匀填充在所述基材层内的纳米级金属颗粒。In a possible implementation manner, the thermally conductive layer includes a substrate layer and nano-scale metal particles uniformly filled in the substrate layer.

在进一步的可能实现方式中，所述基材层为树脂层，所述金属颗粒包括银粉、锡粉、铝粉、氧化锌粉和氧化铝粉中的一种或多种。In a further possible implementation manner, the substrate layer is a resin layer, and the metal particles include one or more of silver powder, tin powder, aluminum powder, zinc oxide powder, and aluminum oxide powder.

在一种可能的实现方式中，所述芯片封装还包括环形粘结层，所述环形粘结层环设在所述热界面材料层的周向边缘，所述环形粘结层的第一表面与所述芯片远离所述基板的表面粘结，所述环形粘结层的第二表面与所述散热片靠近所述基板的表面粘结。In a possible implementation manner, the chip package further includes a ring-shaped adhesive layer, the ring-shaped adhesive layer is ring-shaped on the circumferential edge of the thermal interface material layer, and the first surface of the ring-shaped adhesive layer It is bonded to the surface of the chip away from the substrate, and the second surface of the ring-shaped adhesive layer is bonded to the surface of the heat sink close to the substrate.

具有上述结构的芯片封装，利用环形粘结层可以连接芯片和散热片，环形粘结层可以为热界面材料层分担连接芯片和散热片之间的连接力，使得热界面材料层承担的连接力变小，也就是说，热界面材料层承受的被拉裂开的拉裂力变小，从而可以确保热界面材料层的导热性能。For the chip package with the above structure, the ring-shaped adhesive layer can be used to connect the chip and the heat sink. The ring-shaped adhesive layer can share the connection force between the connecting chip and the heat sink for the thermal interface material layer, so that the thermal interface material layer bears the connection force It becomes smaller, that is to say, the tensile cracking force that the thermal interface material layer bears is smaller, so that the thermal conductivity of the thermal interface material layer can be ensured.

在另一种可能的实现方式中，所述芯片封装还包括环形粘结层，所述环形粘结层环设在所述导热层的周向边缘，所述环形粘结层的第一表面与所述第一金属层粘结，所述环形粘结层的第二表面与所述第二金属层粘结。In another possible implementation manner, the chip package further includes a ring-shaped adhesive layer, the ring-shaped adhesive layer is ring-shaped on the circumferential edge of the thermally conductive layer, and the first surface of the ring-shaped adhesive layer is connected to the The first metal layer is bonded, and the second surface of the annular bonding layer is bonded to the second metal layer.

将环形粘结层设置在第一金属层和第二金属层之间，可以利用环形粘结层连接第一金属层和第二金属层，减小对导热层的拉裂力，确保导热层的导热性能。The ring-shaped adhesive layer is arranged between the first metal layer and the second metal layer. The ring-shaped adhesive layer can be used to connect the first metal layer and the second metal layer to reduce the tensile force on the thermal conductive layer and ensure the thermal conductivity of the thermal conductive layer. Thermal conductivity.

在进一步的可能实现方式中，所述环形粘结层的材料包括环氧树脂、硅树脂、硅氧树脂或丙烯酸。In a further possible implementation manner, the material of the annular bonding layer includes epoxy resin, silicone resin, silicone resin or acrylic.

在进一步的可能实现方式中，所述第一金属层包括第一接着层和第一烧结层，所述第一接着层与所述芯片连接，所述第一烧结层与所述导热层连接；所述第二金属层包括第二接着层和第二烧结层，所述第二接着层与所述散热片连接，所述第二烧结层与所述导热层连接。In a further possible implementation manner, the first metal layer includes a first adhesive layer and a first sintered layer, the first adhesive layer is connected to the chip, and the first sintered layer is connected to the thermally conductive layer; The second metal layer includes a second adhesive layer and a second sintered layer, the second adhesive layer is connected to the heat sink, and the second sintered layer is connected to the heat conductive layer.

在进一步的可能实现方式中，所述第一金属层还包括位于所述第一接着层和所述第一烧结层之间的第一缓冲层；所述第二金属层还包括位于所述第二接着层和所述第二烧结层之间的第二缓冲层。In a further possible implementation manner, the first metal layer further includes a first buffer layer located between the first adhesive layer and the first sintered layer; the second metal layer further includes a A second buffer layer between the second adhesive layer and the second sintered layer.

在进一步的可能实现方式中，所述第一接着层的材质为钛、铬、镍或镍钒合金，所述第一缓冲层的材质为铝、铜、镍或镍钒合金，所述第一烧结层的材质为金、银或铜；所述第二接着层的材质为钛、铬、镍或镍钒合金，所述第二缓冲层的材质为铝、铜、镍或镍钒合金，所述第二烧结层的材质为金、银或铜。In a further possible implementation manner, the material of the first bonding layer is titanium, chromium, nickel or nickel vanadium alloy, the material of the first buffer layer is aluminum, copper, nickel or nickel vanadium alloy, and the first The material of the sintering layer is gold, silver or copper; the material of the second bonding layer is titanium, chromium, nickel or nickel vanadium alloy, and the material of the second buffer layer is aluminum, copper, nickel or nickel vanadium alloy. The material of the second sintered layer is gold, silver or copper.

第二方面，本申请实施例还提供了一种芯片封装的制作方法，所述制作方法包括：在基板的第一表面上贴装芯片；在所述芯片远离所述基板的表面上形成热界面材料层；在所述热界面材料层远离所述芯片的表面上形成散热片；在所述基板的第一表面上形成补强环，所述补强环包围所述芯片，且所述补强环与所述芯片、所述热界面材料层和所述散热片之间具有间隔。In a second aspect, the embodiments of the present application also provide a method for manufacturing a chip package. The manufacturing method includes: mounting a chip on a first surface of a substrate; and forming a thermal interface on the surface of the chip away from the substrate. A layer of material; a heat sink is formed on the surface of the thermal interface material layer away from the chip; a reinforcing ring is formed on the first surface of the substrate, the reinforcing ring surrounds the chip, and the reinforcing There is a gap between the ring and the chip, the thermal interface material layer and the heat sink.

采用上述制作方法制成的芯片封装中，利用补强环能够增强基板的强度，提高基板的抗变形能力，而且，如果基板发生变形，由于补强环单独设置于芯片的***，并与芯片、热界面材料层和散热片不接触，因此，基板的变形不会经散热片传递给热界面材料层，防止热界面材料层内部或其上下界面出现裂纹，确保热界面材料层的导热性能。此外，由于芯片工作时和工作后的热胀冷缩产生的应力，这些应力会传递到基板中，利用补强环可以降低这些应力对基板的影响，从而降低基板因应力发生变形的风险。In the chip package made by the above-mentioned manufacturing method, the reinforcement ring can enhance the strength of the substrate and improve the resistance to deformation of the substrate. Moreover, if the substrate is deformed, the reinforcement ring is separately arranged on the periphery of the chip and is connected with the chip, The thermal interface material layer and the heat sink are not in contact, so the deformation of the substrate will not be transferred to the thermal interface material layer through the heat sink, preventing cracks in the thermal interface material layer or its upper and lower interfaces, and ensuring the thermal conductivity of the thermal interface material layer. In addition, due to the stresses generated by the thermal expansion and contraction of the chip during operation and after operation, these stresses will be transmitted to the substrate. The use of the reinforcing ring can reduce the influence of these stresses on the substrate, thereby reducing the risk of deformation of the substrate due to stress.

在一种可能的实现方式中，在基板的第一表面上贴装芯片的步骤包括：采用底部填充胶的方式将裸芯片粘结在所述基板的第一表面上；在所述基板的第一表面上形成封装层，所述封装层覆盖所述裸芯片的侧面，且所述封装层远离所述基板的表面与所述裸芯片远离所述基板的表面平齐。In a possible implementation manner, the step of mounting the chip on the first surface of the substrate includes: bonding the bare chip on the first surface of the substrate by means of underfill; An encapsulation layer is formed on one surface, the encapsulation layer covers the side surface of the bare chip, and the surface of the encapsulation layer away from the substrate is flush with the surface of the bare chip away from the substrate.

在进一步的可能实现方式中，在所述基板的第一表面上形成封装层的步骤包括：在所述基板的第一表面上形成围坝塑封料，所述围坝塑封料环绕所述裸芯片，且所述围坝塑封料与所述裸芯片之间具有间隔；在所述间隔中设置填充塑封料，所述填充塑封料包覆所述裸芯片的侧面和远离所述基板的表面；固化所述围坝塑封料和填充塑封料，以分别形成围坝塑封层和填充塑封层；研磨所述围坝塑封层和填充塑封层，使所述围坝塑封层远离所述基板的表面和填充塑封层远离所述基板的表面与所述裸芯片远离所述基板的表面平齐。In a further possible implementation manner, the step of forming an encapsulation layer on the first surface of the substrate includes: forming a dam molding compound on the first surface of the substrate, and the dam molding compound surrounds the bare chip. , And there is a gap between the dam molding compound and the bare chip; a filling molding compound is arranged in the gap, and the filling molding compound covers the side of the bare chip and the surface away from the substrate; curing The dam molding compound and the filling molding compound to form a dam molding layer and a filling molding layer respectively; grinding the dam molding layer and the filling molding layer to keep the dam molding layer away from the surface of the substrate and filling The surface of the plastic encapsulation layer away from the substrate is flush with the surface of the bare chip away from the substrate.

在一种可能的实现方式中，在所述芯片远离所述基板的表面上形成热界面材料层的步骤包括：在所述芯片远离所述基板的表面上形成第一金属层；在所述第一金属层远离所述芯片的表面形成导热层，所述导热层包括基材层以及均匀填充在所述基材层内的纳米级金属颗粒；在所述导热层远离所述第一金属层的表面上形成第二金属层。In a possible implementation, the step of forming a thermal interface material layer on the surface of the chip away from the substrate includes: forming a first metal layer on the surface of the chip away from the substrate; A metal layer away from the surface of the chip forms a thermally conductive layer, the thermally conductive layer includes a substrate layer and nano-scale metal particles uniformly filled in the substrate layer; on the thermally conductive layer away from the first metal layer A second metal layer is formed on the surface.

在进一步的可能实现方式中，在所述第一金属层远离所述芯片的表面上形成导热层的步骤之后，在所述导热层远离所述第一金属层的表面上形成第二金属层的步骤之前，还包括在所述第一金属层远离所述芯片的表面上形成环形粘结层，所述环形粘结层包覆所述导热层的侧面。In a further possible implementation manner, after the step of forming a thermally conductive layer on the surface of the first metal layer away from the chip, a second metal layer is formed on the surface of the thermally conductive layer away from the first metal layer. Before the step, the method further includes forming a ring-shaped adhesive layer on the surface of the first metal layer away from the chip, and the ring-shaped adhesive layer covers the side surface of the thermally conductive layer.

附图说明Description of the drawings

图1为本申请实施例提供的一种芯片封装的剖视图；FIG. 1 is a cross-sectional view of a chip package provided by an embodiment of the application;

图2为本申请实施例提供的另一种芯片封装的剖视图；2 is a cross-sectional view of another chip package provided by an embodiment of the application;

图3为本申请实施例提供的又一种芯片封装的剖视图；3 is a cross-sectional view of another chip package provided by an embodiment of the application;

图4为本申请实施例提供的芯片封装的制作流程图；4 is a manufacturing flow chart of the chip package provided by the embodiment of the application;

图5为将裸芯片设置在基板上时的剖视图；Fig. 5 is a cross-sectional view when the bare chip is arranged on the substrate;

图6为在基板上形成有围坝塑封层的剖视图；Figure 6 is a cross-sectional view of a dam plastic sealing layer formed on the substrate;

图7为在基板上形成有围坝塑封层的俯视图；Figure 7 is a plan view of a dam plastic encapsulation layer formed on the substrate;

图8为在基板上形成有填充塑封层的剖视图；Figure 8 is a cross-sectional view of a filled plastic encapsulation layer formed on a substrate;

图9为在基板上形成有填充塑封层的俯视图；Figure 9 is a plan view of a filled plastic encapsulation layer formed on a substrate;

图10为对围坝塑封层和填充塑封层研磨后的剖视图；Figure 10 is a cross-sectional view of the dam plastic sealing layer and the filling plastic sealing layer after grinding;

图11为对围坝塑封层和填充塑封层研磨后的俯视图；Figure 11 is a top view of the dam plastic sealing layer and filling plastic sealing layer after grinding;

图12为在基板上形成有封装层的剖视图；Figure 12 is a cross-sectional view of an encapsulation layer formed on a substrate;

图13为在芯片上形成有第一金属层的剖视图；Figure 13 is a cross-sectional view of a first metal layer formed on a chip;

图14为在第一金属层上形成有热界面材料层和第二金属层的剖视图；14 is a cross-sectional view of a thermal interface material layer and a second metal layer formed on the first metal layer;

图15为在第二金属层上形成有散热片的剖视图。Fig. 15 is a cross-sectional view of a heat sink formed on the second metal layer.

附图标记说明：Description of reference signs:

10：基板； 20：芯片； 21：裸芯片；10: substrate; 20: chip; 21: bare chip;

22：围坝塑封层； 23：填充塑封层； 30：热界面材料层；22: dam plastic sealing layer; 23: filled plastic sealing layer; 30: thermal interface material layer;

31：第一金属层； 32：导热层； 33：第二金属层；31: the first metal layer; 32: the thermally conductive layer; 33: the second metal layer;

40：散热片； 50：补强环； 60：环形粘结层。40: heat sink; 50: reinforcing ring; 60: ring-shaped adhesive layer.

具体实施方式Detailed ways

为了使本申请实施例的上述目的、特征和优点能够更加明显易懂，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请的一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动的前提下所获得的所有其它实施例，均属于本申请保护的范围。In order to make the above objectives, features, and advantages of the embodiments of the present application more obvious and understandable, the technical solutions in the embodiments of the present application will be described clearly and completely in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by a person of ordinary skill in the art without creative work shall fall within the protection scope of this application.

为了减轻基板变形引起的散热片变形，进而导致热界面材料层中出现裂纹的问题，在本申请实施例提供的芯片封装中，在基板上单独设置了补强环，补强环与基板上的芯片以及位于芯片上的热界面材料层和散热片之间有间隔。利用补强环可以增强基板的抗变形能力，减轻基板变形对位于补强环内的芯片的影响，同时，由于补强环与散热片和热界面材料层不接触，基板变形或基板内部的应力不会经散热片传递给热界面材料层，防止热界面材料层内部或其上下界面出现裂纹，确保热界面材料层的导热性能以及芯片的散热性能。In order to reduce the deformation of the heat sink caused by the deformation of the substrate, which in turn leads to the problem of cracks in the thermal interface material layer, in the chip package provided by the embodiment of the present application, a reinforcing ring is separately provided on the substrate, and the reinforcing ring is There is a gap between the chip and the thermal interface material layer on the chip and the heat sink. The use of the reinforcement ring can enhance the resistance to deformation of the substrate and reduce the impact of substrate deformation on the chips located in the reinforcement ring. At the same time, since the reinforcement ring does not contact the heat sink and the thermal interface material layer, the substrate is deformed or the internal stress of the substrate It will not be transferred to the thermal interface material layer through the heat sink to prevent cracks in the thermal interface material layer or its upper and lower interfaces, and ensure the thermal conductivity of the thermal interface material layer and the heat dissipation performance of the chip.

请参阅图1，本申请实施例提供的芯片封装包括基板10、芯片20、热界面材料(英文全称为Thermal Interface Materials，简称为TIM)层30、散热片40和补强环50，其中，芯片20贴装在基板10的第一表面上，散热片40设置在芯片20的上方，热界面材料层30位于芯片20和散热片40之间，热界面材料层30的下界面与芯片20的顶面接合，热界面材料层30的上界面与散热片40的底面接合；补强环50设置在基板10上，补强环50包围芯片20，并与芯片20、热界面材料层30和散热片40之间具有间隔。Please refer to FIG. 1, the chip package provided by the embodiment of the present application includes a substrate 10, a chip 20, a thermal interface material (English full name Thermal Interface Materials, TIM for short) layer 30, a heat sink 40, and a reinforcing ring 50. The chip 20 is mounted on the first surface of the substrate 10, the heat sink 40 is arranged above the chip 20, the thermal interface material layer 30 is located between the chip 20 and the heat sink 40, and the lower interface of the thermal interface material layer 30 is on the top of the chip 20. Surface bonding, the upper interface of the thermal interface material layer 30 is bonded to the bottom surface of the heat sink 40; the reinforcing ring 50 is arranged on the substrate 10, and the reinforcing ring 50 surrounds the chip 20 and is connected to the chip 20, the thermal interface material layer 30 and the heat sink 40 There is a gap between 40.

可以理解的是，基板10的第一表面为图1中基板10的上表面；热界面材料层30的上界面是指热界面材料层的上表面，下界面是热界面材料层的下表面；芯片20的顶面是指芯片20面向散热片40的面，是如图1所示的芯片20的上表面；散热片40的底面是散热片4-0面向芯片20的面，是如图1所示的散热片40的下表面。It can be understood that the first surface of the substrate 10 is the upper surface of the substrate 10 in FIG. 1; the upper interface of the thermal interface material layer 30 refers to the upper surface of the thermal interface material layer, and the lower interface is the lower surface of the thermal interface material layer; The top surface of the chip 20 refers to the surface of the chip 20 facing the heat sink 40, which is the upper surface of the chip 20 as shown in FIG. 1; the bottom surface of the heat sink 40 is the surface of the heat sink 4-0 facing the chip 20, as shown in FIG. The lower surface of the heat sink 40 is shown.

在本申请实施例中，芯片20产生的热量可以经过热界面材料层30传递到散热片40，从而经散热片40散热到芯片20外，完成对芯片20的散热。热界面材料层30能够填充芯片20和散热片40之间的接合面中的空气隙，降低芯片20和散热片40之间的接触热阻，提高芯片20的散热性能。补强环50能够增强基板10的强度，提高基板10的抗变形能力，而且，如果基板10发生变形，由于补强环50单独设置于芯片20的***，并与芯片20、热界面材料层30和散热片40不接触，因此，基板10变形不会经散热片40传递给热界面材料层30，防止热界面材料层30内部或其上下界面出现裂纹，确保热界面材料层30的导热性能。此外，还可以减轻基板10的变形对芯片20贴装的影响。In the embodiment of the present application, the heat generated by the chip 20 can be transferred to the heat sink 40 through the thermal interface material layer 30, so that the heat is dissipated outside the chip 20 through the heat sink 40, and the heat dissipation of the chip 20 is completed. The thermal interface material layer 30 can fill the air gap in the joint surface between the chip 20 and the heat sink 40, reduce the contact thermal resistance between the chip 20 and the heat sink 40, and improve the heat dissipation performance of the chip 20. The reinforcement ring 50 can enhance the strength of the substrate 10 and improve the resistance to deformation of the substrate 10. Moreover, if the substrate 10 is deformed, the reinforcement ring 50 is separately arranged on the periphery of the chip 20 and is connected to the chip 20 and the thermal interface material layer 30. There is no contact with the heat sink 40. Therefore, the deformation of the substrate 10 will not be transferred to the thermal interface material layer 30 through the heat sink 40, preventing cracks in the thermal interface material layer 30 or its upper and lower interfaces, and ensuring the thermal conductivity of the thermal interface material layer 30. In addition, the influence of the deformation of the substrate 10 on the mounting of the chip 20 can also be reduced.

基板10可以为陶瓷基板、有机基板或硅基板，基板10是芯片20与外界电路连接的桥梁，基板10的作用包括但不限于：实现芯片20与外界之间的信号传输，对芯片20进行保护、支撑和散热。The substrate 10 can be a ceramic substrate, an organic substrate, or a silicon substrate. The substrate 10 is a bridge connecting the chip 20 with an external circuit. The function of the substrate 10 includes, but is not limited to: realizing signal transmission between the chip 20 and the outside world, and protecting the chip 20 , Support and heat dissipation.

芯片20的数量不限，可以在基板10上封装一个芯片20，也可以在基板上封装二个或二个以上数量的芯片20，当在基板10上封装有至少两个芯片20时，这些芯片20位于补强环50围成的空间内的基板10上，每个芯片20上方可以单独设置一个散热片40，也可以共用同一个散热片40。The number of chips 20 is not limited. One chip 20 can be packaged on the substrate 10, or two or more chips 20 can be packaged on the substrate. When at least two chips 20 are packaged on the substrate 10, these chips 20 is located on the substrate 10 in the space enclosed by the reinforcing ring 50. A heat sink 40 may be separately provided above each chip 20, or the same heat sink 40 may be shared.

将芯片20贴装在基板10上的方式有多种，例如采用倒装芯片球栅格阵列(英文全称为Flip Chip Ball Grid Array，简称为FCBGA)的方式进行贴装。芯片20包括裸芯片(英文全称为die)21和包覆在裸芯片21的外侧面上的封装层，其中，裸芯片21与基板10之间通过焊球连接，并在裸芯片21与基板10之间填充粘结胶，这个过程可以称为底部填充胶(英文全称为Underfill)。裸芯片21的顶面为图1中裸芯片21的上表面，即为裸芯片20远离基板10的表面，芯片20的顶面为芯片20远离基板10的表面，其包括裸芯片21的顶面和封装层的顶面。There are many ways to mount the chip 20 on the substrate 10, for example, a flip chip ball grid array (Flip Chip Ball Grid Array in English, FCBGA for short) is used for mounting. The chip 20 includes a bare chip (the full English name is die) 21 and a packaging layer covering the outer surface of the bare chip 21. The bare chip 21 and the substrate 10 are connected by solder balls, and the bare chip 21 is connected to the substrate 10 Fill the adhesive between the glue, this process can be called underfill glue (English full name is Underfill). The top surface of the bare chip 21 is the upper surface of the bare chip 21 in FIG. 1, that is, the surface of the bare chip 20 away from the substrate 10, and the top surface of the chip 20 is the surface of the chip 20 away from the substrate 10, which includes the top surface of the bare chip 21 And the top surface of the encapsulation layer.

封装层形成在基板10上，并包裹裸芯片21的侧面，封装层用于阻挡外部湿气、溶剂和液体等进入芯片20的内部，对芯片20产生的热量进行热扩散，增大芯片20的散热面积；此外，利用散热片40和包裹在芯片20的侧面的封装层，可以提高芯片20的承压能力，降低包装运输过程中跌落导致的芯片20断裂的风险。The encapsulation layer is formed on the substrate 10 and wraps the sides of the bare chip 21. The encapsulation layer is used to block external moisture, solvents, and liquids from entering the inside of the chip 20, and thermally diffuse the heat generated by the chip 20, increasing the chip 20's Heat dissipation area; in addition, the use of the heat sink 40 and the packaging layer wrapped on the side of the chip 20 can improve the pressure bearing capacity of the chip 20 and reduce the risk of chip 20 fracture caused by falling during packaging and transportation.

封装层的材料可以选用环氧塑封料、硅橡胶塑封料或聚酰亚胺塑封料，在本实施例中，封装层选用环氧塑封料，环氧塑封料是热固化材料，一般包括环氧树脂、硬化剂、充填机和添加剂。封装层可以由点胶的方式形成，也可以由注塑成型。当采用点胶的方式形成封装层时，通常先在基板10上沿裸芯片21的***形成一圈围坝塑封料，围坝塑封料与裸芯片21之间具有间隙，然后在围坝塑封料和裸芯片21之间的间隙中添加填充塑封料，之后对围坝塑封料和填充塑封料进行固化，固化后分别形成围坝塑封层22和嵌入在围坝封装层22内的填充塑封层23，填充塑封层23包裹裸芯片21的侧面；围坝塑封层22和填充塑封层23构成封装层。The material of the encapsulation layer can be epoxy molding compound, silicone rubber molding compound or polyimide molding compound. In this embodiment, epoxy molding compound is selected for the encapsulation layer. The epoxy molding compound is a thermosetting material, and generally includes epoxy. Resins, hardeners, filling machines and additives. The encapsulation layer can be formed by dispensing or injection molding. When the packaging layer is formed by dispensing, usually a circle of dam molding compound is formed on the substrate 10 along the periphery of the bare chip 21, and there is a gap between the dam molding compound and the bare chip 21, and then the dam molding compound Filling molding compound is added to the gap between the die and the bare chip 21, and then the dam molding compound and the filling molding compound are cured, and after curing, the dam molding layer 22 and the filling molding layer 23 embedded in the dam encapsulation layer 22 are formed respectively , The plastic filling layer 23 wraps the side of the bare chip 21; the plastic dam layer 22 and the plastic filling layer 23 constitute the packaging layer.

热界面材料层30设置在芯片20和散热片40之间，并分别与芯片20和散热片40接着烧结连接。热界面材料层30的下界面与芯片20的顶面接合，以排出芯片20的顶面的空气隙中空气；热界面材料层30的上界面与散热片40的底面接合，以排出散热片40的底面的空气隙中空气。热界面材料层30可以在较低的压力条件下填充芯片20的顶面和散热片40的底面的空气隙，减小空气热阻，从而可以减小芯片20的顶面和散热片40的底面之间的接触热阻。The thermal interface material layer 30 is disposed between the chip 20 and the heat sink 40, and is respectively connected to the chip 20 and the heat sink 40 by sintering. The lower interface of the thermal interface material layer 30 is joined to the top surface of the chip 20 to discharge air in the air gap on the top surface of the chip 20; the upper interface of the thermal interface material layer 30 is joined to the bottom surface of the heat sink 40 to discharge the heat sink 40 The air in the air gap on the bottom surface. The thermal interface material layer 30 can fill the air gap between the top surface of the chip 20 and the bottom surface of the heat sink 40 under a lower pressure condition to reduce air thermal resistance, thereby reducing the top surface of the chip 20 and the bottom surface of the heat sink 40 Contact thermal resistance between.

热界面材料层30包括第一金属层31、第二金属层33，以及位于第一金属层31和第二金属层33之间的导热层32，其中，导热层32通常包括基材层和均匀填充在基材层中的微米级或纳米级的金属颗粒，基材层可以为树脂层，金属颗粒包括银粉、锡粉、铝粉、氧化锌粉和氧化铝粉中的一种或多种，例如本实施例中金属颗粒为纳米级银粉，纳米级银粉具有极大的表面能，能够在较低的温度下熔化并实现烧结，而且纳米级银粉的热阻低，具有较佳的导热性能，从而使得热界面材料层30中可以形成较好的导热通路。The thermal interface material layer 30 includes a first metal layer 31, a second metal layer 33, and a thermally conductive layer 32 located between the first metal layer 31 and the second metal layer 33. The thermally conductive layer 32 generally includes a substrate layer and a uniform layer. Micron or nanometer metal particles filled in the substrate layer. The substrate layer can be a resin layer. The metal particles include one or more of silver powder, tin powder, aluminum powder, zinc oxide powder and aluminum oxide powder, For example, the metal particles in this embodiment are nano-scale silver powder. Nano-scale silver powder has extremely large surface energy, can be melted and sintered at a lower temperature, and the thermal resistance of nano-scale silver powder is low, and it has better thermal conductivity. As a result, a better heat conduction path can be formed in the thermal interface material layer 30.

第一金属层31与芯片20接合，即第一金属层31位于裸芯片21的顶面和封装层的顶面上，用于使芯片20与导热层32中的金属颗粒接着烧结，更加详细地说，第一金属层31可以接触扩散到芯片20的顶面以及顶面的空气隙中，以及接触扩散到导热层32中，从而使第一金属层31能够与芯片20的顶面之间形成接着烧结结构，以及与导热层32中的金属颗粒之间形成接着烧结结构，进而保证第一金属层31与芯片20之间的接着强度，以及减小第一金属层31和芯片20之间的接触热阻。The first metal layer 31 is bonded to the chip 20, that is, the first metal layer 31 is located on the top surface of the bare chip 21 and the top surface of the packaging layer, and is used to sinter the metal particles in the chip 20 and the thermally conductive layer 32, in more detail In other words, the first metal layer 31 can contact and diffuse into the top surface of the chip 20 and the air gap on the top surface, and the contact diffuses into the thermally conductive layer 32, so that the first metal layer 31 can be formed between the top surface of the chip 20 The sintered structure is then formed, and the sintered structure is formed between the metal particles in the thermally conductive layer 32, thereby ensuring the bonding strength between the first metal layer 31 and the chip 20, and reducing the gap between the first metal layer 31 and the chip 20 Contact thermal resistance.

示例性地，第一金属层31包括第一接着层和第一烧结层，第一接着层与裸芯片21的顶面和封装层的顶面接着烧结，第一接着层的材质可以为钛、铬、镍或镍钒合金；第一烧结层与导热层32中的金属颗粒接着烧结，第一烧结层的材质可以为金、银或铜。第一金属层31还包括位于第一接着层和第一烧结层之间的第一缓冲层，第一缓冲层可以提供应力缓冲功能，降低芯片20与热界面材料层30之间或热界面材料层30内部产生裂纹的风险，增加热界面材料层30的可靠性。第一缓冲层的材质可以为铝、铜、镍或镍钒合金。Exemplarily, the first metal layer 31 includes a first bonding layer and a first sintering layer. The first bonding layer and the top surface of the bare chip 21 and the top surface of the packaging layer are then sintered. The material of the first bonding layer may be titanium, Chromium, nickel or nickel vanadium alloy; the metal particles in the first sintered layer and the thermal conductive layer 32 are then sintered, and the material of the first sintered layer can be gold, silver or copper. The first metal layer 31 also includes a first buffer layer located between the first adhesive layer and the first sintered layer. The first buffer layer can provide a stress buffer function, reducing the gap between the chip 20 and the thermal interface material layer 30 or the thermal interface material layer. The risk of cracks inside 30 increases the reliability of the thermal interface material layer 30. The material of the first buffer layer can be aluminum, copper, nickel or nickel vanadium alloy.

第二金属层33与散热片40接合，第二金属层用于使散热片40与导热层32中的金属颗粒接着烧结，更加详细地说，第二金属层33可以接触扩散到散热片40的底面以及底面的空气隙中，以及接触扩散到导热层32中，从而使第二金属层33能够与散热片40的底面之间形成接着烧结结构，以及与导热层32中的金属颗粒之间形成接着烧结结构，从而保证第二金属层33和散热片40之间的接着强度，以及减小第二金属层33和散热片40之间的接触热阻。The second metal layer 33 is joined to the heat sink 40. The second metal layer is used to sinter the metal particles in the heat sink 40 and the heat conducting layer 32. In more detail, the second metal layer 33 can contact the diffused heat sink 40. The bottom surface and the air gap on the bottom surface, and the contact diffuses into the thermal conductive layer 32, so that the second metal layer 33 can form a sintered structure with the bottom surface of the heat sink 40, and form a sintered structure between the second metal layer 33 and the metal particles in the thermal conductive layer 32. Then the structure is sintered to ensure the bonding strength between the second metal layer 33 and the heat sink 40 and reduce the contact thermal resistance between the second metal layer 33 and the heat sink 40.

第二金属层33包括第二接着层和第二烧结层，第二接着层与散热片40的底面接着烧结，第二接着层的材质可以为钛、铬、镍或镍钒合金；第二烧结层与导热层32中的金属颗粒接着烧结，第二烧结层的材质可以为金、银或铜。第二金属层33还包括位于第二接着层和第二烧结层之间的第二缓冲层，第二缓冲层可以提供应力缓冲功能，降低散热片40与热界面材料层30之间或热界面材料层30内部产生裂纹的风险，增加热界面材料层30的可靠性。第二缓冲层的材质可以为铝、铜、镍或镍钒合金。The second metal layer 33 includes a second bonding layer and a second sintering layer. The second bonding layer and the bottom surface of the heat sink 40 are then sintered. The material of the second bonding layer can be titanium, chromium, nickel or nickel vanadium alloy; the second sintering The metal particles in the layer and the thermal conductive layer 32 are then sintered, and the material of the second sintered layer can be gold, silver or copper. The second metal layer 33 also includes a second buffer layer located between the second adhesive layer and the second sintered layer. The second buffer layer can provide a stress buffer function and reduce the thermal interface material between the heat sink 40 and the thermal interface material layer 30. The risk of cracks in the layer 30 increases the reliability of the thermal interface material layer 30. The material of the second buffer layer can be aluminum, copper, nickel or nickel vanadium alloy.

散热片40具有柔性可变形的能力，散热片40可以为超薄散热片，其材质可以为铜或铜合金，其厚度一般小于0.5mm。如此设计，一方面，利用散热片40的变形可以吸收应力，保护热界面材料层30以及热界面材料层30上、下界面的完整性，降低芯片20和散热片40之间的接触热阻，提高芯片20的散热性能；另一方面，散热片可以随芯片20的热胀冷缩与芯片20一起变形，降低散热片40和芯片20对热界面材料层的撕扯力，防止热界面材料层30出现裂纹，确保热界面材料层30的导热性能。The heat sink 40 has the ability to be flexible and deformable. The heat sink 40 may be an ultra-thin heat sink, and its material may be copper or copper alloy, and its thickness is generally less than 0.5 mm. With this design, on the one hand, the deformation of the heat sink 40 can absorb stress, protect the integrity of the thermal interface material layer 30 and the upper and lower interfaces of the thermal interface material layer 30, and reduce the contact thermal resistance between the chip 20 and the heat sink 40, Improve the heat dissipation performance of the chip 20; on the other hand, the heat sink can deform together with the chip 20 as the chip 20 expands and contracts, reduces the tearing force of the heat sink 40 and the chip 20 to the thermal interface material layer, and prevents the thermal interface material layer 30 Cracks appear to ensure the thermal conductivity of the thermal interface material layer 30.

补强环50设置在基板10上，芯片20、热界面材料层30和散热片40位于补强环的内圈所对应的基板10区域上，利用补强环50可以增强基板10的强度，减轻基板10变形或翘曲。补强环50可以与芯片20同侧设置，也可以与芯片20异侧设置，即补强环50和芯片20位于基板1的同一侧，也可以位于基板10的两侧。The reinforcement ring 50 is arranged on the substrate 10, and the chip 20, the thermal interface material layer 30 and the heat sink 40 are located on the area of the substrate 10 corresponding to the inner ring of the reinforcement ring. The reinforcement ring 50 can enhance the strength of the substrate 10 and reduce The substrate 10 is deformed or warped. The reinforcing ring 50 can be arranged on the same side as the chip 20 or on a different side from the chip 20, that is, the reinforcing ring 50 and the chip 20 are located on the same side of the substrate 1 or on both sides of the substrate 10.

补强环50可以为形成在基板上的凸起，凸起可以为金属凸起，也可以为非金属凸起，例如硅材质凸起。由于补强环50与芯片20、热界面材料层30、散热片40之间具有间隔，即补强环50与芯片20、热界面材料层30和散热片40不接触，因此，如果基板10发生变形，基板10变形不会经散热片40传递给热界面材料层30，防止热界面材料层30内部或其上下界面出现裂纹，确保热界面材料层30的导热性能。The reinforcing ring 50 may be a protrusion formed on the substrate, and the protrusion may be a metal protrusion or a non-metal protrusion, such as a silicon protrusion. Since the reinforcing ring 50 is separated from the chip 20, the thermal interface material layer 30, and the heat sink 40, that is, the reinforcing ring 50 does not contact the chip 20, the thermal interface material layer 30, and the heat sink 40. Therefore, if the substrate 10 Deformation, the deformation of the substrate 10 will not be transferred to the thermal interface material layer 30 through the heat sink 40, preventing cracks in the thermal interface material layer 30 or its upper and lower interfaces, and ensuring the thermal conductivity of the thermal interface material layer 30.

需要说明的是，可以先在在基板10上形成芯片20、热界面材料层30和散热片40，然后再在基板上形成补强环50；也可以先在基板10上形成补强环50，然后再在补强环50内形成芯片20、热界面材料层30和散热片40。It should be noted that the chip 20, the thermal interface material layer 30 and the heat sink 40 may be formed on the substrate 10 first, and then the reinforcing ring 50 may be formed on the substrate; the reinforcing ring 50 may also be formed on the substrate 10 first, Then, the chip 20, the thermal interface material layer 30 and the heat sink 40 are formed in the reinforcing ring 50.

请参阅图2，本申请另一实施例还提供另一种芯片封装，该芯片封装中的基板10、芯片20、热界面材料层30、散热片40和补强环50与上述实施例基本相同，因此，相同的部分可参见上述实施例的相关描述，在此不再赘述。图2所示实施例与图1所示实施例的不同之处在于：芯片封装还包括环形粘结层60，环形粘结层60围绕热界面材料层30的外边缘成环形，其材质包括但不限于环氧树脂、硅氧树脂和丙烯酸。Referring to FIG. 2, another embodiment of the present application also provides another chip package. The substrate 10, the chip 20, the thermal interface material layer 30, the heat sink 40, and the reinforcing ring 50 in the chip package are basically the same as those in the foregoing embodiment. Therefore, the same parts can be referred to the related descriptions of the above-mentioned embodiments, which will not be repeated here. The difference between the embodiment shown in FIG. 2 and the embodiment shown in FIG. 1 is that the chip package further includes a ring-shaped adhesive layer 60 that surrounds the outer edge of the thermal interface material layer 30 in a ring shape, and its material includes but It is not limited to epoxy, silicone and acrylic.

在一种可能的实现方式中，如图2所示，环形粘结层60位于导热层32的***，环形粘结层60的第一表面(图2中所示的下表面)与第一金属层31粘结，环形粘结层60的第二表面(图2中所示的上表面)与第二金属层33粘结，环形粘结层60的内圈与导热层32的外侧面接触。如此设计，将环形粘结层60设置在第一金属层31和第二金属层33之间，可以利用环形粘结层60连接第一金属层31和第二金属层33，减小第一金属层31和第二金属层33对导热层32的拉裂力，确保导热层32的导热性能。In a possible implementation, as shown in FIG. 2, the ring-shaped adhesive layer 60 is located on the periphery of the thermally conductive layer 32, and the first surface (the lower surface shown in FIG. 2) of the ring-shaped adhesive layer 60 and the first metal The layer 31 is bonded, the second surface (the upper surface shown in FIG. 2) of the ring-shaped bonding layer 60 is bonded with the second metal layer 33, and the inner ring of the ring-shaped bonding layer 60 is in contact with the outer side surface of the thermally conductive layer 32. In such a design, the ring-shaped adhesive layer 60 is arranged between the first metal layer 31 and the second metal layer 33, and the ring-shaped adhesive layer 60 can be used to connect the first metal layer 31 and the second metal layer 33 to reduce the first metal layer. The tensile force of the layer 31 and the second metal layer 33 on the thermally conductive layer 32 ensures the thermal conductivity of the thermally conductive layer 32.

在另一种可能的实现方式中，如图3所示，环形粘结层60位于热界面材料层30的***区域，或者说热界面材料层30形成在环形粘结层60围成环形空间内，环形粘结层60的第一表面(图3中所示的下表面)与芯片20远离基板10的表面粘结，环形粘结层60的第二表面(图3中所示的上表面)与散热片40靠近基板10的表面粘结。如此设计，利用环形粘结层60可以连接芯片20和散热片40，分担热界面材料层30连接芯片20和散热片40的连接力，使得热界面材料层30承担的连接力变小，从而使得热界面材料层30被拉裂开的拉裂力变小，进而可以确保热界面材料层30的导热性能。In another possible implementation, as shown in FIG. 3, the annular adhesive layer 60 is located in the peripheral area of the thermal interface material layer 30, or the thermal interface material layer 30 is formed in the annular space enclosed by the annular adhesive layer 60 , The first surface of the ring-shaped adhesive layer 60 (the lower surface shown in FIG. 3) is bonded to the surface of the chip 20 away from the substrate 10, and the second surface of the ring-shaped adhesive layer 60 (the upper surface shown in FIG. 3) It is bonded to the surface of the heat sink 40 close to the substrate 10. In this design, the ring-shaped adhesive layer 60 can be used to connect the chip 20 and the heat sink 40, share the connection force of the thermal interface material layer 30 connecting the chip 20 and the heat sink 40, so that the connection force assumed by the thermal interface material layer 30 is reduced, thereby making The tensile cracking force of the thermal interface material layer 30 being pulled apart is reduced, so that the thermal conductivity of the thermal interface material layer 30 can be ensured.

需要说明的是，在上述实施例中，粘结可以理解为黏合连接，或者粘在一起；接合可以理解为接着烧结形成的连接。It should be noted that, in the above embodiments, bonding can be understood as an adhesive connection, or sticking together; and bonding can be understood as a connection formed by subsequent sintering.

请参阅图4，本申请实施例还提供了一种芯片封装的制作方法，该制作方法包括：Referring to FIG. 4, an embodiment of the present application also provides a manufacturing method of a chip package, and the manufacturing method includes:

步骤100，在基板上贴装芯片。 Step 100, mount a chip on a substrate.

示例性地，首先提供一基板10，并对基板10进行清洗、干燥；然后，将裸芯片21贴装在基板10上，具体可以采用倒装芯片球栅格阵列的方式进行贴装。贴装过程包括：首先将裸芯片21的底部焊球焊接基板10上；然后，在裸芯片21的底部填充粘结胶，该粘结胶包裹各焊球，以对焊球进行封装，裸芯片21贴装在基板10上后的结构图如图5所示。Illustratively, a substrate 10 is provided first, and the substrate 10 is cleaned and dried; then, the bare chip 21 is mounted on the substrate 10, specifically, a flip chip ball grid array can be used for mounting. The mounting process includes: first soldering the bottom solder balls of the bare chip 21 to the substrate 10; then, filling the bottom of the bare chip 21 with adhesive, which wraps the solder balls to encapsulate the solder balls. The structure diagram after 21 is mounted on the substrate 10 is shown in FIG. 5.

接下来，在基板10上形成环绕裸芯片21的围坝塑封层22，例如，采用点胶的方式在裸芯片21的***形成围坝塑封料，围坝塑封料固化后形成围坝塑封层22，如图6和图7所示，围坝塑封层22围成一环形空间，裸芯片21位于该环形空间内。Next, a dam molding layer 22 surrounding the bare chip 21 is formed on the substrate 10, for example, a dam molding compound is formed on the periphery of the bare chip 21 by dispensing glue, and the dam molding compound is cured to form the dam molding layer 22 As shown in FIGS. 6 and 7, the dam plastic encapsulation layer 22 encloses an annular space, and the bare chip 21 is located in the annular space.

之后，在围坝塑封层22和裸芯片21之间的间隙内加入填充塑封料，填充塑封料包覆裸芯片21的侧面和顶面；然后可以采用加温固化的方式使填充塑封料固化，固化后形成嵌入围坝塑封层22内的填充塑封层23，如图8和图9所示，固化后形成填充塑封层23覆盖裸芯片21，因此当从俯视方向观看时，看不到被填充塑封层23覆盖在下方的裸芯片21。After that, a filling plastic compound is added into the gap between the dam plastic sealing layer 22 and the bare chip 21, and the filling plastic compound covers the side and top surface of the bare chip 21; then the filling plastic compound can be cured by heating and curing. After curing, a filled plastic encapsulation layer 23 embedded in the dam plastic encapsulation layer 22 is formed. As shown in Figures 8 and 9, a filled plastic encapsulation layer 23 is formed after curing to cover the bare chip 21. Therefore, when viewed from a top view, the filled plastic encapsulation layer 23 cannot be seen. The plastic encapsulation layer 23 covers the bare chip 21 underneath.

在上述实现方式中，围坝塑封料和填充塑封料在二次固化中完成固化，但不限于此，也可以在一次固化中完成固化，示例性地，首先，在基板10上形成围绕裸芯片21的围坝塑封料，围坝塑封料与裸芯片21之间具有间隔；然后，向所述间隔中加入填充塑封料，最后同时对围坝塑封料填充塑封料进行固化。固化的方式包括但不限于加温固化、UV固化或微波固化，具体可以根据围坝塑封料22和填充塑封料23的材料特性选择合适的固化方式。In the above implementation manner, the dam molding compound and the filling molding compound are cured in the secondary curing, but it is not limited to this, and the curing may also be completed in the primary curing. Illustratively, first, forming a surrounding bare chip on the substrate 10 21, there is a gap between the dam molding compound and the bare chip 21; then, the filling molding compound is added to the gap, and finally the dam molding compound is simultaneously filled with the molding compound to cure. The curing method includes but is not limited to heating curing, UV curing or microwave curing. Specifically, a suitable curing method can be selected according to the material characteristics of the dam molding compound 22 and the filling molding compound 23.

接下来，对围坝塑封层22的顶面和填充塑封层23的顶面进行研磨，例如机械研磨，以使裸芯片21的顶面露出，如图10和图11所示，裸芯片21的顶面与围坝塑封层22的顶面和填充塑封层23的顶面平齐，如此设计，一方面，可以使裸芯片21的厚度与封装层的厚度相同；另一方面，当在芯片20和散热片40之间形成热界面材料层30时，由于裸芯片21的顶面与围坝塑封层22的顶面和填充塑封层23的顶面平齐，防止热界面材料层30内部出现剪切力，从而可以避免热界面材料层30中出现裂纹，确保热界面材料层30具有较佳的导热性能。Next, the top surface of the dam plastic sealing layer 22 and the top surface of the filling plastic sealing layer 23 are polished, for example, mechanically polished, so that the top surface of the bare chip 21 is exposed. As shown in FIGS. 10 and 11, the top surface of the bare chip 21 The top surface is flush with the top surface of the dam plastic encapsulation layer 22 and the top surface of the filling plastic encapsulation layer 23. With this design, on the one hand, the thickness of the bare chip 21 can be made the same as the thickness of the encapsulation layer; When the thermal interface material layer 30 is formed between the thermal interface material layer 30 and the heat sink 40, since the top surface of the bare chip 21 is flush with the top surface of the dam plastic encapsulation layer 22 and the top surface of the filling plastic encapsulation layer 23, shearing inside the thermal interface material layer 30 is prevented. Therefore, it is possible to avoid cracks in the thermal interface material layer 30 and ensure that the thermal interface material layer 30 has better thermal conductivity.

值得一提的是，上述实施例通过点胶、固化的方式形成围坝塑封层22和填充塑封层23，但不限于此，还可以采用其它方式形成围坝塑封层22和填充塑封层23。例如：在将芯片20贴装在基板10上后，采用转移注塑机台或压缩注塑机台以及相应成型模具，在裸芯片21的侧面形成围坝塑封层22，围坝塑封层22形成在基板10上，并环绕裸芯片21的侧面设置，且围坝塑封层22包裹在裸芯片21的周向侧面上，如图12所示，采用这种方式形成的封装层由围坝塑封层22构成。此外，采用这种方式形成的封装层，可以直接使裸芯片21的顶面与围坝塑封层22的顶面和填充塑封层23的顶面平齐，不需要后续研磨工序，简化了芯片贴装的工艺流程。It is worth mentioning that in the above embodiment, the dam plastic encapsulation layer 22 and the filling plastic encapsulation layer 23 are formed by dispensing and curing, but it is not limited to this, and other methods can also be used to form the dam plastic encapsulation layer 22 and the filling plastic layer 23. For example: after the chip 20 is mounted on the substrate 10, a transfer injection molding machine or a compression injection molding machine and a corresponding molding die are used to form a dam plastic encapsulation layer 22 on the side of the bare chip 21, and the dam plastic encapsulation layer 22 is formed on the substrate 10, and arranged around the side of the bare chip 21, and the dam plastic encapsulation layer 22 is wrapped on the circumferential side of the bare chip 21, as shown in FIG. 12, the encapsulation layer formed in this way is composed of the dam plastic encapsulation layer 22 . In addition, the packaging layer formed in this way can directly make the top surface of the bare chip 21 flush with the top surface of the dam plastic encapsulation layer 22 and the top surface of the filling plastic encapsulation layer 23, without the need for subsequent grinding processes, which simplifies the chip attachment. The process of installation.

步骤110，在芯片的顶面形成热界面材料层。 Step 110, forming a thermal interface material layer on the top surface of the chip.

示例性地，首先，在裸芯片21的顶面、围坝塑封层22的顶面和填充塑封层23的顶面形成第一金属层31，如图13所示，第一金属层31能够与芯片20的顶面之间形成接着烧结结构，以及与导热层32中的金属颗粒之间形成接着烧结结构，从而填充芯片20的顶面的空气隙，同时也可以保证两者之间的接着强度。第一金属层31包括第一接着层和第一烧结层，第一接着层与裸芯片21的顶面和封装层的顶面接着烧结，第一接着层的材质可以为钛、铬、镍或镍钒合金；第一烧结层与导热层32中的金属颗粒接着烧结，第一烧结层的材质可以为金、银或铜。第一金属层31还包括位于第一接着层和第一烧结层之间的第一缓冲层，第一缓冲层可以提供应力缓冲功能，降低芯片20与热界面材料层30之间或热界面材料层30内部产生裂纹的风险，增加热界面材料层30的可靠性。第一缓冲层的材质可以为铝、铜、镍或镍钒合金。Illustratively, first, a first metal layer 31 is formed on the top surface of the bare chip 21, the top surface of the dam plastic encapsulation layer 22, and the top surface of the filling plastic encapsulation layer 23. As shown in FIG. 13, the first metal layer 31 can be combined with A sintered structure is formed between the top surface of the chip 20, and a sintered structure is formed between the metal particles in the thermally conductive layer 32, so as to fill the air gap on the top surface of the chip 20, and at the same time ensure the bonding strength between the two . The first metal layer 31 includes a first bonding layer and a first sintering layer. The first bonding layer is then sintered with the top surface of the bare chip 21 and the top surface of the packaging layer. The material of the first bonding layer can be titanium, chromium, nickel or Nickel vanadium alloy; the metal particles in the first sintered layer and the thermal conductive layer 32 are then sintered, and the material of the first sintered layer can be gold, silver or copper. The first metal layer 31 also includes a first buffer layer located between the first adhesive layer and the first sintered layer. The first buffer layer can provide a stress buffer function, reducing the gap between the chip 20 and the thermal interface material layer 30 or the thermal interface material layer. The risk of cracks inside 30 increases the reliability of the thermal interface material layer 30. The material of the first buffer layer can be aluminum, copper, nickel or nickel vanadium alloy.

接下来，在第一金属层31上形成导热层32，形成有导热层32的结构如图14所示，导热层32通常包括基材层和均匀填充在基材层中的微米级或纳米级的金属颗粒，其中，基材层可以为树脂层，金属颗粒包括银粉、锡粉、铝粉、氧化锌粉和氧化铝粉中的一种或多种，例如本实施例中金属颗粒为银粉。金属颗粒可以采用微米级或纳米级金属颗粒，纳米级的金属颗粒的热阻低，可以形成较好的导热通路。Next, a thermally conductive layer 32 is formed on the first metal layer 31. The structure of the thermally conductive layer 32 is shown in FIG. 14. The thermally conductive layer 32 usually includes a substrate layer and a micron or nanometer layer uniformly filled in the substrate layer. Among the metal particles, the substrate layer can be a resin layer, and the metal particles include one or more of silver powder, tin powder, aluminum powder, zinc oxide powder, and aluminum oxide powder. For example, the metal particles in this embodiment are silver powder. The metal particles can be micron-level or nano-level metal particles, and the nano-level metal particles have low thermal resistance and can form a better heat conduction path.

之后，在导热层32上形成第二金属层33，形成有第二金属层的结构如图14所示。第二金属层33与散热片40接合，第二金属层33能够与散热片40的底面之间形成接着烧结结构，以及与导热层32中的金属颗粒之间形成接着烧结结构，从而填充散热片40的底面的空气隙，同时也可以保证两者之间的接着强度。第二金属层33包括第二接着层和第二烧结层，第二接着层与散热片40的底面连接，第二接着层的材质可以为钛、铬、镍或镍钒合金；第二烧结层与导热层32中的金属颗粒接着烧结，第二烧结层的材质可以为金、银或铜。第二金属层33还包括位于第二接着层和第二烧结层之间的第二缓冲层，第二缓冲层可以提供应力缓冲功能，降低散热片40与热界面材料层30之间或热界面材料层30内部产生裂纹的风险，增加热界面材料层30的可靠性。第二缓冲层的材质可以为铝、铜、镍或镍钒合金。After that, a second metal layer 33 is formed on the heat-conducting layer 32, and the structure with the second metal layer is as shown in FIG. 14. The second metal layer 33 is joined to the heat sink 40. The second metal layer 33 can form a sintered structure with the bottom surface of the heat sink 40, and form a sintered structure with the metal particles in the heat conducting layer 32, thereby filling the heat sink. The air gap on the bottom surface of 40 can also ensure the bonding strength between the two. The second metal layer 33 includes a second adhesive layer and a second sintered layer. The second adhesive layer is connected to the bottom surface of the heat sink 40. The material of the second adhesive layer can be titanium, chromium, nickel or nickel vanadium alloy; the second sintered layer The metal particles in the thermal conductive layer 32 are then sintered, and the material of the second sintered layer can be gold, silver or copper. The second metal layer 33 also includes a second buffer layer located between the second adhesive layer and the second sintered layer. The second buffer layer can provide a stress buffer function and reduce the thermal interface material between the heat sink 40 and the thermal interface material layer 30. The risk of cracks in the layer 30 increases the reliability of the thermal interface material layer 30. The material of the second buffer layer can be aluminum, copper, nickel or nickel vanadium alloy.

步骤120，在热界面材料层上形成散热片。 Step 120, forming a heat sink on the thermal interface material layer.

示例性地，将散热片40粘结在第二金属层33上，或者，在第二金属层33上形成金属膜，然后通过掩膜、刻蚀去除部分金属膜，保留位于第二金属层33上的金属膜，第二金属层33上的金属膜即为散热片40。形成有散热片40的结构如图15所示。Exemplarily, the heat sink 40 is bonded to the second metal layer 33, or a metal film is formed on the second metal layer 33, and then a part of the metal film is removed by masking and etching, leaving behind the second metal layer 33. The metal film on the upper metal film and the metal film on the second metal layer 33 are the heat sink 40. The structure in which the heat sink 40 is formed is as shown in FIG. 15.

散热片40具有较佳的变形的能力，散热片41可以为超薄散热片，其材质可以为铜或铜合金，其厚度一般小于0.5mm。采用可变形的散热片40，一方面，利用散热片40的变形可以吸收应力，保护热界面材料层30以及热界面材料层30的上、下界面的完整性，降低芯片20和散热片40之间的接触热阻，提高芯片20的散热性能；另一方面，散热片可以随芯片20的热胀冷缩与芯片20一起变形，降低散热片40和芯片20对热界面材料层30的撕扯力，防止热界面材料层30中出现裂纹，确保热界面材料层30的导热性能。The heat sink 40 has a better deformability. The heat sink 41 may be an ultra-thin heat sink, and its material may be copper or copper alloy, and its thickness is generally less than 0.5 mm. Using a deformable heat sink 40, on the one hand, the deformation of the heat sink 40 can absorb stress, protect the integrity of the thermal interface material layer 30 and the upper and lower interfaces of the thermal interface material layer 30, and reduce the difference between the chip 20 and the heat sink 40. The thermal contact resistance between them improves the heat dissipation performance of the chip 20; on the other hand, the heat sink can deform together with the chip 20 with the thermal expansion and contraction of the chip 20, reducing the tearing force of the heat sink 40 and the chip 20 to the thermal interface material layer 30 , To prevent cracks in the thermal interface material layer 30, and ensure the thermal conductivity of the thermal interface material layer 30.

步骤130，在基板上形成补强环。 Step 130, forming a reinforcing ring on the substrate.

示例性地，通过粘结的方式在基板10上形成补强环50，形成有补强环50的结构如图1、图2或图3所示。补强环50也可以采用沉积、掩膜、刻蚀的方式形成，例如，补强环50与散热片40一起形成，刻蚀时去除部分金属膜后，保留位于第二金属层33上的金属膜和位于芯片20***的金属膜，且这两部分金属膜之间相互断开不接触。因此，如果基板10发生变形，基板10变形不会经散热片40传递给热界面材料层30，防止热界面材料层30内部或其上、下界面出现裂纹，确保热界面材料层30的导热性能。Exemplarily, the reinforcing ring 50 is formed on the substrate 10 by bonding, and the structure of the reinforcing ring 50 is shown in FIG. 1, FIG. 2 or FIG. 3. The reinforcing ring 50 can also be formed by deposition, masking, and etching. For example, the reinforcing ring 50 is formed together with the heat sink 40. After part of the metal film is removed during etching, the metal on the second metal layer 33 is retained. The film and the metal film located on the periphery of the chip 20, and the two metal films are disconnected from each other without contact. Therefore, if the substrate 10 is deformed, the deformation of the substrate 10 will not be transferred to the thermal interface material layer 30 through the heat sink 40, preventing cracks in the thermal interface material layer 30 or its upper and lower interfaces, and ensuring the thermal conductivity of the thermal interface material layer 30 .

采用上述制作方法制成的芯片封装中，利用补强环50能够增强基板的强度，提高基板10的抗变形能力，而且，如果基板10发生变形，由于补强环50单独设置于芯片的***，并与芯片20、热界面材料层30和散热片40不接触，因此，基板10的变形不会经散热片40传递给热界面材料层30，防止热界面材料层30内部或其上下界面出现裂纹，确保热界面材料层30的导热性能。此外，由于芯片20工作时和工作后的热胀冷缩产生的应力，这些应力会传递到基板10中，而补强环50的存在，可以降低这些应力对基板10的影响，从而降低基板10因应力发生变形的风险。In the chip package made by the above-mentioned manufacturing method, the reinforcing ring 50 can enhance the strength of the substrate and improve the deformation resistance of the substrate 10. Moreover, if the substrate 10 is deformed, since the reinforcing ring 50 is separately arranged on the periphery of the chip, And it is not in contact with the chip 20, the thermal interface material layer 30 and the heat sink 40. Therefore, the deformation of the substrate 10 will not be transferred to the thermal interface material layer 30 through the heat sink 40 to prevent cracks in the thermal interface material layer 30 or its upper and lower interfaces. , To ensure the thermal conductivity of the thermal interface material layer 30. In addition, due to the stresses generated by the thermal expansion and contraction of the chip 20 during and after operation, these stresses will be transmitted to the substrate 10, and the existence of the reinforcing ring 50 can reduce the influence of these stresses on the substrate 10, thereby reducing the substrate 10. Risk of deformation due to stress.

此外，散热片40具有较佳的变形能力，利用散热片40的变形可以吸收应力，保护热界面材料层30以及热界面材料层30上、下界面的完整性，降低芯片20和散热片40之间的接触热阻，提高芯片20的散热性能；另一方面，利用散热片40的变形，使得散热片可以跟随芯片20和热界面材料层30一起变形，降低散热片40和芯片20对热界面材料层的撕扯力，防止热界面材料层30出现裂纹，确保热界面材料层30的导热性能。In addition, the heat sink 40 has better deformability. The deformation of the heat sink 40 can absorb stress, protect the integrity of the thermal interface material layer 30 and the upper and lower interfaces of the thermal interface material layer 30, and reduce the difference between the chip 20 and the heat sink 40. The thermal contact resistance between the heat sinks improves the heat dissipation performance of the chip 20; on the other hand, the deformation of the heat sink 40 allows the heat sink to deform along with the chip 20 and the thermal interface material layer 30, reducing the thermal interface between the heat sink 40 and the chip 20. The tearing force of the material layer prevents cracks in the thermal interface material layer 30 and ensures the thermal conductivity of the thermal interface material layer 30.

另外，利用散热片40以及包裹在裸芯片21侧面上的封装层，能够提高芯片20的承压能力，降低包装运输过程中跌落导致的芯片20断裂的风险。再者，封装层形成在裸芯片21的侧面上，与在裸芯片21的侧面没有设置封装层相比，增大了芯片20的顶面面积，从而增大了热界面材料层30与芯片20的接合面积，进而为芯片20提供了更大的散热范围，提高了芯片20的散热性能。In addition, the use of the heat sink 40 and the packaging layer wrapped on the side of the bare chip 21 can improve the pressure bearing capacity of the chip 20 and reduce the risk of the chip 20 breaking due to falling during packaging and transportation. Furthermore, the encapsulation layer is formed on the side surface of the bare chip 21. Compared with the side surface of the bare chip 21 without an encapsulation layer, the top surface area of the chip 20 is increased, thereby increasing the thermal interface material layer 30 and the chip 20. The bonding area of the chip 20 provides a larger heat dissipation range and improves the heat dissipation performance of the chip 20.

在上述芯片封装的制作方法中，当需要制作出包括环形粘结层60的芯片封装时，可以在步骤100和步骤110之间，增加一个制作环形粘结层60的步骤。具体地，可以在芯片20的顶面靠近边缘的区域，涂布形成环形粘结层60，环形粘结层60的材质包括但不限于环氧树脂、硅氧树脂和丙烯酸。然后在进行步骤110时，将热界面材料填充在环形粘结层60围成的环形空间内，以形成热界面材料层30，之后将散热片40粘结在环形粘结层60和热界面材料层30上。In the manufacturing method of the above-mentioned chip package, when a chip package including the ring-shaped adhesive layer 60 needs to be manufactured, a step of manufacturing the ring-shaped adhesive layer 60 may be added between step 100 and step 110. Specifically, a ring-shaped adhesive layer 60 may be formed by coating on the area near the edge of the top surface of the chip 20. The material of the ring-shaped adhesive layer 60 includes but is not limited to epoxy resin, silicone resin, and acrylic. Then in step 110, the thermal interface material is filled in the annular space enclosed by the annular adhesive layer 60 to form the thermal interface material layer 30, and then the heat sink 40 is bonded to the annular adhesive layer 60 and the thermal interface material On layer 30.

在本说明书的描述中，参考术语“一个实施方式”、“一些实施方式”、“示意性实施方式”、“示例”、“具体示例”、或“一些示例”等的描述意指结合实施方式或示例描述的具体特征、结构、材料或者特点包含于本申请的至少一个实施方式或示例中。在本说明书中，对上述术语的示意性表述不一定指的是相同的实施方式或示例。而且，描述的具体特征、结构、材料或者特点可以在任何的一个或多个实施方式或示例中以合适的方式结合。In the description of this specification, the description with reference to the terms “one embodiment”, “some embodiments”, “exemplary embodiments”, “examples”, “specific examples”, or “some examples” etc. means to combine the embodiments The specific features, structures, materials, or characteristics described by the examples are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above-mentioned terms does not necessarily refer to the same embodiment or example. Moreover, the described specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

最后应说明的是：以上各实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述各实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的范围。Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the application, not to limit them; although the application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: It is still possible to modify the technical solutions described in the foregoing embodiments, or equivalently replace some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the technical solutions of the embodiments of the present application. range.

Claims

一种芯片封装，其特征在于，包括：基板，依次堆叠设置于所述基板的第一表面的芯片、热界面材料层和散热片，以及设置于所述第一表面的补强环；所述补强环包围所述芯片，并与所述芯片、所述热界面材料层和所述散热片之间具有间隔。A chip package, characterized by comprising: a substrate, a chip, a thermal interface material layer, and a heat sink arranged on a first surface of the substrate, and a reinforcing ring arranged on the first surface; The reinforcing ring surrounds the chip and has a space between the chip, the thermal interface material layer and the heat sink.
根据权利要求1所述的芯片封装，其特征在于，所述补强环为环形凸起。The chip package of claim 1, wherein the reinforcing ring is an annular protrusion.
根据权利要求1或2所述的芯片封装，其特征在于，所述散热片为柔性散热片。The chip package according to claim 1 or 2, wherein the heat sink is a flexible heat sink.
根据权利要求1-3任一项所述的芯片封装，其特征在于，所述芯片封装还包括环形粘结层，所述环形粘结层环设在所述热界面材料层的周向边缘，所述环形粘结层的第一表面与所述芯片远离所述基板的表面粘结，所述环形粘结层的第二表面与所述散热片靠近所述基板的表面粘结。The chip package according to any one of claims 1 to 3, wherein the chip package further comprises a ring-shaped adhesive layer, the ring-shaped adhesive layer is arranged around a circumferential edge of the thermal interface material layer, The first surface of the ring-shaped adhesive layer is bonded to the surface of the chip away from the substrate, and the second surface of the ring-shaped adhesive layer is bonded to the surface of the heat sink close to the substrate.
根据权利要求1-3任一项所述的芯片封装，其特征在于，所述热界面材料层包括与所述芯片接合的第一金属层，与所述散热片接合的第二金属层，以及位于所述第一金属层和所述第二金属层之间的导热层，所述导热层分别与所述第一金属层和第二金属层接合。The chip package according to any one of claims 1 to 3, wherein the thermal interface material layer comprises a first metal layer bonded to the chip, a second metal layer bonded to the heat sink, and A thermally conductive layer located between the first metal layer and the second metal layer, and the thermally conductive layer is respectively bonded to the first metal layer and the second metal layer.
根据权利要求5所述的芯片封装，其特征在于，所述芯片封装还包括环形粘结层，所述环形粘结层环设在所述导热层的周向边缘，所述环形粘结层的第一表面与所述第一金属层粘结，所述环形粘结层的第二表面与所述第二金属层粘结。The chip package according to claim 5, wherein the chip package further comprises a ring-shaped adhesive layer, the ring-shaped adhesive layer is ring-shaped on the circumferential edge of the thermally conductive layer, the ring-shaped adhesive layer The first surface is bonded to the first metal layer, and the second surface of the annular bonding layer is bonded to the second metal layer.
根据权利要求4或6所述的芯片封装，其特征在于，所述环形粘结层的材料包括环氧树脂、硅树脂、硅氧树脂或丙烯酸。The chip package according to claim 4 or 6, wherein the material of the annular adhesive layer comprises epoxy resin, silicone resin, silicone resin or acrylic.
根据权利要求5所述的芯片封装，其特征在于，所述导热层包括基材层以及均匀填充在所述基材层内的纳米级金属颗粒。The chip package of claim 5, wherein the thermally conductive layer comprises a substrate layer and nano-scale metal particles uniformly filled in the substrate layer.
根据权利要求8所述的芯片封装，其特征在于，所述基材层为树脂层，所述金属颗粒包括银粉、锡粉、铝粉、氧化锌粉和氧化铝粉中的一种或多种。The chip package according to claim 8, wherein the substrate layer is a resin layer, and the metal particles include one or more of silver powder, tin powder, aluminum powder, zinc oxide powder, and aluminum oxide powder .
根据权利要求5所述的芯片封装，其特征在于，The chip package of claim 5, wherein:

所述第一金属层包括第一接着层和第一烧结层，所述第一接着层与所述芯片连接，所述第一烧结层与所述导热层连接；The first metal layer includes a first adhesive layer and a first sintered layer, the first adhesive layer is connected to the chip, and the first sintered layer is connected to the thermally conductive layer;

所述第二金属层包括第二接着层和第二烧结层，所述第二接着层与所述散热片连接，所述第二烧结层与所述导热层连接。The second metal layer includes a second adhesive layer and a second sintered layer, the second adhesive layer is connected to the heat sink, and the second sintered layer is connected to the heat conductive layer.
根据权利要求10所述的芯片封装，其特征在于，The chip package of claim 10, wherein:

所述第一金属层还包括位于所述第一接着层和所述第一烧结层之间的第一缓冲层；The first metal layer further includes a first buffer layer located between the first adhesive layer and the first sintered layer;

所述第二金属层还包括位于所述第二接着层和所述第二烧结层之间的第二缓冲层。The second metal layer further includes a second buffer layer located between the second adhesive layer and the second sintered layer.
根据权利要求11所述的芯片封装，其特征在于，所述第一接着层的材质为钛、铬、镍或镍钒合金，所述第一缓冲层的材质为铝、铜、镍或镍钒合金，所述第一烧结层的材质为金、银或铜；The chip package according to claim 11, wherein the material of the first bonding layer is titanium, chromium, nickel or nickel vanadium alloy, and the material of the first buffer layer is aluminum, copper, nickel or nickel vanadium. Alloy, the material of the first sintered layer is gold, silver or copper;

所述第二接着层的材质为钛、铬、镍或镍钒合金，所述第二缓冲层的材质为铝、铜、镍或镍钒合金，所述第二烧结层的材质为金、银或铜。The material of the second adhesive layer is titanium, chromium, nickel or nickel vanadium alloy, the material of the second buffer layer is aluminum, copper, nickel or nickel vanadium alloy, and the material of the second sintered layer is gold and silver. Or copper.
根据权利要求1所述的芯片封装，其特征在于，所述芯片包括设置于所述基板上的裸芯片，以及覆盖在所述裸芯片的侧面上的封装层，所述封装层朝向所述热界面材料层的面与所述裸芯片朝向所述热界面材料层的面平齐。The chip package according to claim 1, wherein the chip comprises a bare chip disposed on the substrate, and an encapsulation layer covering a side surface of the bare chip, and the encapsulation layer faces the heat The surface of the interface material layer is flush with the surface of the bare chip facing the thermal interface material layer.
根据权利要求13所述的芯片封装，其特征在于，所述封装层包括围坝塑封层和嵌设于所述围坝塑封层内的填充塑封层。The chip package according to claim 13, wherein the encapsulation layer comprises a dam plastic encapsulation layer and a filling plastic encapsulation layer embedded in the dam plastic encapsulation layer.
一种芯片封装的制作方法，其特征在于，包括：A method for manufacturing a chip package, which is characterized in that it comprises:

在基板的第一表面上贴装芯片；Mount the chip on the first surface of the substrate;

在所述芯片远离所述基板的表面上形成热界面材料层；Forming a thermal interface material layer on the surface of the chip away from the substrate;

在所述热界面材料层远离所述芯片的表面上形成散热片；Forming a heat sink on the surface of the thermal interface material layer away from the chip;

在所述第一表面上形成补强环，所述补强环包围所述芯片，且所述补强环与所述芯片、所述热界面材料层和所述散热片之间具有间隔。A reinforcing ring is formed on the first surface, the reinforcing ring surrounds the chip, and there is an interval between the reinforcing ring and the chip, the thermal interface material layer, and the heat sink.
根据权利要求15所述的制作方法，其特征在于，在基板的第一表面上贴装芯片的步骤包括：15. The manufacturing method of claim 15, wherein the step of mounting a chip on the first surface of the substrate comprises:

采用底部填充胶的方式将裸芯片粘结在所述基板的第一表面上；Adhere the bare chip on the first surface of the substrate by means of underfill glue;

在所述基板的第一表面上形成封装层，所述封装层覆盖所述裸芯片的侧面，且所述封装层远离所述基板的表面与所述裸芯片远离所述基板的表面平齐。An encapsulation layer is formed on the first surface of the substrate, the encapsulation layer covers the side surface of the bare chip, and the surface of the encapsulation layer away from the substrate is flush with the surface of the bare chip away from the substrate.
根据权利要求16所述的制作方法，其特征在于，在所述基板的第一表面上形成封装层的步骤包括：The manufacturing method according to claim 16, wherein the step of forming an encapsulation layer on the first surface of the substrate comprises:

在所述基板的第一表面上形成围坝塑封料，所述围坝塑封料环绕所述裸芯片，且所述围坝塑封料与所述裸芯片之间具有间隔；Forming a dam molding compound on the first surface of the substrate, the dam molding compound surrounds the bare chip, and there is an interval between the dam molding compound and the bare chip;

在所述间隔中设置填充塑封料，所述填充塑封料包覆所述裸芯片的侧面和远离所述基板的表面；A filling plastic compound is arranged in the gap, and the filling plastic compound covers the side surface of the bare chip and the surface away from the substrate;

固化所述围坝塑封料和填充塑封料，以分别形成围坝塑封层和填充塑封层；Curing the dam molding compound and the filling molding compound to form the dam molding layer and the filling molding layer respectively;

研磨所述围坝塑封层和填充塑封层，使所述围坝塑封层远离所述基板的表面和所述填充塑封层远离所述基板的表面与所述裸芯片远离所述基板的表面平齐。Grind the dam plastic encapsulation layer and the filling plastic encapsulation layer so that the surface of the dam plastic encapsulation layer away from the substrate and the surface of the filling plastic encapsulation layer away from the substrate are flush with the surface of the bare chip away from the substrate .
根据权利要求15所述的制作方法，其特征在于，在所述芯片远离所述基板的表面上形成热界面材料层的步骤包括：The manufacturing method according to claim 15, wherein the step of forming a thermal interface material layer on the surface of the chip away from the substrate comprises:

在所述芯片远离所述基板的表面上形成第一金属层；Forming a first metal layer on the surface of the chip away from the substrate;

在所述第一金属层远离所述芯片的表面形成导热层，所述导热层包括基材层以及均匀填充在所述基材层内的纳米级金属颗粒；Forming a thermally conductive layer on the surface of the first metal layer away from the chip, the thermally conductive layer including a substrate layer and nano-scale metal particles uniformly filled in the substrate layer;

在所述导热层远离所述第一金属层的表面上形成第二金属层。A second metal layer is formed on the surface of the thermally conductive layer away from the first metal layer.
根据权利要求18所述的制作方法，其特征在于，在所述第一金属层远离所述芯片的表面形成导热层的步骤之后，在所述导热层远离所述第一金属层的表面上形成第二金属层的步骤之前，还包括在所述第一金属层远离所述基板的表面上形成环形粘结层，所述环形粘结层包覆所述导热层的侧面。18. The manufacturing method of claim 18, wherein after the step of forming a thermally conductive layer on the surface of the first metal layer away from the chip, the thermally conductive layer is formed on the surface of the thermally conductive layer away from the first metal layer. Before the step of the second metal layer, the method further includes forming a ring-shaped adhesive layer on the surface of the first metal layer away from the substrate, and the ring-shaped adhesive layer covers the side surface of the heat conductive layer.