WO2020119076A1 - 一种像素电路、显示装置和像素电路的驱动方法 - Google Patents

一种像素电路、显示装置和像素电路的驱动方法 Download PDF

Info

Publication number
WO2020119076A1
WO2020119076A1 PCT/CN2019/093315 CN2019093315W WO2020119076A1 WO 2020119076 A1 WO2020119076 A1 WO 2020119076A1 CN 2019093315 W CN2019093315 W CN 2019093315W WO 2020119076 A1 WO2020119076 A1 WO 2020119076A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
pixel circuit
storage capacitor
light emitting
driving
Prior art date
Application number
PCT/CN2019/093315
Other languages
English (en)
French (fr)
Inventor
盖翠丽
Original Assignee
昆山工研院新型平板显示技术中心有限公司
昆山国显光电有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 昆山工研院新型平板显示技术中心有限公司, 昆山国显光电有限公司 filed Critical 昆山工研院新型平板显示技术中心有限公司
Priority to KR1020217020950A priority Critical patent/KR20210092306A/ko
Publication of WO2020119076A1 publication Critical patent/WO2020119076A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0626—Adjustment of display parameters for control of overall brightness

Definitions

  • Embodiments of the present application relate to the display field, and in particular, to a pixel circuit, a display device, and a driving method of the pixel circuit.
  • Organic Light-Emitting Diode can be divided into PMOLED (Passive matrix light-emitting diode) and AMOLED (Active-matrix organic light-emitting diode) according to the driving method.
  • Organic light-emitting diodes With the rapid development of flat panel display technology, especially AMOLED displays have been widely used in high-end mobile phones, TVs and other electronic display products.
  • Micro LED as a new generation display technology, has higher brightness, better luminous efficiency, but lower power consumption than the existing OLED technology. Micro LED as a solution for future display has also become a research and development hotspot in the field of display.
  • the purpose of the embodiments of the present application is to provide a driving method for a pixel circuit, a display device, and a pixel circuit, so that when the storage capacitance of the pixel circuit is unchanged, the brightness of the light emitting device is controlled by the driving signal transmitted by the control line, which improves Control of the brightness of the pixel circuit.
  • An embodiment of the present application provides a pixel circuit, including: a first transistor, a second transistor, a third transistor, a storage capacitor, and a light emitting device; the control terminal of the first transistor is connected to the scan line, and the first terminal of the first transistor Connected to the data line, the second end of the first transistor is connected to the first end of the storage capacitor and the control end of the second transistor, the second end of the storage capacitor is connected to the power supply voltage; the control end of the third transistor is connected to the control line The first end of the third transistor is connected to the power supply voltage, the second end of the third transistor is connected to the first end of the second transistor; the anode of the light emitting device is connected to the second end of the second transistor, and the cathode of the light emitting device is grounded.
  • An embodiment of the present application further provides a display device, including the above pixel circuit.
  • An embodiment of the present application also provides a driving method of a pixel circuit, which is applied to the above pixel circuit, and includes: a first voltage signal output by a scanning line controls a first transistor to be in an on state; the first transistor outputs a data line The data signal is transmitted to the storage capacitor; the second voltage signal output from the scan line controls the first transistor to be in the off state; the output voltage signal of the storage capacitor controls the second transistor to be in the on state, and transmits the driving signal to the third transistor through the control line, the first The three transistors drive the light emitting device according to the driving signal; or, the output voltage signal of the storage capacitor controls the second transistor to be in an off state; the driving signal includes a driving current and/or a driving voltage.
  • the control terminal of the third transistor is connected to the control line, and the driving signal transmitted on the control line transmits the driving signal to the light emitting device through the second transistor, so that the brightness of the light emitting device is affected.
  • the control of the driving signal realizes the adjustment of the brightness of the light-emitting device when the storage capacitance in the pixel circuit is insufficient, improves the uniformity control of the brightness of the pixel circuit, and improves the user experience.
  • the first transistor and the second transistor are switching tubes, and the third transistor is a driving tube.
  • both the first transistor and the second transistor are switching tubes, and the second transistor ensures that the light emitting device does not emit light during the process of controlling the data line of the light emitting device to output data signals, thereby improving the brightness control of the light emitting device.
  • the first transistor, the second transistor, and the third transistor are the same type of transistor.
  • the third transistor is a P-type transistor; the first end of the third transistor is the source, and the second end of the third transistor is the drain.
  • the third transistor is a P-type thin film transistor.
  • the first transistor, the second transistor, and the third transistor are all P-type thin film transistors.
  • the first transistor and the second transistor are N-type transistors; the third transistor is a P-type transistor.
  • the light emitting device is an organic light emitting diode.
  • the organic light emitting diode improves the light emitting effect of the light emitting device, and further improves the user experience.
  • the driving method of the pixel circuit further includes: the control signal output by the control line controls the third transistor to be in an off state, and the light emitting device to be in an off state.
  • the driving signal is used to control the light emitting brightness of the light emitting device.
  • the driving method of the pixel circuit further includes: controlling the storage capacitor to discharge and determining that the control terminal of the second transistor is low After the voltage signal, the storage capacitor stops discharging.
  • the driving method of the pixel circuit further includes: controlling the storage capacitor to charge, and determining that the control terminal of the second transistor is high After the voltage signal, the storage capacitor stops charging.
  • FIG. 1 is a schematic structural diagram of a pixel circuit in the first embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of a pixel circuit in a second embodiment of the present application.
  • FIG. 3 is a voltage timing diagram of the pixel circuit in the second embodiment of the present application.
  • FIG. 4 is a flowchart of a driving method of a pixel circuit in the fourth embodiment of the present application.
  • pixel drive circuits In high-end display products, pixel drive circuits generally use active arrays. However, mainstream active drive array circuits are driven by analog signals. There are high circuit power consumption, signals are easily interfered, and the consistency of the drive device or the height of the compensation circuit Dependency and other issues. Digitally driven pixel circuits have the advantages of low power consumption, signals are not susceptible to interference, and high tolerance for the consistency of driving devices. Due to the small pixel size of display products with high pixel density, the storage capacitance of the pixel design in the digital drive circuit is too small, and the signal storage retention rate is low within a frame time.
  • the first embodiment of the present application relates to a pixel circuit.
  • the specific structure is shown in Figure 1. Including: the first transistor 10, the second transistor 20, the third transistor 30, the storage capacitor 40 and the light emitting device 50.
  • the control terminal of the first transistor 10 is connected to the scan line, the first terminal of the first transistor 10 is connected to the data line, and the second terminal of the first transistor 10 is respectively connected to the first terminal of the storage capacitor 40 and the control terminal of the second transistor 20 Connected, the second end of the storage capacitor 40 is connected to the power supply voltage; the control end of the third transistor 30 is connected to the control line, the first end of the third transistor 30 is connected to the power supply voltage, and the second end of the third transistor 30 is connected to the second The first end of the transistor 20 is connected; the anode of the light emitting device 50 is connected to the second end of the second transistor 20, and the cathode of the light emitting device 50 is grounded; wherein, the third transistor is a P-type transistor.
  • the first transistor 10, the second transistor 20, and the third transistor 30 may be the same type of transistor, for example, the first transistor 10, the second transistor 20, and the third transistor 30 Both are P-type thin film transistors.
  • the first transistor and the second transistor are N-type transistors
  • the third transistor is a P-type transistor.
  • the three transistors in FIG. 1 are all P-type thin film transistors as an example to illustrate the circuit.
  • the first transistor and the second transistor may use other types of transistors, and the types of transistors are not limited.
  • the light-emitting device 50 in this embodiment may be a variety of current-driven light-emitting devices including LEDs or OLEDs, or may be other types of light-emitting devices 50.
  • OLED is used as an example to illustrate the operation of the pixel circuit
  • the principle and specific implementation details can be adjusted adaptively according to the actual use of the light emitting device 50, which is not limited here.
  • a third transistor 30 is provided in the pixel circuit, and the control terminal of the third transistor 30 is connected to the control line, and receives a driving signal transmitted by the control line through the control terminal of the third transistor 30, the driving signal is used to control the brightness of the light emitting device 50, Among them, the third transistor 30 is a driving tube.
  • the first transistor 10 and the second transistor 20 are switching transistors, and the voltages at the control terminals of the first transistor 10 and the second transistor 20 are used to control the transistor to be turned on or off. As shown in FIG. 1, the control terminal of the first transistor 10 is connected to the scan line. If the first transistor 10 is a P-type thin film transistor, the gate is connected to the scan line, so that the voltage signal transmitted through the scan line can control the first transistor 10 In the on or off state, the source or drain can be connected to the data line, and the specific connection method is not limited.
  • the first transistor is a P-type thin film transistor
  • the low voltage signal transmitted by the scan line controls the first transistor to be in an on state
  • the high voltage signal transmitted by the scan line controls the first transistor to be in an off state.
  • the control terminal of the second transistor 20 is connected to the second terminal of the first transistor 10, that is, the right side of the first transistor 10 in the figure. If the second transistor 20 is a P-type thin film transistor, the gate is connected to the first transistor 10 At the first end, the source or the drain can be connected to the anode of the light emitting device 50, and the specific circuit connection is not limited.
  • the third transistor is a P-type transistor, and the third transistor is a driving tube, working in the saturation region, the source provides carriers, so that the third transistor is in a conducting state, therefore, the source of the third transistor is set to be connected to the power supply voltage , The drain is connected to the second transistor.
  • the pixel circuit is driven and includes a data writing phase and a light emitting phase during a light emitting period.
  • the control of the light emitting device 50 includes light emission and no light emission.
  • the digital signal "1" indicates that the light emitting device 50 emits light
  • the digital signal "0" indicates that the light emitting device 50 does not emit light.
  • the digital signal "1" or " "0” includes both the data writing phase and the light-emitting phase. The difference is that the light-emitting device 50 in the light-emitting phase in the digital signal "1" is in the light-emitting state, and the light-emitting device 50 in the light-emitting phase in the digital signal "0" is in the off state. .
  • the third transistor 30 is a P-type thin film transistor, when the digital signal is “1”, when the data is written
  • the data signal transmitted by the data line is a low voltage, and the light-emitting device 50 is in a light-emitting state during the light-emitting phase; when the digital signal is "0", the data signal transmitted by the data line is a high voltage during the data writing phase, and the light-emitting device 50 is extinguished during the light-emitting phase status.
  • LTPS Low Temperature-Poly-silicon
  • the third transistor 30 is a driving tube, the control terminal of the third transistor 30 is connected to the control line, and the control line transmits the driving signal.
  • the third transistor 30 may be always in the on state, and the brightness of the light emitting device 50 is controlled during the light emitting stage , Enabling the pixel circuit to control the brightness uniformity of the light emitting device 50 under the condition that the storage capacitor 40 has a limited capacity.
  • the first transistor 10, the second transistor 20, and the third transistor 30 in the pixel circuit use the same type of transistor, such as a P-type thin film transistor, and the P-type LTPS technology can be used to make the pixel circuit, which is beneficial to reduce the process Difficulty, which is conducive to the promotion and production of pixel circuits.
  • control terminal of the third transistor is connected to the control line, and the driving signal transmitted on the control line transmits the driving signal to the light emitting device through the second transistor, so that the brightness of the light emitting device is controlled by the driving signal.
  • the storage capacitance in the circuit is insufficient, the brightness of the light emitting device can be adjusted, the control of the uniformity of the brightness of the pixel circuit is improved, and the user experience is improved.
  • the second embodiment of the present application relates to a pixel circuit.
  • the second embodiment is substantially the same as the first embodiment.
  • the main difference is that the structure of a pixel circuit is specifically provided in the second embodiment of the present application.
  • it includes: a first transistor T1, a second transistor T2, a third transistor T2, a storage capacitor C1, and a light emitting device, and the gate of the second transistor I2 is coupled to the first end of the first transistor T1 Electrically connected to node A.
  • the first transistor, the second transistor, and the third transistor are all P-type thin film transistors, and the light emitting device is an OLED.
  • a frame of picture is divided into a plurality of subframes in time, each subframe corresponds to a respective scanning time, data is written in the scanning stage, and then the light emission is controlled by the driving transistor The brightness of the device OLED.
  • the voltage change in a subframe period is shown.
  • SEL in Figure 3 represents the voltage signal output from the scan line
  • Vctrl represents the drive signal output from the control terminal
  • DATA represents the write The data entered. 2 and FIG.
  • the scan line transmits a low voltage signal to the first transistor T1, the first transistor T1 is in an on state, and the data line transmits a low voltage data signal to the storage capacitor C1, while Vctrl transmits a high voltage signal to the control terminal of the third transistor T3, the third transistor T3 is in the off state, indicating that in the data writing stage, the third transistor T3 is in the off state, the light emitting device OLED does not emit light; in the light emitting stage, scanning The line transmits a high voltage signal to the first transistor T1, the first transistor T1 is in an off state, the low voltage data signal controls the storage capacitor C1 to discharge, the first end of the storage capacitor C1 is in a low voltage, and the second transistor T2 is in an on state, Vctrl is in a low voltage state, the third transistor T3 is in an on state, and the driving signal output by Vctrl controls the brightness of the light emitting device OLED through the third transistor T3.
  • the scan line transmits a low voltage signal to the first transistor T1, the first transistor T1 is in an on state, the data line transmits a high voltage data signal to the storage capacitor C1, and Vctrl Transmit a high voltage signal to the control terminal of the third transistor T3, the third transistor T3 is in the off state, indicating that in the data writing stage, the third transistor T3 is in the off state, the light emitting device OLED does not emit light; in the light emitting stage, the scanning line transmits a high voltage The signal is sent to the first transistor T1, the first transistor T1 is in an off state, the first end of the storage capacitor C1 is in a high voltage, the second transistor T2 is in an off state, and the light emitting device OLED does not emit light.
  • the driving signal is used to control the brightness of the light emitting device OLED.
  • the third transistor in the circuit shown in FIG. 2 works in the saturation region, and the voltage Vgs between the gate and source of the third transistor T3 is related to the power supply voltages VDD and Vctrl, where VDD is preset and Vctrl is used to control light emission
  • VDD is preset
  • Vctrl is used to control light emission
  • the brightness of the device OLED can ensure the uniformity of the brightness of the pixel circuit on the entire control panel.
  • the time of each subframe in the pixel circuit may be different.
  • the frame will be divided into multiple subframes in time, and the scanning time of each subframe is 1t, 1/2t, 1/4t, 1/8t..., t represents the total scan time of the frame picture.
  • t represents the total scan time of the frame picture.
  • the gray scale of the frame picture reaches 256, 8 subframes are needed, and the time of the 8th subframe It is 1/128t.
  • the third embodiment of the present application relates to a display device including the pixel circuit in the above-mentioned first or second embodiment.
  • the display device may be an organic light emitting display or other display devices.
  • the display device may include a plurality of pixel unit arrays, and each pixel array unit includes the pixel circuit in the first or second embodiment described above.
  • the display device may be a product or component with a display function such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, or a navigator.
  • the pixel circuits on the display device are all set on the control panel, and the specific arrangement of the pixel circuits is not specifically limited.
  • the display device includes at least one pixel circuit for the display device to display.
  • the layout of the pixel circuit is designed to reduce the influence of the circuit layout or the layout of the pixel circuit structure on VDD and Vctrl in the layout design, and to ensure the uniformity of the brightness of the pixel circuit on the control board in the display device.
  • this embodiment is a device embodiment corresponding to the first or second embodiment, and this embodiment can be implemented in cooperation with the first or second embodiment.
  • the relevant technical details mentioned in the first or second embodiment are still valid in this embodiment, and in order to reduce repetition, they will not be repeated here.
  • the relevant technical details mentioned in this embodiment can also be applied in the first or second embodiment.
  • the fourth embodiment of the present application relates to a driving method of a pixel circuit.
  • the flow of the driving method of the pixel circuit applied to the pixel circuit mentioned in the first or second embodiment is shown in FIG. 4 and includes the following implementation steps:
  • Step 401 The first transistor is in a conducting state under the control of the first voltage signal output by the scan line.
  • the first voltage needs to be set according to the type of the first transistor in the pixel circuit.
  • the first voltage signal controls the first transistor to be in a corresponding state.
  • the device setting in the pixel circuit there is no limitation here.
  • Step 402 The first transistor transmits the data signal output from the data line to the storage capacitor.
  • the data signal contains digital information
  • the data signal includes a high-voltage data signal and a low-voltage data signal, and controls the storage capacitor to discharge or charge
  • the scan line transmits a second voltage signal to control the first transistor to turn off.
  • the control signal output from the control line of the third transistor is in the off state, and the light emitting device is in the off state. That is to say, in the data writing stage, the light emitting device does not emit light.
  • Step 403 The first transistor is turned off under the control of the second voltage signal output by the scan line.
  • Step 404 Determine whether the data signal is a low-voltage data signal. If yes, go to step 405; otherwise, go to step 406.
  • Step 405 The second transistor is turned on under the control of the output voltage signal of the storage capacitor, and transmits a driving signal to the third transistor through the control line, and the third transistor drives the light emitting device according to the driving signal.
  • the driving signal includes driving current and/or driving voltage.
  • the driving signal includes a driving current and/or a driving voltage, different driving signals are set according to the characteristics of the light emitting device, the current driving light emitting device sets the driving signal as the driving current, and the voltage driving light emitting device sets the driving signal as the driving voltage.
  • the driving signal may have both a driving current and a driving voltage.
  • the data signal is a low-voltage data signal, which controls the discharge of the storage capacitor, and determines that the control terminal of the second transistor is a low-voltage signal, and then the storage capacitor stops discharging.
  • Step 406 The second transistor is turned off under the control of the output voltage signal of the storage capacitor.
  • the data signal is a high-voltage data signal, which controls the charging of the storage capacitor, and determines that the control terminal of the second transistor is the high-voltage signal, and then the storage capacitor stops charging.
  • This embodiment is an embodiment of a driving method corresponding to the first or second embodiment, and this embodiment can be implemented in cooperation with the first or second embodiment.
  • the relevant technical details mentioned in the first or second embodiment are still valid in this embodiment, and in order to reduce repetition, they will not be repeated here.
  • the relevant technical details mentioned in this embodiment can also be applied in the first or second embodiment.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of El Displays (AREA)

Abstract

本申请实施例提供一种像素电路、显示装置和像素电路的驱动方法。本申请的实施例，像素电路包括：第一晶体管(T1)、第二晶体管(T2)、第三晶体管(T3)、存储电容(C1)和发光器件(OLED)。第一晶体管(T1)的控制端与扫描线连接，第一晶体管(T1)的第一端与数据线连接，第一晶体管(T1)的第二端分别与存储电容(C1)的第一端和第二晶体管(T2)的控制端连接，存储电容(C1)的第二端与电源电压连接。第三晶体管(T3)的控制端与控制线连接。发光器件(OLED)的阳极与第二晶体管(T2)的第二端连接，发光器件(OLED)的阴极接地。

Description

一种像素电路、显示装置和像素电路的驱动方法
交叉引用
本申请引用于2018年12月11日递交的名称为“一种像素电路、显示装置和像素电路的驱动方法”的第201811511113.2号中国专利申请，其通过引用被全部并入本申请。
技术领域
本申请实施例涉及显示领域，特别涉及一种像素电路、显示装置和像素电路的驱动方法。
背景技术
有机发光二极管(Organic Light-Emitting Diode，OLED)按照驱动方式可分为PMOLED(Passive matrix organic light-emitting diode，无源矩阵有机发光二极管)和AMOLED(Active-matrix organic light-emitting diode，有源矩阵有机发光二极管)。随着平板显示技术的迅猛发展，特别是AMOLED显示屏开始在高端手机、电视等电子显示产品中得到广泛的应用。Micro LED作为新一代显示技术，比现有的OLED技术亮度更高、发光效率更好、但功耗更低。Micro LED作为未来显示的一种解决方案也已成为显示领域研发的热点。
申请内容
本申请实施例的目的在于提供一种像素电路、显示装置和像素电路的驱动方法，使得在像素电路的存储电容不变的情况下，通过控制线传输的驱动信号控制发光器件的亮度，提高了像素电路的发光亮度的控制。
本申请的实施例提供了一种像素电路，包括：第一晶体管、第二晶体管、第三晶体管、存储电容和发光器件；第一晶体管的控制端与扫描线连接，第一晶体管的第一端与数据线连接，第一晶体管的第二端分别与存储电容的第一端和第二晶体管的控制端连接，存储电容的第二端与电源电压连接；第三晶体管的控制端与控制线连接，第三晶体管的第一端与电源电压连接，第三晶体管的第二端与第二晶体管的第一端连接；发光器件的阳极与第二晶体管的第二端连接，发光器件的阴极接地。
本申请的实施例还提供了一种显示装置，包括上述的像素电路。
本申请的实施例还提供了一种像素电路的驱动方式，应用于上述的像素电路，包括：扫描线输出的第一电压信号控制第一晶体管处于导通状态；第一晶体管将数据线输出的数据信号传输至存储电容；扫描线输出的第二电压信号控制第一晶体管处于关闭状态；存储电容的输出电压信号控制第二晶体管处于导通状态，通过控制线传输驱动信号至第三晶体管，第三晶体管根据驱动信号驱动发光器件；或者，存储电容的输出电压信号控制第二晶体管处于关闭状态；驱动信号包括驱动电流和/或驱动电压。
本申请实施例相对于现有技术而言，第三晶体管的控制端与控制线连接，在控制线传输的驱动信号的作用通过第二晶体管将驱动信号传输至发光器件，使得发光器件的亮度受驱动信号的控制，在像素电路中存储电容不够的情况下 实现对发光器件的亮度的调节，提高了像素电路亮度均一性的控制，提高用户体验。
例如，第一晶体管和第二晶体管为开关管，第三晶体管为驱动管。该实施例中，第一晶体管和第二晶体管均为开关管，第二晶体管控制发光器件的数据线输出数据信号的过程中保证发光器件不发光，提高了对发光器件的亮度的控制。
例如，所述第一晶体管、所述第二晶体管和所述第三晶体管为同一类型的晶体管。
例如，第三晶体管为P型晶体管；第三晶体管的第一端为源极，第三晶体管的第二端为漏极。
例如，所述第三晶体管为P型薄膜晶体管。
例如，所述第一晶体管、所述第二晶体管和所述第三晶体管均为为P型薄膜晶体管。
例如，所述第一晶体管和所述第二晶体管为N型晶体管；所述第三晶体管为P型晶体管。
例如，发光器件为有机发光二极管。该实施例中，有机发光二极管提高了发光器件的发光效果，进一步提高用户体验。
例如，扫描线输出的第二电压信号控制第一晶体管处于关闭状态之前，像素电路的驱动方法还包括：控制线输出的控制信号控制第三晶体管处于关闭状态，发光器件处于熄灭状态。
例如，驱动信号用于控制发光器件的发光亮度。
例如，若数据线传输低电压的数据信号；第一晶体管将数据线输出的数 据信号传输至存储电容之后，像素电路的驱动方法还包括：控制存储电容放电，确定第二晶体管的控制端为低电压信号后存储电容停止放电。
例如，若数据线传输高电压的数据信号；第一晶体管将数据线输出的数据信号传输至存储电容之后，像素电路的驱动方法还包括：控制存储电容充电，确定第二晶体管的控制端为高电压信号后存储电容停止充电。
附图说明
图1是本申请第一实施例中像素电路的结构示意图；
图2是本申请第二实施例中像素电路的结构示意图；
图3是本申请第二实施例中像素电路的电压时序图；
图4是本申请第四实施例中像素电路的驱动方法的流程图；
具体实施例
为使本申请实施例的目的、技术方案和优点更加清楚，下面将结合附图对本申请的各实施例进行详细的阐述。然而，本领域的普通技术人员可以理解，在本申请各实施例中，为了使读者更好地理解本申请而提出了许多技术细节。但是，即使没有这些技术细节和基于以下各实施例的种种变化和修改，也可以实现本申请所要求保护的技术方案。
在高端的显示产品中像素驱动电路一般是采用主动阵列，然而主流的主动驱动阵列电路都是模拟信号驱动的，存在电路功耗高、信号容易受到干扰，对驱动器件一致性或者补偿电路的高度依赖等问题。数字驱动的像素电路具有功耗低，信号不易受干扰，对于驱动器件一致性的容忍度高等优点。由于高像 素密度的显示产品中像素尺寸较小，因此，在数字驱动电路中像素设计时的存储电容过小，在一帧时间内对信号存储保持率低。
本申请的第一实施例涉及一种像素电路。具体结构如图1所示。包括：第一晶体管10、第二晶体管20、第三晶体管30、存储电容40和发光器件50。
第一晶体管10的控制端与扫描线连接，第一晶体管10的第一端与数据线连接，第一晶体管10的第二端分别与存储电容40的第一端和第二晶体管20的控制端连接，存储电容40的第二端与电源电压连接；第三晶体管30的控制端与控制线连接，第三晶体管30的第一端与电源电压连接，第三晶体管30的第二端与第二晶体管20的第一端连接；发光器件50的阳极与第二晶体管20的第二端连接，发光器件50的阴极接地；其中，第三晶体管为P型晶体管。
需要说明的是，图示1的像素电路中，第一晶体管10、第二晶体管20和第三晶体管30可以为同一类型的晶体管，例如，第一晶体管10、第二晶体管20和第三晶体管30均为P型薄膜晶体管。或者，第一晶体管和第二晶体管为N型晶体管，第三晶体管为P型晶体管，其中，本实施例中以图示1中的三个晶体管均为P型薄膜晶体管为例，对电路进行示例性的说明，在其他的具体实施电路中第一晶体管和第二晶体管可以采用其他的种类的晶体管，对晶体管种类不做限定。例如，本实施例中的发光器件50可以是包括LED或OLED在内的多种电流驱动发光器件50，也可为其他类型的发光器件50，本实施例中以OLED为例说明像素电路的工作原理，具体的实施细节可根据实际使用的发光器件50适应性调整，此处不做限制。
在像素电路中设置第三晶体管30，且第三晶体管30的控制端与控制线连接，通过第三晶体管30的控制端接收控制线传输的驱动信号，驱动信号用于 控制发光器件50的亮度，其中，第三晶体管30为驱动管。
第一晶体管10和第二晶体管20为开关管，第一晶体管10和第二晶体管20控制端的电压用于控制该晶体管处于导通或关闭的状态。如图1所示，第一晶体管10的控制端与扫描线连接，若第一晶体管10为P型薄膜晶体管，则栅极连接扫描线，可实现通过扫描线传输的电压信号控制第一晶体管10处于导通或关闭的状态，源极或漏极连接数据线均可，具体连接方式不做限制。例如，由于第一晶体管为P型薄膜晶体管，则扫描线传输的低压信号控制第一晶体管处于导通状态，扫描线传输的高压信号控制第一晶体管处于关闭状态。第二晶体管20的控制端与第一晶体管10的第二端连接，即图示中第一晶体管10右侧的一端，若第二晶体管20为P型薄膜晶体管，则栅极连接第一晶体管10的第一端，源极或漏极连接发光器件50的阳极均可，具体的电路连接不做限制。
第三晶体管为P型晶体管，且第三晶体管为驱动管，工作在饱和区，源极提供载流子，使得第三晶体管处于导通状态，因此，设置第三晶体管的源极与电源电压连接，漏极与第二晶体管连接。
本实施例中，该像素电路被驱动，在一个发光时间段，包括数据写入阶段和发光阶段。需要说明的是，对发光器件50的控制包括发光和不发光，例如，数字信号“1”表示发光器件50发光，数字信号“0”表示发光器件50不发光，对于数字信号“1”或“0”均包括数据写入阶段和发光阶段，区别之处在于，在数字信号“1”中发光阶段的发光器件50处于发光状态，在数字信号“0”中发光阶段的发光器件50处于熄灭状态。
一个具体实施例中，以采用低温多晶硅技术(LTPS，Low Temperature Poly-silicon)工艺制作的像素电路为例，第三晶体管30为P型薄膜晶体管，数 字信号“1”时，数据写入阶段时数据线传输的数据信号为低电压，在发光阶段发光器件50处于发光状态；数字信号“0”时，数据写入阶段时数据线传输的数据信号为高电压，在发光阶段发光器件50处于熄灭状态。
本实施例中第三晶体管30是驱动管，第三晶体管30的控制端与控制线连接，控制线传输驱动信号，第三晶体管30可以一直处于导通状态，在发光阶段控制发光器件50的亮度，使得像素电路在存储电容40的容量有限的情况下实现对发光器件50亮度均一性的控制，这种通过控制端输出的驱动信号控制发光器件50的亮度的方式，提高用户体验，例如，在一个实施例中，像素电路中的第一晶体管10、第二晶体管20和第三晶体管30采用相同类型的晶体管，如P型薄膜晶体管，可采用P型LTPS技术制作该像素电路，有利于降低工艺难度，因而有利于像素电路的推广和生产。
以上仅为举例说明，并不对本申请的技术方案构成限定。
上述实施例中，第三晶体管的控制端与控制线连接，在控制线传输的驱动信号的作用通过第二晶体管将驱动信号传输至发光器件，使得发光器件的亮度受驱动信号的控制，在像素电路中存储电容不够的情况下实现对发光器件的亮度的调节，提高了像素电路亮度均一性的控制，提高用户体验。
本申请的第二实施例涉及一种像素电路，第二实施例与第一实施例大致相同，主要区别之处在于：在本申请第二实施例中具体给出了一种像素电路的结构，如图2所示，包括：第一晶体管T1、第二晶体管T2、第三晶体管T2、存储电容C1以及发光器件，且第二晶体管I2的栅极与第一晶体管T1的第一端耦接并与节点A电连接。
第一晶体管、第二晶体管和第三晶体管均以P型薄膜晶体管为例，发光 器件为OLED。
一个具体实施例中，在一个子帧时间段，具体为将一帧画面在时间上分成多个子帧，每个子帧对应各自的扫描时间，在扫描阶段先进行数据写入再通过驱动晶体管控制发光器件OLED的亮度。如图3所示一个子帧时间段中的电压变化示意，在一个子帧时间段中，图示3中的SEL表示扫描线输出的电压信号，Vctrl表示控制端输出的驱动信号，DATA表示写入的数据。结合参考图2及图3，在数字信号“1”的状态时，扫描线传输低电压信号至第一晶体管T1，第一晶体管T1处于导通状态，数据线传输低电压的数据信号至存储电容C1，同时Vctrl传输高电压信号至第三晶体管T3的控制端，第三晶体管T3处于关闭状态，表示在数据写入阶段，第三晶体管T3处于关闭状态，发光器件OLED不发光；发光阶段，扫描线传输高电压信号至第一晶体管T1，第一晶体管T1处于关闭状态，低电压的数据信号控制存储电容C1放电，存储电容C1的第一端处于低电压，第二晶体管T2处于导通状态，Vctrl为低电压状态，第三晶体管T3处于导通状态，Vctrl输出的驱动信号通过第三晶体管T3控制发光器件OLED的亮度。
数字信号“0”的状态时，数据写入阶段，扫描线传输低电压信号至第一晶体管T1，第一晶体管T1处于导通状态，数据线传输高电压的数据信号至存储电容C1，同时Vctrl传输高电压信号至第三晶体管T3的控制端，第三晶体管T3处于关闭状态，表示在数据写入阶段，第三晶体管T3处于关闭状态，发光器件OLED不发光；发光阶段，扫描线传输高电压信号至第一晶体管T1，第一晶体管T1处于关闭状态，存储电容C1的第一端处于高电压，第二晶体管T2处于关闭状态，发光器件OLED不发光。
其中，驱动信号用于控制发光器件OLED的亮度。
图2所示的电路中第三晶体管工作在饱和区，且第三晶体管T3栅极和源极之间的电压Vgs与电源电压VDD和Vctrl相关，其中，VDD是预设置，Vctrl用于控制发光器件OLED的亮度，可保证整个控制面板上的像素电路的亮度的均一性。
在像素电路中每个子帧的时间可以是不相同的，例如，像素电路在显示一帧画面时，该帧画面在时间上会被分成多个子帧，每个子帧完成扫描的时间分别是1t、1/2t、1/4t、1/8t…，t表示该帧画面的全部扫描时间，一个具体实施例中，该帧画面的灰阶达到256时，需要8个子帧，第8个子帧的时间为1/128t。
以上仅为举例说明，并不对本申请的技术方案构成限定。
本申请第三实施例涉及一种显示装置，包括上述第一或第二实施例中的像素电路。
显示装置可以为有机发光显示器或其他显示设备，该显示装置中可以包括多个像素单元阵列，每个像素阵列单元包括上述第一或第二实施例中的像素电路。显示装置可以是手机、平板电脑、电视机、显示器、笔记本电脑、数码相框或导航仪等具有显示功能的产品或部件。
显示装置上的像素电路均设置在控制面板上，具体像素电路的排列设置方式不做具体限制，显示装置中包括至少一个的像素电路，用于显示装置进行显示。
一个具体实施例中，以图2中的像素电路为例，第三晶体管T3与电源电压VDD连接，则第三晶体管的栅极和源极之间的驱动电压表示为：Vgs＝VDD-Vctrl；其中，Vgs表示第三晶体管的驱动电压，VDD表示电源电压， Vctrl表示控制端传输的电压值。具体实施例中，通过对像素电路中版图设计，将因版图设计中线路布局或像素电路结构布局对VDD和Vctrl的影响降低，保证在显示装置中的控制板上的像素电路的亮度均一性。
不难发现，本实施例为与第一或第二实施例相对应的装置实施例，本实施例可与第一或第二实施例互相配合实施。第一或第二实施例中提到的相关技术细节在本实施例中依然有效，为了减少重复，这里不再赘述。相应地，本实施例中提到的相关技术细节也可应用在第一或第二实施例中。
本申请第四实施例涉及一种像素电路的驱动方法。应用于上述第一或第二实施例中的提到的像素电路，其像素电路的驱动方法的流程如图4所示，包括如下实施步骤：
步骤401：第一晶体管在扫描线输出的第一电压信号的控制下处于导通状态。
第一电压需要根据像素电路中的第一晶体管的类型设置，此处仅是说明第一电压信号控制第一晶体管处于对应的状态，具体根据像素电路中的器件设置，此处不做限制。
步骤402：第一晶体管将数据线输出的数据信号传输至存储电容。
具体地说，第一晶体管将数据线输出的数据信号传输至存储电容的过程中，数据信号包含数字信息，且数据信号包括高电压的数据信号和低电压的数据信号，控制存储电容放电或充电，在存储电容充电或放电执行完成之后，扫描线传输第二电压信号控制第一晶体管关闭。
第一晶体管将数据线输出的数据信号传输至存储电容的过程中，第三晶体管的控制线输出的控制信号下处于关闭状态，发光器件处于熄灭状态。也就 是说在数据写入阶段，发光器件不发光。
步骤403：第一晶体管在扫描线输出的第二电压信号的控制下处于关闭状态。
步骤404：判断数据信号是否为低电压的数据信号，若为是，执行步骤405，否则，执行步骤406。
步骤405：第二晶体管在存储电容的输出电压信号控制下处于导通状态，通过控制线传输驱动信号至第三晶体管，第三晶体管根据驱动信号驱动发光器件。
其中，驱动信号包括驱动电流和/或驱动电压。
驱动信号包括驱动电流和/或驱动电压，根据发光器件的特性设置不同的驱动信号，电流驱动的发光器件设置驱动信号为驱动电流，电压驱动的发光器件设置驱动信号为驱动电压。发光器件包括不同特性的发光器件时，驱动信号可以既有驱动电流又有驱动电压。
一个具体实施例中，数据信号为低电压的数据信号，控制存储电容放电，确定第二晶体管的控制端为低电压信号后存储电容停止放电。
步骤406：第二晶体管在存储电容的输出电压信号控制下处于关闭状态。
一个具体实施例中，数据信号为高电压的数据信号，控制存储电容充电，确定第二晶体管的控制端为高电压信号后存储电容停止充电。
上述具体实现仅为对应步骤的具体细节说明，不做具体限制。
上面各种方法的步骤划分，只是为了描述清楚，实现时可以合并为一个步骤或者对某些步骤进行拆分，分解为多个步骤，只要包括相同的逻辑关系，都在本专利的保护范围内；对算法中或者流程中添加无关紧要的修改或者引入 无关紧要的设计，但不改变其算法和流程的核心设计都在该专利的保护范围内。
本实施例为与第一或第二实施例相对应的驱动方法实施例，本实施例可与第一或第二实施例互相配合实施。第一或第二实施例中提到的相关技术细节在本实施例中依然有效，为了减少重复，这里不再赘述。相应地，本实施例中提到的相关技术细节也可应用在第一或第二实施例中。
本领域的普通技术人员可以理解，上述各实施例是实现本申请的具体实施例，而在实际应用中，可以在形式上和细节上对其作各种改变，而不偏离本申请的精神和范围。

Claims (14)

  1. 一种像素电路，其中，包括：第一晶体管、第二晶体管、第三晶体管、存储电容和发光器件；
    所述第一晶体管的控制端与扫描线连接，所述第一晶体管的第一端与数据线连接，所述第一晶体管的第二端分别与所述存储电容的第一端和所述第二晶体管的控制端连接，所述存储电容的第二端与电源电压连接；
    所述第三晶体管的控制端与控制线连接，所述第三晶体管的第一端与所述电源电压连接，所述第三晶体管的第二端与所述第二晶体管的第一端连接；
    所述发光器件的阳极与所述第二晶体管的第二端连接，所述发光器件的阴极接地。
  2. 根据权利要求1所述的像素电路，其中，所述第一晶体管和所述第二晶体管为开关管，所述第三晶体管为驱动管。
  3. 根据权利要求1-2中任一项所述的像素电路，其中，所述第三晶体管为P型晶体管；所述第三晶体管的第一端为源极，所述第三晶体管的第二端为漏极。
  4. 根据权利要求3所述的像素电路，其中，所述第三晶体管为P型薄膜晶体管。
  5. 根据权利要求1所述的像素电路，其中，所述第一晶体管、所述第二晶体管和所述第三晶体管为同一类型的晶体管。
  6. 根据权利要求5所述的像素电路，其中，所述第一晶体管、所述第二晶体管和所述第三晶体管均为P型薄膜晶体管。
  7. 根据权利要求1所述的像素电路，其中，所述第一晶体管和所述第二晶体管为N型晶体管；所述第三晶体管为P型晶体管。
  8. 根据权利要求3所述的像素电路，其中，所述发光器件为有机发光二极管。
  9. 一种显示装置，其中，包括如权利要求1-8任一项所述的像素电路。
  10. 一种像素电路的驱动方法，应用于如权利要求1-8任一项所述的像素电路，其中，所述像素电路的驱动方法包括：
    所述扫描线输出的第一电压信号控制所述第一晶体管处于导通状态；
    所述第一晶体管将所述数据线输出的数据信号传输至所述存储电容；
    所述扫描线输出的第二电压信号控制所述第一晶体管处于关闭状态；
    所述存储电容的输出电压信号控制所述第二晶体管处于导通状态，通过控制线传输驱动信号至所述第三晶体管，所述第三晶体管根据所述驱动信号驱动所述发光器件；或者，所述存储电容的输出电压信号控制所述第二晶体管处于关闭状态；
    所述驱动信号包括驱动电流和/或驱动电压。
  11. 根据权利要求10所述的像素电路的驱动方法，其中，所述扫描线输出的第二电压信号控制所述第一晶体管处于关闭状态之前，所述像素电路的驱动方法还包括：
    所述控制线输出的控制信号控制所述第三晶体管处于关闭状态，所述发光器件处于熄灭状态。
  12. 根据权利要求10所述的像素电路的驱动方法，其中，所述驱动信号用于控制所述发光器件的发光亮度。
  13. 根据权利要求10-12任一项所述的像素电路的驱动方法，其中，若所述数据线传输低电压的数据信号；
    所述第一晶体管将所述数据线输出的数据信号传输至所述存储电容之后，所述像素电路的驱动方法还包括：
    控制所述存储电容放电，确定所述第二晶体管的控制端为低电压信号后所述存储电容停止放电。
  14. 根据权利要求10-12任一项所述的像素电路的驱动方法，其中，若所述数据线传输高电压的数据信号；
    所述第一晶体管将所述数据线输出的数据信号传输至所述存储电容之后，所述像素电路的驱动方法还包括：
    控制所述存储电容充电，确定所述第二晶体管的控制端为高电压信号后所述存储电容停止充电。
PCT/CN2019/093315 2018-12-11 2019-06-27 一种像素电路、显示装置和像素电路的驱动方法 WO2020119076A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020217020950A KR20210092306A (ko) 2018-12-11 2019-06-27 픽셀 회로, 디스플레이 장치 및 픽셀 회로의 구동 방법

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201811511113.2A CN111312162B (zh) 2018-12-11 2018-12-11 一种像素电路、显示装置和像素电路的驱动方法
CN201811511113.2 2018-12-11

Publications (1)

Publication Number Publication Date
WO2020119076A1 true WO2020119076A1 (zh) 2020-06-18

Family

ID=71076695

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/093315 WO2020119076A1 (zh) 2018-12-11 2019-06-27 一种像素电路、显示装置和像素电路的驱动方法

Country Status (3)

Country Link
KR (1) KR20210092306A (zh)
CN (1) CN111312162B (zh)
WO (1) WO2020119076A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114724511A (zh) * 2022-06-08 2022-07-08 惠科股份有限公司 像素驱动电路、像素驱动方法及显示面板

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114217465B (zh) * 2021-12-31 2023-11-10 厦门天马微电子有限公司 一种显示面板及其驱动方法和显示装置
CN115171607B (zh) * 2022-09-06 2023-01-31 惠科股份有限公司 像素电路、显示面板及显示装置
CN116648102B (zh) * 2023-06-20 2024-04-19 惠科股份有限公司 显示面板、显示驱动方法及显示装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090309863A1 (en) * 2008-06-13 2009-12-17 Fujifilm Corporation Display device and method of driving thereof
CN202110796U (zh) * 2011-06-23 2012-01-11 华南理工大学 有源有机发光二极管显示器交流像素驱动电路
CN107481664A (zh) * 2017-09-28 2017-12-15 京东方科技集团股份有限公司 显示面板及其驱动方法、显示装置
CN108288456A (zh) * 2018-04-28 2018-07-17 京东方科技集团股份有限公司 一种像素驱动电路及其驱动方法、显示装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104658484B (zh) * 2015-03-18 2018-01-16 上海和辉光电有限公司 显示装置、像素驱动电路及其驱动方法
CN106710516A (zh) * 2015-08-26 2017-05-24 上海和辉光电有限公司 显示装置、像素驱动电路及其驱动方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090309863A1 (en) * 2008-06-13 2009-12-17 Fujifilm Corporation Display device and method of driving thereof
CN202110796U (zh) * 2011-06-23 2012-01-11 华南理工大学 有源有机发光二极管显示器交流像素驱动电路
CN107481664A (zh) * 2017-09-28 2017-12-15 京东方科技集团股份有限公司 显示面板及其驱动方法、显示装置
CN108288456A (zh) * 2018-04-28 2018-07-17 京东方科技集团股份有限公司 一种像素驱动电路及其驱动方法、显示装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114724511A (zh) * 2022-06-08 2022-07-08 惠科股份有限公司 像素驱动电路、像素驱动方法及显示面板
CN114724511B (zh) * 2022-06-08 2022-08-26 惠科股份有限公司 像素驱动电路、像素驱动方法及显示面板

Also Published As

Publication number Publication date
CN111312162A (zh) 2020-06-19
CN111312162B (zh) 2023-03-31
KR20210092306A (ko) 2021-07-23

Similar Documents

Publication Publication Date Title
CN110010057B (zh) 像素驱动电路、像素驱动方法和显示装置
CN109872680B (zh) 像素电路及驱动方法、显示面板及驱动方法、显示装置
CN110660360B (zh) 像素电路及其驱动方法、显示面板
WO2023005621A1 (zh) 像素电路及其驱动方法、显示面板
WO2020119076A1 (zh) 一种像素电路、显示装置和像素电路的驱动方法
US10978002B2 (en) Pixel circuit and driving method thereof, and display panel
WO2020211509A1 (zh) 驱动电路、显示面板及显示面板的制作方法
WO2023005694A1 (zh) 像素电路及其驱动方法、显示面板
US20210233477A1 (en) Display driving circuit, method of driving display driving circuit, display panel, and display device
US20210065624A1 (en) Pixel Circuit, Method for Driving Pixel Circuit, and Display Device
WO2022226951A1 (zh) 像素电路及其驱动方法、显示装置
WO2014172977A1 (zh) 像素驱动电路、阵列基板以及显示装置
US20230197007A1 (en) Pixel circuit and driving method thereof, array substrate and display apparatus
WO2019037285A1 (zh) 顶发射amoled像素电路及其驱动方法
WO2020107830A1 (zh) 像素电路及显示装置
CN111354308A (zh) 一种像素驱动电路、有机发光显示面板及显示装置
WO2023221834A1 (zh) 像素驱动电路、其驱动方法、显示面板及显示装置
US11282436B2 (en) Pixel circuit including a storage device connected to a control line, display device and method for driving pixel circuit
US11527199B2 (en) Pixel circuit including discharge control circuit and storage control circuit and method for driving pixel circuit, display panel and electronic device
CN113053297A (zh) 像素电路、像素驱动方法和显示装置
WO2020119077A1 (zh) 一种像素电路、显示装置和像素电路的驱动方法
US11211005B2 (en) Pixel driving circuit, display device and driving method
CN111243501B (zh) 一种像素电路、显示装置和像素电路的驱动方法
WO2022226727A1 (zh) 像素电路、像素驱动方法和显示装置
CN111326112B (zh) 一种像素电路、显示装置和像素电路的驱动方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19897188

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 20217020950

Country of ref document: KR

Kind code of ref document: A

122 Ep: pct application non-entry in european phase

Ref document number: 19897188

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 19897188

Country of ref document: EP

Kind code of ref document: A1