WO2021082994A1 - 像素驱动芯片及其驱动方法、显示装置 - Google Patents

像素驱动芯片及其驱动方法、显示装置 Download PDF

Info

Publication number
WO2021082994A1
WO2021082994A1 PCT/CN2020/122316 CN2020122316W WO2021082994A1 WO 2021082994 A1 WO2021082994 A1 WO 2021082994A1 CN 2020122316 W CN2020122316 W CN 2020122316W WO 2021082994 A1 WO2021082994 A1 WO 2021082994A1
Authority
WO
WIPO (PCT)
Prior art keywords
data
display data
circuit
display
output
Prior art date
Application number
PCT/CN2020/122316
Other languages
English (en)
French (fr)
Inventor
时凌云
黄文杰
陈明
董学
孙海威
王秀荣
谷其兵
胡国锋
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/418,585 priority Critical patent/US11322076B2/en
Publication of WO2021082994A1 publication Critical patent/WO2021082994A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2077—Display of intermediate tones by a combination of two or more gradation control methods
    • G09G3/2081—Display of intermediate tones by a combination of two or more gradation control methods with combination of amplitude modulation and time modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/04—Display protection

Definitions

  • the embodiments of the present disclosure relate to a pixel driving chip, a driving method thereof, and a display device.
  • LED display devices are one of the hot spots in the current research field. Compared with Liquid Crystal Display (LCD), LED display devices have the advantages of low energy consumption, low production cost, and self-illumination.
  • LCD Liquid Crystal Display
  • the driving method of the driving circuit of the LED display device is different from the driving method of the driving circuit of the LCD.
  • the driving circuit of the LED display device adopts a current driving method
  • the driving circuit of an LCD adopts a voltage driving method.
  • current driving is more susceptible to the transistor turn-on voltage, carrier mobility, and circuit voltage drop.
  • At least one embodiment of the present disclosure provides a pixel driving chip, which includes: a data input circuit, a time selection circuit, and a current control circuit; the data input circuit is connected to the time selection circuit and is configured to receive display data and display data according to gray The first-order dividing point partitions the display data to obtain the data partitions to which the display data belongs in the M data partitions obtained based on the display data range, wherein the M data partitions correspond to M output time lengths;
  • the time selection circuit is connected to the data input circuit and the current control circuit, and is configured to determine the output duration corresponding to the display data according to the data partition to which the display data belongs, and to set the output duration within the output duration.
  • the display data is output to the current control circuit; the current control circuit is connected to the time selection circuit and is configured to determine the driving current flowing through the light-emitting element corresponding to the display data according to the display data, and based on the The output duration corresponding to the display data outputs the driving current, and M is an integer greater than 1.
  • the driving current flowing through the light-emitting element, the output duration, and the brightness corresponding to the display data satisfy the following formula:
  • B represents the brightness corresponding to the display data
  • I represents the driving current flowing through the light-emitting element
  • T represents the output duration
  • K represents the scale factor
  • the minimum display data of the m+1th data partition is greater than the maximum display data of the mth data partition, and the m+1th data partition corresponds to the
  • the m+1 output duration is greater than the m-th output duration corresponding to the m-th data partition, and m is an integer greater than or equal to 1 and less than M.
  • the pixel drive chip can obtain the display data-current correspondence relationship of at least one data partition, and the pixel drive chip further includes a grayscale conversion circuit.
  • the gray-scale conversion circuit is connected to the data input circuit, and is configured to, when receiving display data belonging to each of the remaining data partitions except for the at least one data partition, according to the output duration corresponding to the remaining data partitions and According to the proportional relationship between the output durations corresponding to the at least one data partition, the display data belonging to each of the remaining data partitions is converted into the display data in the at least one data partition, so as to be based on the display of the at least one data partition
  • the data-current correspondence relationship obtains the drive current corresponding to the display data belonging to each of the remaining data partitions.
  • the pixel driving chip provided by at least one embodiment of the present disclosure further includes a gray-scale holding circuit, the gray-scale holding circuit is connected to the gray-scale conversion circuit and the time selection circuit, and is configured to belong to the remaining
  • the display data of each data partition is kept in the converted display data, and when the output duration corresponding to the converted display data arrives, the converted display data is output to the time selection.
  • the time selection sub-circuit includes M time selection sub-circuits
  • the current control circuit includes M current control sub-circuits
  • the M time selection sub-circuits The circuit is in one-to-one correspondence with the M data partitions
  • the M time selection sub-circuits are connected to the data input circuit
  • the M current control sub-circuits are connected in a one-to-one correspondence, and are configured to select and
  • the current control sub-circuit outputs the driving current within the output time period corresponding to the display data.
  • the pixel drive chip provided by at least one embodiment of the present disclosure further includes a voltage conversion circuit that is connected to a power supply, the data input circuit, and the current control circuit, and is configured to provide The power supply voltage is converted into a voltage required by the data input circuit and the current control circuit.
  • the time selection circuit is configured to output the display data to the current control circuit within the output duration in response to the clock signal.
  • the pixel driving chip provided by at least one embodiment of the present disclosure further includes at least one electrostatic discharge circuit, and the at least one electrostatic discharge circuit is respectively connected to the power supply, the data input circuit, the current control circuit, and the ground terminal. At least one is connected and configured to discharge static electricity generated when at least one of the power supply, the data input circuit, the current control circuit, and the ground terminal receives a signal or outputs a signal.
  • At least one embodiment of the present disclosure further provides a display device, including the pixel driving chip and the light-emitting element provided by any embodiment of the present disclosure, the pixel driving chip is electrically connected to the light-emitting element to output the light-emitting element The drive current.
  • the display device provided by at least one embodiment of the present disclosure further includes: a gate driving circuit and a data driving circuit, the gate driving circuit is configured to provide scanning signals to the pixel driving chip; the data driving circuit is configured to The display data is provided to the pixel driving chip.
  • At least one embodiment of the present disclosure provides a method for driving a pixel driving chip, including: receiving the display data through the data input circuit, and partitioning the display data according to the grayscale dividing point to obtain the The data partitions to which display data belongs in the M data partitions obtained based on the display data range, the M data partitions respectively correspond to the M output durations; the time selection circuit is used according to the display data belonging Determine the output duration corresponding to the display data in the data partition, and output the display data to the current control circuit within the output duration; the current control circuit determines to flow through the display according to the display data The driving current of the light-emitting element corresponding to the data is output, and the driving current is output based on the output duration corresponding to the display data.
  • FIG. 1A is a schematic diagram of a display panel when a current control method is adopted
  • FIG. 2 is a schematic diagram of a pixel driving chip provided by at least one embodiment of the present disclosure
  • FIG. 6 is a schematic diagram of a display device provided by at least one embodiment of the present disclosure.
  • FIG. 7A is a schematic diagram of another display device provided by at least one embodiment of the present disclosure.
  • the display panel In the field of display technology, it is possible to increase the sub-pixel density of the display panel by reducing the spacing between the light-emitting elements included in each sub-pixel, thereby increasing the display resolution of the display panel.
  • a multiplexing architecture and a time-sharing driving method are usually adopted to reduce the number of driving traces, so as to reduce the display cost.
  • the time-sharing driving method can reduce driving wiring, it easily leads to problems such as increased current flowing through the light-emitting element, high power consumption of the display panel, and high display flicker, thereby reducing the display effect of the display panel.
  • B represents the brightness of the light-emitting element (for example, corresponding to the gray scale)
  • K represents the scale factor
  • I represents the driving current flowing through the light-emitting element
  • T represents the display time length of the light-emitting element (or the output time length of the driving current).
  • FIG. 1A is a schematic diagram of a display panel adopting a current control method.
  • the dotted ellipse represents the driving current of the display panel when displaying low gray scales.
  • FIG. 1B is a schematic diagram of current driving when the display panel shown in FIG. 1A displays a low gray scale, that is, FIG. 1B is a schematic diagram of an enlarged ellipse portion of the dotted line shown in FIG. 1A.
  • FIG. 1B is a schematic diagram of an enlarged ellipse portion of the dotted line shown in FIG. 1A.
  • the current control method when the display panel is displayed in low gray scale, the maximum driving current is about 0.04 milliampere (mA), and the current changes smoothly. Therefore, the current control method will have problems such as too small current gradient, difficult to accurately control and wavelength shift, so this will increase the complexity of the structure of the pixel driving chip and the difficulty of the manufacturing process.
  • the time control method requires the pixel drive chip to have a high-frequency oscillator (abbreviated as OSC) or the accuracy of the received clock signal provided by the display panel, for example, is required. Therefore, it will also increase the complexity of the structure of the pixel drive chip. , The size of the pixel drive chip, the power consumption of the pixel drive chip and the high-frequency wiring of the display panel, etc., and the process specifications of the display substrate are relatively high.
  • OSC high-frequency oscillator
  • At least one embodiment of the present disclosure provides a pixel driving chip, including: a data input circuit, a time selection circuit, and a current control circuit; the data input circuit is connected to the time selection circuit and is configured to receive display data, and display the data according to gray-scale dividing points. Partitioning is performed to obtain the data partitions to which the display data belongs in the M data partitions obtained based on the display data range.
  • the M data partitions correspond to M output durations
  • the time selection circuit is connected to the data input circuit and the current control circuit, and is configured In order to determine the output duration corresponding to the display data according to the data partition to which the display data belongs, and output the display data to the current control circuit within the output duration
  • the current control circuit is connected to the time selection circuit and is configured to determine the data flowing through the display according to the display data
  • the driving current of the corresponding light-emitting element is output based on the output duration corresponding to the display data, and M is an integer greater than 1.
  • Some embodiments of the present disclosure also provide a display device and a driving method corresponding to the aforementioned pixel driving chip.
  • the pixel driving chip provided by the above-mentioned embodiments of the present disclosure can adopt a gray-scale segmented driving method to reduce the driving current of the display panel when displaying high gray scales, and increase the driving current of the display panel when displaying low gray scales.
  • the pixel drive chip has a simple structure, can reduce the degree of flicker of the display panel, improve the driving efficiency of the display panel, reduce the power consumption and implementation cost of the display panel, and help improve the display effect of the display panel.
  • the pixel driving chip provided by at least one embodiment of the present disclosure will be described in detail below with reference to FIGS. 2 to 6.
  • the display device 10 includes a pixel driving chip 122 and a light-emitting element L provided by any embodiment of the present disclosure.
  • the pixel driving chip 122 is electrically connected to the light-emitting element L to output a drive flowing through the light-emitting element L.
  • Current may be located in a pixel unit of the display panel to drive a light-emitting element connected to the pixel unit to emit light.
  • the backlight unit 12 when the display device includes the display panel 11 and the backlight unit 12, the backlight unit 12 includes a plurality of backlight partitions and is driven by a local dimming method, and at least one of the plurality of backlight partitions includes a pixel driving chip 122 And light-emitting element L.
  • each pixel driving chip is configured to drive the light-emitting elements in each backlight subarea to emit light.
  • the embodiment of the present disclosure does not limit this.
  • the light-emitting element can be OLED (organic light-emitting diode), Micro-led or mini-led.
  • the data input circuit 210 may be a digital input circuit, or a communication circuit that uses a single wire to transmit numbers.
  • the display data range that is, all the display data that needs to be displayed for one frame of image, for example, includes display data with grayscale values of 0 to P (P is an integer greater than 1).
  • P is an integer greater than 1.
  • M-1 gray-scale dividing points may be included, thereby dividing P+1 display data into the following M data partitions: the first data partition 0 ⁇ p1, the second data Partitions p1 ⁇ p2,..., the mth data partition p(m-1) ⁇ p(m),..., the Mth data partition p(M-1) ⁇ p(M).
  • m is an integer greater than or equal to 1 and less than M.
  • the minimum display data of the m+1th data partition is greater than the maximum display data of the mth data partition, and the m+1th output time corresponding to the m+1th data partition is longer than the mth data partition corresponding to the mth data partition.
  • Output duration that is, high grayscale display data corresponds to a larger output duration, and low grayscale display data corresponds to a smaller output duration.
  • the output duration corresponding to the display data of high grayscale is equal to the longer display duration of the light emitting element in one frame of display time t
  • the output duration corresponding to the display data of low grayscale is equal to the duration of the light emitting element.
  • t2 t-t1.
  • t2 occupies most of the display time t of one frame
  • t1 occupies a small part of the display time t of one frame, so that the segmented drive of gray scale can be realized. For example, as shown in FIG.
  • the first data partition is a data partition including low gray levels, for example, including 0 to 32 gray levels
  • the second data partition is a data partition including high gray levels, for example, including 33 to 32 gray levels.
  • the setting of the grayscale dividing point can be determined according to specific conditions, and the embodiment of the present disclosure does not limit this.
  • the driving current flowing through the light-emitting element, the output duration, and the brightness corresponding to the display data satisfy the following formula:
  • B represents the brightness corresponding to the display data
  • I represents the driving current flowing through the light-emitting element
  • T represents the output duration
  • K represents the proportionality factor
  • the light-emitting element is a light-emitting element suitable for current driving.
  • the final display brightness is achieved by using the integration of the output duration and the drive current.
  • the output duration is smaller, the drive current flowing through the light-emitting element is higher, and the output duration is longer Then, the driving current flowing through the light-emitting element is low.
  • the output duration of each gray scale is only equal to: one frame of display time t/the number of channels, not the entire frame of time t.
  • the output duration t2 of the high-gray-scale display data provided in the embodiment of the present disclosure corresponds to most of the time t2 of the display time t of one frame. Therefore, the high-gray-scale display data in the embodiment of the present disclosure corresponds to The output time length is greater than the output time length of the high-gray-scale display data in the above multiplexing scheme.
  • the display panel's performance during low-gray-level display can be improved.
  • the driving current can overcome the problem that the current control method is difficult to control due to the small driving current.
  • the transfer function shown in formula (2) that is, both the output duration T and the driving current I are used as adjustment factors, instead of using only the driving current or the output duration in formula (1)
  • the method of adjusting the factor can solve the problems of too small current gradient, difficult to accurately control and wavelength shift in the current control method, and the need for the pixel drive chip to have high frequency OSC or the receiver such as display panel in the time control method.
  • the accuracy requirements of the clock signal provided are relatively high.
  • the output durations corresponding to the respective data partitions are obtained by making the driving currents corresponding to the largest display data in the respective data partitions approximately the same.
  • FIG. 4A is a schematic diagram of a driving current provided by at least one embodiment of the present disclosure.
  • FIG. 4B is a schematic diagram of current driving of the display panel shown in FIG. 4A when displaying low gray scales, that is, FIG. 4B is a schematic diagram of an enlarged ellipse portion of the dotted line shown in FIG. 4A.
  • the current is basically the same as the drive current corresponding to the maximum display data (for example, display data with a gray scale of 255) of the second data partition (that is, a data partition including a high gray scale, for example, including 33 to 255 gray scales), such as , Both are around 0.1mA.
  • the output duration of each data partition can be obtained based on the above formula (2).
  • the output duration T corresponding to the first data partition substituting the brightness corresponding to the gray level 32 and the driving current 0.1mA into the above formula (2) can obtain the output duration T corresponding to the first data partition, and substituting the brightness corresponding to the gray level 255 and the driving current 0.1mA into the above formula (2) )
  • the output duration T corresponding to the second data partition can be obtained.
  • the data input circuit 210 is When receiving the display data in these data partitions (for example, the second data partition), it can be directly sent to the time selection circuit 220 to determine the corresponding output duration according to the display data. However, when the data input circuit 210 receives a data partition in which the display data-current correspondence relationship is not stored in the display panel (for example, a data partition with a grayscale value lower than the grayscale boundary X (for example, the first data partition) ), it can be transmitted to the gray-scale conversion circuit 240 first.
  • the gray-scale conversion circuit 240 can convert the display data belonging to the first data partition into a proportional relationship between the output duration corresponding to the second data partition and the data duration corresponding to the first data partition, that is, the proportional relationship between t2 and t1, for example. 2 data partition display data, so that the drive current belonging to the display data in the first data partition can be obtained from the display data-current correspondence relationship in the second data partition stored in the display panel.
  • the pixel driving chip 122 further includes a grayscale holding circuit 250.
  • the gray scale holding circuit 250 is connected to the gray scale conversion circuit 240 and the time selection circuit 220, and is configured to hold the display data belonging to the remaining data partitions in the converted display data, and output the converted display data corresponding to the When the time period arrives, the converted display data is output to the time selection circuit 220.
  • the display data in the first data partition is converted into the display in the second data partition in the gray-scale conversion circuit 240.
  • the grayscale holding circuit 250 for storage, so that when its corresponding output time length (for example, the output time length t2 corresponding to the second data partition) arrives, the converted display data is output to the time selection circuit 220, thus, the time selection circuit can transmit the converted display data to the current control circuit, and the current control circuit can obtain the corresponding relationship between the display data and current of the second data partition stored in the display panel.
  • the drive current of the converted display data is obtained to obtain the drive current corresponding to the display data in the first data partition, and the drive current is output to the light-emitting elements (light-emitting diodes) respectively connected to each channel CH during the output time period t1 .
  • the unstored part can be through a certain proportional relationship (for example, output The proportional relationship of duration) corresponds to the display data in the stored data partition, thereby storing the data partition of the display data-current correspondence relationship (for example, the high-gray-scale data partition, for example, the second data partition) and the unstored display
  • the data partition of the data-current correspondence for example, the low-gray-scale data partition, for example, the first data partition
  • the display panel can also store the display data-current correspondence of all data partitions, so that the display data-current relationship of the data partition can be called according to the data partition to which the received display data belongs. Correspondence.
  • the pixel driving chip 122 further includes a voltage conversion circuit 260.
  • the gate driving circuit outputs the gate scanning signal GL1 (output to the first row switching transistor T shown in FIG. 6), GL2 (output to the The switching transistors T in the second row shown are..., GLN (output to the switching transistors T in the Nth row (not shown in FIG. 6)).
  • the switching transistor T takes the switching transistor T as an N-type transistor as an example.
  • the data input circuit 210 in FIG. 3A receives the first data signal DL1 and partitions it to determine its corresponding output duration according to the data partition to which it belongs. For example, suppose that the gray scale of the first data signal DL1 is greater than the gray scale dividing point X (for example, higher than the gray scale dividing point 32), that is, it belongs to the second data partition, and the corresponding output duration is the longer second output duration t2 (for example, 999t/1000).
  • the corresponding output time length is the shorter first frame of the display time length t.
  • Output duration t1 (for example, t/1000).
  • the first output time period t1 is entered.
  • the time selection circuit 220 outputs the second data signal DL2 to the current control circuit 230 in response to the rising edge of the second V1-V2 change of the clock signal PEC1, and the current control circuit 230 finds the second
  • the drive current corresponding to the data signal DL2 is output to the channel CH1-2 to drive the light-emitting element L connected to the channel CH1-2 to emit light.
  • the gate scan signal GL1 of the second row is at a high level, and the switching transistor T connected to the gate scan signal GL2 of the second row shown in FIG. Display data) is written to the pixel drive chip 122 in the second row, for example, the first data signal DL1 shown in FIG.
  • the pixel driving chip 122 further includes at least one electrostatic discharge circuit 280.
  • at least one electrostatic discharge circuit 280 is respectively connected to at least one of the power source PEC, the data input circuit 210, the current control circuit 230, and the ground terminal GND, and is configured to discharge the power source PEC, the data input circuit 210, the current control circuit 230, and the ground. Static electricity generated when at least one of the terminals receives a signal or outputs a signal.
  • the circuit for receiving and outputting signals of the pixel drive chip 122 that is, the circuits that exchange signals with the outside world, are connected to an electrostatic discharge circuit to discharge the static electricity generated by each circuit during the signal exchange, so as to protect the pixel drive chip 122. Extend the service life of the pixel driver chip.
  • the transistors used in at least one embodiment of the present disclosure may be thin film transistors or field effect transistors or other switching devices with the same characteristics.
  • thin film transistors are used as examples for description.
  • the source and drain of the transistor used here can be symmetrical in structure, so the source and drain can be structurally indistinguishable.
  • one pole is directly described as the first pole and the other pole is the second pole.
  • transistors can be divided into N-type and P-type transistors according to their characteristics.
  • the turn-on voltage is a low-level voltage
  • the turn-off voltage is a high-level voltage
  • the turn-on voltage is a high-level voltage
  • the turn-off voltage is a low-level voltage
  • the transistors in the embodiments of the present disclosure are all described by taking an N-type transistor as an example.
  • the first electrode of the transistor is the drain, and the second electrode is the source.
  • the present disclosure includes but is not limited to this.
  • one or more transistors in each selection switch provided by the embodiments of the present disclosure may also be P-type transistors.
  • the first electrode of the transistor is the source and the second electrode is the drain.
  • the poles of the transistors are connected correspondingly with reference to the poles of the corresponding transistors in the embodiments of the present disclosure, and the corresponding voltage terminals are provided with corresponding high or low voltages.
  • indium gallium zinc oxide Indium Gallium Zinc Oxide, IGZO
  • LTPS low temperature polysilicon
  • amorphous silicon such as hydrogenated amorphous silicon
  • crystalline silicon can effectively reduce the size of the transistor and prevent leakage current.
  • the pixel drive chip provided by the above-mentioned embodiments of the present disclosure can adopt a gray-scale segmented drive method, that is, use different drive currents under unequal output duration to control the brightness of the light-emitting element, which can reduce the display panel in high-gray-scale display.
  • the driving current of the display panel can be improved when the display panel is displayed in low gray scale, and the pixel driving chip has a simple structure, which can reduce the degree of flicker of the display panel, improve the driving efficiency of the display panel, and reduce the power consumption and implementation cost of the display panel. It is beneficial to improve the display effect of the display panel.
  • FIG. 6 is a schematic diagram of a display device provided by at least one embodiment of the present disclosure.
  • the display device 10 includes a pixel driving chip 122 and a light-emitting element L provided by any embodiment of the present disclosure, for example, includes the pixel driving chip 122 shown in FIG. 3A.
  • the pixel driving chip 122 is electrically connected to the light-emitting element L to output the driving current flowing through the light-emitting element L.
  • the display device 10 further includes a display panel 11.
  • the pixel driving chip 122 and the light emitting element L are provided in the pixel unit on the display panel 11.
  • the display device 10 further includes a gate driving circuit 130 and a data driving circuit 140 provided on the substrate.
  • the display device 10 further includes a capacitor C connected to the switching transistor T.
  • the first pole of the capacitor C is connected to the second pole of the switching transistor, and the second pole of the capacitor C is grounded, so that the data signal transmitted by the switching transistor T to the pixel driving chip 122 can be stored.
  • the gate driving circuit 130 may be implemented as a gate driving chip (IC) or directly prepared as a gate driving circuit (GOA) on an array substrate of a display device.
  • GOA includes a plurality of cascaded shift register units, which are configured to shift and output scan signals under the control of trigger signals and clock signals provided by peripheral circuits (for example, timing controllers).
  • peripheral circuits for example, timing controllers.
  • the specific cascade mode and The working principle can be referred to the design in this field, which will not be repeated here.
  • the data driving circuit 140 can also refer to the design in this field, which will not be repeated here.
  • the display device 10 may also be a liquid crystal display device.
  • the display device 10 further includes a display panel 11 and a backlight unit 12.
  • the backlight unit 12 includes a plurality of backlight partitions (the partitions divided by a dashed frame in FIG. 7B) and is driven by a local dimming method.
  • At least one of the plurality of backlight partitions includes a pixel driving chip 122 and a light emitting element. L.
  • the plurality of backlight partitions may be arranged in an array or not, which is not limited in the embodiment of the present disclosure.
  • each pixel driving chip is configured to drive the light-emitting elements in each backlight subarea to emit light. The embodiment of the present disclosure does not limit this.
  • FIG. 8 is a flowchart of a driving method of a pixel driving chip provided by at least one embodiment of the present disclosure. As shown in FIG. 8, the driving method of the pixel driving chip includes step S110-step S130.
  • Step S110 Receive the display data through the data input circuit, and partition the display data according to the gray-scale dividing points to obtain the data partitions to which the display data belongs in the M data partitions obtained based on the display data range.
  • Step S120 Determine the output duration corresponding to the display data according to the data partition to which the display data belongs through the time selection circuit, and output the display data to the current control circuit within the output duration.
  • the minimum display data of the m+1th data partition is greater than the maximum display data of the mth data partition, and the m+1th output time corresponding to the m+1th data partition is longer than the mth data partition corresponding to the mth data partition.
  • Output duration that is, high grayscale display data corresponds to a larger output duration, and low grayscale display data corresponds to a smaller output duration.
  • the output duration corresponding to the display data of high grayscale is equal to the longer display duration of the light emitting element in one frame of display time t
  • the output duration corresponding to the display data of low grayscale is equal to the duration of the light emitting element.
  • t2 t-t1.
  • t2 occupies most of the display time t of one frame
  • t1 occupies a small part of the display time t of one frame, so that the segmented drive of gray scale can be realized. For example, as shown in FIG.
  • the first data partition is a data partition including low gray levels, for example, including 0 to 32 gray levels
  • the second data partition is a data partition including high gray levels, for example, including 33 to 32 gray levels.
  • the setting of the grayscale dividing point can be determined according to specific conditions, and the embodiment of the present disclosure does not limit this.
  • the driving current flowing through the light-emitting element, the output duration, and the brightness corresponding to the display data satisfy the following formula:
  • B represents the brightness corresponding to the display data
  • I represents the driving current flowing through the light-emitting element
  • T represents the output duration
  • K represents the proportionality factor
  • the final display brightness is achieved by using the integration of the output duration and the drive current.
  • the output duration is smaller, the drive current flowing through the light-emitting element is higher, and the output duration is longer Then, the driving current flowing through the light-emitting element is low.
  • the output duration corresponding to each data partition in the pixel driving chip may be preset in the process of preparing the pixel driving chip.
  • the pixel driving chip 122 can set a gray scale boundary point that can divide the display data into M data partitions in the pixel driving chip, so that it can be used in the process of driving the light-emitting element to emit light.
  • the display data received in the display data is allocated to the corresponding data partition by comparing with each set of gray-scale dividing points, so as to obtain the output duration corresponding to the data partition where the display data is located.
  • the output durations corresponding to the respective data partitions are obtained by making the driving currents corresponding to the largest display data in the respective data partitions approximately the same.
  • FIG. 4A is a schematic diagram of a driving current provided by at least one embodiment of the present disclosure.
  • FIG. 4B is a schematic diagram of current driving of the display panel shown in FIG. 4A when displaying low gray scales, that is, FIG. 4B is a schematic diagram of an enlarged ellipse portion of the dotted line shown in FIG. 4A. 4A and 4B, it can be seen that when the display panel displays a low gray scale, the driving current is significantly amplified, which can overcome the problems of too small current gradients that are difficult to accurately control and wavelength shifts that occur in the current control method.
  • the current is basically the same as the drive current corresponding to the maximum display data (for example, display data with a gray scale of 255) of the second data partition (that is, a data partition including a high gray scale, for example, including 33 to 255 gray scales), such as , Both are around 0.1mA.
  • the output duration of each data partition can be obtained based on the above formula (2).
  • the light-emitting element displays different gray scales (ie, brightness) corresponding to different driving currents
  • the current control circuit here is a circuit that generates driving currents for each gray scale.
  • a look-up table including the correspondence between display data (for example, gray scale) and driving current is stored in the memory of the display panel in advance, and the pixel driving chip can call the look-up table according to the display data it receives, and find it in the look-up table. Corresponding drive current.
  • the pixel driving chip 122 can obtain the display data-current correspondence relationship of at least one data partition.
  • the display panel includes a look-up table of the correspondence relationship between display data and current of at least one data partition.
  • the driving current corresponding to the received display data can be found in the look-up table.
  • the display data in the data partition that does not store the display data-current correspondence relationship on the display panel it can be matched to the display data in the data partition that has stored the display data-current correspondence relationship in the display panel. In order to obtain its corresponding drive current.
  • the pixel driving chip 122 further includes a gray scale conversion circuit 240.
  • the gray scale conversion circuit 240 is connected to the data input circuit 210, and is configured to receive display data belonging to the remaining data partitions except for at least one data partition, according to the output duration corresponding to the remaining data partitions and at least one
  • the proportional relationship between the output durations corresponding to the data partitions is to convert the display data belonging to the remaining data partitions into the display data in at least one data partition, so as to obtain the display data belonging to the remaining data partitions according to the corresponding relationship between the display data and current of the at least one data partition.
  • the drive current corresponding to the display data of the data partition is connected to the data input circuit 210, and is configured to receive display data belonging to the remaining data partitions except for at least one data partition, according to the output duration corresponding to the remaining data partitions and at least one
  • the proportional relationship between the output durations corresponding to the data partitions is to convert the display data belonging to the remaining data partitions into the display data in at least
  • the display panel stores the display data-current correspondence relationship in the data partition (for example, the second data partition) whose grayscale value is higher than the grayscale demarcation point X. Therefore, the data input circuit When 210 receives the display data in these data partitions (for example, the second data partition), it can directly send it to the time selection circuit 220 to determine its corresponding output duration according to the display data. However, when the data input circuit 210 receives a data partition in which the display data-current correspondence relationship is not stored in the display panel (for example, a data partition with a grayscale value lower than the grayscale boundary X (for example, the first data partition) ), it can be transmitted to the gray-scale conversion circuit 240 first.
  • a data partition in which the display data-current correspondence relationship is not stored in the display panel for example, a data partition with a grayscale value lower than the grayscale boundary X (for example, the first data partition

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种像素驱动芯片(122)及其驱动方法、显示装置(10)。该像素驱动芯片(122)包括：数据输入电路(210)、时间选择电路(220)和电流控制电路(230)；数据输入电路(210)配置为接收显示数据，并根据灰阶分界点对显示数据进行分区，以获取显示数据在基于显示数据范围得到的M个数据分区中所属的数据分区，M个数据分区分别对应M个输出时长(T)；时间选择电路(220)配置为根据显示数据所属的数据分区确定显示数据对应的输出时长(T)，并在输出时长(T)内将显示数据输出至电流控制电路(230)；电流控制电路(230)配置为根据显示数据确定流经显示数据对应的发光元件(L)的驱动电流(I)，并基于显示数据对应的输出时长(T)输出驱动电流(I)。像素驱动芯片(122)的结构简单，可以降低显示面板的闪烁度和功耗，提高显示面板的工作效率。

Description

像素驱动芯片及其驱动方法、显示装置
本公开要求于2019年11月01日递交的中国专利申请第201911059962.3号的优先权，在此全文引用上述中国专利申请公开的内容以作为本公开的一部分。
技术领域
本公开的实施例涉及一种像素驱动芯片及其驱动方法、显示装置。
背景技术
发光二极管(Light Emitting Diode，LED)显示装置是目前研究领域的热点之一，与液晶显示装置(Liquid Crystal Display，LCD)相比，LED显示装置具有低能耗、生产成本低、自发光等优点。
LED显示装置的驱动电路的驱动方式与LCD的驱动电路的驱动方式不同，LED显示装置的驱动电路采用电流驱动的方式，LCD的驱动电路则采用电压驱动的方式。相比于电压驱动，电流驱动更容易受晶体管开启电压、载流子迁移率及电路压降影响。
发明内容
本公开至少一实施例提供一种像素驱动芯片，包括：数据输入电路、时间选择电路和电流控制电路；所述数据输入电路与所述时间选择电路连接，且配置为接收显示数据，并根据灰阶分界点对所述显示数据进行分区，以获取所述显示数据在基于显示数据范围得到的M个数据分区中所属的数据分区，其中，所述M个数据分区分别对应M个输出时长；所述时间选择电路与所述数据输入电路和所述电流控制电路连接，且配置为根据所述显示数据所属的数据分区确定所述显示数据对应的输出时长，并在所述输出时长内将所述显示数据输出至所述电流控制电路；所述电流控制电路与所述时间选择电路连接，且配置为根据所述显示数据确定流经所述显示数据对应的发光元件的驱动电流，并基于所述显示数据对应的输出时长输出所述驱动电流，M为大于1的整数。
例如，在本公开至少一实施例提供的像素驱动芯片中，流经所述发光元件的驱动电流、所述输出时长和所述显示数据对应的亮度满足如下公式：
B＝∫K*I*T，
其中，B表示所述显示数据对应的亮度，I表示流经所述发光元件的驱动电流；T表示所述输出时长，K表示比例系数。
例如，在本公开至少一实施例提供的像素驱动芯片中，第m+1个数据分区的最小显示数据大于第m个数据分区的最大显示数据，所述第m+1个数据分区对应的第m+1个输出时长大于所述第m个数据分区对应的第m个输出时长，m为大于等于1且小于M的整数。
例如，在本公开至少一实施例提供的像素驱动芯片中，各个所述数据分区分别对应的输出时长是使得各个所述数据分区中的最大显示数据分别对应的驱动电流大致相同获得的。
例如，在本公开至少一实施例提供的像素驱动芯片中，所述像素驱动芯片可以获得至少一个数据分区的显示数据-电流的对应关系，所述像素驱动芯片还包括灰阶转换电路，所述灰阶转换电路与所述数据输入电路连接，且配置为当接收到属于除所述至少一个数据分区外的其余各个数据分区中的显示数据时，按照所述其余各个数据分区对应的输出时长与所述至少一个数据分区对应的输出时长之间的比例关系，将属于所述其余各个数据分区的显示数据转换为所述至少一个数据分区中的显示数据，以根据所述至少一个数据分区的显示数据-电流的对应关系获取属于所述其余各个数据分区的显示数据对应的驱动电流。
例如，本公开至少一实施例提供的像素驱动芯片，还包括灰阶保持电路，所述灰阶保持电路与所述灰阶转换电路和所述时间选择电路连接，且配置为将属于所述其余各个数据分区的显示数据保持在转换后的所述显示数据，并在转换后的所述显示数据对应的输出时长到来时，将转换后的所述显示数据输出至所述时间选择。
例如，在本公开至少一实施例提供的像素驱动芯片中，所述时间选择子电路包括M个时间选择子电路，所述电流控制电路包括M个电流控制子电路，所述M个时间选择子电路与所述M个数据分区一一对应，所述M个时间选择子电路与所述数据输入电路连接，且与所述M个电流控制子电路一一对应连接，且配置为选择与所述数据输入电路接收的所述显示数据所属的数据分区对应的时间选择子电路和电流控制子电路，以使得选择的所述时间选择子电路在所述显示数据对应的输出时长内输出所述显示数据至与其连接的所述电流控制子电路，所述电流控制子电路在所述显示数据对应的输出时长内输出所述驱动电流。
例如，本公开至少一实施例提供的像素驱动芯片，还包括电压转换电路，所述电压转换电路与电源、所述数据输入电路和所述电流控制电路连接，且配置为将所述电源提供的电源电压转换为所述数据输入电路和所述电流控制电路所需的电压。
例如，本公开至少一实施例提供的像素驱动芯片，还包括时序控制电路，所述时序控制电路与所述电源、所述时间选择电路和所述电流控制电路连接，且配置为提供控制所述显示数据对应的输出时长的时钟信号。
例如，在本公开至少一实施例提供的像素驱动芯片中，所述时间选择电路配置为响应于所述时钟信号，在所述输出时长内将所述显示数据输出至所述电流控制电路。
例如，本公开至少一实施例提供的像素驱动芯片，还包括至少一个静电放电电路，所述至少一个静电放电电路分别与所述电源、所述数据输入电路、所述电流控制电路和接地端中至少之一连接，且配置为释放所述电源、所述数据输入电路、所述电流控制电路和所述接地端中至少之一在接收信号或输出信号时产生的静电。
本公开至少一实施例还提供一种显示装置，包括本公开任一实施例提供的像素驱动芯 片和发光元件，所述像素驱动芯片与所述发光元件电连接，以输出流经所述发光元件的驱动电流。
例如，本公开至少一实施例提供的显示装置，还包括：栅极驱动电路和数据驱动电路，所述栅极驱动电路配置为向所述像素驱动芯片提供扫描信号；所述数据驱动电路配置为向所述像素驱动芯片提供所述显示数据。
例如，本公开至少一实施例提供的显示装置，还包括显示面板和背光单元，所述背光单元包括多个背光分区且由局域调光方式驱动，所述多个背光分区的至少一个包括所述像素驱动芯片和所述发光元件。
本公开至少一实施例提供一种像素驱动芯片的驱动方法，包括：通过所述数据输入电路接收所述显示数据，并根据所述灰阶分界点对所述显示数据进行分区，以获取所述显示数据在基于所述显示数据范围得到的所述M个数据分区中所属的数据分区，所述M个数据分区分别对应所述M个输出时长；通过所述时间选择电路根据所述显示数据所属的数据分区确定所述显示数据对应的输出时长，并在所述输出时长内将所述显示数据输出至所述电流控制电路；通过所述电流控制电路根据所述显示数据确定流经所述显示数据对应的发光元件的驱动电流，并基于所述显示数据对应的输出时长输出所述驱动电流。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1A为一种显示面板采用电流控制方法时的示意图；
图1B为图1A所示的显示面板在显示低灰阶时的电流驱动示意图；
图2为本公开至少一实施例提供的一种像素驱动芯片的示意图；
图3A为本公开至少一实施例提供的另一种像素驱动芯片的示意图；
图3B为本公开至少一实施例提供的一种时间选择电路和电流控制电路的示意图；
图4A为本公开至少一实施例提供的一种驱动电流的示意图；
图4B为图4A所示的显示面板在显示低灰阶时的电流驱动示意图；
图5为本公开至少一实施例提供的一种像素驱动芯片的工作时序图；
图6为本公开至少一实施例提供的一种显示装置的示意图；
图7A为本公开至少一实施例提供的另一种显示装置的示意图；
图7B为本公开至少一实施例提供的一种背光分区的示意图；以及
图8为本公开至少一实施例提供的一种像素驱动芯片的驱动方法的流程图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开 的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”、“一”或者“该”等类似词语也不表示数量限制，而是表示存在至少一个。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
在显示技术领域，可以通过减小每个子像素包括的发光元件之间的间距，提高显示面板的子像素密度，从而提高显示面板的显示分辨率。在提高显示面板的显示分辨率后，通常采用多路复用架构以及分时驱动方法来减少驱动走线的数量，以降低显示成本。但是，分时驱动方法虽然可以减少驱动走线，却容易导致流经发光元件的电流提高、显示面板的功耗偏高、显示闪烁度高等问题，从而降低了显示面板的显示效果。
基于发光元件为电流驱动的显示器件，比如可以是OLED(有机发光二极管)，Micro-led或mini-led，目前，通常采用电流控制方法或者时间控制方法(即，时分法)调节发光二极管的亮度或者灰阶，调节因子为电流或者时间，传递函数为：
B＝∫K*I；或者，B＝∫K*T；          (1)
其中，B表示发光元件的亮度(例如，与灰阶对应)，K表示比例系数，I表示流经发光元件的驱动电流，T表示发光元件的显示时长(或驱动电流的输出时长)。
但是，在采用电流控制方法驱动显示面板时，由于发光元件的发光特性，需要极小的电流进行驱动才能实现低灰阶的显示。图1A为一种显示面板采用电流控制方法时的示意图。例如，如图1A所示，虚线的椭圆内表示显示面板在显示低灰阶时的驱动电流。图1B为图1A所示的显示面板在显示低灰阶时的电流驱动示意图，也就是说，图1B为将图1A所示的虚线的椭圆部分放大后的示意图。如图1B所示，显示面板在低灰阶显示时，最大的驱动电流在0.04毫安(mA)左右，且电流变化平缓。所以，电流控制方法会出现电流梯度太小难以精确控制以及波长偏移等问题，所以这样会增加像素驱动芯片的结构的复杂度以及制备工艺的难度。
另外，时间控制方法需要像素驱动芯片具有高频振荡器(缩写为OSC)或者对接收的例如显示面板提供的时钟信号的精度的要求较高，因此，也会增加像素驱动芯片的结构的复杂度、像素驱动芯片的尺寸、像素驱动芯片的功耗以及显示面板的高频走线等，且对显示基板的工艺规格要求较高。
本公开至少一实施例提供像素驱动芯片，包括：数据输入电路、时间选择电路和电流 控制电路；数据输入电路与时间选择电路连接，且配置为接收显示数据，并根据灰阶分界点对显示数据进行分区，以获取显示数据在基于显示数据范围得到的M个数据分区中所属的数据分区，M个数据分区分别对应M个输出时长；时间选择电路与数据输入电路和电流控制电路连接，且配置为根据显示数据所属的数据分区确定显示数据对应的输出时长，并在输出时长内将显示数据输出至电流控制电路；电流控制电路与时间选择电路连接，且配置为根据显示数据确定流经显示数据对应的发光元件的驱动电流，并基于显示数据对应的输出时长输出驱动电流，M为大于1的整数。
本公开一些实施例还提供对应于上述像素驱动芯片的显示装置和驱动方法。
本公开上述实施例提供的像素驱动芯片，可以采用灰阶分段式驱动的方式，降低显示面板在显示高灰阶时的驱动电流，提高显示面板在显示低灰阶时的驱动电流，且该像素驱动芯片结构简单，可以降低显示面板的闪烁程度，提高显示面板的驱动效率，降低显示面板的功耗和实现成本，有利于提高显示面板的显示效果。
下面结合附图对本公开的实施例及其示例进行详细说明。
图2为本公开至少一实施例提供的一种像素驱动芯片的示意图；图3A为本公开至少一实施例提供的另一种像素驱动芯片的示意图；图4A为本公开至少一实施例提供的一种驱动电流的示意图；图4B为图4A所示的显示面板在显示低灰阶时的电流驱动示意图，也就是说，图4B为将图4A所示的虚线的椭圆部分放大后的示意图；图5为本公开至少一实施例提供的一种像素驱动芯片的工作时序图；图6为本公开至少一实施例提供的一种包括像素驱动芯片的显示装置的示意图。
下面将参考图2至图6对本公开至少一实施例提供的像素驱动芯片进行详细地介绍。
如图6所示，该显示装置10包括本公开任一实施例提供的像素驱动芯片122和发光元件L，例如，像素驱动芯片122与发光元件L电连接，以输出流经发光元件L的驱动电流。例如，在一些示例中，该像素驱动芯片可以位于显示面板的像素单元中，以驱动与该像素单元连接的发光元件发光。例如，在另一些示例中，当显示装置包括显示面板11和背光单元12时，背光单元12包括多个背光分区且由局域调光方式驱动，多个背光分区的至少一个包括像素驱动芯片122和发光元件L。例如，在该示例中，各个像素驱动芯片配置为分别驱动各个背光分区中发光元件发光。本公开的实施例对此不作限制。发光元件可以为OLED(有机发光二极管)，Micro-led或mini-led。
例如，如图2所示，该像素驱动芯片122包括：数据输入电路210、时间选择电路220和电流控制电路230。
例如，该数据输入电路210可以是数字输入电路，也可以是用单线传输数字的通讯电路。
例如，数据输入电路210与时间选择电路220连接，且配置为接收显示数据，并根据灰阶分界点对显示数据进行分区，以获取显示数据在基于显示数据范围得到的M(M为大于1的整数，例如M＝2、3、4……)个数据分区中所属的数据分区。例如，M个数据 分区分别对应M个输出时长。
例如，显示数据范围，即一帧图像需要显示的全部显示数据，例如，包括灰阶值为0～P(P为大于1的整数)的显示数据。例如，当包括256个显示数据时，P＝255；当包括1024个显示数据时，P＝1023，P的取值可视具体情况而定，本公开的实施例对此不作限制。
例如，当包括M个数据分区时，可以包括M-1个灰阶分界点，从而将P+1个显示数据划分为如下M个数据分区：第1个数据分区0～p1，第2个数据分区p1～p2，…，第m个数据分区p(m-1)～p(m)，…，第M个数据分区p(M-1)～p(M)。例如，m为大于等于1且小于M的整数。
例如，第m+1个数据分区的最小显示数据大于第m个数据分区的最大显示数据，第m+1个数据分区对应的第m+1个输出时长大于第m个数据分区对应的第m个输出时长。即，高灰阶的显示数据对应较大的输出时长，低灰阶的显示数据对应较小的输出时长。例如，在本公开的实施例中，高灰阶的显示数据对应的输出时长等于发光元件在一帧显示时间t中较大的显示时长，低灰阶的显示数据对应的输出时长等于发光元件在一帧显示时间t中较小的显示时长。
例如，以两个数据分区为例进行说明，以下实施例与此相同，不再赘述。例如，基于显示数据范围得到的M个数据分区包括2个，即M＝2，该两个数据分区的对应的输出时长也包括两个t1和t2。例如，t2＝t-t1。例如，t2占一帧显示时间t的大部分，t1占一帧显示时间t的较小部分，从而可以实现灰阶的分段驱动。例如，如图4A所示，第1个数据分区为包括低灰阶的数据分区，例如，包括0～32灰阶，第2个数据分区为包括高灰阶的数据分区，例如，包括33～255灰阶，例如，在该示例中，灰阶分界点X＝32。当然，灰阶分界点的设置可视具体情况而定，本公开的实施例对此不作限制。
例如，流经发光元件的驱动电流、输出时长和显示数据对应的亮度满足如下公式：
B＝∫K*I*T           (2)
其中，B表示显示数据对应的亮度，I表示流经发光元件的驱动电流；T表示输出时长，K表示比例系数。
例如，该发光元件是适用于电流驱动的发光元件。
基于上述公式(1)可以看出，通过采用输出时长和驱动电流的积分实现最终的显示亮度，例如，对于同一显示亮度，输出时长小了，流经发光元件的驱动电流就高，输出时长大了，流经发光元件的驱动电流就低。
在多路复用方案，当显示相同灰阶的显示数据时，各个灰阶的输出时长仅等于：一帧显示时间t/通道数，并不是整帧的时间t。比较而言，本公开实施例中提供的高灰阶的显示数据的输出时长t2对应一帧显示时间t的大部分时间t2，因此，本公开的实施例中的高灰阶的显示数据对应的输出时长大于上述多路复用方案中高灰阶的显示数据的输出时长，从而基于上述公式(2)可以看出，在本公开的实施例中，由于输出时长T相较于上述多 路复用方案中变大，所以可以减小显示面板在显示高灰阶时的驱动电流；同理，由于本公开的实施例中的低灰阶的显示数据对应的输出时长，仅占一帧显示时间t的小部分，所以小于上述多路复用方案中低灰阶的显示数据的输出时长(一帧的显示时间t/通道数)，因此，本公开的实施例相较于上述多路复用方案，减小了低灰阶的显示数据的输出时长，从而基于上述方式(2)可以看出，当低灰阶的显示数据的输出时长T减小时，可以提高显示面板在显示低灰阶时的驱动电流，从而可以克服电流控制方法中因驱动电流较小而难以控制的问题。
因此，在本公开的实施例中，通过采用公式(2)所示的传递函数，即将输出时长T和驱动电流I均作为调节因子，而非采用公式(1)中仅采用驱动电流或输出时长作调节因子的方法，可以解决在电流控制方法中出现的电流梯度太小难以精确控制以及波长偏移等问题，以及时间控制方法中出现的需要像素驱动芯片具有高频OSC或者对接收例如显示面板提供的时钟信号的精度的要求较高等问题。
例如，时间选择电路220与数据输入电路210和电流控制电路230连接，且配置为根据显示数据所属的数据分区确定显示数据对应的输出时长，并在输出时长内将显示数据输出至电流控制电路230。
例如，该像素驱动芯片中与各个数据分区分别对应的输出时长，可以是在制备像素驱动芯片的过程中预先设定，并存储在像素驱动芯片的存储器中的。例如，像素驱动芯片122根据输出时长的个数M，可在像素驱动芯片中设置可以将显示数据分为M个数据分区的灰阶分界点，从而可将其在用于驱动发光元件发光的过程中接收的显示数据，通过与设置的各个灰阶分界点比较以被分配到对应的数据分区，以得到该显示数据所在的数据分区对应的输出时长。
例如，在一些示例中，各个数据分区分别对应的输出时长是使得各个数据分区中的最大显示数据分别对应的驱动电流大致相同获得的。
图4A为本公开至少一实施例提供的一种驱动电流的示意图。图4B为图4A所示的显示面板在显示低灰阶时的电流驱动示意图，也就是说，图4B为将图4A所示的虚线的椭圆部分放大后的示意图。
参见图4A和图4B，可见在显示面板显示低灰阶时，驱动电流得到了明显的放大，从而可以克服在电流控制方法中出现的电流梯度太小难以精确控制以及波长偏移等问题。
例如，如图4A所示，第1个数据分区(即包括低灰阶的数据分区，例如，包括0～32灰阶)的最大显示数据(例如，灰阶为32的显示数据)对应的驱动电流，和第2个数据分区(即包括高灰阶的数据分区，例如，包括33～255灰阶)的最大显示数据(例如，灰阶为255的显示数据)对应的驱动电流基本相同，例如，均在0.1mA左右。此时，基于上述公式(2)可以获得各个数据分区的输出时长。例如，将灰阶32对应的亮度和驱动电流0.1mA代入上述公式(2)可以获得第1个数据分区对应的输出时长T，将灰阶255对应的亮度和驱动电流0.1mA代入上述公式(2)可以获得第2个数据分区对应的输出时长 T，例如，第1个数据分区对应的输出时长T＝t1＝t/1000，第2个数据分区对应的输出时长T＝t2＝t-t/1000＝999t/1000。
例如，电流控制电路230与时间选择电路220连接，且配置为根据显示数据确定流经显示数据对应的发光元件的驱动电流，并基于显示数据对应的输出时长输出驱动电流。
例如，发光元件显示不同灰阶(即亮度)对应不同的驱动电流，这里的电流控制电路就是产生各个灰阶的驱动电流的电路。例如，包括显示数据(例如，灰阶)与驱动电流的对应关系的查找表被预先存储在显示面板的存储器中，像素驱动芯片可以根据其接收的显示数据调用查找表，并在查找表中找到其对应的驱动电流。
例如，像素驱动芯片122可以获得至少一个数据分区的显示数据-电流的对应关系。例如，在显示面板中包括至少一个数据分区的显示数据-电流的对应关系的查找表。当像素驱动芯片122接收到属于该至少一个数据分区的显示数据时，可以在该查找表中查找到对应于其接收的显示数据的驱动电流。但是，对于没有在显示面板存储显示数据-电流的对应关系的数据分区中的显示数据，可以通过将其对应到已经在显示面板中存储显示数据-电流的对应关系的数据分区中的显示数据，从而获得其对应的驱动电流。
例如，如图3A所示，在该示例中，像素驱动芯片122还包括灰阶转换电路240。例如，灰阶转换电路240与数据输入电路210连接，且配置为当接收到属于除至少一个数据分区外的其余各个数据分区中的显示数据时，按照其余各个数据分区对应的输出时长与至少一个数据分区对应的输出时长之间的比例关系，将属于其余各个数据分区的显示数据转换为至少一个数据分区中的显示数据，以根据至少一个数据分区的显示数据-电流的对应关系获取属于其余各个数据分区的显示数据对应的驱动电流。
例如，如图3A所示，假设显示面板中存储有灰阶值灰阶分界点X的数据分区(例如，第2数据分区)中的显示数据-电流的对应关系，因此，数据输入电路210在接收到这些数据分区(例如，第2数据分区)中的显示数据时，可以直接将其发送至时间选择电路220，以根据该显示数据确定其对应的输出时长。然而，在数据输入电路210接收到没有在显示面板中存储显示数据-电流的对应关系的数据分区时(例如，灰阶值低于灰阶分界点X的数据分区(例如，第1数据分区))时，可以先将其传输至灰阶转换电路240。灰阶转换电路240可以根据例如第2数据分区对应的输出时长和第1数据分区对应的数据时长的比例关系，即t2和t1的比例关系，将属于第1数据分区的显示数据转换成属于第2数据分区的显示数据，从而可以在显示面板中存储的第2数据分区中的显示数据-电流的对应关系中获取属于第1数据分区中的显示数据的驱动电流。
需要注意的是，当存储有多个数据分区的显示数据-电流的对应关系时，可以选取其中一个数据分区(例如，第n(n为大于等于1小于等于M的整数)个数据分区)与未存储的数据分区的显示数据通过输出时长的比例对应，具体过程和上面的说明类似，在此不再赘述。
例如，在该示例中，如图3A所示，该像素驱动芯片122还包括灰阶保持电路250。
例如，灰阶保持电路250与灰阶转换电路240和时间选择电路220连接，且配置为将属于其余各个数据分区的显示数据保持在转换后的显示数据，并在转换后的显示数据对应的输出时长到来时，将转换后的显示数据输出至时间选择电路220。
例如，由于显示数据需要在其对应的输出时长中才能被传输至时间选择电路220中，因此，第1数据分区中的显示数据在灰阶转换电路240中被转换成第2数据分区中的显示数据后，需要被传输至灰阶保持电路250中存储起来，以在其对应的输出时长(例如，第2数据分区对应的输出时长t2)到来时，将转换后的显示数据输出至时间选择电路220中，从而，时间选择电路可以将该转换后的显示数据传输至电流控制电路中，电流控制电路从而可以根据显示面板中存储的第2数据分区的显示数据-电流的对应关系得到对应于该转换后的显示数据的驱动电流，从而得到对应于第1数据分区中的显示数据的驱动电流，并将该驱动电流在输出时长t1内输出至与各个通道CH分别连接的发光元件(发光二极管)。
在本公开的实施例的一些示例中，通过设置灰阶转换电路，可以仅存储部分数据分区内的显示数据的显示数据-电流的对应关系，未存储部分可以通过一定的比例关系(例如，输出时长的比例关系)对应到存储的数据分区中的显示数据，从而存储显示数据-电流的对应关系的数据分区(例如，高灰阶的数据分区，例如，第2数据分区)和未存储的显示数据-电流的对应关系的数据分区(例如，低灰阶的数据分区，例如，第1数据分区)可以共用存储的显示数据-电流的对应关系，从而可以减小显示面板的存储量，降低对显示面板的存储器的要求。
当然，在另一些示例中，显示面板也可以将所有数据分区的显示数据-电流的对应关系进行存储，从而可以根据其接收的显示数据所属的数据分区分别调用该数据分区的显示数据-电流的对应关系。
例如，在该示例中，如图3B所示，时间选择电路220包括M个时间选择子电路221，电流控制电路230包括M个电流控制子电路231。
例如，M个时间选择子电路221与M个数据分区一一对应，与数据输入电路210连接，且与M个电流控制子电路231一一对应连接，且配置为选择与数据输入电路接收的显示数据所属的数据分区对应的时间选择子电路221和电流控制子电路231，以使得选择的时间选择子电路221在显示数据对应的输出时长内输出显示数据至与其连接的电流控制子电路231，电流控制子电路231在显示数据对应的输出时长内输出驱动电流。
例如，在该示例中，由于第1数据分区中的显示数据-电流的对应关系和第2数据分区中的显示数据-电流的对应关系均存储在显示面板中，像素驱动芯片均能够从该显示面板中查找到各个数据分区的显示数据-电流的对应关系，因此，该示例中的像素驱动芯片可以不包括灰阶转换电路和灰阶保持电路，且包括2组时间选择子电路和电流控制子电路，以分别接收灰阶值在灰阶分界点X以上的数据分区中显示数据和灰阶值在灰阶分界点X以下的数据分区中显示数据，以分别查找并输出该各个数据分区中的显示数据分别对应的驱动电流。
例如，如图3A所示，在另一些示例中，像素驱动芯片122还包括电压转换电路260。
例如，电压转换电路260与电源PEC、数据输入电路210和电流控制电路230连接，且配置为将电源PEC提供的电源电压转换为数据输入电路210和电流控制电路230所需的电压。例如，各个电路所需的电源电压不同，电压转换电路260可以将电源PEC提供的电压转换为这些电路所需的电源电压，以向像素驱动芯片122中的各个电路供电。例如，数据输入电路210还可以包括电压转换电路(图中未示出)，以向数据输入电路210或与其连接的电路提供的对应的电压。
例如，在一些示例中，像素驱动芯片122还包括时序控制电路270。
例如，时序控制电路270与电源PEC、时间选择电路220和电流控制电路230连接，且配置为提供控制显示数据对应的输出时长的时钟信号。例如，在该示例中，时间选择电路220配置为响应于时钟信号，在输出时长内将显示数据输出至电流控制电路230。
图5为本公开至少一实施例提供的一种像素驱动芯片的工作时序图。例如，图5以显示数据范围包括2个数据分区和图6所示的像素驱动芯片所在的显示装置为例进行说明，本公开的实施例对此不作限制。图6所示的显示装置将在下面进行详细地介绍，在此不再赘述。
例如，第2数据分区(例如，包括高灰阶的显示数据，例如，包括图4A所示的灰阶33-255)对应输出时长t2(例如，999t/1000)，第1数据分区(例如，包括低灰阶的显示数据，例如，包括图4A所示的灰阶0-32)对应第1输出时长t2(例如，t/1000)。
例如，如图5所示，电源PEC不仅作为像素驱动芯片122的电源，还包括第一电源偏置信号V1和第二电源偏置信号V2。例如，第一电源偏置信号V1可以作为像素驱动芯片122的电源，由第一电源偏置信号V1向第二电源偏置信号V2的变化用来控制时钟信号。例如，由第一电源偏置信号V1向第二电源偏置信号V2变化时的上升沿作为时钟信号PEC1～PECN的上升沿，以控制像素驱动芯片122进入第二输出时长t2，并在下一次变化时，进入第一输出时长t1，本公开的实施例对此不作限制。例如，此时时间选择电路220响应于该时钟信号PEC1将高灰阶的显示数据输出至电流控制电路230，电流控制电路230输出对应于该高灰阶的驱动电流至与该像素驱动芯片122连接的通道CH1，以驱动与该通道CH1连接的发光元件发光。
下面结合图5和图6对本公开的实施例提供的像素驱动芯片的工作原理作详细地说明。
例如，如图5所示，首先，栅极驱动电路响应于垂直同步信号Vsync逐行输出栅极扫描信号GL1(输出至图6所示的第1行开关晶体管T)、GL2(输出至图6所示的第2行开关晶体管T)……、GLN(输出至第N行开关晶体管T(图6中未示出))。例如，下面以开关晶体管T为N型晶体管为例进行说明。
例如，在第1阶段t11，第1行栅极扫描信号GL1为高电平，图6所示的与该第1行栅极扫描信号GL1连接的开关晶体管T导通，将数据信号DL(即显示数据)写入第1 行像素驱动芯片122，例如，将图6中所示的第一数据信号DL1写入与通道CH1-1连接的像素驱动芯片，将第二数据信号DL2写入与通道CH1-2连接的像素驱动芯片。需要注意的是，当包括更多列的像素驱动芯片时，可将多列数据信号写入与其一一对应的像素驱动芯片122中，本公开的实施例对此不作限制。
当第一数据信号DL1写入像素驱动芯片122，例如，图3A中的数据输入电路210接收该第一数据信号DL1，并对其分区，以根据其所属的数据分区确定其对应的输出时长。例如，假设该第一数据信号DL1的灰阶大于灰阶分界点X(例如，高于灰阶分界点32)，即其属于第2数据分区，对应的输出时长为较长的第二输出时长t2(例如，999t/1000)。
例如，当检测到时钟信号PEC1的上升沿时，即检测到V1-V2的变化时，即进入第二输出时长t2，在第二输出时长t2，与第一数据信号DL1对应的通道CH1-1导通，时间选择电路220响应于时钟信号PEC1的第一个V1-V2变化的上升沿将第一数据信号DL1输出至电流控制电路230，电流控制电路230查找到第一数据信号DL1对应的驱动电流，并将该驱动电流输出至通道CH1-1中，以驱动与该通道CH1-1连接的发光元件L发光。
例如，假设第二数据信号DL2的灰阶也是大于灰阶分界点X(例如，高于灰阶分界点32)，那么其对应的输出时长也为较长的第二输出时长t2，因此，通道CH1-2的导通时间和通道CH1-1的导通时间相同，具体可参考第二输出时长t2中的相关描述，在此不再赘述。
例如，假设第二数据信号DL2的灰阶是小于灰阶分界点X(例如，低于或等于灰阶分界点32)，那么其对应的输出时长为一帧显示时长t中较短的第一输出时长t1(例如，t/1000)。
例如，当第二次检测到时钟信号PEC1的上升沿时，即第二次检测到V1-V2的变化时，即进入第一输出时长t1，在第一输出时长t1，与第二数据信号DL2对应的通道CH1-2导通，时间选择电路220响应于时钟信号PEC1的第二个V1-V2变化的上升沿将第二数据信号DL2输出至电流控制电路230，电流控制电路230查找到第二数据信号DL2对应的驱动电流，并将该驱动电流输出至通道CH1-2中，以驱动与该通道CH1-2连接的发光元件L发光。
需要注意的是，也可以在第一次检测到时钟信号PEC1的上升沿时，进入第一输出时长t1，在第二次检测到时钟信号PEC1的上升沿时，进入第二输出时长t2，只要在对应的输出时长打开对应的通道即可，本公开的实施例对此不作限制。例如，在第2阶段t12，第二行栅极扫描信号GL1为高电平，图6所示的与该第2行栅极扫描信号GL2连接的开关晶体管T导通，将数据信号DL(即显示数据)写入第2行像素驱动芯片122，例如，将图6中所示的第一数据信号DL1写入与通道CH2-1连接的像素驱动芯片，将第二数据信号DL2写入与通道CH2-2连接的像素驱动芯片。具体过程可参考对第1行像素驱动芯片的介绍，在此不再赘述。
需要注意的是，当包括3、4、5或更多个数据分区时，像素驱动芯片的工作原理上面 所示的包括2个数据分区的工作原理类似，在此不再赘述。
例如，该像素驱动芯片122，还包括至少一个静电放电电路280。例如，至少一个静电放电电路280分别与电源PEC、数据输入电路210、电流控制电路230和接地端GND中至少之一连接，且配置为释放电源PEC、数据输入电路210、电流控制电路230和接地端中至少之一在接收信号或输出信号时产生的静电。
例如，该像素驱动芯片122进行信号接收和输出的电路，即与外界进行信号交换的电路均连接静电放电电路以释放在信号交换时各个电路产生的静电，从而对该像素驱动芯片122进行保护，延长该像素驱动芯片的使用寿命。
本公开的至少一个实施例中采用的晶体管可以为薄膜晶体管或场效应晶体管或其他特性相同的开关器件，本公开描述的实施例中均以薄膜晶体管为例进行说明。这里采用的晶体管的源极、漏极在结构上可以是对称的，所以其源极、漏极在结构上可以是没有区别的。在本公开的实施例中，为了区分晶体管除栅极之外的两极，直接描述了其中一极为第一极，另一极为第二极。此外，按照晶体管的特性区分可以将晶体管分为N型和P型晶体管。当晶体管为P型晶体管时，开启电压为低电平电压，关闭电压为高电平电压；当晶体管为N型晶体管时，开启电压为高电平电压，关闭电压为低电平电压。
另外，本公开的实施例中的晶体管均以N型晶体管为例进行说明，此时，晶体管的第一极是漏极，第二极是源极。需要说明的是，本公开包括但不限于此。例如，本公开的实施例提供的各个选择开关中的一个或多个晶体管也可以采用P型晶体管，此时，晶体管第一极是源极，第二极是漏极，只需将选定类型的晶体管的各极参照本公开的实施例中的相应晶体管的各极相应连接，并且使相应的电压端提供对应的高电压或低电压即可。当采用N型晶体管时，可以采用氧化铟镓锌(Indium Gallium Zinc Oxide，IGZO)作为薄膜晶体管的有源层，相对于采用低温多晶硅(Low Temperature Poly Silicon，LTPS)或非晶硅(例如氢化非晶硅)作为薄膜晶体管的有源层，可以有效减小晶体管的尺寸以及防止漏电流。
本公开上述实施例提供的像素驱动芯片，可以采用灰阶分段式驱动的方式，即用不等分输出时长下的不同驱动电流控制发光元件的亮度，可以降低显示面板在高灰阶显示时的驱动电流，提高显示面板在低灰阶显示时的驱动电流，且该像素驱动芯片结构简单，可以降低显示面板的闪烁程度，提高显示面板的驱动效率，降低显示面板的功耗和实现成本，有利于提高显示面板的显示效果。
本公开至少一实施例还提供一种显示装置。如上所述，图6为本公开至少一实施例提供的一种显示装置的示意图。如图6所示，该显示装置10包括本公开任一实施例提供的像素驱动芯片122和发光元件L，例如，包括如图3A所示的像素驱动芯片122。例如，像素驱动芯片122与发光元件L电连接，以输出流经发光元件L的驱动电流。例如，显示装置10还包括显示面板11。像素驱动芯片122和发光元件L设置在显示面板11上的像素单元中。
例如，图6仅示意性地示出了1个像素驱动芯片122与1个发光元件L连接。在其他示例中，1个像素驱动芯片122与K个发光元件L连接，K为大于1的整数，例如，在一些示例中，N为K的整数倍。本公开的实施例对此不作限制。例如，该发光元件可以为Mini LED、微型发光二极管或有机发光二极管，也可以是其他发光二极管，本公开的实施例对此不作限制。
例如，该像素驱动芯片可以是单独制作形成后通过例如表面安装工艺(SMT)安装在基板(图中未示出)上，例如，通过引脚上的引线与***电路(例如，栅极扫描电路和数据驱动电路)、电源或发光元件连接；也可以直接形成在该基板上，以实现相应的功能。例如，该像素驱动芯片可以通过制备在硅晶片上切割得到。例如，在本公开的至少一个实施例中，该像素驱动芯片和发光元件均是单独制作完成后绑定在基板上，当然，也可以直接制作在基板上，本公开的实施例不限于此。例如，基板例如为玻璃基板、陶瓷基板、硅基板等。
例如，在一些示例中，如图6所示，该显示装置10还包括设置在基板上的栅极驱动电路130和数据驱动电路140。
例如，显示装置10包括开关关晶体管T，该开关晶体管T与像素驱动芯片122连接，配置为响应于扫描信号将数据信号(例如，输入信号)写入像素驱动芯片122；栅极驱动电路130通过多条栅线GL与多行像素单元的开关晶体管T分别电连接，且配置为分别向多行像素电路的开关晶体管T提供多个扫描信号；数据驱动电路140通过多条数据线DL与多列像素单元的开关晶体管T分别电连接，且配置为分别向多列像素单元的开关晶体管T提供多个数据信号。
例如，开关晶体管T的栅极通过相连接的栅线(例如，第一开关控制线)GL和栅极驱动电路130电连接以接收扫描信号，开关晶体管T的第一极通过相连接的数据线DL和数据驱动电路140电连接以接收数据信号，开关晶体管T的第二极和像素驱动芯片122的数据输入电路210连接。例如，开关晶体管T响应于扫描信号导通，将数据驱动电路140提供的数据信号写入像素驱动芯片122中进行存储，以在显示阶段用于驱动发光元件发光。
例如，该显示装置10还包括与开关晶体管T连接的电容C。电容C的第一极与开关晶体管的第二极连接，电容C的第二极接地，从而可以存储开关晶体管T传输至像素驱动芯片122的数据信号。
例如，栅极驱动电路130可以实现为栅极驱动芯片(IC)或为直接制备在显示装置的阵列基板上栅极驱动电路(GOA)。例如，GOA包括级联的多个移位寄存器单元，配置为在***电路(例如，时序控制器)提供的触发信号和时钟信号的控制下，移位输出扫描信号，其具体的级联方式和工作原理可以参考本领域的设计，在此不再赘述。数据驱动电路140也可以参考本领域的设计，在此不再赘述。
在该示例中，通过将栅极驱动电路、数据驱动电路、像素驱动芯片、发光元件L等 集成在同一阵列基板上，可以通过AM(Active-matrix，有源矩阵)驱动的方式实现将数据信号存储至像素驱动芯片。例如，在显示阶段，根据实际情况，同时或逐行向第二电压线提供第二电压至发光元件L的第二极，从而使得像素驱动芯片根据存储的数据信号控制流经发光元件的电流，以驱动发光元件L按照一定的灰度(数据信号)发光。即，在显示阶段，对发光元件的驱动依然采用PM(Passive-Matrix，无源)驱动的方式。因此，在本公开实施例中，可以结合AM和PM的驱动方式实现对发光元件的驱动。
例如，数据驱动电路140还向像素驱动芯片122提供时钟信号。例如，各行像素驱动芯片接收同一个时钟信号，例如，第1行像素驱动芯片122接收第1个时钟信号PEC1，第2行像素驱动芯片122接收第2个时钟信号PEC2，以此类推。
例如，在一些示例中，该显示装置10可以是Mini LED显示装置或微型发光二极管显示装置，即该像素驱动芯片122与发光元件L电连接，用于驱动发光元件L发出相应灰度的光。
例如，在另一些示例中，该显示装置10还可以是液晶显示装置。例如，如图7A所示，在该示例中，显示装置10还包括显示面板11和背光单元12。如图7B所示，背光单元12包括多个背光分区(如图7B中的虚线框划分的分区)且由局域调光方式驱动，多个背光分区的至少一个包括像素驱动芯片122和发光元件L。例如，该多个背光分区可以是阵列排布，也可以不是阵列排布，本公开的实施例对此不作限制。例如，在该示例中，各个像素驱动芯片配置为分别驱动各个背光分区中发光元件发光。本公开的实施例对此不作限制。
需要说明的是，为表示清楚、简洁，本公开的实施例并没有给出该显示装置10的全部组成单元。为实现该显示装置10的基本功能，本领域技术人员可以根据具体需要提供、设置其他未示出的结构，本公开的实施例对此不作限制。
关于上述实施例提供的显示装置的技术效果可以参考本公开的实施例中提供的电子基板的技术效果，这里不再赘述。
本公开至少一实施例还提供一种像素驱动芯片的驱动方法。图8为本公开至少一实施例提供的像素驱动芯片的驱动方法的流程图。如图8所示，该像素驱动芯片的驱动方法包括步骤S110-步骤S130。
步骤S110：通过数据输入电路接收显示数据，并根据灰阶分界点对显示数据进行分区，以获取显示数据在基于显示数据范围得到的M个数据分区中所属的数据分区。
例如，M个数据分区分别对应M个输出时长。
步骤S120：通过时间选择电路根据显示数据所属的数据分区确定显示数据对应的输出时长，并在输出时长内将显示数据输出至电流控制电路。
步骤S130：通过电流控制电路根据显示数据确定流经显示数据对应的发光元件的驱动电流，并基于显示数据对应的输出时长输出驱动电流。
例如，对于步骤S110，例如，显示数据范围，即一帧图像需要显示的全部显示数据， 例如包括灰阶值为0～P(P为大于1的整数)的显示数据。例如，当包括256个显示数据时，P＝255；当包括1024个显示数据时，P＝1023，P的取值可视具体情况而定，本公开的实施例对此不作限制。
例如，当包括M个数据分区时，可以包括M-1个灰阶分界点，从而将P+1个显示数据划分为如下M个数据分区：第1个数据分区0～p1，第2个数据分区p1～p2，…，第m个数据分区p(m-1)～p(m)，…，第M个数据分区p(M-1)～p(M)。例如，m为大于等于1且小于M的整数。
例如，第m+1个数据分区的最小显示数据大于第m个数据分区的最大显示数据，第m+1个数据分区对应的第m+1个输出时长大于第m个数据分区对应的第m个输出时长。即，高灰阶的显示数据对应较大的输出时长，低灰阶的显示数据对应较小的输出时长。例如，在本公开的实施例中，高灰阶的显示数据对应的输出时长等于发光元件在一帧显示时间t中较大的显示时长，低灰阶的显示数据对应的输出时长等于发光元件在一帧显示时间t中较小的显示时长。
例如，以两个数据分区为例进行说明，以下实施例与此相同，不再赘述。例如，基于显示数据范围得到的M个数据分区包括2个，即M＝2，该两个数据分区的对应的输出时长也包括两个t1和t2。例如，t2＝t-t1。例如，t2占一帧显示时间t的大部分，t1占一帧显示时间t的较小部分，从而可以实现灰阶的分段驱动。例如，如图4A所示，第1个数据分区为包括低灰阶的数据分区，例如，包括0～32灰阶，第2个数据分区为包括高灰阶的数据分区，例如，包括33～255灰阶，例如，在该示例中，灰阶分界点X＝32。当然，灰阶分界点的设置可视具体情况而定，本公开的实施例对此不作限制。
例如，流经发光元件的驱动电流、输出时长和显示数据对应的亮度满足如下公式：
B＝∫K*I*T             (2)
其中，B表示显示数据对应的亮度，I表示流经发光元件的驱动电流；T表示输出时长，K表示比例系数。
基于上述公式(1)可以看出，通过采用输出时长和驱动电流的积分实现最终的显示亮度，例如，对于同一显示亮度，输出时长小了，流经发光元件的驱动电流就高，输出时长大了，流经发光元件的驱动电流就低。
例如，对于步骤S120，例如，该像素驱动芯片中与各个数据分区分别对应的输出时长，可以是在制备像素驱动芯片的过程中预先设定的。例如，像素驱动芯片122根据输出时长的个数M，可在像素驱动芯片中设置可以将显示数据分为M个数据分区的灰阶分界点，从而可将其在用于驱动发光元件发光的过程中接收的显示数据，通过与设置的各个灰阶分界点比较以被分配到对应的数据分区，以得到该显示数据所在的数据分区对应的输出时长。
例如，在一些示例中，各个数据分区分别对应的输出时长是使得各个数据分区中的最大显示数据分别对应的驱动电流大致相同获得的。
图4A为本公开至少一实施例提供的一种驱动电流的示意图。图4B为图4A所示的显示面板在显示低灰阶时的电流驱动示意图，也就是说，图4B为将图4A所示的虚线的椭圆部分放大后的示意图。参见图4A和图4B，可见在显示面板显示低灰阶时，驱动电流得到了明显的放大，从而可以克服在电流控制方法中出现的电流梯度太小难以精确控制以及波长偏移等问题。
例如，如图4A所示，第1个数据分区(即包括低灰阶的数据分区，例如，包括0～32灰阶)的最大显示数据(例如，灰阶为32的显示数据)对应的驱动电流，和第2个数据分区(即包括高灰阶的数据分区，例如，包括33～255灰阶)的最大显示数据(例如，灰阶为255的显示数据)对应的驱动电流基本相同，例如，均在0.1mA左右。此时，基于上述公式(2)可以获得各个数据分区的输出时长。例如，将灰阶32对应的亮度和驱动电流0.1mA代入上述公式(2)可以获得第1个数据分区对应的输出时长T，将灰阶255对应的亮度和驱动电流0.1mA代入上述公式(2)可以获得第2个数据分区对应的输出时长T，例如，第1个数据分区对应的输出时长T＝t1＝t/1000，第2个数据分区对应的输出时长T＝t2＝t-t/1000＝999t/1000。
例如，对于步骤S130，例如，发光元件显示不同灰阶(即亮度)对应不同的驱动电流，这里的电流控制电路就是产生各个灰阶的驱动电流的电路。例如，包括显示数据(例如，灰阶)与驱动电流的对应关系的查找表预先存储在显示面板的存储器中，像素驱动芯片可以根据其接收的显示数据调用查找表，并在查找表中找到其对应的驱动电流。
例如，像素驱动芯片122可以获得至少一个数据分区的显示数据-电流的对应关系。例如，在显示面板中包括至少一个数据分区的显示数据-电流的对应关系的查找表。当像素驱动芯片122接收到属于该至少一个数据分区的显示数据时，可以在该查找表中查找到对应于其接收的显示数据的驱动电流。但是，对于没有在显示面板存储显示数据-电流的对应关系的数据分区中的显示数据，可以通过将其对应到已经在显示面板中存储显示数据-电流的对应关系的数据分区中的显示数据，从而获得其对应的驱动电流。
例如，如图3A所示，在该示例中，像素驱动芯片122还包括灰阶转换电路240。例如，灰阶转换电路240与数据输入电路210连接，且配置为当接收到属于除至少一个数据分区外的其余各个数据分区中的显示数据时，按照其余各个数据分区对应的输出时长与至少一个数据分区对应的输出时长之间的比例关系，将属于其余各个数据分区的显示数据转换为至少一个数据分区中的显示数据，以根据至少一个数据分区的显示数据-电流的对应关系获取属于其余各个数据分区的显示数据对应的驱动电流。
例如，如图3A所示，假设显示面板中存储有灰阶值高于灰阶分界点X的数据分区(例如，第2数据分区)中的显示数据-电流的对应关系，因此，数据输入电路210在接收到这些数据分区(例如，第2数据分区)中的显示数据时，可以直接将其发送至时间选择电路220，以根据该显示数据确定其对应的输出时长。然而，在数据输入电路210接收到没有在显示面板中存储显示数据-电流的对应关系的数据分区时(例如，灰阶值低于灰阶分 界点X的数据分区(例如，第1数据分区))时，可以先将其传输至灰阶转换电路240。灰阶转换电路240可以根据例如第2数据分区对应的输出时长和第1数据分区对应的数据时长的比例关系，即t2和t1的比例关系，将属于第1数据分区的显示数据转换成属于第2数据分区的显示数据，从而可以在显示面板中存储的第2数据分区中的显示数据-电流的对应关系中获取属于第1数据分区中的显示数据的驱动电流。
各个步骤的具体实现方式可参考本公开上述实施例提供的像素驱动芯片中的相关描述，在此不再赘述。
需要说明的是，本公开的多个实施例中，该驱动方法的流程可以包括更多或更少的操作，这些操作可以顺序执行或并行执行。上文描述的驱动方法可以执行一次，也可以按照预定条件执行多次。
关于上述实施例提供的驱动方法的技术效果可以参考本公开的实施例中提供的像素驱动芯片的技术效果，这里不再赘述。
有以下几点需要说明：
(1)本公开实施例附图只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)在不冲突的情况下，本公开的实施例及实施例中的特征可以相互组合以得到新的实施例。
以上所述仅是本公开的示范性实施方式，而非用于限制本公开的保护范围，本公开的保护范围由所附的权利要求确定。

Claims (15)

  1. 一种像素驱动芯片，包括：数据输入电路、时间选择电路和电流控制电路；其中，
    所述数据输入电路与所述时间选择电路连接，且配置为接收显示数据，并根据灰阶分界点对所述显示数据进行分区，以获取所述显示数据在基于显示数据范围得到的M个数据分区中所属的数据分区，其中，所述M个数据分区分别对应M个输出时长；
    所述时间选择电路与所述数据输入电路和所述电流控制电路连接，且配置为根据所述显示数据所属的数据分区确定所述显示数据对应的输出时长，并在所述输出时长内将所述显示数据输出至所述电流控制电路；
    所述电流控制电路与所述时间选择电路连接，且配置为根据所述显示数据确定流经所述显示数据对应的发光元件的驱动电流，并基于所述显示数据对应的输出时长输出所述驱动电流，
    其中，M为大于1的整数。
  2. 根据权利要求1所述的像素驱动芯片，其中，流经所述发光元件的驱动电流、所述输出时长和所述显示数据对应的亮度满足如下公式：
    B＝∫K*I*T，
    其中，B表示所述显示数据对应的亮度，I表示流经所述发光元件的驱动电流；T表示所述输出时长，K表示比例系数。
  3. 根据权利要求2所述的像素驱动芯片，其中，第m+1个数据分区的最小显示数据大于第m个数据分区的最大显示数据，所述第m+1个数据分区对应的第m+1个输出时长大于所述第m个数据分区对应的第m个输出时长，
    其中，m为大于等于1且小于M的整数。
  4. 根据权利要求3所述的像素驱动芯片，其中，各个所述数据分区分别对应的输出时长是使得各个所述数据分区中的最大显示数据分别对应的驱动电流相同获得的。
  5. 根据权利要求1-4任一所述的像素驱动芯片，其中，所述像素驱动芯片可以获得至少一个数据分区的显示数据-电流的对应关系，
    所述像素驱动芯片还包括灰阶转换电路，
    其中，所述灰阶转换电路与所述数据输入电路连接，且配置为当接收到属于除所述至少一个数据分区外的其余各个数据分区中的显示数据时，按照所述其余各个数据分区对应的输出时长与所述至少一个数据分区对应的输出时长之间的比例关系，将属于所述其余各个数据分区的显示数据转换为所述至少一个数据分区中的显示数据，以根据所述至少一个数据分区的显示数据-电流的对应关系获取属于所述其余各个数据分区的显示数据对应的驱动电流。
  6. 根据权利要求5所述的像素驱动芯片，还包括灰阶保持电路，
    其中，所述灰阶保持电路与所述灰阶转换电路和所述时间选择电路连接，且配置为将 属于所述其余各个数据分区的显示数据保持在转换后的所述显示数据，并在转换后的所述显示数据对应的输出时长到来时，将转换后的所述显示数据输出至所述时间选择。
  7. 根据权利要求1-6任一所述的像素驱动芯片，其中，所述时间选择子电路包括M个时间选择子电路，所述电流控制电路包括M个电流控制子电路，
    其中，所述M个时间选择子电路与所述M个数据分区一一对应，所述M个时间选择子电路与所述数据输入电路连接，且与所述M个电流控制子电路一一对应连接，且配置为选择与所述数据输入电路接收的所述显示数据所属的数据分区对应的时间选择子电路和电流控制子电路，以使得选择的所述时间选择子电路在所述显示数据对应的输出时长内输出所述显示数据至与其连接的所述电流控制子电路，所述电流控制子电路在所述显示数据对应的输出时长内输出所述驱动电流。
  8. 根据权利要求1-7任一所述的像素驱动芯片，还包括电压转换电路，
    其中，所述电压转换电路与电源、所述数据输入电路和所述电流控制电路连接，且配置为将所述电源提供的电源电压转换为所述数据输入电路和所述电流控制电路所需的电压。
  9. 根据权利要求8所述的像素驱动芯片，还包括时序控制电路，
    其中，所述时序控制电路与所述电源、所述时间选择电路和所述电流控制电路连接，且配置为提供控制所述显示数据对应的输出时长的时钟信号。
  10. 根据权利要求9所述的像素驱动芯片，其中，所述时间选择电路配置为响应于所述时钟信号，在所述输出时长内将所述显示数据输出至所述电流控制电路。
  11. 根据权利要求8所述的像素驱动芯片，还包括至少一个静电放电电路，
    其中，所述至少一个静电放电电路分别与所述电源、所述数据输入电路、所述电流控制电路和接地端中至少之一连接，且配置为释放所述电源、所述数据输入电路、所述电流控制电路和所述接地端中至少之一在接收信号或输出信号时产生的静电。
  12. 一种显示装置，包括如权利要求1-11任一所述的像素驱动芯片和发光元件，
    其中，所述像素驱动芯片与所述发光元件电连接，以输出流经所述发光元件的驱动电流。
  13. 根据权利要求12所述的显示装置，还包括：栅极驱动电路和数据驱动电路，其中，
    所述栅极驱动电路配置为向所述像素驱动芯片提供扫描信号；
    所述数据驱动电路配置为向所述像素驱动芯片提供所述显示数据。
  14. 根据权利要求12或13所述的显示装置，还包括显示面板和背光单元，
    其中，所述背光单元包括多个背光分区且由局域调光方式驱动，所述多个背光分区的至少一个包括所述像素驱动芯片和所述发光元件。
  15. 一种如权利要求1-11任一所述的像素驱动芯片的驱动方法，包括：
    通过所述数据输入电路接收所述显示数据，并根据所述灰阶分界点对所述显示数据进 行分区，以获取所述显示数据在基于所述显示数据范围得到的所述M个数据分区中所属的数据分区，其中，所述M个数据分区分别对应所述M个输出时长；
    通过所述时间选择电路根据所述显示数据所属的数据分区确定所述显示数据对应的输出时长，并在所述输出时长内将所述显示数据输出至所述电流控制电路；
    通过所述电流控制电路根据所述显示数据确定流经所述显示数据对应的发光元件的驱动电流，并基于所述显示数据对应的输出时长输出所述驱动电流。
PCT/CN2020/122316 2019-11-01 2020-10-21 像素驱动芯片及其驱动方法、显示装置 WO2021082994A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/418,585 US11322076B2 (en) 2019-11-01 2020-10-21 Pixel driving chip and driving method therefor, and display apparatus

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201911059962.3A CN112767872A (zh) 2019-11-01 2019-11-01 像素驱动芯片及其驱动方法、显示装置
CN201911059962.3 2019-11-01

Publications (1)

Publication Number Publication Date
WO2021082994A1 true WO2021082994A1 (zh) 2021-05-06

Family

ID=75692143

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/122316 WO2021082994A1 (zh) 2019-11-01 2020-10-21 像素驱动芯片及其驱动方法、显示装置

Country Status (3)

Country Link
US (1) US11322076B2 (zh)
CN (1) CN112767872A (zh)
WO (1) WO2021082994A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113053290B (zh) * 2021-03-10 2022-12-06 武汉华星光电半导体显示技术有限公司 显示面板及显示装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060290622A1 (en) * 2005-06-27 2006-12-28 Hirondo Nakatogawa Active matrix display device and method of driving active matrix display device
CN103390390A (zh) * 2012-05-10 2013-11-13 刘鸿达 用于显示器的显示控制方法
CN108172170A (zh) * 2017-11-30 2018-06-15 南京中电熊猫平板显示科技有限公司 一种触发驱动电路及有机发光显示装置
CN109859682A (zh) * 2019-03-28 2019-06-07 京东方科技集团股份有限公司 驱动电路及其驱动方法、显示装置
CN110010057A (zh) * 2019-04-25 2019-07-12 京东方科技集团股份有限公司 像素驱动电路、像素驱动方法和显示装置
CN110021265A (zh) * 2019-04-26 2019-07-16 上海天马微电子有限公司 一种像素电路及其驱动方法、显示装置及驱动方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100593910B1 (ko) * 2004-05-31 2006-06-30 삼성전기주식회사 카메라 플래쉬용 ｌｅｄ 구동 장치
JP2010281888A (ja) * 2009-06-02 2010-12-16 Seiko Epson Corp 集積回路装置、電気光学装置及び電子機器
US8775842B2 (en) * 2009-09-16 2014-07-08 Sharp Kabushiki Kaisha Memory device, display device equipped with memory device, drive method for memory device, and drive method for display device
KR20130128933A (ko) * 2012-05-18 2013-11-27 삼성전자주식회사 소스 드라이버
CN105448233B (zh) * 2014-08-26 2018-06-26 上海和辉光电有限公司 Oled像素的驱动方法及有机发光二极管显示装置
CN105989792B (zh) * 2015-01-27 2018-11-16 上海和辉光电有限公司 一种电流控制的显示面板的驱动方法及显示面板
US10497301B2 (en) * 2016-08-19 2019-12-03 Innolux Corporation Light-emitting device (LED) and LED displaying circuit
CN106652920A (zh) * 2016-12-23 2017-05-10 青岛海信电器股份有限公司 背光控制信号生成电路、方法及液晶显示设备
TWI622976B (zh) * 2017-03-15 2018-05-01 明陽半導體股份有限公司 灰階產生電路與使用其之驅動電路
KR20200057706A (ko) * 2017-09-29 2020-05-26 소니 주식회사 표시장치
CN113077760B (zh) * 2017-12-11 2022-11-01 成都晶砂科技有限公司 一种像素驱动电路的驱动方法
CN110021264B (zh) * 2018-09-07 2022-08-19 京东方科技集团股份有限公司 像素电路及其驱动方法、显示面板
CN110880293B (zh) * 2019-12-09 2021-04-06 合肥视涯技术有限公司 像素补偿电路、显示面板和像素补偿方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060290622A1 (en) * 2005-06-27 2006-12-28 Hirondo Nakatogawa Active matrix display device and method of driving active matrix display device
CN103390390A (zh) * 2012-05-10 2013-11-13 刘鸿达 用于显示器的显示控制方法
CN108172170A (zh) * 2017-11-30 2018-06-15 南京中电熊猫平板显示科技有限公司 一种触发驱动电路及有机发光显示装置
CN109859682A (zh) * 2019-03-28 2019-06-07 京东方科技集团股份有限公司 驱动电路及其驱动方法、显示装置
CN110010057A (zh) * 2019-04-25 2019-07-12 京东方科技集团股份有限公司 像素驱动电路、像素驱动方法和显示装置
CN110021265A (zh) * 2019-04-26 2019-07-16 上海天马微电子有限公司 一种像素电路及其驱动方法、显示装置及驱动方法

Also Published As

Publication number Publication date
US11322076B2 (en) 2022-05-03
US20220084460A1 (en) 2022-03-17
CN112767872A (zh) 2021-05-07

Similar Documents

Publication Publication Date Title
US11270654B2 (en) Pixel circuit, display panel, and method for driving pixel circuit
US20210201760A1 (en) Pixel circuit and driving method thereof, display panel and driving method thereof, and display device
WO2020078326A1 (zh) 阵列基板、驱动方法、有机发光显示面板及显示装置
US20210027699A1 (en) Display Panel and Display Device
KR102153849B1 (ko) 스마트 픽셀 조명 및 디스플레이 마이크로컨트롤러
WO2021082793A1 (zh) 显示面板及其驱动方法、显示装置
WO2017053477A1 (en) Hybrid micro-driver architectures having time multiplexing for driving displays
CN111599308B (zh) 显示装置及其控制方法、电子设备
US11049455B2 (en) Display device, electronic device, and toggling circuit
US11450270B2 (en) Pixel circuit and method of driving the same, display device
CN110010072A (zh) 像素电路及其驱动方法、显示装置
US11315459B2 (en) Gate driver and display panel having the same
US20200184904A1 (en) Micro-display device and method of driving same
CN113096607A (zh) 像素扫描驱动电路、阵列基板与显示终端
US11783777B2 (en) Pixel circuit and driving method thereof, display substrate and driving method thereof, and display apparatus
US20180226027A1 (en) Pixel driving circuit and driving method thereof and display device
CN114512099B (zh) 显示装置
WO2021082994A1 (zh) 像素驱动芯片及其驱动方法、显示装置
WO2021082756A1 (zh) 电子基板及其驱动方法、显示装置
US11302245B2 (en) Pixel circuit, driving method thereof, and display device
KR20200050204A (ko) 발광표시장치
CN114512098A (zh) 显示装置
CN116741086B (zh) 扫描驱动电路、显示面板、电子设备及驱动方法
US11900883B2 (en) Shift register unit, method for driving shift register unit, gate driving circuit, and display device
CN216623724U (zh) 像素电路和显示面板

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20880615

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20880615

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 20880615

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 07.02.2023)

122 Ep: pct application non-entry in european phase

Ref document number: 20880615

Country of ref document: EP

Kind code of ref document: A1