WO2021033228A1 - Method for manufacturing 3-dimensional stacked electronic device by 3-dimensional additive manufacturing - Google Patents

Method for manufacturing 3-dimensional stacked electronic device by 3-dimensional additive manufacturing Download PDF

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Publication number
WO2021033228A1
WO2021033228A1 PCT/JP2019/032220 JP2019032220W WO2021033228A1 WO 2021033228 A1 WO2021033228 A1 WO 2021033228A1 JP 2019032220 W JP2019032220 W JP 2019032220W WO 2021033228 A1 WO2021033228 A1 WO 2021033228A1
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WO
WIPO (PCT)
Prior art keywords
laminated
unit
laminated unit
probe pin
dimensional
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Application number
PCT/JP2019/032220
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French (fr)
Japanese (ja)
Inventor
亮二郎 富永
Original Assignee
株式会社Fuji
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Publication date
Application filed by 株式会社Fuji filed Critical 株式会社Fuji
Priority to PCT/JP2019/032220 priority Critical patent/WO2021033228A1/en
Priority to JP2021541351A priority patent/JP7284275B2/en
Publication of WO2021033228A1 publication Critical patent/WO2021033228A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

Definitions

  • the present disclosure relates to a method for manufacturing a three-dimensional laminated electronic device using three-dimensional laminated modeling.
  • Patent Document 1 discloses a technique for forming a laminated unit including electronic components and circuit wiring by three-dimensional laminated modeling.
  • the laminated unit forming apparatus described in Patent Document 1 forms a laminated unit in which electronic components, circuit wiring, and connection terminals are formed in an insulating layer.
  • the laminated unit forming apparatus manufactures a three-dimensional laminated electronic device by stacking a plurality of laminated units and fixing the units to each other.
  • the laminated unit forming apparatus inserts a probe pin into a cavity formed in an arbitrary laminated unit, and mounts another laminated unit on the laminated unit in which the probe pin is inserted into the cavity. doing.
  • the probe pins electrically connect the electronic circuits of the two laminated units by bringing the upper ends and the lower ends into contact with the connection terminals of different laminated units.
  • the probe pins are used to conduct conduction between two laminated units stacked one above the other.
  • the intermediate laminated unit is connected to the connection terminal and wiring, that is, the lower laminated unit. It was necessary to form a relay electronic circuit for connecting to the above laminated unit.
  • the present disclosure has been made in view of the above points, and manufactures a three-dimensional laminated electronic device by three-dimensional laminated molding that can reduce the number of connection terminals and wirings of the intermediate laminated unit and reduce the manufacturing cost.
  • the challenge is to provide a method.
  • the present specification describes a first laminated unit forming step of forming a first laminated unit in which a first connection terminal is formed, a second laminated unit forming step of forming a second laminated unit in which a through hole is formed, and the above.
  • a probe pin is inserted into the through hole to connect the lower portion of the probe pin to the first connection terminal, or the lower portion of the probe pin is described.
  • the first mounting step of mounting the second laminated unit on the first laminated unit while inserting the probe pin into the through hole, and the second connection terminal are formed.
  • Discloses a method for manufacturing a three-dimensional laminated electronic device by three-dimensional laminated modeling including.
  • a second laminated unit and a third laminated unit are mounted on the first laminated unit to manufacture a three-dimensional laminated electronic device.
  • a through hole is formed in the second laminated unit sandwiched between the first laminated unit and the third laminated unit, and a probe pin is inserted into the through hole. Then, the probe pin inserted into the through hole connects the first connection terminal of the first laminated unit and the second connection terminal of the third laminated unit.
  • FIG. 1 shows the laminated unit forming device 10.
  • the stacking unit forming device 10 includes a transport device 20, a first modeling unit 22, a second modeling unit 24, a mounting unit 26, a third modeling unit 200, and a control device 27 (see FIGS. 2 and 3). Be prepared.
  • the transport device 20, the first modeling unit 22, the second modeling unit 24, the mounting unit 26, and the third modeling unit 200 are arranged on the base 28 of the laminated unit forming device 10.
  • the base 28 is generally rectangular in plan view.
  • the longitudinal direction of the base 28 will be referred to as the X-axis direction
  • the lateral direction of the base 28 will be referred to as the Y-axis direction
  • the direction orthogonal to both the X-axis direction and the Y-axis direction will be referred to as the Z-axis direction.
  • the transport device 20 includes an X-axis slide mechanism 30 and a Y-axis slide mechanism 32.
  • the X-axis slide mechanism 30 has an X-axis slide rail 34 and an X-axis slider 36.
  • the X-axis slide rail 34 is arranged on the base 28 so as to extend in the X-axis direction.
  • the X-axis slider 36 is slidably held in the X-axis direction by the X-axis slide rail 34.
  • the X-axis slide mechanism 30 has an electromagnetic motor 38 (see FIG. 2), and the X-axis slider 36 is moved to an arbitrary position in the X-axis direction by driving the electromagnetic motor 38.
  • the Y-axis slide mechanism 32 has a Y-axis slide rail 50 and a stage 52.
  • the Y-axis slide rail 50 is arranged on the base 28 so as to extend in the Y-axis direction.
  • One end of the Y-axis slide rail 50 is connected to the X-axis slider 36. Therefore, the Y-axis slide rail 50 is movable in the X-axis direction.
  • the stage 52 is slidably held in the Y-axis direction by the Y-axis slide rail 50.
  • the Y-axis slide mechanism 32 has an electromagnetic motor 56 (see FIG. 2), and the stage 52 is moved to an arbitrary position in the Y-axis direction by driving the electromagnetic motor 56. As a result, the stage 52 moves to an arbitrary position on the base 28 by driving the X-axis slide mechanism 30 and the Y-axis slide mechanism 32.
  • the stage 52 has a base 60, a holding device 62, and an elevating device 64.
  • the base 60 is formed in a flat plate shape, and the base material 70 is placed on the upper surface.
  • the holding devices 62 are provided on both sides of the base 60 in the X-axis direction.
  • the holding device 62 holds the base material 70 fixedly to the base 60 by sandwiching both edges of the base material 70 placed on the base 60 in the X-axis direction.
  • the elevating device 64 is arranged below the base 60, and raises and lowers the base 60 in the Z-axis direction.
  • the first modeling unit 22 is a unit for modeling circuit wiring on a base material 70 placed on a base 60 of a stage 52, and has a first printing unit 72 and a firing unit 74.
  • the first printing unit 72 has an inkjet head 76 (see FIG. 2), and linearly ejects conductive ink onto the base material 70 placed on the base 60.
  • the conductive ink contains, for example, nanometer-sized metal (silver or the like) fine particles dispersed in a solvent as a main component, and is cured by being fired by heat.
  • the surface of the metal nanoparticles is, for example, coated with a dispersant to suppress agglutination in the solvent.
  • the inkjet head 76 ejects conductive ink from a plurality of nozzles by, for example, a piezo method using a piezoelectric element.
  • the device for ejecting the conductive ink is not limited to the inkjet head provided with a plurality of nozzles, and for example, a dispenser provided with one nozzle may be used.
  • the type of metal nanoparticles contained in the conductive ink is not limited to silver, and may be copper, gold, or the like.
  • the number of types of metal nanoparticles contained in the conductive ink is not limited to one, and may be a plurality of types.
  • the firing unit 74 has an irradiation device 78 (see FIG. 2).
  • the irradiation device 78 includes, for example, an infrared heater that heats the conductive ink ejected onto the base material 70.
  • the conductive ink is fired by applying heat from an infrared heater to form a circuit wiring.
  • the solvent is vaporized and the protective film of the metal nanoparticles, that is, the dispersant is decomposed, and the metal nanoparticles are contacted or fused. This is a phenomenon in which the conductivity is increased.
  • the circuit wiring can be formed by firing the conductive ink.
  • the device for heating the conductive ink is not limited to the infrared heater.
  • an infrared lamp, a laser irradiation device that irradiates the conductive ink with laser light, or a base material 70 to which the conductive ink is discharged is placed in the furnace. It may be provided with an electric furnace for heating.
  • the second modeling unit 24 is a unit for forming an insulating layer on the base material 70 placed on the base 60, and has a second printing unit 84 and a curing unit 86.
  • the second printing unit 84 has an inkjet head 88 (see FIG. 2), and discharges an ultraviolet curable resin onto a base material 70 placed on a base 60.
  • the ultraviolet curable resin is a resin that is cured by irradiation with ultraviolet rays.
  • the method in which the inkjet head 88 discharges the ultraviolet curable resin may be, for example, a piezo method using a piezoelectric element, or a thermal method in which the resin is heated to generate bubbles and discharged from a plurality of nozzles.
  • the hardened portion 86 has a flattening device 90 (see FIG. 2) and an irradiation device 92 (see FIG. 2).
  • the flattening device 90 flattens the upper surface of the ultraviolet curable resin discharged onto the base material 70 by the inkjet head 88.
  • the flattening device 90 makes the thickness of the ultraviolet curable resin uniform by, for example, scraping off the excess resin with a roller or a blade while leveling the surface of the ultraviolet curable resin.
  • the irradiation device 92 includes a mercury lamp or an LED as a light source, and irradiates the ultraviolet curable resin discharged on the base material 70 with ultraviolet rays. As a result, the ultraviolet curable resin discharged onto the base material 70 is cured, and an insulating layer can be formed.
  • the mounting unit 26 is a unit for arranging electronic components and probe pins on the base material 70 mounted on the base 60, and has a supply unit 100 and a mounting unit 102.
  • the supply unit 100 has a plurality of tape feeders 110 (see FIG. 2) for feeding the taped electronic components one by one, and supplies the electronic components at each supply position.
  • the supply unit 100 has a tray 201 (see FIG. 2) in which a plurality of types of probe pins are arranged in an upright state, and supplies the probe pins in a state in which the probe pins can be picked up from the tray 201.
  • the electronic component is, for example, a sensor element such as a temperature sensor.
  • the probe pin is a member that electrically connects the electronic circuit of one laminated unit and the electronic circuit of another laminated unit.
  • the laminated unit referred to here is a unit formed by the laminated unit forming device 10 as described later, and is a unit in which a three-dimensional laminated electronic device having an electronic circuit is divided into a plurality of layers.
  • FIG. 4 is a schematic diagram showing the structure of the probe pin.
  • the probe pin 99 has a main body 99A and a pin 99B.
  • the probe pin 99 is made of, for example, a metal such as copper or gold.
  • the main body 99A has a hollow cylindrical shape and is formed with a through hole into which the pin 99B is inserted.
  • the pin 99B has a thin rod shape, and each end in the axial direction is electrically connected to a pin terminal provided on the stacking unit.
  • the pin 99B has a flange portion 99C formed in a portion inserted into the main body portion 99A. Further, inside the main body 99A, a spring 99D is provided between the flange 99C and the inner wall of the main body 99A.
  • the pin 99B is configured to be expandable and contractible in the axial direction (vertical direction in FIG. 4).
  • the spring 99D is sandwiched between the inner walls of the flange portion 99C and the main body portion 99A and elastically deforms in the axial direction according to the magnitude of the external force.
  • the probe pin 99 can be stroked in the axial direction by applying an external force, and contracts by a stroke amount SA according to the magnitude of the external force.
  • the stroke amount SA is, for example, several tens of ⁇ m to several hundreds of ⁇ m.
  • the configuration of the probe pin 99 shown in FIG. 4 is an example.
  • the probe pin 99 may be configured so as not to be displaced in the axial direction (cannot be stroked).
  • the supply of electronic components is not limited to the supply by the tape feeder 110, and may be supplied by the tray.
  • the probe pin is supplied not only by the tray 201 but also by a tape feeder. Further, the electronic components and the probe pins may be supplied by both the tape feeder and the tray, or other supply.
  • the supply unit 100 of the present embodiment can supply probe pins 99 having different axial lengths L as shown in FIG.
  • the stacking unit forming apparatus 10 of the present embodiment when two stacking units sandwiching at least one stacking unit are connected by probe pins 99, the thickness of the intermediate stacking unit sandwiched between the two stacking units is increased. A corresponding long probe pin 99 is used. Details of probe pins 99 having different lengths will be described later.
  • the mounting portion 102 has a mounting head 112 and a moving device 114.
  • the mounting head 112 has a suction nozzle for sucking and holding an electronic component or a probe pin.
  • the suction nozzle sucks and holds electronic components and the like by suctioning air by supplying negative pressure from a positive / negative pressure supply device (not shown). Then, when a slight positive pressure is supplied from the positive / negative pressure supply device, the electronic component or the like is separated.
  • the moving device 114 moves the mounting head 112 between the supply position of the tape feeder 110 or the tray 201 and the base material 70 mounted on the base 60.
  • the mounting portion 102 holds the electronic parts and the like by the suction nozzle, and arranges the electronic parts and the like held by the suction nozzle on the base material 70.
  • the third modeling unit 200 is a unit for applying the conductive paste on the base material 70 placed on the base 60.
  • the conductive paste is, for example, a viscous fluid containing micro-sized metal particles (such as microfillers) in a resin adhesive.
  • Micro-sized metal microparticles are, for example, flake-state metals (such as silver).
  • the metal microparticles are not limited to silver, but may be gold, copper, or a plurality of types of metals.
  • the adhesive contains, for example, an epoxy resin as a main component.
  • the conductive paste is cured by heating and is used, for example, to form connection terminals connected to circuit wiring.
  • connection terminals are connection terminals (bumps) connected to component terminals of electronic components, electrode pads (exposed pads, etc.) connected to external devices, pin terminals provided at contact points of probe pins 99, as described later. It is a through hole or the like that conducts circuit wiring in the stacking direction.
  • the third modeling unit 200 has a dispenser 202 as a device for discharging (applying) the conductive paste.
  • the dispenser 202 discharges the conductive paste into the through hole of the insulating layer, the surface of the insulating layer, and the like.
  • the conductive paste filled in the through holes is heated and cured by the firing portion 74 of the first modeling unit 22, for example, to form connection terminals and through holes.
  • the conductive paste applied to the surface of the insulating layer is heated and cured by, for example, the firing unit 74 to form a connection terminal or the like.
  • the adhesive resin or the like
  • the flake-shaped metals are cured in contact with each other.
  • the device for applying the conductive paste is not limited to the dispenser, but may be a screen printing device or a gravure printing device. Further, the method of curing the conductive paste is not limited to the method of heating, and a method of curing by ultraviolet rays using an ultraviolet curable resin as an adhesive may be used.
  • the conductive ink becomes an integrated metal by fusing the metal nanoparticles to each other by heating, and the conductivity is higher than that in the state where the metal nanoparticles are only in contact with each other.
  • the conductive paste is cured by bringing micro-sized metal microparticles into contact with each other, for example, by curing the adhesive. Therefore, the resistance (electric resistivity) of the wiring formed by curing the conductive ink is smaller than the resistance of the wiring formed by curing the conductive paste. Therefore, the laminated unit forming apparatus 10 of the present embodiment uses conductive ink for modeling a modeled object that requires a low resistance value, such as a circuit wiring having a low resistance.
  • the conductive paste can improve the adhesiveness with other members by curing the adhesive at the time of curing, and is superior in adhesion to other members as compared with the conductive ink.
  • the other member referred to here is a member to which the conductive paste is discharged and adhered, and is, for example, an insulating layer, a circuit wiring, a component terminal of an electronic component, and the like. Therefore, the laminated unit forming apparatus 10 of the present embodiment uses the conductive paste for modeling a modeled object that requires mechanical strength (tensile strength, etc.), such as a pin terminal provided at a contact point of the probe pin 99.
  • the conductive paste may be used for forming the circuit wiring
  • the conductive ink may be used for forming the connection terminal
  • a material other than the above-mentioned conductive ink and the conductive paste may be used. It may be used for forming circuit wiring and connection terminals.
  • the control device 27 includes a controller 120, a plurality of drive circuits 122, and a storage device 124.
  • the plurality of drive circuits 122 include the electromagnetic motors 38 and 56, a holding device 62, an elevating device 64, an inkjet head 76, an irradiation device 78, an inkjet head 88, a flattening device 90, and an irradiation device 92. It is connected to the tape feeder 110, the mounting head 112, and the moving device 114. Further, the drive circuit 122 is connected to the third modeling unit 200 as shown in FIG.
  • the controller 120 includes a CPU, a ROM, a RAM, and the like, and is mainly a computer, and is connected to a plurality of drive circuits 122.
  • the storage device 124 includes a RAM, a ROM, a hard disk, and the like, and stores a control program 126 that controls the stacking unit forming device 10.
  • the controller 120 can control the operations of the transfer device 20, the first modeling unit 22, the second modeling unit 24, the mounting unit 26, the third modeling unit 200, and the like by executing the control program 126 on the CPU. ..
  • the fact that the controller 120 executes the control program 126 to control each device may be simply described as "device”.
  • the controller 120 moves the stage 52 means that "the controller 120 executes the control program 126, controls the operation of the transfer device 20 via the drive circuit 122, and causes the stage by the operation of the transfer device 20.” It means "move 52".
  • the laminated unit forming apparatus 10 of the present embodiment has a plurality of laminated units including circuit wiring, connection terminals, electronic components, probe pins, etc., according to the above configuration.
  • a three-dimensional laminated electronic device is manufactured by assembling the laminated unit of. More specifically, FIG. 5 is a flowchart showing a flow of a manufacturing process of a three-dimensional laminated electronic device. 6 to 10 are cross-sectional views showing a manufacturing process of a three-dimensional laminated electronic device.
  • FIG. 11 is a cross-sectional view of the three-dimensional laminated electronic device 246. The manufacturing process and the three-dimensional laminated electronic device 246 (number and structure of laminated units) shown in FIGS.
  • 6 to 11 are examples.
  • a three-dimensional laminated electronic device 246 in which three laminated units 218 of the first laminated unit 218A, the second laminated unit 218B, and the third laminated unit 218C are stacked is manufactured. The case will be described.
  • the manufacturing process 130 of the three-dimensional laminated electronic device 246 by the three-dimensional laminated modeling includes a unit forming step P10 and a unit mounting step P12.
  • the unit forming step P10 the first to third laminated units 218A, 218B, and 218C are formed on the base material 70 by the laminated unit forming apparatus 10 described above.
  • the unit mounting step P12 the three-dimensional laminated electronic device 246 (see FIG. 11) is manufactured by stacking and fixing the first to third laminated units 218A, 218B, and 218C in the vertical direction.
  • laminated units 218 when the first to third laminated units 218A to 218C are generically referred to without distinction, they are referred to as laminated units 218.
  • the controller 120 executes the control program 126 to control each device of the laminated unit forming device 10 to execute the unit forming step P10.
  • the unit forming step P10 includes an insulating layer forming process S10, a circuit wiring forming process S20, a connection terminal forming process S30, and a mounting process S40.
  • the execution order of each of the above processes S10, S20, S30, and S40 is determined by the laminated structure of the three-dimensional laminated electronic devices 246 (that is, the first to third laminated units 218A to 218C). Therefore, the above processes S10, S20, S30, and S40 are not repeated in their notation order.
  • the user sets the base material 70 on the base 60 of the stage 52, and instructs the laminated unit forming apparatus 10 to start the manufacturing process 130 shown in FIG. Further, as shown in FIG. 6, for example, a release film 71 that is peeled off by applying heat is attached on the base material 70.
  • the controller 120 forms each laminating unit 218 on the release film 71. As will be described later, each laminating unit 218 can be peeled from the base material 70 by heating the release film 71 after molding.
  • the lamination unit forming apparatus 10 may automatically execute the setting of the base material 70 on the stage 52 and the attachment of the release film 71 to the base material 70.
  • the lamination unit forming apparatus 10 may include a robot arm for setting the base material 70 and attaching the release film 71. Further, the setting of the base material 70 and the attachment of the release film 71 may be performed manually by a person.
  • the controller 120 moves the stage 52 on which the base material 70 is set below the second modeling unit 24.
  • the insulating layer forming process S10 includes a discharge process S11, a flattening process S13, and a hardening process S15.
  • the controller 120 controls the second modeling unit 24 in the discharge process S11, and discharges the ultraviolet curable resin from the inkjet head 88 onto the base material 70 in the form of a thin film.
  • the controller 120 controls the flattening device 90 of the curing portion 86 in the flattening process S13, and flattens the ultraviolet curable resin discharged onto the base material 70 so that the film thickness becomes uniform by a roller or the like.
  • the controller 120 controls the irradiation device 92 of the curing portion 86 in the curing process S15, and irradiates the flattened ultraviolet curable resin with ultraviolet rays. As a result, the ultraviolet curable resin is cured.
  • the controller 120 repeats the ultraviolet curable resin discharge treatment S11, the flattening treatment S13, and the curing treatment S15 to form the insulating layer 220 on the base material 70 (see FIG. 6).
  • the controller 120 forms a housing portion 222 for accommodating the electronic component 96 (see FIG. 7) and a pin insertion hole 223 for inserting the probe pin 99 (see FIG. 7).
  • the accommodating portion 222 is, for example, a recess in which the insulating layer 220 is recessed downward.
  • the pin insertion hole 223 is, for example, a cylindrical hole formed along the vertical direction.
  • the controller 120 stops discharging the ultraviolet curable resin from the inkjet head 88 in accordance with the positions of the accommodating portion 222 and the pin insertion hole 223, and forms recesses and holes in the insulating layer 220 to form the accommodating portion. It forms 222 and a pin insertion hole 223.
  • the stacking unit forming apparatus 10 of the present embodiment can use a plurality of types of probe pins 99 having different axial lengths L (see FIG. 4).
  • FIG. 11 a case where two types of probe pins 211 and 122 having different axial lengths L are used will be described.
  • probe pins 99 when the two types of probe pins 211 and 212 are generically referred to, they are referred to as probe pins 99.
  • the probe pin 211 is, for example, an electronic circuit of one laminated unit 218, one above (directly above) the laminated unit 218, and one below (directly below) the electronic circuit of the laminated unit 218. It connects with. Further, the probe pin 212 connects the electronic circuits of the two laminated units 218 with at least one or more laminated units 218 sandwiched between them.
  • the probe pin 212 of the present embodiment electrically connects the electronic circuit of the first laminated unit 218A in the lowermost layer and the electronic circuit of the third laminated unit 218C in the uppermost layer. Further, a through hole for inserting the probe pin 212 is formed in the second laminated unit 218B in the middle. This through hole forms a part of the pin insertion hole 223.
  • this through hole will be referred to as a through hole 223A.
  • the controller 120 stops ejecting the ultraviolet curable resin from the inkjet head 88 in accordance with the position of the through hole 223A, and the through hole 223A where the release film 71 is exposed is formed in the insulating layer 220.
  • the probe pin 99 extends in a direction parallel to the straight line LN along the vertical direction (stacking direction).
  • the pin insertion hole 223 into which the probe pin 99 is inserted is formed along a direction parallel to the straight line LN.
  • This straight line LN is, for example, a straight line LN along a line connecting the pin terminal 227B connected by one probe pin 99 and the electrode pad 227C at the shortest distance.
  • the controller 120 moves the stage 52 below the first modeling unit 22.
  • the controller 120 controls the first modeling unit 22, ejects conductive ink from the inkjet head 76 to the upper surface of the insulating layer 220, and heats the ejected conductive ink with the irradiation device 78, thereby causing circuit wiring 225 ( (See FIG. 6).
  • the controller 120 executes the connection terminal forming process S30, the controller 120 moves the stage 52 below the third modeling unit 200.
  • the controller 120 controls the third modeling unit 200 to apply the conductive paste from the dispenser 202 on the release film 71, the upper surface of the insulating layer 220, the circuit wiring 225, the bottom of the accommodating portion 222, and the pin insertion hole 223. Discharge to the bottom of the The controller 120 forms the connection terminal 227 (see FIG. 6) by heating the discharged conductive paste with the irradiation device 78 of the first modeling unit 22.
  • the controller 120 forms a component connection terminal 227A, a pin terminal 227B, and an electrode pad 227C as a connection terminal 227.
  • the component connection terminal 227A is, for example, a connection terminal 227 connected to the component terminal 96A (see FIG. 7) of the electronic component 96.
  • the pin terminal 227B is, for example, a connection terminal 227 connected to the lower end of the probe pin 99 (the lower end of the pin 99B shown in FIG. 4).
  • the electrode pad 227C is, for example, a connection terminal 227 for connecting the electronic circuit of each laminated unit 218 to the upper end of the probe pin 99 and for connecting the three-dimensional laminated electronic device 246 to an external device.
  • the controller 120 When the controller 120 is formed so that the electrode pad 227C connected to the probe pin 99 is exposed from the lower surface of the insulating layer 220, for example, the insulating layer 220 having a through hole is formed first, and the insulating layer 220 is penetrated. A conductive paste is discharged (filled) into the holes to form an electrode pad 227C exposed from the lower surface.
  • the controller 120 may first form the electrode pad 227C on the base material 70, and then fill the periphery of the formed electrode pad 227C with the insulating layer 220. Each connection terminal 227 is electrically connected by a circuit wiring 225 to form an electronic circuit.
  • the controller 120 has the shape, position, number, etc. of the insulating layer 220 formed by the insulating layer forming process S10, the circuit wiring 225 formed by the circuit wiring forming process S20, and the connecting terminals 227 formed by the connecting terminal forming process S30.
  • the first to third laminated units 218A to 218C are collectively modeled on the base material 70 (release film 71) by appropriately changing the above.
  • the controller 120 does not have to form the first to third laminated units 218A to 218C together on the base material 70. Further, the controller 120 may form four or more laminated units 218 together on the base material 70.
  • the controller 120 appropriately executes the mounting process S40 in the process of modeling the laminated unit 218. As shown in FIG. 7, the controller 120 controls the mounting unit 26 to arrange the electronic component 96 in the accommodating portion 222. Further, the controller 120 controls the mounting unit 26 to arrange the probe pin 211 in the pin insertion hole 223. In the present embodiment, as will be described later, the probe pin 212 which is long in the axial direction is inserted after laminating the second laminating unit 218B on the first laminating unit 218A of the lowermost layer (see FIG. 9). Therefore, in the stage before stacking shown in FIG. 7, the controller 120 does not arrange the probe pin 212.
  • control program 126 for example, three-dimensional data of each layer obtained by slicing the three-dimensional laminated electronic device 246 (each laminated unit 218) is set. Based on the data of the control program 126, the controller 120 executes each manufacturing process such as the circuit wiring forming process S20 to form the stacking unit 218. Further, the controller 120 detects information such as a layer and a position where the electronic component 96 and the probe pin 99 (only the probe pin 211 at the stage of FIG. 7) are arranged based on the data of the control program 126, and uses the detected information as the detected information. Based on this, the electronic component 96 and the probe pin 99 are arranged in each stacking unit 218.
  • the controller 120 controls the third modeling unit 200 to discharge the conductive paste, and then controls the mounting unit 26 so that the component terminals 96A of the electronic component 96 come into contact with the conductive paste. Is arranged in the accommodating portion 222. After arranging the electronic component 96, the controller 120 connects the component connection terminal 227A and the component terminal 96A by curing the conductive paste, and fixes the electronic component 96 to the insulating layer 220. After arranging the electronic component 96, the controller 120 may discharge the conductive paste onto the component terminal 96A of the electronic component 96 and cure the component connection terminal 227A.
  • the controller 120 controls, for example, the third modeling unit 200 to discharge the conductive paste to the bottom of the pin insertion hole 223.
  • the controller 120 forms the pin terminal 227B at the bottom of the pin insertion hole 223 by curing the conductive paste with the irradiation device 78 of the first modeling unit 22.
  • the controller 120 controls the mounting unit 26 and arranges the probe pin 211 in the pin insertion hole 223 so that the lower end of the probe pin 211 comes into contact with the hardened pin terminal 227B. In this way, each laminated unit 218 having a desired structure is modeled by three-dimensional laminated modeling.
  • the controller 120 assembles the above-mentioned laminated unit 218 in the unit mounting process P12.
  • the controller 120 heats the release film 71 on the base material 70 to separate the release film 71 (base material 70) from each laminating unit 218.
  • the lamination unit forming apparatus 10 includes, for example, an electric furnace (not shown), puts the base material 70 in the electric furnace, heats the release film 71, and separates each laminate unit 218 from the base material 70 (release film 71). To do.
  • the method of heating the release film 71 is not limited to the method of using an electric furnace.
  • the laminated unit forming apparatus 10 may peel off the release film 71 by applying heat from the heater to the base material 70 to heat the base material 70.
  • the method for separating the base material 70 and the laminating unit 218 is not limited to the method using the release film 71.
  • a member (support material or the like) that melts by heat may be arranged between the base material 70 and the laminating unit 218, and the member may be melted and separated.
  • the base material 70 and the laminating unit 218 may be separated automatically by the laminating unit forming device 10 (with a robot arm or the like), or may be manually performed by a person.
  • the laminated unit 218 may be directly formed on the base material 70 without sticking the release film 71 on the base material 70.
  • the intermediate second laminated unit 218B is mounted on the first laminated unit 218A in the lowermost layer, and the second laminated unit 218B is mounted on the first laminated unit 218A. Fix it. Further, the third laminated unit 218C of the uppermost layer is mounted on the second laminated unit 218B, and the third laminated unit 218C is fixed to the second laminated unit 218B.
  • the method of fixing the plurality of laminated units 218 to each other is not particularly limited, but a method using screws, bolts, nuts, etc., or a method using an adhesive can be adopted.
  • the work of assembling the plurality of laminated units 218 may be automatically executed by the laminated unit forming apparatus 10.
  • the stacking unit forming device 10 may include a robot arm for assembling a plurality of stacking units 218 and fixing them to each other.
  • the stacking unit forming device 10 retracts the first to third laminated units 218A to 218C peeled from the peeling film 71 using a robot arm to a workbench.
  • the stacking unit forming device 10 peels the release film 71 from the base material 70 by a robot arm, and places the first stacking unit 218A on the base material 70. Then, as shown in FIG. 8, the stacking unit forming device 10 mounts the second stacking unit 218B on the first stacking unit 218A, and fixes the two stacking units 218 with screws or the like. Alternatively, the work of assembling the plurality of laminated units 218 may be performed manually by a person. The same applies to the subsequent assembly operations of FIGS. 9 and 10. In the following description, a case where the stacking unit forming device 10 is automatically executed will be described.
  • the controller 120 aligns the pin insertion hole 223 of the first stacking unit 218A with the through hole 223A of the second stacking unit 218B on the first stacking unit 218A.
  • the second laminated unit 218B is mounted.
  • the pin insertion holes 223 of the two stacking units 218 form holes extending in the vertical direction (stacking direction).
  • the controller 120 controls the mounting unit 26 and inserts the probe pin 212 through the opening at the upper end of the through hole 223A of the second stacking unit 218B.
  • the controller 120 may insert the probe pin 212 before fixing the second stacking unit 218B to the first stacking unit 218A. For example, the controller 120 inserts the probe pin 212 into the pin insertion hole 223 after mounting the second stacking unit 218B on the first stacking unit 218A and before performing the work of fixing with screws. The controller 120 may fix the two stacking units 218 to each other after inserting the probe pin 212.
  • the controller 120 inserts the probe pin 212 into the pin insertion hole 223 so that the lower end of the probe pin 212 inserted into the through hole 223A comes into contact with the pin terminal 227B formed at the bottom of the pin insertion hole 223 of the first stacking unit 218A. Place inside.
  • the assembly order described above is an example.
  • the controller 120 may mount the second stacking unit 218B on the first stacking unit 218A having the probe pin 212 after the probe pin 212 is first arranged on the first stacking unit 218A. good. In this case, the controller 120 may fix the probe pin 212 to the first stacking unit 218A.
  • the controller 120 may bring the lower end of the probe pin 212 into contact with the pin terminal 227B (conductive paste) before curing, and fix the probe pin 212 to the first stacking unit 218A by curing the pin terminal 227B. ..
  • the controller 120 inserts the probe pin 212 into the pin insertion hole 223, fills the pin insertion hole 223 with an ultraviolet curable resin, and embeds and fixes the lower portion of the probe pin 212 in the first lamination unit 218A. Is also good.
  • the manufacturing process 130 of the present embodiment after mounting the second stacking unit 218B on the first stacking unit 218A in the steps shown in FIGS. 8 and 9 (an example of the first mounting step of the present disclosure),
  • the second laminated unit 218B is fixed to the first laminated unit 218A, and the probe pin 212 is inserted into the through hole 223A of the second laminated unit 218B fixed to the first laminated unit 218A.
  • the probe pin 212 is inserted after the second laminated unit 218B is mounted and fixed on the first laminated unit 218A.
  • the positional deviation of the second laminated unit 218B with respect to the first laminated unit 218A that is, the positional deviation of the through hole 223A with respect to the pin terminal 227B is suppressed, and the probe pin 212 is inserted into the through hole 223A and connected to the pin terminal 227B.
  • the probe pin 212 can be easily inserted.
  • the controller 120 mounts the third laminated unit 218C on the second laminated unit 218B, and fixes the third laminated unit 218C to the second laminated unit 218B.
  • the controller 120 mounts the third laminated unit 218C by aligning the position of the electrode pad 227C exposed from the lower surface of the third laminated unit 218C with the position of the upper end of the probe pin 212.
  • the controller 120 fixes the third laminated unit 218C to the second laminated unit 218B with screws or the like.
  • the controller 120 may, for example, fix the first to third laminated units 218A to 218C together with one long screw. In this case, the controller 120 may carry out the fixing work of the first to third laminated units 218A to 218C at the end of the manufacturing process 130.
  • the probe pin 99 of the present embodiment can be stroked in the axial direction as described above (see FIG. 4).
  • the probe pins 99 probe pins 211 and 212 are sandwiched between the lower pin terminals 227B and the upper electrode pads 227C in the vertical direction (stacking direction).
  • the probe pin 99 contracts by varying the stroke amount SA (see FIG. 4) according to the distance between the upper laminated unit 218 and the lower laminated unit 218.
  • the probe pin 99 contracts more as the distance between the upper stacking unit 218 and the lower stacking unit 218 decreases.
  • an error in the thickness of the lamination unit 218 due to the three-dimensional lamination modeling can be absorbed by the stroke amount SA of the probe pin 99.
  • the probe pin 212 of the present embodiment is configured to be able to stroke according to an external force.
  • the probe pin 212 is sandwiched between the pin terminal 227B of the first stacking unit 218A and the electrode pad 227C of the third stacking unit 218C, and the first stacking is performed.
  • the stroke amount SA of the probe pin 212 is changed according to the distance between the unit 218A and the third laminated unit 218C.
  • the probe pin 212 is contracted in the stroke direction, and the probe pin 212 is connected to the pin terminal 227B and the electrode pad 227C while being connected to the second layer.
  • the laminated unit 218C can be brought into contact with the second laminated unit 218B and fixed.
  • an error in the thickness of the second laminated unit 218B and an error in the thickness of the connection terminal 227 caused by the three-dimensional laminated molding can be absorbed by the stroke amount SA of the probe pin 212, and the yield can be reduced by reducing the contact failure. Can be improved.
  • the insulating layer forming treatment S10 in the unit forming step P10 is a flattening apparatus for the discharge treatment S11 for discharging the ultraviolet curable resin (an example of the curable viscous fluid of the present disclosure) and the ultraviolet curable resin discharged by the discharge process S11.
  • the flattening treatment S13 for flattening by 90 and the curing treatment S15 for curing the ultraviolet curable resin flattened by the flattening treatment S13 are included.
  • the controller 120 repeatedly executes the discharge process S11, the flattening process S13, and the curing process S15 to form the insulating layer 220 of the second laminated unit 218B.
  • the thickness error caused in the insulating layer 220 of the second laminated unit 218B by the flattening process S13 is equal to or less than the stroke amount SA of the probe pin 212.
  • an error occurs in the thickness of the modeled object depending on the flattening method.
  • the controller 120 controls the error in the thickness of the second laminated unit 218B due to flattening to be equal to or less than the stroke amount SA of the probe pin 212 based on the control program 126, so that the contact failure of the probe pin 212 is more reliably performed.
  • the error between the measured value (thickness) of the second laminated unit 218B manufactured on a trial basis and the theoretical value is measured, and the flattening process S13 is performed so that the thickness error is the stroke amount SA or less.
  • the number of times, the frequency, the load applied from the flattening device 90 to the second laminated unit 218B, the speed at which the rollers and squeegees level the second laminated unit 218B, and the like may be adjusted.
  • a probe pin 212 having a stroke amount SA that is equal to or greater than the measured thickness error may be adopted.
  • the third laminated unit 218C is placed on the second laminated unit 218B.
  • the electrode pad 227C is formed at a position above the pin terminal 227B (see FIG. 11).
  • the insulating layer forming process S10 of the unit forming step P10 an example of the second laminated unit forming step of the present disclosure
  • the pin terminal 227B and the electrode A through hole 223A is formed in the second stacking unit 218B along a straight line LN (see FIG.
  • the pin terminal 227B of the first laminated unit 218A and the electrode pad 227C of the third laminated unit 218C are arranged in a straight line along the vertical direction, and the through hole 223A is formed along the straight line LN. 2 Formed in the laminated unit 218B.
  • the pin terminal 227B and the electrode pad 227C can be connected by the probe pin 212 at the shortest distance, and the length of the probe pin 212 can be shortened to reduce the electrical resistance value. Further, the size of the three-dimensional laminated electronic device 246 can be reduced.
  • the first laminated unit 218A in which the pin terminal 227B is formed is formed in the unit forming step P10. Further, in the unit forming step P10, the second laminated unit 218B in which the through hole 223A is formed is formed.
  • the probe pin 212 is inserted into the through hole 223A and the lower portion of the probe pin 212 is pin-terminaled. Connect to 227B. Further, in the first mounting step of another example shown in FIG.
  • the probe pin 212 is inserted into the through hole 223A and the second is placed on the first stacking unit 218A.
  • the stacking unit 218B is mounted.
  • the third laminated unit 218C in which the electrode pad 227C is formed is formed.
  • the second mounting step shown in FIG. 10 the third stacking unit 218C is mounted on the second stacking unit 218B, and the electrode pad 227C is connected to the upper part of the probe pin 212.
  • a through hole 223A is formed in the second stacking unit 218B sandwiched between the first stacking unit 218A and the third stacking unit 218C, and a long probe pin 212 is inserted into the through hole 223A. Then, the pin terminal 227B of the first stacking unit 218A and the electrode pad 227C of the third stacking unit 218C are connected by the probe pin 212 inserted into the through hole 223A.
  • FIG. 13 shows a cross-sectional view of the three-dimensional laminated electronic device 246A of the comparative example.
  • the three-dimensional laminated electronic device 246A shown in FIG. 13 does not use the probe pin 212 penetrating the second laminated unit 218B, but has a short probe pin 211 of the first laminated unit 218A and a short probe pin 211 of the second laminated unit 218B.
  • the electronic circuit of the first laminated unit 218A and the electronic circuit of the third laminated unit 218C are connected by using and.
  • a probe pin 211 for connecting the first laminated unit 218A and the third laminated unit 218C, a circuit wiring 225, a connection terminal 227, and the like are provided in the second laminated unit 218B. It will be necessary to provide it. For this reason, there is a risk that the manufacturing cost will increase, the restrictions on the design of the three-dimensional laminated electronic device 246A will increase, and the connection resistance will increase due to the increase in the contact points of the probe pins 211.
  • the three-dimensional laminated electronic device 246 of the present embodiment it is not necessary to connect the first laminated unit 218A and the second laminated unit 218B, and the second laminated unit 218B and the third laminated unit 218C with the probe pin 211. , The number of contact points between the probe pin 211 and the connection terminal 227 can be reduced. Therefore, the yield can be improved by reducing the contact resistance and the poor contact.
  • the three-dimensional laminated electronic device It is possible to simplify and reduce the size of the structure of 246.
  • the pin terminal 227B is an example of the first connection terminal.
  • the electrode pad 227C is an example of the second connection terminal.
  • the process shown in FIGS. 8 and 9 is an example of the first mounting process.
  • the process shown in FIG. 12 is an example of the first mounting process.
  • the process shown in FIG. 10 is an example of the second mounting process.
  • the unit forming step P10 is an example of a first laminated unit forming step, a second laminated unit forming step, and a third laminated unit forming step.
  • the insulating layer forming process S10 is an example of the second laminated unit forming step.
  • the discharge process S11 is an example of a discharge process.
  • the flattening process S13 is an example of a flattening step.
  • the curing treatment S15 is an example of a curing step.
  • the connection terminal forming process S30 is an example of the connection terminal forming step.
  • the probe pin 99 is provided in the pin insertion hole 223, but the pin terminal 227B is formed on the surface of the stacking unit 218 and connected to the pin terminal 227B on the surface of the stacking unit 218.
  • the probe pin 99 may be fixed.
  • the resin constituting the insulating layer 220 is not limited to the ultraviolet curable resin, and may be, for example, a thermoplastic resin or a thermosetting resin.
  • the laminated unit forming apparatus 10 forms the insulating layer 220 obtained by curing the ultraviolet curable resin as the curable viscous fluid of the present disclosure by three-dimensional laminated molding.
  • the laminated unit forming apparatus 10 may arrange the probe pin 99 on the insulating layer 220 formed by a method other than the three-dimensional laminated molding (injection molding or the like). In this case, only the circuit wiring 225 and the connection terminal 227 may be formed by three-dimensional laminated molding.
  • the structure of the three-dimensional laminated electronic device 246 of the above embodiment is an example.
  • only one intermediate second laminated unit 218B having a through hole 223A is sandwiched between the lowermost first laminated unit 218A and the uppermost layer third laminated unit 218C.
  • the three-dimensional laminated electronic device 246 has a configuration in which the first laminated unit 218A, the second laminated unit 218B, the third laminated unit 218C, and the fourth laminated unit 218D are stacked in order from the bottom. That is, a configuration having four or more stages may be used.
  • the first and fourth laminated units 218A and 218D may be connected by probe pins 212.
  • the second laminated unit 218B and the third laminated unit 218C are first mounted on the first laminated unit 218A, and then the probe pin 212 is inserted into the through hole 223A. Is also good.
  • FIG. 8 and 9 the second laminated unit 218B and the third laminated unit 218C are first mounted on the first laminated unit 218A, and then the probe pin 212 is inserted into the through hole 223A. Is also good.
  • FIG. 8 and 9 the second laminated unit 218B and the third laminated unit 218C are first mounted on the first laminated unit 218A, and then the probe pin 212 is inserted into the
  • the probe pin 212 is first inserted into the pin insertion hole 223 of the first stacking unit 218A, and then the second stacking unit 218B and the third stacking unit 218C are probed into the through hole 223A. It may be mounted on the first stacking unit 218A while inserting the pin 212. Further, the three-dimensional laminated electronic device 246 may be configured to include only one probe pin 211 or three or more probe pins 211.
  • the probe pin 99 may be configured so that it does not stroke even when an external force is applied.
  • the insulating layer forming process S10 does not have to execute the flattening process S13.
  • the stacking unit forming device 10 does not have to include the flattening device 90.
  • the probe pin 212 and the pin insertion hole 223 may be arranged in a direction inclined with respect to the straight line LN.
  • the configuration of the laminated unit forming device 10 described above is an example, and can be changed as appropriate.
  • the stacking unit forming device 10 does not have to include a mounting unit 26 for mounting the electronic component 96.
  • the three-dimensional additive manufacturing method of the present disclosure for example, a stereolithography method, a fused deposition modeling method, a powder sintering method and the like can be adopted in addition to the inkjet method.

Abstract

Provided is a method for manufacturing a 3-dimensional stacked electronic device by 3-dimensional additive manufacturing, the method enabling a decrease in the number of connection terminals and wires in an intermediate stack unit, and a decrease in manufacturing cost. The method for manufacturing a 3-dimensional stacked electronic device comprises: a first stack unit forming step for forming a first stack unit having a first connection terminal formed therein; a second stack unit forming step for forming a second stack unit having a through-hole formed therein; a first mounting step for, after the second stack unit is mounted on the first stack unit, inserting a probe pin into the through-hole and connecting a lower part of the probe pin to the first connection terminal, or for, after the lower portion of the probe pin is connected to the first connection terminal, mounting the second stack unit on the first stack unit while inserting the probe pin into the through-hole; a third stack unit forming step for forming a third stack unit having a second connection terminal formed therein; and a second mounting step for mounting the third stack unit on the second stack unit and connecting the second connection terminal to an upper part of the probe pin. 

Description

3次元積層造形による3次元積層電子デバイスの製造方法Manufacturing method of 3D laminated electronic device by 3D laminated modeling
 本開示は、3次元積層造形を用いた3次元積層電子デバイスの製造方法に関するものである。 The present disclosure relates to a method for manufacturing a three-dimensional laminated electronic device using three-dimensional laminated modeling.
 従来、3次元積層造形に関し、種々の技術が提案されている。例えば、下記特許文献1には、3次元積層造形により電子部品と回路配線を含んだ積層ユニットを形成する技術が開示されている。特許文献1に記載された積層ユニット形成装置は、電子部品、回路配線、接続端子を絶縁層に形成した積層ユニットを形成する。積層ユニット形成装置は、複数の積層ユニットを積み重ねて、ユニット同士を固定することで3次元積層電子デバイスを製造している。積層ユニット形成装置は、複数の積層ユニットを積み重ねる際に、任意の積層ユニットに形成した空洞部にプローブピンを挿入し、プローブピンを空洞部に挿入した積層ユニットの上に他の積層ユニットを搭載している。プローブピンは、上端と下端のそれぞれを別の積層ユニットの接続端子に接触させることで、2つの積層ユニットの電子回路を電気的に接続している。 Conventionally, various techniques have been proposed for three-dimensional laminated modeling. For example, Patent Document 1 below discloses a technique for forming a laminated unit including electronic components and circuit wiring by three-dimensional laminated modeling. The laminated unit forming apparatus described in Patent Document 1 forms a laminated unit in which electronic components, circuit wiring, and connection terminals are formed in an insulating layer. The laminated unit forming apparatus manufactures a three-dimensional laminated electronic device by stacking a plurality of laminated units and fixing the units to each other. When stacking a plurality of laminated units, the laminated unit forming apparatus inserts a probe pin into a cavity formed in an arbitrary laminated unit, and mounts another laminated unit on the laminated unit in which the probe pin is inserted into the cavity. doing. The probe pins electrically connect the electronic circuits of the two laminated units by bringing the upper ends and the lower ends into contact with the connection terminals of different laminated units.
国際公開第WO/2019/102522号International Publication No. WO / 2019/102522
 上記特許文献1に記載の技術では、上下に積み重ねた2つの積層ユニット間の導通を、プローブピンによって行なっている。ここで、回路設計によっては、任意の積層ユニットと、その上に搭載した中間の積層ユニットとの導通が不要である一方、任意の積層ユニットと、中間の積層ユニットのさらに上に搭載した積層ユニットと導通を取りたい場合がある。しかしながら、特許文献1の3次元積層電子デバイスの構造では、間に挟まれる中間の積層ユニットとの導通が不要であっても、中間の積層ユニットに接続端子や配線、即ち、下の積層ユニットと上の積層ユニットとを接続するための中継用の電子回路を形成する必要があった。 In the technique described in Patent Document 1, the probe pins are used to conduct conduction between two laminated units stacked one above the other. Here, depending on the circuit design, it is not necessary to conduct conduction between the arbitrary laminated unit and the intermediate laminated unit mounted on the arbitrary laminated unit, while the arbitrary laminated unit and the laminated unit mounted on the intermediate laminated unit are further mounted. You may want to take continuity with. However, in the structure of the three-dimensional laminated electronic device of Patent Document 1, even if continuity with the intermediate laminated unit sandwiched between them is not required, the intermediate laminated unit is connected to the connection terminal and wiring, that is, the lower laminated unit. It was necessary to form a relay electronic circuit for connecting to the above laminated unit.
 そこで、本開示は、上述した点を鑑みてなされたものであり、中間の積層ユニットの接続端子や配線の数を減らし、製造コストの低減を図れる3次元積層造形による3次元積層電子デバイスの製造方法を提供することを課題とする。 Therefore, the present disclosure has been made in view of the above points, and manufactures a three-dimensional laminated electronic device by three-dimensional laminated molding that can reduce the number of connection terminals and wirings of the intermediate laminated unit and reduce the manufacturing cost. The challenge is to provide a method.
 本明細書は、第1接続端子が形成された第1積層ユニットを形成する第1積層ユニット形成工程と、貫通孔が形成された第2積層ユニットを形成する第2積層ユニット形成工程と、前記第1積層ユニットの上に前記第2積層ユニットを搭載した後に、前記貫通孔にプローブピンを挿入して前記プローブピンの下部を前記第1接続端子に接続する、又は前記プローブピンの下部を前記第1接続端子に接続した後に、前記貫通孔に前記プローブピンを挿入しつつ前記第1積層ユニットの上に前記第2積層ユニットを搭載する第1搭載工程と、第2接続端子が形成された第3積層ユニットを形成する第3積層ユニット形成工程と、前記第2積層ユニットの上に前記第3積層ユニットを搭載し、前記プローブピンの上部に前記第2接続端子を接続する第2搭載工程と、を含む3次元積層造形による3次元積層電子デバイスの製造方法を開示する。 The present specification describes a first laminated unit forming step of forming a first laminated unit in which a first connection terminal is formed, a second laminated unit forming step of forming a second laminated unit in which a through hole is formed, and the above. After mounting the second stacking unit on the first stacking unit, a probe pin is inserted into the through hole to connect the lower portion of the probe pin to the first connection terminal, or the lower portion of the probe pin is described. After connecting to the first connection terminal, the first mounting step of mounting the second laminated unit on the first laminated unit while inserting the probe pin into the through hole, and the second connection terminal are formed. A third stacking unit forming step of forming a third laminated unit, and a second mounting step of mounting the third laminated unit on the second laminated unit and connecting the second connection terminal to the upper part of the probe pin. Discloses a method for manufacturing a three-dimensional laminated electronic device by three-dimensional laminated modeling including.
 本開示によれば、第1積層ユニットの上に、第2積層ユニット、第3積層ユニットを搭載して3次元積層電子デバイスを製造する。第1積層ユニットと第3積層ユニットとの間に挟まれる第2積層ユニットに貫通孔を形成し、その貫通孔にプローブピンを挿入する。そして、貫通孔に挿入したプローブピンにより、第1積層ユニットの第1接続端子と第3積層ユニットの第2接続端子を接続する。これにより、中間の第2積層ユニットに、第1及び第3積層ユニットを接続するための接続端子や配線などの中継用の電子回路を形成する必要がなくなり、3次元積層電子デバイスを製造する製造コストを低減することができる。 According to the present disclosure, a second laminated unit and a third laminated unit are mounted on the first laminated unit to manufacture a three-dimensional laminated electronic device. A through hole is formed in the second laminated unit sandwiched between the first laminated unit and the third laminated unit, and a probe pin is inserted into the through hole. Then, the probe pin inserted into the through hole connects the first connection terminal of the first laminated unit and the second connection terminal of the third laminated unit. This eliminates the need to form relay electronic circuits such as connection terminals and wiring for connecting the first and third laminated units to the intermediate second laminated unit, and manufactures a three-dimensional laminated electronic device. The cost can be reduced.
積層ユニット形成装置を示す図である。It is a figure which shows the laminated unit forming apparatus. 制御装置を示すブロック図である。It is a block diagram which shows the control device. 制御装置を示すブロック図である。It is a block diagram which shows the control device. プローブピンの構造を示す模式図である。It is a schematic diagram which shows the structure of a probe pin. 3次元積層電子デバイスの製造工程の流れを示すフローチャートである。It is a flowchart which shows the flow of the manufacturing process of a 3D laminated electronic device. 3次元積層電子デバイスの製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of a 3D laminated electronic device. 3次元積層電子デバイスの製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of a 3D laminated electronic device. 3次元積層電子デバイスの製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of a 3D laminated electronic device. 3次元積層電子デバイスの製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of a 3D laminated electronic device. 3次元積層電子デバイスの製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of a 3D laminated electronic device. 3次元積層電子デバイスの断面図である。It is sectional drawing of the 3D laminated electronic device. 別例の3次元積層電子デバイスの製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of the 3D laminated electronic device of another example. 比較例の3次元積層電子デバイスの断面図である。It is sectional drawing of the 3D laminated electronic device of the comparative example. 別例の3次元積層電子デバイスの製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of the 3D laminated electronic device of another example.
 以下、本開示の好適な実施形態を、図面を参照しつつ詳細に説明する。 Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the drawings.
(1)積層ユニット形成装置の構成
 図1に積層ユニット形成装置10を示す。積層ユニット形成装置10は、搬送装置20と、第1造形ユニット22と、第2造形ユニット24と、装着ユニット26と、第3造形ユニット200と、制御装置27(図2,図3参照)を備える。それら搬送装置20、第1造形ユニット22、第2造形ユニット24、装着ユニット26、第3造形ユニット200は、積層ユニット形成装置10のベース28の上に配置されている。ベース28は、平面視において概して長方形状をなしている。以下の説明では、ベース28の長手方向をX軸方向、ベース28の短手方向をY軸方向、X軸方向及びY軸方向の両方に直交する方向をZ軸方向と称して説明する。
(1) Configuration of Laminated Unit Forming Device FIG. 1 shows the laminated unit forming device 10. The stacking unit forming device 10 includes a transport device 20, a first modeling unit 22, a second modeling unit 24, a mounting unit 26, a third modeling unit 200, and a control device 27 (see FIGS. 2 and 3). Be prepared. The transport device 20, the first modeling unit 22, the second modeling unit 24, the mounting unit 26, and the third modeling unit 200 are arranged on the base 28 of the laminated unit forming device 10. The base 28 is generally rectangular in plan view. In the following description, the longitudinal direction of the base 28 will be referred to as the X-axis direction, the lateral direction of the base 28 will be referred to as the Y-axis direction, and the direction orthogonal to both the X-axis direction and the Y-axis direction will be referred to as the Z-axis direction.
 搬送装置20は、X軸スライド機構30と、Y軸スライド機構32とを備えている。そのX軸スライド機構30は、X軸スライドレール34と、X軸スライダ36とを有している。X軸スライドレール34は、X軸方向に延びるように、ベース28の上に配設されている。X軸スライダ36は、X軸スライドレール34によって、X軸方向にスライド可能に保持されている。さらに、X軸スライド機構30は、電磁モータ38(図2参照)を有しており、電磁モータ38の駆動により、X軸スライダ36をX軸方向の任意の位置に移動させる。また、Y軸スライド機構32は、Y軸スライドレール50と、ステージ52とを有している。Y軸スライドレール50は、Y軸方向に延びるように、ベース28の上に配設されている。Y軸スライドレール50の一端部は、X軸スライダ36に連結されている。そのため、Y軸スライドレール50は、X軸方向に移動可能とされている。ステージ52は、Y軸スライドレール50によって、Y軸方向にスライド可能に保持されている。Y軸スライド機構32は、電磁モータ56(図2参照)を有しており、電磁モータ56の駆動により、ステージ52をY軸方向の任意の位置に移動させる。これにより、ステージ52は、X軸スライド機構30及びY軸スライド機構32の駆動により、ベース28上の任意の位置に移動する。 The transport device 20 includes an X-axis slide mechanism 30 and a Y-axis slide mechanism 32. The X-axis slide mechanism 30 has an X-axis slide rail 34 and an X-axis slider 36. The X-axis slide rail 34 is arranged on the base 28 so as to extend in the X-axis direction. The X-axis slider 36 is slidably held in the X-axis direction by the X-axis slide rail 34. Further, the X-axis slide mechanism 30 has an electromagnetic motor 38 (see FIG. 2), and the X-axis slider 36 is moved to an arbitrary position in the X-axis direction by driving the electromagnetic motor 38. Further, the Y-axis slide mechanism 32 has a Y-axis slide rail 50 and a stage 52. The Y-axis slide rail 50 is arranged on the base 28 so as to extend in the Y-axis direction. One end of the Y-axis slide rail 50 is connected to the X-axis slider 36. Therefore, the Y-axis slide rail 50 is movable in the X-axis direction. The stage 52 is slidably held in the Y-axis direction by the Y-axis slide rail 50. The Y-axis slide mechanism 32 has an electromagnetic motor 56 (see FIG. 2), and the stage 52 is moved to an arbitrary position in the Y-axis direction by driving the electromagnetic motor 56. As a result, the stage 52 moves to an arbitrary position on the base 28 by driving the X-axis slide mechanism 30 and the Y-axis slide mechanism 32.
 ステージ52は、基台60と、保持装置62と、昇降装置64とを有している。基台60は、平板状に形成され、上面に基材70が載置される。保持装置62は、X軸方向における基台60の両側部に設けられている。保持装置62は、基台60に載置された基材70のX軸方向の両縁部を挟むことで、基台60に対して基材70を固定的に保持する。また、昇降装置64は、基台60の下方に配設されており、基台60をZ軸方向で昇降させる。 The stage 52 has a base 60, a holding device 62, and an elevating device 64. The base 60 is formed in a flat plate shape, and the base material 70 is placed on the upper surface. The holding devices 62 are provided on both sides of the base 60 in the X-axis direction. The holding device 62 holds the base material 70 fixedly to the base 60 by sandwiching both edges of the base material 70 placed on the base 60 in the X-axis direction. Further, the elevating device 64 is arranged below the base 60, and raises and lowers the base 60 in the Z-axis direction.
 第1造形ユニット22は、ステージ52の基台60に載置された基材70の上に回路配線を造形するユニットであり、第1印刷部72と、焼成部74とを有している。第1印刷部72は、インクジェットヘッド76(図2参照)を有しており、基台60に載置された基材70の上に、導電性インクを線状に吐出する。導電性インクは、例えば、主成分としてナノメートルサイズの金属(銀など)の微粒子を溶媒中に分散させたものを含み、熱により焼成されることで硬化する。金属ナノ粒子の表面は、例えば、分散剤によりコーティングされており、溶媒中での凝集が抑制されている。 The first modeling unit 22 is a unit for modeling circuit wiring on a base material 70 placed on a base 60 of a stage 52, and has a first printing unit 72 and a firing unit 74. The first printing unit 72 has an inkjet head 76 (see FIG. 2), and linearly ejects conductive ink onto the base material 70 placed on the base 60. The conductive ink contains, for example, nanometer-sized metal (silver or the like) fine particles dispersed in a solvent as a main component, and is cured by being fired by heat. The surface of the metal nanoparticles is, for example, coated with a dispersant to suppress agglutination in the solvent.
 尚、インクジェットヘッド76は、例えば、圧電素子を用いたピエゾ方式によって複数のノズルから導電性インクを吐出する。また、導電性インクを吐出する装置としては、複数のノズルを備えるインクジェットヘッドに限らず、例えば、1つのノズルを備えたディスペンサーでも良い。また、導電性インクに含まれる金属ナノ粒子の種類は、銀に限らず、銅、金等でも良い。また、導電性インクに含まれる金属ナノ粒子の種類数は、1種類に限らず、複数種類でも良い。 The inkjet head 76 ejects conductive ink from a plurality of nozzles by, for example, a piezo method using a piezoelectric element. Further, the device for ejecting the conductive ink is not limited to the inkjet head provided with a plurality of nozzles, and for example, a dispenser provided with one nozzle may be used. Further, the type of metal nanoparticles contained in the conductive ink is not limited to silver, and may be copper, gold, or the like. Further, the number of types of metal nanoparticles contained in the conductive ink is not limited to one, and may be a plurality of types.
 焼成部74は、照射装置78(図2参照)を有している。照射装置78は、例えば、基材70の上に吐出された導電性インクを加熱する赤外線ヒータを備えている。導電性インクは、赤外線ヒータから熱を付与されることで焼成され、回路配線を形成する。ここでいう導電性インクの焼成とは、例えば、エネルギーを付与することによって、溶媒の気化や金属ナノ粒子の保護膜、つまり、分散剤の分解等が行われ、金属ナノ粒子が接触又は融着することで、導電率が高くなる現象である。そして、導電性インクを焼成することで、回路配線を形成することができる。尚、導電性インクを加熱する装置は、赤外線ヒータに限らない。例えば、積層ユニット形成装置10は、導電性インクを加熱する装置として、赤外線ランプ、レーザ光を導電性インクに照射するレーザ照射装置、あるいは導電性インクを吐出された基材70を炉内に入れて加熱する電気炉を備えても良い。 The firing unit 74 has an irradiation device 78 (see FIG. 2). The irradiation device 78 includes, for example, an infrared heater that heats the conductive ink ejected onto the base material 70. The conductive ink is fired by applying heat from an infrared heater to form a circuit wiring. In the firing of the conductive ink referred to here, for example, by applying energy, the solvent is vaporized and the protective film of the metal nanoparticles, that is, the dispersant is decomposed, and the metal nanoparticles are contacted or fused. This is a phenomenon in which the conductivity is increased. Then, the circuit wiring can be formed by firing the conductive ink. The device for heating the conductive ink is not limited to the infrared heater. For example, in the lamination unit forming device 10, as a device for heating the conductive ink, an infrared lamp, a laser irradiation device that irradiates the conductive ink with laser light, or a base material 70 to which the conductive ink is discharged is placed in the furnace. It may be provided with an electric furnace for heating.
 また、第2造形ユニット24は、基台60に載置された基材70の上に絶縁層を造形するユニットであり、第2印刷部84と、硬化部86とを有している。第2印刷部84は、インクジェットヘッド88(図2参照)を有しており、基台60に載置された基材70の上に紫外線硬化樹脂を吐出する。紫外線硬化樹脂は、紫外線の照射により硬化する樹脂である。尚、インクジェットヘッド88が紫外線硬化樹脂を吐出する方式は、例えば、圧電素子を用いたピエゾ方式でもよく、樹脂を加熱して気泡を発生させ複数のノズルから吐出するサーマル方式でも良い。 Further, the second modeling unit 24 is a unit for forming an insulating layer on the base material 70 placed on the base 60, and has a second printing unit 84 and a curing unit 86. The second printing unit 84 has an inkjet head 88 (see FIG. 2), and discharges an ultraviolet curable resin onto a base material 70 placed on a base 60. The ultraviolet curable resin is a resin that is cured by irradiation with ultraviolet rays. The method in which the inkjet head 88 discharges the ultraviolet curable resin may be, for example, a piezo method using a piezoelectric element, or a thermal method in which the resin is heated to generate bubbles and discharged from a plurality of nozzles.
 硬化部86は、平坦化装置90(図2参照)と、照射装置92(図2参照)とを有している。平坦化装置90は、インクジェットヘッド88によって基材70の上に吐出された紫外線硬化樹脂の上面を平坦化するものである。平坦化装置90は、例えば、紫外線硬化樹脂の表面を均しながら余剰分の樹脂を、ローラもしくはブレードによって掻き取ることで、紫外線硬化樹脂の厚みを均一にさせる。また、照射装置92は、光源として水銀ランプもしくはLEDを備えており、基材70の上に吐出された紫外線硬化樹脂に紫外線を照射する。これにより、基材70の上に吐出された紫外線硬化樹脂が硬化し、絶縁層を形成することができる。 The hardened portion 86 has a flattening device 90 (see FIG. 2) and an irradiation device 92 (see FIG. 2). The flattening device 90 flattens the upper surface of the ultraviolet curable resin discharged onto the base material 70 by the inkjet head 88. The flattening device 90 makes the thickness of the ultraviolet curable resin uniform by, for example, scraping off the excess resin with a roller or a blade while leveling the surface of the ultraviolet curable resin. Further, the irradiation device 92 includes a mercury lamp or an LED as a light source, and irradiates the ultraviolet curable resin discharged on the base material 70 with ultraviolet rays. As a result, the ultraviolet curable resin discharged onto the base material 70 is cured, and an insulating layer can be formed.
 また、装着ユニット26は、基台60に載置された基材70の上に、電子部品やプローブピンを配置するユニットであり、供給部100と、装着部102とを有している。供給部100は、テーピング化された電子部品を1つずつ送り出すテープフィーダ110(図2参照)を複数有しており、各供給位置において、電子部品を供給する。さらに、供給部100は、複数の種類のプローブピンが立った状態で並べられたトレイ201(図2参照)を有しており、トレイ201からピックアップされることが可能な状態でプローブピンを供給する。電子部品は、例えば、温度センサ等のセンサ素子である。 Further, the mounting unit 26 is a unit for arranging electronic components and probe pins on the base material 70 mounted on the base 60, and has a supply unit 100 and a mounting unit 102. The supply unit 100 has a plurality of tape feeders 110 (see FIG. 2) for feeding the taped electronic components one by one, and supplies the electronic components at each supply position. Further, the supply unit 100 has a tray 201 (see FIG. 2) in which a plurality of types of probe pins are arranged in an upright state, and supplies the probe pins in a state in which the probe pins can be picked up from the tray 201. To do. The electronic component is, for example, a sensor element such as a temperature sensor.
 また、プローブピンは、1つの積層ユニットの電子回路と、他の積層ユニットの電子回路とを電気的に接続する部材である。ここでいう積層ユニットとは、後述するように、積層ユニット形成装置10によって形成するユニットであって、電子回路を有する3次元積層電子デバイスを複数の層に分割したユニットである。 Further, the probe pin is a member that electrically connects the electronic circuit of one laminated unit and the electronic circuit of another laminated unit. The laminated unit referred to here is a unit formed by the laminated unit forming device 10 as described later, and is a unit in which a three-dimensional laminated electronic device having an electronic circuit is divided into a plurality of layers.
 図4は、プローブピンの構造を示す模式図である。図4に示すように、プローブピン99は、本体部99Aと、ピン99Bとを有している。プローブピン99は、例えば、銅や金などの金属により形成されている。本体部99Aは、中空の円筒形状をなし、ピン99Bを挿入する貫通孔を形成されている。ピン99Bは、細い棒状をなしており、軸方向のそれぞれの端部を、積層ユニットに設けられたピン端子に電気的に接続される。ピン99Bは、本体部99Aに挿入された部分にフランジ部99Cが形成されている。また、本体部99Aの内部には、フランジ部99Cと本体部99Aの内壁との間にバネ99Dが設けられている。また、ピン99Bは、軸方向(図4における上下方向)へ伸縮可能に構成されている。バネ99Dは、軸方向に沿った外力をピン99Bに加えられると、フランジ部99Cと本体部99Aの内壁に挟まれ外力の大きさに応じて軸方向へ弾性変形する。これにより、プローブピン99は、外力を加えられることで、軸方向にストローク可能となっており、外力の大きさに応じたストローク量SAだけ収縮する。ストローク量SAは、例えば、数十μm~数百μmである。 FIG. 4 is a schematic diagram showing the structure of the probe pin. As shown in FIG. 4, the probe pin 99 has a main body 99A and a pin 99B. The probe pin 99 is made of, for example, a metal such as copper or gold. The main body 99A has a hollow cylindrical shape and is formed with a through hole into which the pin 99B is inserted. The pin 99B has a thin rod shape, and each end in the axial direction is electrically connected to a pin terminal provided on the stacking unit. The pin 99B has a flange portion 99C formed in a portion inserted into the main body portion 99A. Further, inside the main body 99A, a spring 99D is provided between the flange 99C and the inner wall of the main body 99A. Further, the pin 99B is configured to be expandable and contractible in the axial direction (vertical direction in FIG. 4). When an external force along the axial direction is applied to the pin 99B, the spring 99D is sandwiched between the inner walls of the flange portion 99C and the main body portion 99A and elastically deforms in the axial direction according to the magnitude of the external force. As a result, the probe pin 99 can be stroked in the axial direction by applying an external force, and contracts by a stroke amount SA according to the magnitude of the external force. The stroke amount SA is, for example, several tens of μm to several hundreds of μm.
 尚、図4に示すプローブピン99の構成は、一例である。例えば、プローブピン99は、軸方向に変位しない(ストロークできない)構成でも良い。また、電子部品の供給は、テープフィーダ110による供給に限らず、トレイによる供給でも良い。また、プローブピンの供給は、トレイ201による供給に限らず、テープフィーダによる供給でも良い。また、電子部品とプローブピンの供給は、テープフィーダによる供給とトレイによる供給との両方、あるいはそれ以外の供給でも良い。 The configuration of the probe pin 99 shown in FIG. 4 is an example. For example, the probe pin 99 may be configured so as not to be displaced in the axial direction (cannot be stroked). Further, the supply of electronic components is not limited to the supply by the tape feeder 110, and may be supplied by the tray. Further, the probe pin is supplied not only by the tray 201 but also by a tape feeder. Further, the electronic components and the probe pins may be supplied by both the tape feeder and the tray, or other supply.
 また、本実施形態の供給部100は、図4に示す軸方向の長さLが異なるプローブピン99を供給可能となっている。後述するように、本実施形態の積層ユニット形成装置10では、少なくとも1つの積層ユニットを間に挟んだ2つの積層ユニットをプローブピン99で接続する場合、間に挟まれる中間の積層ユニットの厚みに応じた長いプローブピン99を用いる。長さの異なるプローブピン99の詳細については、後述する。 Further, the supply unit 100 of the present embodiment can supply probe pins 99 having different axial lengths L as shown in FIG. As will be described later, in the stacking unit forming apparatus 10 of the present embodiment, when two stacking units sandwiching at least one stacking unit are connected by probe pins 99, the thickness of the intermediate stacking unit sandwiched between the two stacking units is increased. A corresponding long probe pin 99 is used. Details of probe pins 99 having different lengths will be described later.
 また、図2に示すように、装着部102は、装着ヘッド112と、移動装置114とを有している。装着ヘッド112は、電子部品、又はプローブピンを吸着保持するための吸着ノズルを有している。吸着ノズルは、正負圧供給装置(図示省略)から負圧が供給されることで、エアの吸引により電子部品等を吸着保持する。そして、正負圧供給装置から僅かな正圧が供給されることで、電子部品等を離脱する。また、移動装置114は、テープフィーダ110の供給位置又はトレイ201と、基台60に載置された基材70との間で、装着ヘッド112を移動させる。これにより、装着部102は、吸着ノズルにより電子部品等を保持し、吸着ノズルによって保持した電子部品等を、基材70の上に配置する。 Further, as shown in FIG. 2, the mounting portion 102 has a mounting head 112 and a moving device 114. The mounting head 112 has a suction nozzle for sucking and holding an electronic component or a probe pin. The suction nozzle sucks and holds electronic components and the like by suctioning air by supplying negative pressure from a positive / negative pressure supply device (not shown). Then, when a slight positive pressure is supplied from the positive / negative pressure supply device, the electronic component or the like is separated. Further, the moving device 114 moves the mounting head 112 between the supply position of the tape feeder 110 or the tray 201 and the base material 70 mounted on the base 60. As a result, the mounting portion 102 holds the electronic parts and the like by the suction nozzle, and arranges the electronic parts and the like held by the suction nozzle on the base material 70.
 また、第3造形ユニット200は、基台60に載置された基材70の上に、導電性ペーストを塗布するユニットである。導電性ペーストは、例えば、マイクロサイズの金属粒子(マイクロフィラなど)を、樹脂製の接着剤に含めた粘性流体である。マイクロサイズの金属マイクロ粒子は、例えば、フレーク状態の金属(銀など)である。金属マイクロ粒子は、銀に限らず、金、銅などや複数種類の金属でも良い。接着剤は、例えば、エポキシ系の樹脂を主成分として含んでいる。導電性ペーストは、加熱により硬化し、例えば、回路配線に接続される接続端子の形成に使用される。接続端子とは、後述するように、電子部品の部品端子に接続する接続端子(バンプ)、外部機器などに接続する電極パッド(露出パッドなど)、プローブピン99の接触箇所に設けられるピン端子、積層方向に回路配線を導通させるスルーホールなどである。 Further, the third modeling unit 200 is a unit for applying the conductive paste on the base material 70 placed on the base 60. The conductive paste is, for example, a viscous fluid containing micro-sized metal particles (such as microfillers) in a resin adhesive. Micro-sized metal microparticles are, for example, flake-state metals (such as silver). The metal microparticles are not limited to silver, but may be gold, copper, or a plurality of types of metals. The adhesive contains, for example, an epoxy resin as a main component. The conductive paste is cured by heating and is used, for example, to form connection terminals connected to circuit wiring. The connection terminals are connection terminals (bumps) connected to component terminals of electronic components, electrode pads (exposed pads, etc.) connected to external devices, pin terminals provided at contact points of probe pins 99, as described later. It is a through hole or the like that conducts circuit wiring in the stacking direction.
 また、第3造形ユニット200は、導電性ペーストを吐出(塗布)する装置としてディスペンサー202を有する。ディスペンサー202は、絶縁層の貫通孔内や絶縁層の表面等に導電性ペーストを吐出する。貫通孔に充填された導電性ペーストは、例えば、第1造形ユニット22の焼成部74によって加熱され硬化することで接続端子やスルーホールを形成する。また、絶縁層の表面に塗布された導電性ペーストは、例えば、焼成部74によって加熱され硬化することで、接続端子等を形成する。導電性ペーストは、加熱されることで接着剤(樹脂など)が硬化し、フレーク状の金属同士が接触した状態で硬化する。尚、導電性ペーストを塗布等する装置は、ディスペンサーに限らず、スクリーン印刷装置やグラビア印刷装置でも良い。また、導電性ペーストを硬化する方法は、加熱による方法に限らず、接着剤として紫外線硬化樹脂を用いて紫外線により硬化する方法でも良い。 Further, the third modeling unit 200 has a dispenser 202 as a device for discharging (applying) the conductive paste. The dispenser 202 discharges the conductive paste into the through hole of the insulating layer, the surface of the insulating layer, and the like. The conductive paste filled in the through holes is heated and cured by the firing portion 74 of the first modeling unit 22, for example, to form connection terminals and through holes. Further, the conductive paste applied to the surface of the insulating layer is heated and cured by, for example, the firing unit 74 to form a connection terminal or the like. When the conductive paste is heated, the adhesive (resin or the like) is cured, and the flake-shaped metals are cured in contact with each other. The device for applying the conductive paste is not limited to the dispenser, but may be a screen printing device or a gravure printing device. Further, the method of curing the conductive paste is not limited to the method of heating, and a method of curing by ultraviolet rays using an ultraviolet curable resin as an adhesive may be used.
 上記したように導電性インクは、例えば、加熱によって金属ナノ粒子同士が融着することで一体化した金属となり、金属ナノ粒子同士が接触しているだけの状態に比べて導電率が高くなる。一方、導電性ペーストは、例えば、接着剤の硬化によってマイクロサイズの金属マイクロ粒子を互いに接触させて硬化する。このため、導電性インクを硬化して形成した配線の抵抗(電気抵抗率)は、導電性ペーストを硬化した配線の抵抗に比べて小さい。従って、本実施形態の積層ユニット形成装置10は、低抵抗の回路配線など、低い抵抗値を要求される造形物の造形に導電性インクを用いる。 As described above, the conductive ink becomes an integrated metal by fusing the metal nanoparticles to each other by heating, and the conductivity is higher than that in the state where the metal nanoparticles are only in contact with each other. On the other hand, the conductive paste is cured by bringing micro-sized metal microparticles into contact with each other, for example, by curing the adhesive. Therefore, the resistance (electric resistivity) of the wiring formed by curing the conductive ink is smaller than the resistance of the wiring formed by curing the conductive paste. Therefore, the laminated unit forming apparatus 10 of the present embodiment uses conductive ink for modeling a modeled object that requires a low resistance value, such as a circuit wiring having a low resistance.
 一方で、導電性ペーストは、硬化時に接着剤を硬化させることで、他の部材との接着性を高めることができ、導電性インクに比べて他の部材との密着性に優れている。ここでいう他の部材とは、導電性ペーストを吐出等して付着させる部材であり、例えば、絶縁層、回路配線、電子部品の部品端子などである。従って、本実施形態の積層ユニット形成装置10は、プローブピン99の接触箇所に設けられるピン端子など、機械的強度(引っ張り強度など)が要求される造形物の造形に導電性ペーストを用いる。尚、積層ユニット形成装置10は、導電性ペーストを回路配線の形成に用いても良く、導電性インクを接続端子の形成に用いても良く、上記した導電性インクや導電性ペースト以外の材料を回路配線や接続端子の形成に用いても良い。 On the other hand, the conductive paste can improve the adhesiveness with other members by curing the adhesive at the time of curing, and is superior in adhesion to other members as compared with the conductive ink. The other member referred to here is a member to which the conductive paste is discharged and adhered, and is, for example, an insulating layer, a circuit wiring, a component terminal of an electronic component, and the like. Therefore, the laminated unit forming apparatus 10 of the present embodiment uses the conductive paste for modeling a modeled object that requires mechanical strength (tensile strength, etc.), such as a pin terminal provided at a contact point of the probe pin 99. In the laminated unit forming apparatus 10, the conductive paste may be used for forming the circuit wiring, the conductive ink may be used for forming the connection terminal, and a material other than the above-mentioned conductive ink and the conductive paste may be used. It may be used for forming circuit wiring and connection terminals.
 また、制御装置27は、図2及び図3に示すように、コントローラ120と、複数の駆動回路122と、記憶装置124とを備えている。複数の駆動回路122は、図2に示すように、上記電磁モータ38,56、保持装置62、昇降装置64、インクジェットヘッド76、照射装置78、インクジェットヘッド88、平坦化装置90、照射装置92、テープフィーダ110、装着ヘッド112、移動装置114に接続されている。さらに、駆動回路122は、図3に示すように、第3造形ユニット200に接続されている。コントローラ120は、CPU,ROM,RAM等を備え、コンピュータを主体とするものであり、複数の駆動回路122に接続されている。記憶装置124は、RAM、ROM、ハードディスク等を備えており、積層ユニット形成装置10の制御を行う制御プログラム126が記憶されている。コントローラ120は、制御プログラム126をCPUで実行することで、搬送装置20、第1造形ユニット22、第2造形ユニット24、装着ユニット26、第3造形ユニット200等の動作を制御可能となっている。以下の説明では、コントローラ120が、制御プログラム126を実行して各装置を制御することを、単に「装置が」と記載する場合がある。例えば、「コントローラ120がステージ52を移動させる」とは、「コントローラ120が、制御プログラム126を実行し、駆動回路122を介して搬送装置20の動作を制御して、搬送装置20の動作によってステージ52を移動させる」ことを意味している。 Further, as shown in FIGS. 2 and 3, the control device 27 includes a controller 120, a plurality of drive circuits 122, and a storage device 124. As shown in FIG. 2, the plurality of drive circuits 122 include the electromagnetic motors 38 and 56, a holding device 62, an elevating device 64, an inkjet head 76, an irradiation device 78, an inkjet head 88, a flattening device 90, and an irradiation device 92. It is connected to the tape feeder 110, the mounting head 112, and the moving device 114. Further, the drive circuit 122 is connected to the third modeling unit 200 as shown in FIG. The controller 120 includes a CPU, a ROM, a RAM, and the like, and is mainly a computer, and is connected to a plurality of drive circuits 122. The storage device 124 includes a RAM, a ROM, a hard disk, and the like, and stores a control program 126 that controls the stacking unit forming device 10. The controller 120 can control the operations of the transfer device 20, the first modeling unit 22, the second modeling unit 24, the mounting unit 26, the third modeling unit 200, and the like by executing the control program 126 on the CPU. .. In the following description, the fact that the controller 120 executes the control program 126 to control each device may be simply described as "device". For example, "the controller 120 moves the stage 52" means that "the controller 120 executes the control program 126, controls the operation of the transfer device 20 via the drive circuit 122, and causes the stage by the operation of the transfer device 20." It means "move 52".
(2)3次元積層電子デバイスの製造方法
 本実施形態の積層ユニット形成装置10は、上記した構成によって、回路配線、接続端子、電子部品及びプローブピンなどを含んだ積層ユニットを複数造形し、複数の積層ユニットを組み立てることで3次元積層電子デバイスを製造する。詳述すると、図5は、3次元積層電子デバイスの製造工程の流れを示すフローチャートである。図6~図10は、3次元積層電子デバイスの製造工程を示す断面図である。図11は、3次元積層電子デバイス246の断面図である。尚、図6~図11に示す製造工程や3次元積層電子デバイス246(積層ユニットの数や構造)は、一例である。以下の説明では、一例として、図11に示すように、第1積層ユニット218A、第2積層ユニット218B、第3積層ユニット218Cの3つの積層ユニット218を積み上げた3次元積層電子デバイス246を製造する場合について説明する。
(2) Manufacturing Method of Three-Dimensional Laminated Electronic Device The laminated unit forming apparatus 10 of the present embodiment has a plurality of laminated units including circuit wiring, connection terminals, electronic components, probe pins, etc., according to the above configuration. A three-dimensional laminated electronic device is manufactured by assembling the laminated unit of. More specifically, FIG. 5 is a flowchart showing a flow of a manufacturing process of a three-dimensional laminated electronic device. 6 to 10 are cross-sectional views showing a manufacturing process of a three-dimensional laminated electronic device. FIG. 11 is a cross-sectional view of the three-dimensional laminated electronic device 246. The manufacturing process and the three-dimensional laminated electronic device 246 (number and structure of laminated units) shown in FIGS. 6 to 11 are examples. In the following description, as an example, as shown in FIG. 11, a three-dimensional laminated electronic device 246 in which three laminated units 218 of the first laminated unit 218A, the second laminated unit 218B, and the third laminated unit 218C are stacked is manufactured. The case will be described.
 図5に示すように、3次元積層造形による3次元積層電子デバイス246の製造工程130は、ユニット形成工程P10と、ユニット搭載工程P12とを含んでいる。ユニット形成工程P10では、上記した積層ユニット形成装置10によって、基材70の上に、第1~第3積層ユニット218A,218B,218Cを形成する。これに対して、ユニット搭載工程P12では、第1~第3積層ユニット218A,218B,218Cを上下方向に積み上げて固定することで、3次元積層電子デバイス246(図11参照)を製造する。尚、以下の説明において、第1~第3積層ユニット218A~218Cを区別せずに総称する場合は、積層ユニット218と表記する。 As shown in FIG. 5, the manufacturing process 130 of the three-dimensional laminated electronic device 246 by the three-dimensional laminated modeling includes a unit forming step P10 and a unit mounting step P12. In the unit forming step P10, the first to third laminated units 218A, 218B, and 218C are formed on the base material 70 by the laminated unit forming apparatus 10 described above. On the other hand, in the unit mounting step P12, the three-dimensional laminated electronic device 246 (see FIG. 11) is manufactured by stacking and fixing the first to third laminated units 218A, 218B, and 218C in the vertical direction. In the following description, when the first to third laminated units 218A to 218C are generically referred to without distinction, they are referred to as laminated units 218.
 コントローラ120は、制御プログラム126を実行し積層ユニット形成装置10の各装置を制御することで、ユニット形成工程P10を実行する。ユニット形成工程P10は、絶縁層形成処理S10と、回路配線形成処理S20と、接続端子形成処理S30と、実装処理S40とを有している。尚、上記の各処理S10,S20,S30,S40の実行順序は、3次元積層電子デバイス246(つまり、第1~第3積層ユニット218A~218C)の積層構造等によって決定される。そのため、上記の各処理S10,S20,S30,S40は、それらの表記順で繰り返されるものでない。 The controller 120 executes the control program 126 to control each device of the laminated unit forming device 10 to execute the unit forming step P10. The unit forming step P10 includes an insulating layer forming process S10, a circuit wiring forming process S20, a connection terminal forming process S30, and a mounting process S40. The execution order of each of the above processes S10, S20, S30, and S40 is determined by the laminated structure of the three-dimensional laminated electronic devices 246 (that is, the first to third laminated units 218A to 218C). Therefore, the above processes S10, S20, S30, and S40 are not repeated in their notation order.
 ユーザは、例えば、ステージ52の基台60に基材70をセットし、積層ユニット形成装置10に対して図5に示す製造工程130の開始を指示する。また、図6に示すように、基材70の上には、例えば、熱を加えることによって剥離する剥離フィルム71が貼り付けられている。コントローラ120は、剥離フィルム71の上に各積層ユニット218を形成する。後述するように、この剥離フィルム71を、造形後に加熱することで、各積層ユニット218を基材70から剥離することができる。尚、基材70のステージ52へのセットや剥離フィルム71の基材70への貼り付けは、積層ユニット形成装置10が自動で実行しても良い。例えば、積層ユニット形成装置10は、基材70のセットや剥離フィルム71の貼り付けを行なうロボットアームを備えても良い。また、基材70のセットや剥離フィルム71の貼り付けは、人が手作業で行なっても良い。 For example, the user sets the base material 70 on the base 60 of the stage 52, and instructs the laminated unit forming apparatus 10 to start the manufacturing process 130 shown in FIG. Further, as shown in FIG. 6, for example, a release film 71 that is peeled off by applying heat is attached on the base material 70. The controller 120 forms each laminating unit 218 on the release film 71. As will be described later, each laminating unit 218 can be peeled from the base material 70 by heating the release film 71 after molding. The lamination unit forming apparatus 10 may automatically execute the setting of the base material 70 on the stage 52 and the attachment of the release film 71 to the base material 70. For example, the lamination unit forming apparatus 10 may include a robot arm for setting the base material 70 and attaching the release film 71. Further, the setting of the base material 70 and the attachment of the release film 71 may be performed manually by a person.
 コントローラ120は、図5に示す絶縁層形成処理S10を実行する場合、基材70がセットされたステージ52を第2造形ユニット24の下方に移動させる。図5に示すように、絶縁層形成処理S10は、吐出処理S11、平坦化処理S13、及び硬化処理S15を含んでいる。コントローラ120は、吐出処理S11において、第2造形ユニット24を制御し、インクジェットヘッド88から紫外線硬化樹脂を基材70の上に薄膜状に吐出する。続いて、コントローラ120は、平坦化処理S13において、硬化部86の平坦化装置90を制御し、基材70の上に吐出した紫外線硬化樹脂を、ローラなどにより膜厚が均一となるように平坦化する。続いて、コントローラ120は、硬化処理S15において、硬化部86の照射装置92を制御し、平坦化された紫外線硬化樹脂に紫外線を照射する。これにより、紫外線硬化樹脂が硬化する。コントローラ120は、紫外線硬化樹脂の吐出処理S11、平坦化処理S13、硬化処理S15を繰り返して絶縁層220を基材70上に形成する(図6参照)。 When executing the insulating layer forming process S10 shown in FIG. 5, the controller 120 moves the stage 52 on which the base material 70 is set below the second modeling unit 24. As shown in FIG. 5, the insulating layer forming process S10 includes a discharge process S11, a flattening process S13, and a hardening process S15. The controller 120 controls the second modeling unit 24 in the discharge process S11, and discharges the ultraviolet curable resin from the inkjet head 88 onto the base material 70 in the form of a thin film. Subsequently, the controller 120 controls the flattening device 90 of the curing portion 86 in the flattening process S13, and flattens the ultraviolet curable resin discharged onto the base material 70 so that the film thickness becomes uniform by a roller or the like. To become. Subsequently, the controller 120 controls the irradiation device 92 of the curing portion 86 in the curing process S15, and irradiates the flattened ultraviolet curable resin with ultraviolet rays. As a result, the ultraviolet curable resin is cured. The controller 120 repeats the ultraviolet curable resin discharge treatment S11, the flattening treatment S13, and the curing treatment S15 to form the insulating layer 220 on the base material 70 (see FIG. 6).
 また、コントローラ120は、絶縁層形成処理S10において、電子部品96(図7参照)を収容する収容部222、プローブピン99(図7参照)を挿入するピン挿入孔223を形成する。収容部222は、例えば、下方に向かって絶縁層220を凹ませた凹部である。ピン挿入孔223は、例えば、上下方向に沿って形成された円筒形状の穴である。コントローラ120は、例えば、収容部222やピン挿入孔223の位置に合わせて、インクジェットヘッド88から紫外線硬化樹脂を吐出するのを停止し、絶縁層220に対して凹部や穴を形成して収容部222やピン挿入孔223を形成する。 Further, in the insulating layer forming process S10, the controller 120 forms a housing portion 222 for accommodating the electronic component 96 (see FIG. 7) and a pin insertion hole 223 for inserting the probe pin 99 (see FIG. 7). The accommodating portion 222 is, for example, a recess in which the insulating layer 220 is recessed downward. The pin insertion hole 223 is, for example, a cylindrical hole formed along the vertical direction. The controller 120 stops discharging the ultraviolet curable resin from the inkjet head 88 in accordance with the positions of the accommodating portion 222 and the pin insertion hole 223, and forms recesses and holes in the insulating layer 220 to form the accommodating portion. It forms 222 and a pin insertion hole 223.
 ここで、本実施形態の積層ユニット形成装置10は、軸方向の長さL(図4参照)が異なる複数の種類のプローブピン99を用いることができる。一例として、図11に示すように、軸方向の長さLが異なる2種類のプローブピン211,212を用いる場合について説明する。尚、以下の説明では、2種類のプローブピン211,212を総称する場合は、プローブピン99と記載する。 Here, the stacking unit forming apparatus 10 of the present embodiment can use a plurality of types of probe pins 99 having different axial lengths L (see FIG. 4). As an example, as shown in FIG. 11, a case where two types of probe pins 211 and 122 having different axial lengths L are used will be described. In the following description, when the two types of probe pins 211 and 212 are generically referred to, they are referred to as probe pins 99.
 プローブピン211は、例えば、1つの積層ユニット218の電子回路を、その積層ユニット218の1つ上の(真上の)積層ユニット218や、1つ下の(真下の)積層ユニット218の電子回路と接続するものである。また、プローブピン212は、少なくとも1つ以上の積層ユニット218を間に挟んだ2つの積層ユニット218の電子回路を接続するものである。本実施形態のプローブピン212は、最下層の第1積層ユニット218Aの電子回路と、最上層の第3積層ユニット218Cの電子回路を電気的に接続する。また、中間の第2積層ユニット218Bには、プローブピン212を挿入するための貫通孔が形成される。この貫通孔は、ピン挿入孔223の一部を構成する。以下の説明では、この貫通孔を、貫通孔223Aと称して説明する。コントローラ120は、例えば、絶縁層形成処理S10において、貫通孔223Aの位置に合わせて、インクジェットヘッド88から紫外線硬化樹脂を吐出するのを停止し、剥離フィルム71が露出する貫通孔223Aを絶縁層220に形成する。図11に示す本実施形態の3次元積層電子デバイス246では、プローブピン99が、上下方向(積層方向)に沿った直線LNと平行な方向に延びている。換言すれば、プローブピン99を挿入するピン挿入孔223は、直線LNと平行な方向に沿って形成されている。この直線LNは、例えば、1つのプローブピン99で接続するピン端子227Bと電極パッド227Cを最短で結ぶ線に沿った直線LNである。 The probe pin 211 is, for example, an electronic circuit of one laminated unit 218, one above (directly above) the laminated unit 218, and one below (directly below) the electronic circuit of the laminated unit 218. It connects with. Further, the probe pin 212 connects the electronic circuits of the two laminated units 218 with at least one or more laminated units 218 sandwiched between them. The probe pin 212 of the present embodiment electrically connects the electronic circuit of the first laminated unit 218A in the lowermost layer and the electronic circuit of the third laminated unit 218C in the uppermost layer. Further, a through hole for inserting the probe pin 212 is formed in the second laminated unit 218B in the middle. This through hole forms a part of the pin insertion hole 223. In the following description, this through hole will be referred to as a through hole 223A. For example, in the insulating layer forming process S10, the controller 120 stops ejecting the ultraviolet curable resin from the inkjet head 88 in accordance with the position of the through hole 223A, and the through hole 223A where the release film 71 is exposed is formed in the insulating layer 220. To form. In the three-dimensional stacked electronic device 246 of the present embodiment shown in FIG. 11, the probe pin 99 extends in a direction parallel to the straight line LN along the vertical direction (stacking direction). In other words, the pin insertion hole 223 into which the probe pin 99 is inserted is formed along a direction parallel to the straight line LN. This straight line LN is, for example, a straight line LN along a line connecting the pin terminal 227B connected by one probe pin 99 and the electrode pad 227C at the shortest distance.
 また、コントローラ120は、図5に示す回路配線形成処理S20を実行する場合、ステージ52を第1造形ユニット22の下方に移動させる。コントローラ120は、第1造形ユニット22を制御し、インクジェットヘッド76から導電性インクを絶縁層220の上面などに吐出し、吐出した導電性インクを照射装置78で加熱することで、回路配線225(図6参照)を形成する。 Further, when executing the circuit wiring forming process S20 shown in FIG. 5, the controller 120 moves the stage 52 below the first modeling unit 22. The controller 120 controls the first modeling unit 22, ejects conductive ink from the inkjet head 76 to the upper surface of the insulating layer 220, and heats the ejected conductive ink with the irradiation device 78, thereby causing circuit wiring 225 ( (See FIG. 6).
 また、コントローラ120は、接続端子形成処理S30を実行する場合、ステージ52を第3造形ユニット200の下方に移動させる。コントローラ120は、第3造形ユニット200を制御して、ディスペンサー202から導電性ペーストを、剥離フィルム71の上、絶縁層220の上面、回路配線225の上、収容部222の底部、ピン挿入孔223の底部などに吐出する。コントローラ120は、吐出した導電性ペーストを、第1造形ユニット22の照射装置78で加熱することで、接続端子227(図6参照)を形成する。 Further, when the controller 120 executes the connection terminal forming process S30, the controller 120 moves the stage 52 below the third modeling unit 200. The controller 120 controls the third modeling unit 200 to apply the conductive paste from the dispenser 202 on the release film 71, the upper surface of the insulating layer 220, the circuit wiring 225, the bottom of the accommodating portion 222, and the pin insertion hole 223. Discharge to the bottom of the The controller 120 forms the connection terminal 227 (see FIG. 6) by heating the discharged conductive paste with the irradiation device 78 of the first modeling unit 22.
 例えば、図6に示すように、コントローラ120は、接続端子227として、部品接続端子227A、ピン端子227B、電極パッド227Cを形成する。部品接続端子227Aは、例えば、電子部品96の部品端子96A(図7参照)と接続される接続端子227である。また、ピン端子227Bは、例えば、プローブピン99の下端(図4に示すピン99Bの下端)と接続される接続端子227である。電極パッド227Cは、例えば、各積層ユニット218の電子回路をプローブピン99の上端に接続するためや、3次元積層電子デバイス246を外部機器と接続するための接続端子227である。コントローラ120は、プローブピン99に接続する電極パッド227Cを絶縁層220の下面から露出するように形成する場合、例えば、先に貫通孔を有する絶縁層220を形成しておき、絶縁層220の貫通孔に導電性ペーストを吐出(充填)して下面から露出する電極パッド227Cを形成する。あるいは、コントローラ120は、先に電極パッド227Cを基材70上に形成してから、形成した電極パッド227Cの周りを絶縁層220で埋めても良い。各接続端子227は、回路配線225によって電気的に接続され、電子回路を構成している。 For example, as shown in FIG. 6, the controller 120 forms a component connection terminal 227A, a pin terminal 227B, and an electrode pad 227C as a connection terminal 227. The component connection terminal 227A is, for example, a connection terminal 227 connected to the component terminal 96A (see FIG. 7) of the electronic component 96. Further, the pin terminal 227B is, for example, a connection terminal 227 connected to the lower end of the probe pin 99 (the lower end of the pin 99B shown in FIG. 4). The electrode pad 227C is, for example, a connection terminal 227 for connecting the electronic circuit of each laminated unit 218 to the upper end of the probe pin 99 and for connecting the three-dimensional laminated electronic device 246 to an external device. When the controller 120 is formed so that the electrode pad 227C connected to the probe pin 99 is exposed from the lower surface of the insulating layer 220, for example, the insulating layer 220 having a through hole is formed first, and the insulating layer 220 is penetrated. A conductive paste is discharged (filled) into the holes to form an electrode pad 227C exposed from the lower surface. Alternatively, the controller 120 may first form the electrode pad 227C on the base material 70, and then fill the periphery of the formed electrode pad 227C with the insulating layer 220. Each connection terminal 227 is electrically connected by a circuit wiring 225 to form an electronic circuit.
 コントローラ120は、上記した絶縁層形成処理S10で形成する絶縁層220、回路配線形成処理S20で形成する回路配線225、接続端子形成処理S30で形成する接続端子227のそれぞれの形状、位置、数等を適宜変更して第1~第3積層ユニット218A~218Cを基材70(剥離フィルム71)上にまとめて造形する。尚、コントローラ120は、第1~第3積層ユニット218A~218Cをまとめて基材70上に形成しなくとも良い。また、コントローラ120は、4つ以上の積層ユニット218をまとめて基材70上に形成しても良い。 The controller 120 has the shape, position, number, etc. of the insulating layer 220 formed by the insulating layer forming process S10, the circuit wiring 225 formed by the circuit wiring forming process S20, and the connecting terminals 227 formed by the connecting terminal forming process S30. The first to third laminated units 218A to 218C are collectively modeled on the base material 70 (release film 71) by appropriately changing the above. The controller 120 does not have to form the first to third laminated units 218A to 218C together on the base material 70. Further, the controller 120 may form four or more laminated units 218 together on the base material 70.
 また、コントローラ120は、積層ユニット218を造形する過程で、実装処理S40を適宜実行する。図7に示すように、コントローラ120は、装着ユニット26を制御して、電子部品96を収容部222に配置する。また、コントローラ120は、装着ユニット26を制御して、プローブピン211をピン挿入孔223内に配置する。本実施形態では、後述するように、軸方向に長いプローブピン212については、最下層の第1積層ユニット218Aの上に第2積層ユニット218Bを積層してから挿入する(図9参照)。このため、図7に示す積み上げ前の段階では、コントローラ120は、プローブピン212を配置しない。 Further, the controller 120 appropriately executes the mounting process S40 in the process of modeling the laminated unit 218. As shown in FIG. 7, the controller 120 controls the mounting unit 26 to arrange the electronic component 96 in the accommodating portion 222. Further, the controller 120 controls the mounting unit 26 to arrange the probe pin 211 in the pin insertion hole 223. In the present embodiment, as will be described later, the probe pin 212 which is long in the axial direction is inserted after laminating the second laminating unit 218B on the first laminating unit 218A of the lowermost layer (see FIG. 9). Therefore, in the stage before stacking shown in FIG. 7, the controller 120 does not arrange the probe pin 212.
 制御プログラム126には、例えば、3次元積層電子デバイス246(各積層ユニット218)をスライスした各層の三次元のデータが設定されている。コントローラ120は、制御プログラム126のデータに基づいて、回路配線形成処理S20等の各製造工程を実行し積層ユニット218を形成する。また、コントローラ120は、制御プログラム126のデータに基づいて、電子部品96やプローブピン99(図7の段階ではプローブピン211のみ)を配置する層や位置等の情報を検出し、検出した情報に基づいて電子部品96やプローブピン99を各積層ユニット218に配置する。 In the control program 126, for example, three-dimensional data of each layer obtained by slicing the three-dimensional laminated electronic device 246 (each laminated unit 218) is set. Based on the data of the control program 126, the controller 120 executes each manufacturing process such as the circuit wiring forming process S20 to form the stacking unit 218. Further, the controller 120 detects information such as a layer and a position where the electronic component 96 and the probe pin 99 (only the probe pin 211 at the stage of FIG. 7) are arranged based on the data of the control program 126, and uses the detected information as the detected information. Based on this, the electronic component 96 and the probe pin 99 are arranged in each stacking unit 218.
 コントローラ120は、例えば、第3造形ユニット200を制御して導電性ペーストを吐出した後、装着ユニット26を制御して電子部品96の部品端子96Aが導電性ペーストに接触するように、電子部品96を収容部222に配置する。コントローラ120は、電子部品96を配置した後、導電性ペーストを硬化することで部品接続端子227Aと部品端子96Aを接続し、絶縁層220に対して電子部品96を固定する。尚、コントローラ120は、電子部品96を配置した後に、電子部品96の部品端子96Aの上に導電性ペーストを吐出して硬化し部品接続端子227Aを形成しても良い。 For example, the controller 120 controls the third modeling unit 200 to discharge the conductive paste, and then controls the mounting unit 26 so that the component terminals 96A of the electronic component 96 come into contact with the conductive paste. Is arranged in the accommodating portion 222. After arranging the electronic component 96, the controller 120 connects the component connection terminal 227A and the component terminal 96A by curing the conductive paste, and fixes the electronic component 96 to the insulating layer 220. After arranging the electronic component 96, the controller 120 may discharge the conductive paste onto the component terminal 96A of the electronic component 96 and cure the component connection terminal 227A.
 また、図7に示すように、コントローラ120は、例えば、第3造形ユニット200を制御して、ピン挿入孔223の底部に導電性ペーストを吐出する。コントローラ120は、第1造形ユニット22の照射装置78により導電性ペーストを硬化することで、ピン挿入孔223の底部にピン端子227Bを形成する。コントローラ120は、装着ユニット26を制御し、プローブピン211の下端が硬化したピン端子227Bに接触するように、プローブピン211をピン挿入孔223内に配置する。このようにして所望の構造の各積層ユニット218を3次元積層造形により造形する。 Further, as shown in FIG. 7, the controller 120 controls, for example, the third modeling unit 200 to discharge the conductive paste to the bottom of the pin insertion hole 223. The controller 120 forms the pin terminal 227B at the bottom of the pin insertion hole 223 by curing the conductive paste with the irradiation device 78 of the first modeling unit 22. The controller 120 controls the mounting unit 26 and arranges the probe pin 211 in the pin insertion hole 223 so that the lower end of the probe pin 211 comes into contact with the hardened pin terminal 227B. In this way, each laminated unit 218 having a desired structure is modeled by three-dimensional laminated modeling.
 次に、コントローラ120は、ユニット搭載工程P12において、上記した積層ユニット218の組み立てを行なう。コントローラ120は、基材70上の剥離フィルム71を加熱し、剥離フィルム71(基材70)と各積層ユニット218とを分離する。積層ユニット形成装置10は、例えば、電気炉(図示略)を備え、基材70を電気炉内に入れて剥離フィルム71を加熱して各積層ユニット218を基材70(剥離フィルム71)から分離する。尚、剥離フィルム71を加熱する方法は、電気炉を用いる方法に限らない。例えば、積層ユニット形成装置10は、ヒータから基材70に熱を加えて基材70を温めることで、剥離フィルム71を剥離しても良い。また、基材70と積層ユニット218の分離方法は、剥離フィルム71を用いる方法に限らない。例えば、基材70と積層ユニット218との間に、熱によって溶ける部材(サポート材など)を配置し、その部材を溶かして分離しても良い。また、基材70と、積層ユニット218との分離は、積層ユニット形成装置10が自動で(ロボットアーム等で)実施しても良く、人が手作業で行なっても良い。また、基材70の上に剥離フィルム71を貼り付けずに、基材70の上に積層ユニット218を直接造形しても良い。 Next, the controller 120 assembles the above-mentioned laminated unit 218 in the unit mounting process P12. The controller 120 heats the release film 71 on the base material 70 to separate the release film 71 (base material 70) from each laminating unit 218. The lamination unit forming apparatus 10 includes, for example, an electric furnace (not shown), puts the base material 70 in the electric furnace, heats the release film 71, and separates each laminate unit 218 from the base material 70 (release film 71). To do. The method of heating the release film 71 is not limited to the method of using an electric furnace. For example, the laminated unit forming apparatus 10 may peel off the release film 71 by applying heat from the heater to the base material 70 to heat the base material 70. Further, the method for separating the base material 70 and the laminating unit 218 is not limited to the method using the release film 71. For example, a member (support material or the like) that melts by heat may be arranged between the base material 70 and the laminating unit 218, and the member may be melted and separated. Further, the base material 70 and the laminating unit 218 may be separated automatically by the laminating unit forming device 10 (with a robot arm or the like), or may be manually performed by a person. Further, the laminated unit 218 may be directly formed on the base material 70 without sticking the release film 71 on the base material 70.
 図8に示すように、ユニット搭載工程P12において、最下層の第1積層ユニット218Aの上に、中間の第2積層ユニット218Bを搭載し、第1積層ユニット218Aに対して第2積層ユニット218Bを固定する。また、第2積層ユニット218Bの上に、最上層の第3積層ユニット218Cを搭載し、第2積層ユニット218Bに対して第3積層ユニット218Cを固定する。 As shown in FIG. 8, in the unit mounting step P12, the intermediate second laminated unit 218B is mounted on the first laminated unit 218A in the lowermost layer, and the second laminated unit 218B is mounted on the first laminated unit 218A. Fix it. Further, the third laminated unit 218C of the uppermost layer is mounted on the second laminated unit 218B, and the third laminated unit 218C is fixed to the second laminated unit 218B.
 複数の積層ユニット218を互いに固定する方法は、特に限定されないが、ネジ、ボルト、ナット等を用いる方法や、接着剤を用いる方法を採用できる。複数の積層ユニット218を組み立てる作業は、積層ユニット形成装置10が自動で実行しても良い。例えば、積層ユニット形成装置10は、複数の積層ユニット218を組み立てて互いに固定するためのロボットアームを備えても良い。積層ユニット形成装置10は、ロボットアームを用いて剥離フィルム71から剥離した第1~第3積層ユニット218A~218Cを、作業台に退避させる。積層ユニット形成装置10は、ロボットアームにより、基材70から剥離フィルム71を剥離し、基材70の上に第1積層ユニット218Aを載置する。そして、積層ユニット形成装置10は、図8に示すように、第1積層ユニット218Aの上に、第2積層ユニット218Bを搭載し、ネジ等で2つの積層ユニット218を固定する。あるいは、複数の積層ユニット218を組み立てる作業は、人が手作業で行なっても良い。以降の図9、図10の組み立て作業についても同様である。以下の説明では、積層ユニット形成装置10が、自動で実行する場合について説明する。 The method of fixing the plurality of laminated units 218 to each other is not particularly limited, but a method using screws, bolts, nuts, etc., or a method using an adhesive can be adopted. The work of assembling the plurality of laminated units 218 may be automatically executed by the laminated unit forming apparatus 10. For example, the stacking unit forming device 10 may include a robot arm for assembling a plurality of stacking units 218 and fixing them to each other. The stacking unit forming device 10 retracts the first to third laminated units 218A to 218C peeled from the peeling film 71 using a robot arm to a workbench. The stacking unit forming device 10 peels the release film 71 from the base material 70 by a robot arm, and places the first stacking unit 218A on the base material 70. Then, as shown in FIG. 8, the stacking unit forming device 10 mounts the second stacking unit 218B on the first stacking unit 218A, and fixes the two stacking units 218 with screws or the like. Alternatively, the work of assembling the plurality of laminated units 218 may be performed manually by a person. The same applies to the subsequent assembly operations of FIGS. 9 and 10. In the following description, a case where the stacking unit forming device 10 is automatically executed will be described.
 図8及び図9に示すように、コントローラ120は、第1積層ユニット218Aのピン挿入孔223と、第2積層ユニット218Bの貫通孔223Aの位置を合わせて、第1積層ユニット218Aの上に、第2積層ユニット218Bを搭載する。第1積層ユニット218Aの上に第2積層ユニット218Bを搭載することで、2つの積層ユニット218のピン挿入孔223は、上下方向(積層方向)に延びる穴を構成する。図9に示すように、コントローラ120は、装着ユニット26を制御し、プローブピン212を第2積層ユニット218Bの貫通孔223Aの上端の開口から挿入する。この際に、第2積層ユニット218Bが、第1積層ユニット218Aに対して固定されていることで、2つの積層ユニット218のピン挿入孔223の位置ズレが抑制され、プローブピン212の挿入が容易となる。尚、コントローラ120は、第2積層ユニット218Bを第1積層ユニット218Aに対して固定する前に、プローブピン212を挿入しても良い。例えば、コントローラ120は、第1積層ユニット218Aに第2積層ユニット218Bを搭載した後、ネジで固定する作業を行なう前に、プローブピン212をピン挿入孔223に挿入する。コントローラ120は、プローブピン212を挿入した後、2つの積層ユニット218を互いに固定しても良い。 As shown in FIGS. 8 and 9, the controller 120 aligns the pin insertion hole 223 of the first stacking unit 218A with the through hole 223A of the second stacking unit 218B on the first stacking unit 218A. The second laminated unit 218B is mounted. By mounting the second stacking unit 218B on the first stacking unit 218A, the pin insertion holes 223 of the two stacking units 218 form holes extending in the vertical direction (stacking direction). As shown in FIG. 9, the controller 120 controls the mounting unit 26 and inserts the probe pin 212 through the opening at the upper end of the through hole 223A of the second stacking unit 218B. At this time, since the second stacking unit 218B is fixed to the first stacking unit 218A, the misalignment of the pin insertion holes 223 of the two stacking units 218 is suppressed, and the probe pin 212 can be easily inserted. It becomes. The controller 120 may insert the probe pin 212 before fixing the second stacking unit 218B to the first stacking unit 218A. For example, the controller 120 inserts the probe pin 212 into the pin insertion hole 223 after mounting the second stacking unit 218B on the first stacking unit 218A and before performing the work of fixing with screws. The controller 120 may fix the two stacking units 218 to each other after inserting the probe pin 212.
 コントローラ120は、貫通孔223Aに挿入したプローブピン212の下端を、第1積層ユニット218Aのピン挿入孔223の底部に形成されたピン端子227Bに接触するように、プローブピン212をピン挿入孔223内に配置する。尚、上記した組み立てる順番は、一例である。例えば、図12に示すように、コントローラ120は、プローブピン212を先に第1積層ユニット218Aに配置した後、プローブピン212を有する第1積層ユニット218Aに第2積層ユニット218Bを搭載しても良い。この場合、コントローラ120は、プローブピン212を第1積層ユニット218Aに対して固定しても良い。例えば、コントローラ120は、硬化前のピン端子227B(導電性ペースト)にプローブピン212の下端を接触させ、ピン端子227Bの硬化によりプローブピン212を第1積層ユニット218Aに対して固定しても良い。あるいは、コントローラ120は、ピン挿入孔223にプローブピン212を挿入した後、ピン挿入孔223内に紫外線硬化樹脂を充填してプローブピン212の下部を第1積層ユニット218Aに埋設して固定しても良い。 The controller 120 inserts the probe pin 212 into the pin insertion hole 223 so that the lower end of the probe pin 212 inserted into the through hole 223A comes into contact with the pin terminal 227B formed at the bottom of the pin insertion hole 223 of the first stacking unit 218A. Place inside. The assembly order described above is an example. For example, as shown in FIG. 12, the controller 120 may mount the second stacking unit 218B on the first stacking unit 218A having the probe pin 212 after the probe pin 212 is first arranged on the first stacking unit 218A. good. In this case, the controller 120 may fix the probe pin 212 to the first stacking unit 218A. For example, the controller 120 may bring the lower end of the probe pin 212 into contact with the pin terminal 227B (conductive paste) before curing, and fix the probe pin 212 to the first stacking unit 218A by curing the pin terminal 227B. .. Alternatively, the controller 120 inserts the probe pin 212 into the pin insertion hole 223, fills the pin insertion hole 223 with an ultraviolet curable resin, and embeds and fixes the lower portion of the probe pin 212 in the first lamination unit 218A. Is also good.
 従って、本実施形態の製造工程130では、図8及び図9に示す工程(本開示の第1搭載工程の一例)において、第1積層ユニット218Aの上に第2積層ユニット218Bを搭載した後、第2積層ユニット218Bを第1積層ユニット218Aに対して固定し、第1積層ユニット218Aに対して固定した第2積層ユニット218Bの貫通孔223Aにプローブピン212を挿入する。これによれば、第2積層ユニット218Bを第1積層ユニット218Aに搭載して固定した後に、プローブピン212の挿入を行なう。これにより、第1積層ユニット218Aに対する第2積層ユニット218Bの位置ズレ、即ち、ピン端子227Bに対する貫通孔223Aの位置ズレを抑制して、プローブピン212を貫通孔223Aに挿入しピン端子227Bに接続することができ、プローブピン212の挿入作業を容易に行なうことができる。 Therefore, in the manufacturing process 130 of the present embodiment, after mounting the second stacking unit 218B on the first stacking unit 218A in the steps shown in FIGS. 8 and 9 (an example of the first mounting step of the present disclosure), The second laminated unit 218B is fixed to the first laminated unit 218A, and the probe pin 212 is inserted into the through hole 223A of the second laminated unit 218B fixed to the first laminated unit 218A. According to this, the probe pin 212 is inserted after the second laminated unit 218B is mounted and fixed on the first laminated unit 218A. As a result, the positional deviation of the second laminated unit 218B with respect to the first laminated unit 218A, that is, the positional deviation of the through hole 223A with respect to the pin terminal 227B is suppressed, and the probe pin 212 is inserted into the through hole 223A and connected to the pin terminal 227B. The probe pin 212 can be easily inserted.
 次に、コントローラ120は、図10に示すように、第2積層ユニット218Bの上に第3積層ユニット218Cを搭載し、第3積層ユニット218Cを第2積層ユニット218Bに対して固定する。コントローラ120は、第3積層ユニット218Cの下面から露出する電極パッド227Cの位置と、プローブピン212の上端の位置とを合わせて第3積層ユニット218Cの搭載を行なう。コントローラ120は、ネジ等により第3積層ユニット218Cを、第2積層ユニット218Bに固定する。これにより、図11に示す所望の構造を有する3次元積層電子デバイス246を製造することができる。尚、コントローラ120は、例えば、第1~第3積層ユニット218A~218Cを、1本の長いネジによってまとめて固定しても良い。この場合、コントローラ120は、第1~第3積層ユニット218A~218Cの固定作業を、製造工程130の最後に実施しても良い。 Next, as shown in FIG. 10, the controller 120 mounts the third laminated unit 218C on the second laminated unit 218B, and fixes the third laminated unit 218C to the second laminated unit 218B. The controller 120 mounts the third laminated unit 218C by aligning the position of the electrode pad 227C exposed from the lower surface of the third laminated unit 218C with the position of the upper end of the probe pin 212. The controller 120 fixes the third laminated unit 218C to the second laminated unit 218B with screws or the like. As a result, the three-dimensional laminated electronic device 246 having the desired structure shown in FIG. 11 can be manufactured. The controller 120 may, for example, fix the first to third laminated units 218A to 218C together with one long screw. In this case, the controller 120 may carry out the fixing work of the first to third laminated units 218A to 218C at the end of the manufacturing process 130.
 ここで、本実施形態のプローブピン99は、上記したように、軸方向にストローク可能となっている(図4参照)。図10に示す搭載工程を行なう際に、プローブピン99(プローブピン211,212)は、下方のピン端子227Bと、上方の電極パッド227Cとで上下方向(積層方向)に挟まれる。この際に、プローブピン99は、上の積層ユニット218と、下の積層ユニット218との間の距離に応じてストローク量SA(図4参照)を変動させ収縮する。プローブピン99は、上の積層ユニット218と、下の積層ユニット218との間の距離が縮むほど、より収縮する。これにより、3次元積層造形による積層ユニット218の厚みの誤差などを、プローブピン99のストローク量SAで吸収することができる。 Here, the probe pin 99 of the present embodiment can be stroked in the axial direction as described above (see FIG. 4). When the mounting process shown in FIG. 10 is performed, the probe pins 99 (probe pins 211 and 212) are sandwiched between the lower pin terminals 227B and the upper electrode pads 227C in the vertical direction (stacking direction). At this time, the probe pin 99 contracts by varying the stroke amount SA (see FIG. 4) according to the distance between the upper laminated unit 218 and the lower laminated unit 218. The probe pin 99 contracts more as the distance between the upper stacking unit 218 and the lower stacking unit 218 decreases. As a result, an error in the thickness of the lamination unit 218 due to the three-dimensional lamination modeling can be absorbed by the stroke amount SA of the probe pin 99.
 従って、本実施形態のプローブピン212は、外力に応じてストローク可能に構成されている。図10に示す搭載工程(本開示の第2搭載工程の一例)において、第1積層ユニット218Aのピン端子227Bと、第3積層ユニット218Cの電極パッド227Cとでプローブピン212を挟み、第1積層ユニット218Aと第3積層ユニット218Cとの間の距離に応じてプローブピン212のストローク量SAを変化させる。これによれば、第2積層ユニット218Bに第3積層ユニット218Cを搭載する際に、プローブピン212をストロークの方向に収縮させ、プローブピン212をピン端子227Bと電極パッド227Cに接続しつつ、第3積層ユニット218Cを第2積層ユニット218Bに接触させて固定することができる。これにより、3次元積層造形によって生じる第2積層ユニット218Bの厚みの誤差、接続端子227の厚みの誤差などをプローブピン212のストローク量SAで吸収することができ、接触不良を減らすことで歩留まりを改善することができる。 Therefore, the probe pin 212 of the present embodiment is configured to be able to stroke according to an external force. In the mounting process shown in FIG. 10 (an example of the second mounting process of the present disclosure), the probe pin 212 is sandwiched between the pin terminal 227B of the first stacking unit 218A and the electrode pad 227C of the third stacking unit 218C, and the first stacking is performed. The stroke amount SA of the probe pin 212 is changed according to the distance between the unit 218A and the third laminated unit 218C. According to this, when the third laminated unit 218C is mounted on the second laminated unit 218B, the probe pin 212 is contracted in the stroke direction, and the probe pin 212 is connected to the pin terminal 227B and the electrode pad 227C while being connected to the second layer. 3 The laminated unit 218C can be brought into contact with the second laminated unit 218B and fixed. As a result, an error in the thickness of the second laminated unit 218B and an error in the thickness of the connection terminal 227 caused by the three-dimensional laminated molding can be absorbed by the stroke amount SA of the probe pin 212, and the yield can be reduced by reducing the contact failure. Can be improved.
 また、ユニット形成工程P10の絶縁層形成処理S10は、紫外線硬化樹脂(本開示の硬化性粘性流体の一例)を吐出する吐出処理S11と、吐出処理S11により吐出した紫外線硬化樹脂を、平坦化装置90により平坦化する平坦化処理S13と、平坦化処理S13により平坦化した紫外線硬化樹脂を硬化する硬化処理S15と、を含む。コントローラ120は、吐出処理S11、平坦化処理S13、硬化処理S15を繰り返し実行し、第2積層ユニット218Bの絶縁層220を形成する。そして、本実施形態では、平坦化処理S13によって第2積層ユニット218Bの絶縁層220に生じる厚みの誤差が、プローブピン212のストローク量SA以下となっている。 Further, the insulating layer forming treatment S10 in the unit forming step P10 is a flattening apparatus for the discharge treatment S11 for discharging the ultraviolet curable resin (an example of the curable viscous fluid of the present disclosure) and the ultraviolet curable resin discharged by the discharge process S11. The flattening treatment S13 for flattening by 90 and the curing treatment S15 for curing the ultraviolet curable resin flattened by the flattening treatment S13 are included. The controller 120 repeatedly executes the discharge process S11, the flattening process S13, and the curing process S15 to form the insulating layer 220 of the second laminated unit 218B. In the present embodiment, the thickness error caused in the insulating layer 220 of the second laminated unit 218B by the flattening process S13 is equal to or less than the stroke amount SA of the probe pin 212.
 3次元積層造形における平坦化では、平坦化の方法などによって造形物の厚みに誤差が生じる。平坦化による第2積層ユニット218Bの厚み(図11における積層方向の厚み)の誤差、例えば、上面に形成される凹凸の高低差が、プローブピン212のストローク量SAを上回ると、プローブピン212が過剰に突出する、あるいはプローブピン212が電極パッド227Cに届かない可能性がある。そこで、コントローラ120は、制御プログラム126に基づいて、平坦化による第2積層ユニット218Bの厚みの誤差をプローブピン212のストローク量SA以下に制御することで、プローブピン212の接触不良をより確実に減らすことができる。例えば、試験的に製造した第2積層ユニット218Bを実測した値(厚み)と、理論値との誤差を測定しておき、厚みの誤差がストローク量SA以下となるように、平坦化処理S13の回数、頻度、平坦化装置90から第2積層ユニット218Bに加える荷重、ローラやスキージが第2積層ユニット218Bを均す速度などを調整しても良い。あるいは、実測した厚みの誤差以上となるストローク量SAを有するプローブピン212を採用しても良い。 In flattening in 3D laminated modeling, an error occurs in the thickness of the modeled object depending on the flattening method. When the error in the thickness of the second stacking unit 218B (thickness in the stacking direction in FIG. 11) due to flattening, for example, the height difference of the unevenness formed on the upper surface exceeds the stroke amount SA of the probe pin 212, the probe pin 212 It may protrude excessively or the probe pin 212 may not reach the electrode pad 227C. Therefore, the controller 120 controls the error in the thickness of the second laminated unit 218B due to flattening to be equal to or less than the stroke amount SA of the probe pin 212 based on the control program 126, so that the contact failure of the probe pin 212 is more reliably performed. Can be reduced. For example, the error between the measured value (thickness) of the second laminated unit 218B manufactured on a trial basis and the theoretical value is measured, and the flattening process S13 is performed so that the thickness error is the stroke amount SA or less. The number of times, the frequency, the load applied from the flattening device 90 to the second laminated unit 218B, the speed at which the rollers and squeegees level the second laminated unit 218B, and the like may be adjusted. Alternatively, a probe pin 212 having a stroke amount SA that is equal to or greater than the measured thickness error may be adopted.
 また、本実施形態の製造工程130では、ユニット形成工程P10(本開示の第3積層ユニット形成工程の一例)の接続端子形成処理S30において、第2積層ユニット218Bの上に第3積層ユニット218Cを搭載した場合に、ピン端子227Bの上方となる位置に電極パッド227Cを形成する(図11参照)。また、ユニット形成工程P10(本開示の第2積層ユニット形成工程の一例)の絶縁層形成処理S10において、第2積層ユニット218Bの上に第3積層ユニット218Cを搭載した場合にピン端子227Bと電極パッド227Cを結ぶ直線LN(図11参照)に沿って、貫通孔223Aを第2積層ユニット218Bに形成する。これによれば、第1積層ユニット218Aのピン端子227Bと、第3積層ユニット218Cの電極パッド227Cとを、上下方向に沿って一直線上に配置し、その直線LNに沿って貫通孔223Aを第2積層ユニット218Bに形成する。これにより、プローブピン212により、ピン端子227Bと電極パッド227Cを最短距離で接続することができ、プローブピン212の長さを短くして電気的抵抗値を減らすことができる。また、3次元積層電子デバイス246の小型化を図ることができる。 Further, in the manufacturing process 130 of the present embodiment, in the connection terminal forming process S30 of the unit forming step P10 (an example of the third laminated unit forming step of the present disclosure), the third laminated unit 218C is placed on the second laminated unit 218B. When mounted, the electrode pad 227C is formed at a position above the pin terminal 227B (see FIG. 11). Further, in the insulating layer forming process S10 of the unit forming step P10 (an example of the second laminated unit forming step of the present disclosure), when the third laminated unit 218C is mounted on the second laminated unit 218B, the pin terminal 227B and the electrode A through hole 223A is formed in the second stacking unit 218B along a straight line LN (see FIG. 11) connecting the pads 227C. According to this, the pin terminal 227B of the first laminated unit 218A and the electrode pad 227C of the third laminated unit 218C are arranged in a straight line along the vertical direction, and the through hole 223A is formed along the straight line LN. 2 Formed in the laminated unit 218B. As a result, the pin terminal 227B and the electrode pad 227C can be connected by the probe pin 212 at the shortest distance, and the length of the probe pin 212 can be shortened to reduce the electrical resistance value. Further, the size of the three-dimensional laminated electronic device 246 can be reduced.
 (3)まとめ
 以上詳細に説明したように、本実施形態の製造工程130では、ユニット形成工程P10において、ピン端子227Bが形成された第1積層ユニット218Aを形成する。また、ユニット形成工程P10において、貫通孔223Aが形成された第2積層ユニット218Bを形成する。図8及び図9に示す第1搭載工程では、第1積層ユニット218Aの上に第2積層ユニット218Bを搭載した後に、貫通孔223Aにプローブピン212を挿入してプローブピン212の下部をピン端子227Bに接続する。また、図12に示す別例の第1搭載工程では、プローブピン212の下部をピン端子227Bに接続した後に、貫通孔223Aにプローブピン212を挿入しつつ第1積層ユニット218Aの上に第2積層ユニット218Bを搭載する。また、ユニット形成工程P10では、電極パッド227Cが形成された第3積層ユニット218Cを形成する。そして、図10に示す第2搭載工程では、第2積層ユニット218Bの上に第3積層ユニット218Cを搭載し、プローブピン212の上部に電極パッド227Cを接続する。
(3) Summary As described in detail above, in the manufacturing process 130 of the present embodiment, the first laminated unit 218A in which the pin terminal 227B is formed is formed in the unit forming step P10. Further, in the unit forming step P10, the second laminated unit 218B in which the through hole 223A is formed is formed. In the first mounting process shown in FIGS. 8 and 9, after mounting the second stacking unit 218B on the first stacking unit 218A, the probe pin 212 is inserted into the through hole 223A and the lower portion of the probe pin 212 is pin-terminaled. Connect to 227B. Further, in the first mounting step of another example shown in FIG. 12, after connecting the lower part of the probe pin 212 to the pin terminal 227B, the probe pin 212 is inserted into the through hole 223A and the second is placed on the first stacking unit 218A. The stacking unit 218B is mounted. Further, in the unit forming step P10, the third laminated unit 218C in which the electrode pad 227C is formed is formed. Then, in the second mounting step shown in FIG. 10, the third stacking unit 218C is mounted on the second stacking unit 218B, and the electrode pad 227C is connected to the upper part of the probe pin 212.
 これによれば、第1積層ユニット218Aと第3積層ユニット218Cとの間に挟まれる第2積層ユニット218Bに貫通孔223Aを形成し、その貫通孔223Aに長いプローブピン212を挿入する。そして、貫通孔223Aに挿入したプローブピン212により、第1積層ユニット218Aのピン端子227Bと第3積層ユニット218Cの電極パッド227Cを接続する。これにより、中間の第2積層ユニット218Bに、第1及び第3積層ユニット218A,218Cを接続するための接続端子や配線などの中継用の電子回路を形成する必要がなくなり、3次元積層電子デバイス246を製造する製造コストを低減することができる。 According to this, a through hole 223A is formed in the second stacking unit 218B sandwiched between the first stacking unit 218A and the third stacking unit 218C, and a long probe pin 212 is inserted into the through hole 223A. Then, the pin terminal 227B of the first stacking unit 218A and the electrode pad 227C of the third stacking unit 218C are connected by the probe pin 212 inserted into the through hole 223A. This eliminates the need to form relay electronic circuits such as connection terminals and wiring for connecting the first and third laminated units 218A and 218C to the intermediate second laminated unit 218B, and is a three-dimensional laminated electronic device. The manufacturing cost for manufacturing 246 can be reduced.
 ここで、図13は、比較例の3次元積層電子デバイス246Aの断面図を示している。図13に示す3次元積層電子デバイス246Aは、第2積層ユニット218Bを貫通するプローブピン212を用いずに、第1積層ユニット218Aの短いプローブピン211と、第2積層ユニット218Bの短いプローブピン211とを用いて、第1積層ユニット218Aの電子回路と第3積層ユニット218Cの電子回路を接続している。このような構成の3次元積層電子デバイス246Aでは、第2積層ユニット218B内に、第1積層ユニット218Aと第3積層ユニット218Cを接続するためのプローブピン211、回路配線225、接続端子227などを設ける必要が生じる。このため、製造コストの増加、3次元積層電子デバイス246Aのデザインに対する制限の増加、プローブピン211の接触点の増加による接続抵抗の増加などを招く虞がある。 Here, FIG. 13 shows a cross-sectional view of the three-dimensional laminated electronic device 246A of the comparative example. The three-dimensional laminated electronic device 246A shown in FIG. 13 does not use the probe pin 212 penetrating the second laminated unit 218B, but has a short probe pin 211 of the first laminated unit 218A and a short probe pin 211 of the second laminated unit 218B. The electronic circuit of the first laminated unit 218A and the electronic circuit of the third laminated unit 218C are connected by using and. In the three-dimensional laminated electronic device 246A having such a configuration, a probe pin 211 for connecting the first laminated unit 218A and the third laminated unit 218C, a circuit wiring 225, a connection terminal 227, and the like are provided in the second laminated unit 218B. It will be necessary to provide it. For this reason, there is a risk that the manufacturing cost will increase, the restrictions on the design of the three-dimensional laminated electronic device 246A will increase, and the connection resistance will increase due to the increase in the contact points of the probe pins 211.
 これに対し、本実施形態の3次元積層電子デバイス246では、第1積層ユニット218Aと第2積層ユニット218B、及び第2積層ユニット218Bと第3積層ユニット218Cをプローブピン211で接続する必要がなくなり、プローブピン211と接続端子227との接触点の数を減らすことができる。従って、接触抵抗の低減や、接触不良を減らすことで歩留まりを改善することができる。さらに、第2積層ユニット218Bの回路配線225や接続端子227を減らし、貫通孔223Aに挿入したプローブピン212により第1及び第3積層ユニット218A,218Cを直接接続することで、3次元積層電子デバイス246の構造の簡略化や小型化を図ることが可能となる。 On the other hand, in the three-dimensional laminated electronic device 246 of the present embodiment, it is not necessary to connect the first laminated unit 218A and the second laminated unit 218B, and the second laminated unit 218B and the third laminated unit 218C with the probe pin 211. , The number of contact points between the probe pin 211 and the connection terminal 227 can be reduced. Therefore, the yield can be improved by reducing the contact resistance and the poor contact. Further, by reducing the circuit wiring 225 and the connection terminal 227 of the second laminated unit 218B and directly connecting the first and third laminated units 218A and 218C with the probe pin 212 inserted into the through hole 223A, the three-dimensional laminated electronic device It is possible to simplify and reduce the size of the structure of 246.
 因みに、本実施形態において、ピン端子227Bは、第1接続端子の一例である。電極パッド227Cは、第2接続端子の一例である。図8及び図9に示す工程は、第1搭載工程の一例である。図12に示す工程は、第1搭載工程の一例である。図10に示す工程は、第2搭載工程の一例である。ユニット形成工程P10は、第1積層ユニット形成工程、第2積層ユニット形成工程、第3積層ユニット形成工程の一例である。絶縁層形成処理S10は、第2積層ユニット形成工程の一例である。吐出処理S11は、吐出工程の一例である。平坦化処理S13は、平坦化工程の一例である。硬化処理S15は、硬化工程の一例である。接続端子形成処理S30は、接続端子形成工程の一例である。 Incidentally, in the present embodiment, the pin terminal 227B is an example of the first connection terminal. The electrode pad 227C is an example of the second connection terminal. The process shown in FIGS. 8 and 9 is an example of the first mounting process. The process shown in FIG. 12 is an example of the first mounting process. The process shown in FIG. 10 is an example of the second mounting process. The unit forming step P10 is an example of a first laminated unit forming step, a second laminated unit forming step, and a third laminated unit forming step. The insulating layer forming process S10 is an example of the second laminated unit forming step. The discharge process S11 is an example of a discharge process. The flattening process S13 is an example of a flattening step. The curing treatment S15 is an example of a curing step. The connection terminal forming process S30 is an example of the connection terminal forming step.
(4)変更例
 尚、本開示は上記実施形態に限定されるものでなく、その趣旨を逸脱しない範囲で様々な変更が可能である。
 例えば、上記実施形態では、プローブピン99を、ピン挿入孔223内に設けたが、ピン端子227Bを積層ユニット218の表面に形成し、そのピン端子227Bに接続した状態で積層ユニット218の表面にプローブピン99を固定しても良い。
 また、絶縁層220を構成する樹脂は、紫外線硬化樹脂に限らず、例えば、熱可塑性樹脂や熱硬化性樹脂でも良い。
 また、上記実施形態では、積層ユニット形成装置10は、本開示の硬化性粘性流体として、紫外線硬化樹脂を硬化した絶縁層220を、3次元積層造形により形成した。しかしながら、積層ユニット形成装置10は、3次元積層造形以外の方法(射出成形など)で形成した絶縁層220にプローブピン99を配置しても良い。この場合、回路配線225や接続端子227のみを3次元積層造形で形成しても良い。
(4) Example of change The present disclosure is not limited to the above embodiment, and various changes can be made without departing from the spirit of the present embodiment.
For example, in the above embodiment, the probe pin 99 is provided in the pin insertion hole 223, but the pin terminal 227B is formed on the surface of the stacking unit 218 and connected to the pin terminal 227B on the surface of the stacking unit 218. The probe pin 99 may be fixed.
Further, the resin constituting the insulating layer 220 is not limited to the ultraviolet curable resin, and may be, for example, a thermoplastic resin or a thermosetting resin.
Further, in the above embodiment, the laminated unit forming apparatus 10 forms the insulating layer 220 obtained by curing the ultraviolet curable resin as the curable viscous fluid of the present disclosure by three-dimensional laminated molding. However, the laminated unit forming apparatus 10 may arrange the probe pin 99 on the insulating layer 220 formed by a method other than the three-dimensional laminated molding (injection molding or the like). In this case, only the circuit wiring 225 and the connection terminal 227 may be formed by three-dimensional laminated molding.
 また、上記実施形態の3次元積層電子デバイス246の構造は、一例である。例えば、上記実施形態では、貫通孔223Aを有する中間の第2積層ユニット218Bを1つだけ、最下層の第1積層ユニット218Aと、最上層の第3積層ユニット218Cの間に挟んだが、これに限らない。図14に示すように、例えば、3次元積層電子デバイス246は、下から順番に、第1積層ユニット218A、第2積層ユニット218B、第3積層ユニット218C、第4積層ユニット218Dを積み上げた構成、即ち、4段以上の構成でも良い。そして、最下層の第1積層ユニット218Aと、最上層の第4積層ユニット218Dとの間に挟まれる、中間の第2積層ユニット218B及び第3積層ユニット218Cにプローブピン212を挿入する貫通孔223Aを形成し、プローブピン212により第1及び第4積層ユニット218A,218Dを接続しても良い。この場合、図8及び図9に示すように、先に、第1積層ユニット218Aに、第2積層ユニット218B及び第3積層ユニット218Cを搭載してからプローブピン212を貫通孔223Aに挿入しても良い。あるいは、図12に示すように、先に、第1積層ユニット218Aのピン挿入孔223にプローブピン212を挿入してから、第2積層ユニット218B及び第3積層ユニット218Cを、貫通孔223Aにプローブピン212を挿入しつつ、第1積層ユニット218Aに搭載しても良い。
 また、3次元積層電子デバイス246は、プローブピン211を1本だけ又は3本以上備える構成でも良い。
Further, the structure of the three-dimensional laminated electronic device 246 of the above embodiment is an example. For example, in the above embodiment, only one intermediate second laminated unit 218B having a through hole 223A is sandwiched between the lowermost first laminated unit 218A and the uppermost layer third laminated unit 218C. Not exclusively. As shown in FIG. 14, for example, the three-dimensional laminated electronic device 246 has a configuration in which the first laminated unit 218A, the second laminated unit 218B, the third laminated unit 218C, and the fourth laminated unit 218D are stacked in order from the bottom. That is, a configuration having four or more stages may be used. Then, a through hole 223A for inserting the probe pin 212 into the intermediate second laminated unit 218B and third laminated unit 218C sandwiched between the first laminated unit 218A of the lowermost layer and the fourth laminated unit 218D of the uppermost layer. The first and fourth laminated units 218A and 218D may be connected by probe pins 212. In this case, as shown in FIGS. 8 and 9, the second laminated unit 218B and the third laminated unit 218C are first mounted on the first laminated unit 218A, and then the probe pin 212 is inserted into the through hole 223A. Is also good. Alternatively, as shown in FIG. 12, the probe pin 212 is first inserted into the pin insertion hole 223 of the first stacking unit 218A, and then the second stacking unit 218B and the third stacking unit 218C are probed into the through hole 223A. It may be mounted on the first stacking unit 218A while inserting the pin 212.
Further, the three-dimensional laminated electronic device 246 may be configured to include only one probe pin 211 or three or more probe pins 211.
 また、プローブピン99は、外力を加えてもストロークしない構成でも良い。
 また、絶縁層形成処理S10は、平坦化処理S13を実行しなくとも良い。この場合、積層ユニット形成装置10は、平坦化装置90を備えなくとも良い。
 また、プローブピン212及びピン挿入孔223を、直線LNに対して傾いた方向で配置しても良い。
 また、上記した積層ユニット形成装置10の構成は一例であり、適宜変更可能である。例えば、積層ユニット形成装置10は、電子部品96を装着するための装着ユニット26を備えなくとも良い。
 また、本開示の3次元積層造形法としては、インクジェット法以外に、例えば、光造形法、熱溶解積層法、粉末焼結法などを採用できる。
Further, the probe pin 99 may be configured so that it does not stroke even when an external force is applied.
Further, the insulating layer forming process S10 does not have to execute the flattening process S13. In this case, the stacking unit forming device 10 does not have to include the flattening device 90.
Further, the probe pin 212 and the pin insertion hole 223 may be arranged in a direction inclined with respect to the straight line LN.
Further, the configuration of the laminated unit forming device 10 described above is an example, and can be changed as appropriate. For example, the stacking unit forming device 10 does not have to include a mounting unit 26 for mounting the electronic component 96.
Further, as the three-dimensional additive manufacturing method of the present disclosure, for example, a stereolithography method, a fused deposition modeling method, a powder sintering method and the like can be adopted in addition to the inkjet method.
 90 平坦化装置
 130 製造工程
 212 プローブピン
 218A 第1積層ユニット
 218B 第2積層ユニット
 227B ピン端子(第1接続端子)
 227C 電極パッド(第2接続端子)
 P10 ユニット形成工程(第1積層ユニット形成工程、第2積層ユニット形成工程、第3積層ユニット形成工程)
 SA ストローク量
 S10 絶縁層形成処理(第2積層ユニット形成工程)
 S11 吐出処理(吐出工程)
 S13 平坦化処理(平坦化工程)
 S15 硬化処理(硬化工程)
 S30 接続端子形成処理(接続端子形成工程)
 LN 直線
90 Flattening device 130 Manufacturing process 212 Probe pin 218A 1st stacking unit 218B 2nd stacking unit 227B Pin terminal (1st connection terminal)
227C electrode pad (second connection terminal)
P10 unit forming step (first laminated unit forming step, second laminated unit forming step, third laminated unit forming step)
SA Stroke Amount S10 Insulation layer forming process (second laminated unit forming step)
S11 Discharge processing (discharging process)
S13 Flattening process (flattening step)
S15 Hardening process (hardening process)
S30 Connection terminal forming process (connection terminal forming process)
LN straight line

Claims (5)

  1.  第1接続端子が形成された第1積層ユニットを形成する第1積層ユニット形成工程と、
     貫通孔が形成された第2積層ユニットを形成する第2積層ユニット形成工程と、
     前記第1積層ユニットの上に前記第2積層ユニットを搭載した後に、前記貫通孔にプローブピンを挿入して前記プローブピンの下部を前記第1接続端子に接続する、又は前記プローブピンの下部を前記第1接続端子に接続した後に、前記貫通孔に前記プローブピンを挿入しつつ前記第1積層ユニットの上に前記第2積層ユニットを搭載する第1搭載工程と、
     第2接続端子が形成された第3積層ユニットを形成する第3積層ユニット形成工程と、
     前記第2積層ユニットの上に前記第3積層ユニットを搭載し、前記プローブピンの上部に前記第2接続端子を接続する第2搭載工程と、
     を含む3次元積層造形による3次元積層電子デバイスの製造方法。
    The first laminated unit forming step of forming the first laminated unit in which the first connection terminal was formed, and
    The second laminated unit forming step of forming the second laminated unit in which the through hole was formed, and
    After mounting the second laminated unit on the first laminated unit, a probe pin is inserted into the through hole to connect the lower part of the probe pin to the first connection terminal, or the lower part of the probe pin is connected. A first mounting step of mounting the second laminated unit on the first laminated unit while inserting the probe pin into the through hole after connecting to the first connection terminal.
    A third laminated unit forming step of forming a third laminated unit in which the second connection terminal is formed, and
    A second mounting step of mounting the third stacking unit on the second stacking unit and connecting the second connection terminal to the upper part of the probe pin.
    A method for manufacturing a three-dimensional laminated electronic device by three-dimensional laminated modeling including.
  2.  前記第1搭載工程において、
     前記第1積層ユニットの上に前記第2積層ユニットを搭載した後、前記第2積層ユニットを前記第1積層ユニットに対して固定し、前記第1積層ユニットに対して固定した前記第2積層ユニットの前記貫通孔に前記プローブピンを挿入する、請求項1に記載の3次元積層造形による3次元積層電子デバイスの製造方法。
    In the first mounting process,
    After mounting the second laminated unit on the first laminated unit, the second laminated unit is fixed to the first laminated unit, and the second laminated unit is fixed to the first laminated unit. The method for manufacturing a three-dimensional laminated electronic device by the three-dimensional laminated molding according to claim 1, wherein the probe pin is inserted into the through hole.
  3.  前記プローブピンは、
     外力に応じてストローク可能に構成され、
     前記第2搭載工程において、
     前記第1積層ユニットの前記第1接続端子と、前記第3積層ユニットの前記第2接続端子とで前記プローブピンを挟み、前記第1積層ユニットと前記第3積層ユニットとの間の距離に応じて前記プローブピンのストローク量を変化させる、請求項1又は請求項2に記載の3次元積層造形による3次元積層電子デバイスの製造方法。
    The probe pin
    It is configured to be strokeable according to external force,
    In the second mounting process,
    The probe pin is sandwiched between the first connection terminal of the first laminated unit and the second connection terminal of the third laminated unit, depending on the distance between the first laminated unit and the third laminated unit. The method for manufacturing a three-dimensional laminated electronic device by the three-dimensional laminated molding according to claim 1 or 2, wherein the stroke amount of the probe pin is changed.
  4.  前記第2積層ユニット形成工程は、
     硬化性粘性流体を吐出する吐出工程と、
     前記吐出工程により吐出した前記硬化性粘性流体を、平坦化装置により平坦化する平坦化工程と、
     前記平坦化工程により平坦化した前記硬化性粘性流体を硬化する硬化工程と、を含み、前記吐出工程、前記平坦化工程、前記硬化工程を繰り返し実行し、前記第2積層ユニットを形成し、
     前記平坦化工程によって前記第2積層ユニットに生じる厚みの誤差が、前記プローブピンのストローク量以下である、請求項3に記載の3次元積層造形による3次元積層電子デバイスの製造方法。
    The second laminated unit forming step is
    Discharge process that discharges curable viscous fluid and
    A flattening step of flattening the curable viscous fluid discharged by the discharge step with a flattening device,
    The second laminating unit is formed by repeatedly executing the discharging step, the flattening step, and the curing step, including a curing step of curing the curable viscous fluid flattened by the flattening step.
    The method for manufacturing a three-dimensional laminated electronic device by the three-dimensional laminated modeling according to claim 3, wherein the thickness error caused in the second laminated unit by the flattening step is equal to or less than the stroke amount of the probe pin.
  5.  前記第3積層ユニット形成工程において、
     前記第2積層ユニットの上に前記第3積層ユニットを搭載した場合に、前記第1接続端子の上方となる位置に前記第2接続端子を形成し、
     前記第2積層ユニット形成工程において、
     前記第2積層ユニットの上に前記第3積層ユニットを搭載した場合に前記第1接続端子と前記第2接続端子を結ぶ直線に沿って、前記貫通孔を前記第2積層ユニットに形成する、請求項1乃至請求項4の何れか1項に記載の3次元積層造形による3次元積層電子デバイスの製造方法。
    In the third laminated unit forming step,
    When the third laminated unit is mounted on the second laminated unit, the second connecting terminal is formed at a position above the first connecting terminal.
    In the second laminated unit forming step,
    Claimed to form the through hole in the second laminated unit along a straight line connecting the first connection terminal and the second connecting terminal when the third laminated unit is mounted on the second laminated unit. The method for manufacturing a three-dimensional laminated electronic device by the three-dimensional laminated molding according to any one of items 1 to 4.
PCT/JP2019/032220 2019-08-19 2019-08-19 Method for manufacturing 3-dimensional stacked electronic device by 3-dimensional additive manufacturing WO2021033228A1 (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018216597A1 (en) * 2017-05-26 2018-11-29 株式会社村田製作所 Multilayer wiring board, electronic device and method for producing multilayer wiring board
WO2019102522A1 (en) * 2017-11-21 2019-05-31 株式会社Fuji Three-dimensional multi-layer electronic device production method and three-dimensional multi-layer electronic device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06283857A (en) * 1993-03-29 1994-10-07 Mitsubishi Electric Corp Indirect connecting method for patterns of microwave board
JP4113679B2 (en) * 2001-02-14 2008-07-09 イビデン株式会社 Manufacturing method of three-dimensional mounting package

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018216597A1 (en) * 2017-05-26 2018-11-29 株式会社村田製作所 Multilayer wiring board, electronic device and method for producing multilayer wiring board
WO2019102522A1 (en) * 2017-11-21 2019-05-31 株式会社Fuji Three-dimensional multi-layer electronic device production method and three-dimensional multi-layer electronic device

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