WO2020177316A1 - 测试***及其信号传输电路板 - Google Patents
测试***及其信号传输电路板 Download PDFInfo
- Publication number
- WO2020177316A1 WO2020177316A1 PCT/CN2019/108560 CN2019108560W WO2020177316A1 WO 2020177316 A1 WO2020177316 A1 WO 2020177316A1 CN 2019108560 W CN2019108560 W CN 2019108560W WO 2020177316 A1 WO2020177316 A1 WO 2020177316A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- area
- test pin
- circuit board
- signal transmission
- transmission circuit
- Prior art date
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
- G01R31/2825—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere in household appliances or professional audio/video equipment
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
- G01R1/0416—Connectors, terminals
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
Definitions
- This application relates to the technical field of display screen testing, in particular to a testing system and a signal transmission circuit board thereof.
- the cell test is a step of dot screen inspection and aging test on the screen of a single display screen before bonding. It can screen out the poorly displayed screen before putting it into the module.
- the main technical problem solved by this application is to provide a test system and its signal transmission circuit board, which can reduce the damage of the signal transmission circuit board to the connection part of the screen driving chip during the test and improve the product yield.
- the signal transmission circuit board includes a main body part and a first connection part connected to the main body part. In the lead area and the avoidance area adjacent to the test pin area, there is no test pin in the avoidance area.
- test system which includes a test device and a signal transmission circuit board for connecting the test device and a display screen. It is the above-mentioned signal transmission circuit board.
- the signal transmission circuit board is provided with a main body and a first connection part connected to the main body.
- the first connection part includes a test pin area and an avoidance area adjacent to the test pin area.
- the presence of test pins prevents the first connecting part from crushing the connecting part of the driver chip during the test, so that after subsequent bonding, the driver chip and the connecting part of the driver chip can form a good electrical contact to avoid poor display on the display. (For example, the problem of bright lines on the display screen).
- it is an improvement to the structure of the signal transmission circuit board, there is no need to change the design of the display screen. It can effectively solve the problem of poor display on the display screen. In this case, cost can be saved.
- FIG. 1 is a schematic structural diagram of a first embodiment of a display screen of the present application
- FIG. 2 is a schematic structural diagram of the first embodiment of the signal transmission circuit board of the present application.
- FIG. 3 is a schematic diagram of the shape of the outer contour of an avoidance area in an embodiment of the present application.
- FIG. 4 is a schematic diagram of the shape of the outer contour of another avoidance area in the embodiment of the present application.
- FIG. 5 is a schematic structural diagram of a second embodiment of the signal transmission circuit board of the present application.
- FIG. 6 is a schematic structural diagram of a third embodiment of the signal transmission circuit board of the present application.
- FIG. 7 is a schematic structural diagram of a fourth embodiment of the signal transmission circuit board of the present application.
- FIG. 8 is a schematic structural diagram of a second embodiment of a display screen of the present application.
- FIG. 9 is a schematic structural diagram of a fifth embodiment of the signal transmission circuit board of the present application.
- FIG. 10 is a schematic structural diagram of a third embodiment of a display screen of the present application
- FIG. 11 is a schematic structural diagram of a sixth embodiment of a signal transmission circuit board of the present application
- FIG. 12 is a schematic structural diagram of a test system according to an embodiment of the present application.
- FIG. 1 is a schematic structural diagram of a first embodiment of a display screen of the present application.
- the display screen 10 may include a display part 11 and a non-display part 12 located at the periphery of the display part 11.
- the display part 11 may include a display pixel array.
- the non-display portion 12 includes a driver chip connection portion 121, a peripheral wire lead-out portion 122, a first test pin portion 123 and a second test pin portion 124.
- the driving chip connection portion 121 is located between the first test pin portion 123 and the second test pin portion 124.
- the driving chip connecting portion 121 may be located in an edge area of the display screen 10, and the first test pin portion 123 and the second test pin portion 124 are located on both sides of the driving chip connecting portion 121, respectively.
- the first test pin portion 123, the driver chip connection portion 121, and the second test pin portion 124 are arranged along the edge of the display screen 10 from left to right, and the first test pin portion 123 and the driver chip connection portion 121 , The second test pin portion 124 is approximately located on a straight line.
- the width of the non-display portion 12 can be saved, which is beneficial to the design of a narrow frame and improves Screen-to-body ratio.
- this design results in that when connected to the signal transmission circuit board, the first connection part of the signal transmission circuit board is connected to the first test pin part 123 and the second test pin part 124, and the first connection part of the signal transmission circuit board will be Covers the driving chip connection part 121.
- the pins cannot avoid the driver chip connection portion 121 area, which greatly increases the risk of screen damage when the signal transmission circuit board is connected to the screen.
- the described signal transmission circuit board can ensure that the risk of damage to the connecting part of the driving chip is reduced during connection.
- the driver chip connection portion 121 is provided with wires or pins, and these wires or pins are used for electrical connection with the driver chip during the state.
- the peripheral wire lead-out portion 122 is located at the periphery of the driver chip connection portion 121, and the peripheral wire lead-out portion 122 is provided with a wiring for electrically connecting the wires or pins at the driver chip connection portion 121 with other parts, for example, with the display portion
- the display pixel array of 11 is electrically connected.
- test pins are provided at the first test pin portion 123, and a number of test pins (not labeled) are also provided at the second test pin portion 124.
- the above-mentioned display screen 10 is the display screen 10 in the cell test stage.
- Bonding refers to attaching a driver chip and/or a flexible circuit board for inputting display signals on the driver chip connection part 121, including but not limited to directly attaching the driver chip to the driver chip connection part on the display glass (Chip On Glass, COG), the driver chip is attached to the flexible circuit board and then attached to the driver chip connection part (Chip On Film, COF) on the screen through the flexible circuit board, and the driver chip is attached to the flexible substrate of the display screen.
- the driver chip connection part (Chip On PI, COP) and other methods on the bottom. In other words, during the screen test phase, the driver chip connection portion 121 is exposed.
- the display screen 10 may be a flexible display screen or a hard display screen, which is not limited in the embodiment of the present application.
- FIG. 2 is a schematic structural diagram of the first embodiment of the signal transmission circuit board of the present application.
- the signal transmission circuit board 20 may include: a main body part 21 and a first connection part 22.
- the main body 21 includes a second connecting portion 23.
- the first connecting portion 22 is connected to the main body 21, and the first connecting portion 22 and the main body 21 are respectively located on opposite sides of each other.
- the first connecting portion 22 is located on the upper side of the main body 21, and the main body 21 is located on the first side.
- the first connecting portion 22 and the main body portion 21 may be integrated.
- the second connecting portion 23 is located at the end of the main body 21 away from one end of the first connecting portion 22.
- the first connecting portion 22 includes a test pin area and an escape area 24.
- the avoidance area 24 is adjacent to the test pin area, and there is no test pin in the avoidance area 24.
- the avoidance area 24 is set so that when the first connection part 22 is electrically connected to the display test pin, the first connection part 22 is at least not in contact with the driving chip connection part of the display screen, or the pressure/pressure on the driving chip connection part during contact is less than Threshold.
- the threshold is the value obtained by the test. Taking the test pressure threshold as an example, different pressures are applied to the driving chip connection part 121, and the test driving chip connection part 121 corresponds to the different pressure after bonding with the driving chip.
- the threshold value is the maximum pressure value that can make the conduction performance or the display performance reach the standard.
- the position of the avoiding area 24 on the first connecting portion 22 corresponds to the position of the driving chip connecting portion 121.
- the avoidance area 24 is disposed in the overlapping area of the first connection portion 22 and the driving chip connection portion 121, and the avoidance area 24 is disposed on the first connection portion 22.
- the first connecting portion 22 is at least partially cut out in the thickness direction at the overlapping area.
- the avoidance area 24 is completely hollowed out to form a void area, or the avoidance area 24 is partially cut out so that the thickness of the avoidance area 24 is greater than that of the test pin area.
- the thickness is small, forming a groove. Therefore, when the first connecting portion 121 is electrically connected to the test pin, the driving chip connecting portion 121 can be at least partially received in the groove or exposed through the empty area.
- the area and the degree of hollowing out of the avoidance area 24 specifically satisfy that when the first connecting portion 22 is electrically connected to the test pins of the display screen 10, the first connecting portion 22 is not connected to the driving chip connecting portion 121 and the display screen 10
- the peripheral wire lead-out portion 122 is in contact, or the pressure/pressure on the driving chip connection portion 121 and the peripheral lead-out portion 122 when contacting is less than the threshold.
- the avoidance area 24 is an empty area. That is, the first connecting portion 22 is completely hollowed out at the location of the avoidance area 24.
- the test pin area of the first connecting portion 22 is used to electrically connect with the test pin of the display screen 10.
- the position of the avoiding area 24 on the first connecting portion 22 corresponds to the position of the driving chip connecting portion 121.
- the avoidance area 24 is disposed in the overlapping area of the first connection portion 22 and the driving chip connection portion 121, and the avoidance area 24 is disposed on the first connection portion 22.
- the first connecting portion 22 is not in contact with the driving chip connecting portion 121 of the display screen 10.
- the avoidance area 24 is provided on the first connecting portion 22.
- the first connecting portion 22 When the first connecting portion 22 is connected to the display screen 10, since the avoidance area 24 is completely hollowed out in the thickness direction to form an empty area, the first connecting portion 22 is not It is in contact with the driving chip connection part 121 of the display screen 10.
- the first connecting portion 22 will not crush the driver chip connecting portion 121, so that in the subsequent state, the driver chip can make good electrical contact with the driver chip connecting portion 121, which prevents the display screen 10 from being damaged due to damage to the driver chip connecting portion 121 Poor display problems (for example, the problem of bright lines) occur, and the product yield is improved.
- the above-mentioned design is realized by changing the structure of the first connecting portion 22 without changing the design of the display screen, which can save design costs.
- the test pin area includes a first test pin area 221 and a second test pin area 222.
- the avoidance area 24 is disposed between the first test pin area 221 and the second test pin area 222.
- the first test pin area 221 and the second test pin area 222 are respectively located on both sides of the avoiding area 24, and the first test pin area 221, the second test pin area 222, and the avoiding area 24 are all located away from the main body 21
- the first test pin area 221, the avoidance area 24, and the second test pin area 222 are roughly distributed along a straight line from left to right, so as to correspond to the pin positions on the display screen 10.
- a number of pins are provided on the first test pin area 221, and the number of pins corresponds to the number of test pins on the first test pin part 123.
- a number of pins are also provided on the second test pin area 222, and the number of pins corresponds to the number of test pins on the second test pin portion 124.
- the pins on the first test pin area 221 are connected to the test pins on the first test pin portion 123 in a one-to-one correspondence, and the second test pin area
- the pins on 222 are connected to the test pins on the second test pin part 124 in one-to-one correspondence.
- setting two test pin areas to connect to the test pins at different positions on the display screen can improve the stability of the connection between the signal transmission circuit board and the display screen, and avoid the problem of signal interference during the screen test process.
- the pulling of the transmission circuit board causes the signal transmission circuit board to separate from the display screen, which affects the test efficiency.
- the first connecting portion includes three test pin areas, and the positions of the three test pin areas are not collinear, forming a triangular positional relationship , So as to further ensure the stability of the connection between the signal transmission circuit board and the display screen.
- FIG. 3 is a schematic diagram of the shape of the outer contour of an avoidance area according to an embodiment of the present application.
- the outer contour of the avoidance area 24 includes at least two adjacent and connected line segments, and the two line segments are transitionally connected by a curve or a straight line.
- the outer contour of the avoidance area 24 refers to the shape of the avoidance area 24 on the first connecting portion 22.
- the outer contour of the avoidance area 24 includes four line segments, namely, a first line segment 241, a second line segment 242, a third line segment 243, and a fourth line segment 244.
- first line segment 241 and the third line segment 243 are opposite and arranged in parallel, and the second line segment 242 and the fourth line segment 244 are opposite and arranged in parallel.
- the first line segment 241 and the second line segment 242 are connected by a straight line transition, and the line is not parallel to the first line segment 241 and the second line segment 242.
- the second line segment 242 and the third line segment 243 are connected by a straight line transition, and the line is not parallel to the second line segment 242 and the third line segment 243.
- the third line segment 243 and the fourth line segment 244 are connected by a straight line transition, and the line is not parallel to the third line segment 243 and the fourth line segment 244.
- the fourth line segment 244 and the first line segment 241 are transitionally connected by a straight line, and the straight line is not parallel to the fourth line segment 244 and the first line segment 241.
- the outer contour of the avoidance area 24 can be formed by linear chamfering at four corners of a rectangle.
- shape of the outer contour of the avoidance area 24 is not limited to a rectangle, but may also be a triangle, a trapezoid, etc., which is not limited in this embodiment.
- FIG. 4 is a schematic diagram of the outer contour of another avoidance area in an embodiment of the present application.
- the outer contour of the avoidance area includes four line segments, namely, a first line segment 241a, a second line segment 242a, a third line segment 243a, and a fourth line segment 244a.
- first line segment 241a and the third line segment 243a are opposite and arranged in parallel
- second line segment 242a and the fourth line segment 244a are opposite and arranged in parallel.
- the first line segment 241a and the second line segment 242a are connected by a curve transition.
- the second line segment 242a and the third line segment 243a are connected by a curve transition.
- the third line segment 243a and the fourth line segment 244a are connected by a curve transition.
- the fourth line segment 244a and the first line segment 241a are connected by a curve transition.
- the outer contour of the avoidance area can be formed by rounding the four corners of a rectangle.
- the outer contour of the avoidance area can also be other shapes, such as an arbitrary polygon, which transitions from a straight line or a curve at the junction of two adjacent line segments.
- the angle formed is larger than that of the adjacent line segments directly connected, avoiding sharp edges and reducing the first connection part when connecting with the test pin Damage to the display screen, especially to reduce the damage to the connecting part of the driver chip and the lead-out part of the surrounding wires.
- the outer contour of the avoidance area is a closed shape. It should be understood that the outer contour of the avoidance area may be a non-closed shape, such as a gap.
- the avoidance area is an empty area
- One is the gap in the avoidance area, and the other is the through hole in the avoidance area.
- FIG. 5 is a schematic structural diagram of a second embodiment of the signal transmission circuit board of the present application.
- the avoidance area 323 is an empty area. In other words, the avoidance area 323 is completely hollowed out in the thickness direction of the first connecting portion 32 to form a notch 323 on the side of the first connecting portion 32 away from the main body 21.
- the notch 323 is used to expose the driver chip connection portion 121 and the peripheral wire lead-out portion 122 when the connection portion 32 is connected to the test pin of the display screen 10.
- the notch 323 may only expose the driving chip connecting portion 121.
- the outer contour of the gap 323 includes at least two adjacent and connected line segments, and the transition between the two line segments is a straight line or a curve.
- the outer contour of the notch 323 is rounded or chamfered at right or sharp corners.
- the first connection part 32 includes a first test pin area 321 and a second test pin area 322.
- the first test pin area 321 is used to connect with the first test pin connecting portion 123 during testing.
- the second test pin area 322 is used to connect with the second test pin connecting portion 124 during testing.
- the gap 323 is located between the first test pin area 321 and the second test pin area 322.
- FIG. 6 is a schematic structural diagram of a third embodiment of the signal transmission circuit board of the present application.
- the avoidance area 423 is an empty area
- the first connection portion 42 includes a first test pin area 421 and a second test pin area 422.
- the ends of the first test pin area 421 and the second test pin area 422 away from the main body 21 are connected by a connecting body 44, and the empty area is closed by the connecting body 44.
- the first connecting portion 42 is completely hollowed out in the thickness direction at the position where the avoiding area 423 is located, so as to form a through hole at the position corresponding to the avoiding area on the first connecting portion 42.
- the through hole is used to expose the driving chip connection portion 121 and the peripheral wire lead-out portion 122 when the first connection portion 42 is connected to the test pin of the display screen 10.
- the outer contour of the through hole includes four line segments, and each group of adjacently connected two line segments are transitioned by a straight line or a curve.
- the outer contour of the through hole is rounded or chamfered at right or sharp corners.
- the first test pin area 421 is used to connect with the first test pin connection portion 123 during testing.
- the second test pin area 422 is used to connect with the second test pin connection portion 124 during testing.
- the through hole is located between the first test pin area 421 and the second test pin area 422.
- the avoidance area may not be an empty area, but only has a thickness smaller than that of the test pin area.
- the avoidance area may not be an empty area, but only has a thickness smaller than that of the test pin area.
- FIG. 7 is a schematic structural diagram of a fourth embodiment of the signal transmission circuit board of the present application.
- the thickness of the relief area 523 is smaller than the thickness of the test pin area.
- the avoidance area 523 is a groove.
- the avoidance area 523 is partially cut out in the thickness direction, thereby forming a groove on the first connecting portion 52.
- the groove is used to at least partially accommodate the driver chip connection portion 121 and the peripheral wire lead-out portion 122 when the first connection portion 52 is connected to the test pin of the display screen 10.
- a curved transition between the side wall and the side wall, and between the side wall and the bottom of the groove is a curved transition between the sidewall of the groove and the surface of the first connecting portion 52 close to the driving chip connecting portion 121.
- the edge of the notch of the groove is curved.
- the notch of the groove faces the driving chip connection part 121.
- the groove does not appear at right angles or sharp edges. Even if the connecting portion 52 is in contact with the driver chip connecting portion 121 or the peripheral wire lead-out portion 122, the contact is curved, which increases the contact area and avoids connecting the driver chip to the connecting portion. 121 or the peripheral lead-out portion 122 is crushed.
- the first connection part 52 includes a first test pin area 521 and a second test pin area 522.
- the first test pin area 521 is used to connect with the first test pin connection portion 123 during testing.
- the second test pin area 522 is used to connect with the second test pin connecting portion 124 during testing.
- the groove is located between the first test pin area 521 and the second test pin area 522.
- an avoidance area is provided on the first connecting portion 52.
- the avoidance area is partially hollowed out in the thickness direction, so that the thickness of the avoidance area is smaller than that of the test pin area.
- Forming a groove at the avoidance area, the depth of the groove and the area of the groove satisfy that the pressure/pressure on the driving chip connection portion 121 and the peripheral wire lead-out portion 122 when the first connection portion 52 contacts the driving chip connection portion 121 is less than the threshold.
- the first connecting portion 52 will not crush the driver chip connecting portion 121, so that in the subsequent state, the driver chip can make good electrical contact with the driver chip connecting portion 121, avoiding the display screen 10 due to damage to the driver chip connecting portion 121 Poor display problems (for example, the problem of bright lines) occur, and the product yield is improved, and the above-mentioned design is realized by changing the structure of the first connecting portion 52 without changing the design of the display screen, which can save design costs.
- FIG. 8 is a schematic structural diagram of a second embodiment of a display screen of the present application.
- the difference lies in that, in this embodiment, the number of the test pin portion 623 is one, which is located on one side of the driving chip connection portion 121.
- FIG. 9 is a schematic structural diagram of a fifth embodiment of the signal transmission circuit board of the present application.
- the difference is that in this embodiment, the number of the test pin area 721 is one.
- the test pin area 721 is located on one side of the avoidance area 24. No pins are provided on the first connection area on the other side of the avoiding area 24, and are only used for bonding and bonding with the display screen to improve the stability of the connection between the signal transmission circuit board and the display screen.
- test pin area 721 is electrically connected to the test pin portion 623.
- FIG. 10 is a schematic structural diagram of a third embodiment of a display screen of the present application.
- test pin parts 823 located at the periphery of the driver chip connection portion 121.
- FIG. 11 is a schematic structural diagram of a sixth embodiment of the signal transmission circuit board of the present application.
- the difference lies in that, in this embodiment, the number of test pin areas is three, namely, the test pin area 921, the test pin area 922, and the test pin area. Foot area 923.
- the test pin area is located at the periphery of the avoidance area 24, and the positions of the three test pin areas are not collinear, forming a triangular position relationship, thereby further ensuring the stability of the connection between the signal transmission circuit board and the display screen.
- test pin area 721 is electrically connected to the test pin portion 623.
- FIG. 12 is a schematic structural diagram of a test system according to an embodiment of the present application.
- the test system 100 includes a test device 101 and a signal transmission circuit board 102.
- the test equipment 101 is connected to the second connection part 23 of the signal transmission circuit board 102. That is, the testing device 101 is connected to the second connecting portion 23 in any one of the foregoing embodiments.
- the test device 101 may be a test device for a cell test.
- the test device may also be another test device, which is not limited in the embodiment of the present application.
- the first connection part of the signal transmission circuit board 102 is connected to the display screen.
- the specific connection mode please refer to the above description, which will not be repeated here.
- the signal transmission circuit board may be a flexible circuit board (FPC), and the display screen may be a flexible display screen. It should be understood that the signal transmission circuit board may also be a rigid circuit board, and the display screen may also be other display screens, for example, a rigid display screen. The embodiments of this application do not limit this.
- the signal transmission circuit board includes a main body part and a first connection part connected to the main body part.
- the first connection part includes a test pin area and an avoidance area adjacent to the test pin area.
- the existence of test pins prevents the first connection from crushing the connecting part of the driver chip during the test process.
- the driver chip and the driver chip connection can form a good electrical contact to avoid poor display on the display. Problems (for example, the problem of displaying bright lines on the display screen).
- problems for example, the problem of displaying bright lines on the display screen.
- it is an improvement to the structure of the signal transmission circuit board there is no need to change the design of the display screen. It can effectively solve the problem of poor display on the display screen. Down, you can save costs.
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- General Engineering & Computer Science (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
Abstract
一种信号传输电路板(20,102)和一种测试***(100),信号传输电路板(20, 102)包括主体部(21)和与主体部(21)相连的第一连接部(22, 32, 42, 52),第一连接部 (22, 32, 42, 52)包括测试引脚区(221, 222, 321, 322, 421, 422, 521, 522, 721, 921, 922, 923)和与测试引脚区(221, 222, 321, 322, 421, 422, 521, 522, 721, 921, 922, 923) 相邻的避让区(24,323,423,523),在避让区(24, 323, 423, 523)内不存在测试引脚,能够避免信号传输电路板(20,102)对显示屏(10)的驱动芯片连接部(121)的损伤,提升产品良率。
Description
本申请涉及显示屏测试技术领域,特别是涉及一种测试***及其信号传输电路板。
随着科学技术的发展,显示屏已日渐成为人们生活的必需品,是各大厂商争相研发的焦点。
屏体测试(Cell test,CT)是对邦定(bonding)前的单个显示屏的屏体进行点屏检测及老化测试的步骤,可以在投入模组前筛选出显示不良的屏体。
现有电路板设计,为了实现功能集成通常包括多种功能引脚区,而屏体在CT测试过程中,复杂的功能引脚区可能造成信号传输电路板对屏体的驱动芯片连接部造成损伤。
【发明内容】
本申请主要解决的技术问题是提供一种测试***及其信号传输电路板,能够降低在测试过程中信号传输电路板对屏体驱动芯片连接部的损伤,提升产品良率。
为解决上述技术问题,本申请实施例采用的一个技术方案是:提供一种信号传输电路板,该信号传输电路板包括主体部和与主体部相连的第一连接部,第一连接部包括测试引脚区和与测试引脚区相邻的避让区,在避让区内不存在测试引脚。
为解决上述技术问题,本申请实施例采用的另一个技术方案是:提供一种测试***,该测试***包括测试设备和用于连接测试设备与一显示屏的信号传输电路板,信号传输电路板为上述的信号传输电路板。
本申请实施例通过设置信号传输电路板包括主体部和与主体部相连的第一连接部,第一连接部包括测试引脚区和与测试引脚区相邻的避让区,在避让区内不存在测试引脚,避免了在测试过程中第一连接部将 驱动芯片连接部压伤,使得在后续的邦定后驱动芯片与驱动芯片连接部能够形成良好的电接触,避免显示屏出现显示不良的问题(例如,显示屏出现显示亮线的问题),进一步地,由于是对信号传输电路板的结构做出的改进,不需要改变显示屏的设计,在能够有效解决显示屏出现显示不良的情况下,可以节省成本。
图1是本申请显示屏的第一实施例的结构示意图;
图2是本申请信号传输电路板的第一实施例的结构示意图;
图3是本申请实施例一种避让区的外轮廓的形状示意图;
图4是本申请实施例另一种避让区的外轮廓的形状示意图;
图5是本申请信号传输电路板的第二实施例的结构示意图;
图6是本申请信号传输电路板的第三实施例的结构示意图;
图7是本申请信号传输电路板的第四实施例的结构示意图;
图8是本申请显示屏的第二实施例的结构示意图;
图9是本申请信号传输电路板的第五实施例的结构示意图;
[根据细则91更正 24.12.2019]
图10是本申请显示屏的第三实施例的结构示意图;图11是本申请信号传输电路板的第六实施例的结构示意图;图12是本申请实施例的测试***的结构示意图。
图10是本申请显示屏的第三实施例的结构示意图;图11是本申请信号传输电路板的第六实施例的结构示意图;图12是本申请实施例的测试***的结构示意图。
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述。
请参阅图1,图1是本申请显示屏的第一实施例的结构示意图。
在本实施例中,显示屏10可以包括显示部11和位于显示部11***的非显示部12。
显示部11可以包括显示像素阵列。
可选地,非显示部12包括驱动芯片连接部121、周边导线引出部122、第一测试引脚部123、第二测试引脚部124。
可选地,驱动芯片连接部121位于第一测试引脚部123和第二测试引脚部124之间。驱动芯片连接部121可以位于显示屏10的边缘区域,第一测试引脚部123和第二测试引脚部124分别位于驱动芯片连接部 121两侧。例如,第一测试引脚部123、驱动芯片连接部121、第二测试引脚部124从左至右依次沿显示屏10的边缘设置,且第一测试引脚部123、驱动芯片连接部121、第二测试引脚部124大致位于一条直线上。
通过这种方式,由于第一测试引脚部123、驱动芯片连接部121、第二测试引脚部124大致位于一条直线上,可以节省非显示部12的宽度,利于窄边框的设计,以提高屏占比。而这种设计导致在与信号传输电路板连接时,信号传输电路板的第一连接部与第一测试引脚部123和第二测试引脚部124连接,信号传输电路板的第一连接部会覆盖在驱动芯片连接部121上。当信号传输电路板在对应驱动芯片连接部121处存在引脚时,引脚无法避开驱动芯片连接部121区域,大大增加了信号传输电路板与屏体连接时屏体损伤风险,而下文中描述的信号传输电路板,可以保证在连接时,降低驱动芯片连接部损伤风险。
驱动芯片连接部121处设置有导线或者引脚,这些导线或者引脚用于在邦定时与驱动芯片电连接。
周边导线引出部122位于驱动芯片连接部121***,周边导线引出部122处设置有走线,用于将驱动芯片连接部121处的导线或者引脚等与其他部分电连接,例如,与显示部11的显示像素阵列电连接。
第一测试引脚部123处设置有若干测试引脚(未标示),第二测试引脚部124处也设置有若干测试引脚(未标示)。
其中,上述显示屏10是在屏体测试(Cell Test)阶段的显示屏10。在屏体测试阶段,显示屏10还未进行邦定(bonding)。邦定是指在驱动芯片连接部121上贴附驱动芯片和/或输入显示信号用的柔性电路板,包括但不限于将驱动芯片直接贴附到显示屏玻璃上的驱动芯片连接部(Chip On Glass,COG)、将驱动芯片贴附在柔性电路板上之后再通过柔性电路板贴附到屏体上的驱动芯片连接部(Chip On Film,COF)、将驱动芯片贴附到显示屏柔性衬底上的驱动芯片连接部(Chip On PI,COP)等方式。换言之,在屏体测试阶段,驱动芯片连接部121裸露在外。
可选地,显示屏10可以为柔性显示屏或硬质显示屏,本申请实施 例对此不做限定。
请参阅图2,图2是本申请信号传输电路板的第一实施例的结构示意图。
在本实施例中,信号传输电路板20可以包括:主体部21和第一连接部22。
主体部21包括第二连接部23。
第一连接部22与主体部21相连,且第一连接部22和主体部21分别位于彼此相对的两侧,例如,第一连接部22位于主体部21的上侧,主体部21位于第一连接部22的下侧。第一连接部22与主体部21可以设置为一体。
可选地,第二连接部23位于主体部21远离第一连接部22一端的端部。
第一连接部22包括测试引脚区和避让区24。避让区24与测试引脚区相邻,在避让区24内不存在测试引脚。
避让区24设置成在第一连接部22与显示屏测试引脚电连接时,第一连接部22至少不与显示屏的驱动芯片连接部接触,或接触时对驱动芯片连接部压力/压强小于阈值。
需要说明的是,该阈值是测试所得的值,以测试压力阈值为例,对驱动芯片连接部121施加不同的压力,并测试驱动芯片连接部121在与驱动芯片邦定后的不同压力所对应的驱动芯片与驱动芯片连接部121的导通性能或者显示屏的显示性能,该阈值为能够使导通性能或者显示性能达标的最大压力值。
在一种使用场景下,在第一连接部22与测试引脚电连接时,避让区24在第一连接部22上的位置与驱动芯片连接部121的位置对应。避让区24设置于第一连接部22与驱动芯片连接部121的重叠区域,且避让区24设置于第一连接部22上。
第一连接部22在重叠区域处在厚度方向上至少部分挖除,例如,避让区24完全挖空形成空区,或者避让区24部分挖除使避让区24处的厚度比测试引脚区的厚度小,形成凹槽。从而使得在第一连接部121 与测试引脚电连接时驱动芯片连接部121可以至少部分容纳于凹槽中,或者经空区暴露。具体参见下文实施例的描述。
可选地,避让区24的面积和挖空程度具体满足在第一连接部22与显示屏10的测试引脚电连接时,第一连接部22不与显示屏10的驱动芯片连接部121及周边导线引出部122接触,或接触时对驱动芯片连接部121及周边导线引出部122的压力/压强小于阈值。
通过上述方式,不仅可以避免信号传输电路板对驱动芯片连接部的压伤,还可以避免对周边导线引出部的压伤,从而可以避免周边导线的断线等问题,使得在邦定后驱动芯片能与显示屏的其他部分顺利导通。
可选地,在本实施方式中,避让区24为空区。即,第一连接部22在避让区24所在位置完全被挖空。
可选地,第一连接部22的测试引脚区用于与显示屏10的测试引脚电连接。在第一连接部22与测试引脚电连接时,避让区24在第一连接部22上的位置与驱动芯片连接部121的位置对应。避让区24设置于第一连接部22与驱动芯片连接部121的重叠区域,且避让区24设置于第一连接部22上。在第一连接部22与测试引脚电连接时,第一连接部22不与显示屏10的驱动芯片连接部121接触。
通过上述方式,在第一连接部22上设置避让区24,在第一连接部22与显示屏10连接时,由于避让区24在厚度方向上完全挖空形成空区,第一连接部22不与显示屏10的驱动芯片连接部121接触。第一连接部22不会压伤驱动芯片连接部121,从而在后续邦定时,驱动芯片能够与驱动芯片连接部121进行良好的电接触,避免了因驱动芯片连接部121损伤而导致显示屏10出现显示不良的问题(例如,显示亮线的问题),提升产品良率,并且上述设计是通过改变第一连接部22的结构的方式实现,不会改变显示屏的设计,可以节省设计成本。
可选地,测试引脚区包括第一测试引脚区221和第二测试引脚区222。避让区24设置于第一测试引脚区221和第二测试引脚区222之间。第一测试引脚区221和第二测试引脚区222分别位于避让区24的两侧,且第一测试引脚区221、第二测试引脚区222、避让区24均位于远离主 体部21的一侧的边缘区域;例如,第一测试引脚区221、避让区24、第二测试引脚区222从左至右大致沿直线分布,从而与显示屏10上的引脚位置对应。
第一测试引脚区221上设置有若干引脚,引脚数量与第一测试引脚部123上的测试引脚数量对应。
第二测试引脚区222上也设置有若干引脚,引脚数量与第二测试引脚部124上的测试引脚数量对应。
在第一连接部22与测试引脚连接时,第一测试引脚区221上的引脚与第一测试引脚部123上的测试引脚一一对应地连接,且第二测试引脚区222上的引脚与第二测试引脚部124上的测试引脚一一对应地连接。
通过上述方式,设置两个测试引脚区分别与显示屏上的不同位置的测试引脚连接,可以提高信号传输电路板与显示屏连接的稳定性,避免在屏体测试过程中,由于对信号传输电路板的拉拽导致信号传输电路板与显示屏脱离,影响测试效率。
应理解,在其他实施例中,非显示区的布局空间允许的情况下,可以设置第一连接部包括三个测试引脚区,且三个测试引脚区位置不共线,形成三角位置关系,从而进一步保证信号传输电路板与显示屏连接的稳定性。
请进一步参阅图3,图3是本申请实施例一种避让区的外轮廓的形状示意图。
可选地,避让区24的外轮廓至少包括相邻且彼此连接的两条线段,两条线段之间由曲线或者直线过渡连接。
避让区24的外轮廓是指避让区24的在第一连接部22上的形状。
可选地,避让区24的外轮廓包括四条线段,即第一线段241、第二线段242、第三线段243、第四线段244。
可选地,第一线段241和第三线段243相对且平行设置,第二线段242和第四线段244相对且平行设置。
第一线段241和第二线段242之间由直线过渡连接,且该直线与第 一线段241和第二线段242均不平行。
第二线段242与第三线段243之间由直线过渡连接,且该直线与第二线段242和第三线段243均不平行。
第三线段243与第四线段244之间由直线过渡连接,且该直线与第三线段243和第四线段244均不平行。
第四线段244与第一线段241之间由直线过渡连接,且该直线与第四线段244和第一线段241均不平行。
换言之,避让区24的外轮廓可由矩形在四个角落处进行直线型倒角形成。当然,避让区24的外轮廓形状不限于矩形,还可以为三角形、梯形等,本实施例对此不做限定。
参阅图4,图4是本申请实施例另一种避让区的外轮廓的形状示意图。
避让区的外轮廓包括四条线段,即第一线段241a、第二线段242a、第三线段243a、第四线段244a。
可选地,第一线段241a和第三线段243a相对且平行设置,第二线段242a和第四线段244a相对且平行设置。
第一线段241a和第二线段242a之间由曲线过渡连接。
第二线段242a与第三线段243a之间由曲线过渡连接。
第三线段243a与第四线段244a之间由曲线过渡连接。
第四线段244a与第一线段241a之间由曲线过渡连接。
换言之,避让区的外轮廓可由矩形在四个角落处进行倒圆角形成。
避让区的外轮廓还可以为其他形状,例如任意的多边形,在相邻的两个线段的连接处由直线或者曲线过渡。
通过上述方式,由于在相邻线段之间通过直线过渡连接,相比相邻线条线段直接连接,所形成的角度更大,避免出现尖锐的棱角减小第一连接部在与测试引脚连接时对显示屏的损伤,特别是减小对驱动芯片连接部及其周边导线引出部的损伤。
在上述两种情况中,避让区的外轮廓均是封闭的形状,应理解,避让区的外轮廓可以是非封闭的形状,例如,缺口等。
对于避让区为空区的情形下面结合本申请信号传输电路板的第二实施例和第三实施例进行具体说明。其中一种是在避让区为缺口,另一种是避让区为通孔。
请参阅图5,图5是本申请信号传输电路板的第二实施例的结构示意图。
在本实施例中,避让区323为空区,换言之,避让区323在第一连接部32的厚度方向上完全挖空,以在第一连接部32远离主体部21的一侧形成缺口323。
可选地,在一种使用场景下,缺口323用于在连接部32连接于显示屏10的测试引脚时暴露驱动芯片连接部121和周边导线引出部122。
应理解,由于周边导线引出部122的抗压强度远远大于驱动芯片连接部121的抗压强度,因此,在其他实施例中,缺口323可以仅暴露驱动芯片连接部121。
缺口323的外轮廓至少包括相邻且彼此连接的两条线段,两条线段之间由直线或者曲线过渡。例如缺口323的外轮廓在直角或者尖角处进行倒圆角或者斜切角处理。
第一连接部32包括第一测试引脚区321和第二测试引脚区322。第一测试引脚区321用于在测试时与第一测试引脚连接部123连接。第二测试引脚区322用于在测试时与第二测试引脚连接部124连接。
缺口323位于第一测试引脚区321和第二测试引脚区322之间。
请参阅图6,图6是本申请信号传输电路板的第三实施例的结构示意图。
在本实施例中,避让区423为空区,第一连接部42包括第一测试引脚区421和第二测试引脚区422。第一测试引脚区421和第二测试引脚区422远离主体部21的端部通过连接体44相连,空区由连接体44封闭。换言之,第一连接部42在避让区423所在位置在厚度方向上完全挖空,以在第一连接部42上避让区对应的位置形成通孔。
可选地,在一种使用场景下,通孔用于在第一连接部42连接于显示屏10的测试引脚时暴露驱动芯片连接部121和周边导线引出部122。
通孔的外轮廓包括四条线段,每组相邻连接的两条线段之间由直线或者曲线过渡。例如通孔的外轮廓在直角或者尖角处进行倒圆角或者斜切角处理。
第一测试引脚区421用于在测试时与第一测试引脚连接部123连接。第二测试引脚区422用于在测试时与第二测试引脚连接部124连接。
通孔位于第一测试引脚区421和第二测试引脚区422之间。
应理解,避让区可以不为空区,而只是厚度比测试引脚区的厚度小。具体参见信号传输电路板的第四实施例的描述。
请参阅图7,图7是本申请信号传输电路板的第四实施例的结构示意图。
在本实施例中,避让区523的厚度小于测试引脚区的厚度。避让区523为凹槽。
换言之,避让区523在厚度方向上部分挖除,从而在第一连接部52上形成凹槽。
在一种使用场景中,凹槽用于在第一连接部52连接于显示屏10的测试引脚时至少部分收容驱动芯片连接部121和周边导线引出部122。
可选地,凹槽的侧壁与侧壁之间、侧壁与槽底之间曲面过渡。凹槽的侧壁与第一连接部52靠近驱动芯片连接部121的表面之间曲面过渡。凹槽的槽口处边缘为曲面。凹槽的槽口朝向驱动芯片连接部121。
通过上述方式,使得凹槽不会出现直角或者尖角边缘,即便在连接部52与驱动芯片连接部121或周边导线引出部122接触,也是曲面接触,增加了接触面积,避免将驱动芯片连接部121或周边导线引出部122压伤。
第一连接部52包括第一测试引脚区521和第二测试引脚区522。第一测试引脚区521用于在测试时与第一测试引脚连接部123连接。第二测试引脚区522用于在测试时与第二测试引脚连接部124连接。
凹槽位于第一测试引脚区521和第二测试引脚区522之间。
通过上述方式,在第一连接部52上设置避让区,在第一连接部52与显示屏10连接时,由于避让区在厚度方向上部分挖空,使得避让区 处厚度比测试引脚区小,在避让区处形成凹槽,凹槽的深度和凹槽的面积满足第一连接部52接触驱动芯片连接部121时对驱动芯片连接部121及周边导线引出部122的压力/压强小于阈值。第一连接部52不会压伤驱动芯片连接部121,从而在后续邦定时,驱动芯片能够与驱动芯片连接部121进行良好的电接触,避免了因驱动芯片连接部121损伤而导致显示屏10出现显示不良的问题(例如,显示亮线的问题),提升产品良率,并且上述设计是通过改变第一连接部52的结构的方式实现,不会改变显示屏的设计,可以节省设计成本。
请参阅图8,图8是本申请显示屏的第二实施例的结构示意图。
与显示屏的第一实施例相比,区别之处在于,在本实施例中,测试引脚部623的数量为一个,位于驱动芯片连接部121的一侧。
请参阅图9,图9是本申请信号传输电路板的第五实施例的结构示意图。
与信号传输电路板的第一实施例相比,区别之处在于,在本实施例中,测试引脚区721的数量为一个。测试引脚区721位于避让区24的一侧。避让区24另一侧的第一连接部区域上不设置引脚,仅用于与显示屏进行贴合粘接,来提高信号传输电路板与显示屏连接的稳固性。
在测试时,测试引脚区721与测试引脚部623电连接。
请参阅图10,图10是本申请显示屏的第三实施例的结构示意图。
与显示屏的第一实施例相比,区别之处在于,在本实施例中,测试引脚部的数量为三个,分别为测试引脚部823、测试引脚部824、测试引脚部825,位于驱动芯片连接部121的周边。
请参阅图11,图11是本申请信号传输电路板的第六实施例的结构示意图。
与信号传输电路板的第一实施例相比,区别之处在于,在本实施例中,测试引脚区的数量为三个,分别为测试引脚区921、测试引脚区922、测试引脚区923。测试引脚区位于避让区24的周边,且三个测试引脚区位置不共线,形成三角位置关系,从而进一步保证信号传输电路板与显示屏连接的稳定性。
在测试时,测试引脚区721与测试引脚部623电连接。
请参阅图12,图12是本申请实施例的测试***的结构示意图。
在本实施例中,测试***100包括测试设备101和信号传输电路板102。
测试设备101与信号传输电路板102的第二连接部23连接。即测试设备101与上述任意一实施实施例中的第二连接部23连接。
测试设备101可以是屏体测试(Cell Test)的测试设备,当然,测试设备也可以是其他测试设备,本申请实施例对此不做限定。
在测试时,信号传输电路板102的第一连接部与显示屏连接。具体的连接方式可以参见上文的描述,此处不再赘述。
在上述任意一实施例中,信号传输电路板可以为柔性电路板(FPC),显示屏可以为柔性显示屏。应理解,信号传输电路板也可以为硬质电路板,显示屏也可以为其他的显示屏,例如,硬质的显示屏。本申请实施例对此不做限定。
本申请实施例通过设置信号传输电路板包括主体部和与主体部相连的第一连接部,第一连接部包括测试引脚区和与测试引脚区相邻的避让区,在避让区内不存在测试引脚,避免了在测试过程中第一连接部将驱动芯片连接部压伤,在后续的邦定后驱动芯片与驱动芯片连接部能够形成良好的电接触,避免显示屏出现显示不良的问题(例如,显示屏出现显示亮线的问题),进一步地,由于是对信号传输电路板的结构做出的改进,不需要改变显示屏的设计,在能够有效解决显示屏出现显示不良的情况下,可以节省成本。
以上所述仅为本申请的实施方式,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。
Claims (17)
- 一种信号传输电路板,其中,所述信号传输电路板包括主体部和与所述主体部相连的第一连接部,所述第一连接部包括测试引脚区和与所述测试引脚区相邻的避让区,在所述避让区内不存在测试引脚。
- 根据权利要求1所述的信号传输电路板,其中,所述避让区的厚度小于所述测试引脚区的厚度。
- 根据权利要求1所述的信号传输电路板,其中,所述避让区为空区。
- 根据权利要求3所述的信号传输电路板,其中,所述测试引脚区包括第一测试引脚区和第二测试引脚区,所述第一测试引脚区和第二测试引脚区远离所述主体部的端部通过连接体相连,所述空区由所述连接体封闭。
- 根据权利要求3所述的信号传输电路板,其中,所述测试引脚区包括第一测试引脚区和第二测试引脚区,所述第一测试引脚区和第二测试引脚区远离所述主体部的端部不相连,所述空区为非封闭的形状。
- 根据权利要求2所述的信号传输电路板,其中,所述避让区为凹槽。
- 根据权利要求6所述的信号传输电路板,其中,所述凹槽的侧壁与侧壁之间、侧壁与槽底之间曲面过渡。
- 根据权利要求1所述的信号传输电路板,其中,所述避让区的外轮廓至少包括相邻且彼此连接的两条线段,所述两条线段之间由曲线或者直线过渡连接。
- 根据权利要求1所述的信号传输电路板,其中,所述避让区设置成在所述第一连接部与显示屏的测试引脚电连接时,所述第一连接部至少不与所述显示屏的驱动芯片连接部接触,或接触时对所述驱动芯片连接部压力/压强小于阈值。
- 根据权利要求1所述的信号传输电路板,其中,所述避让区设置成在所述第一连接部与所述显示屏的测试引脚电连接时,所述避让区 在所述第一连接部上的位置与所述显示屏的驱动芯片连接部的位置对应。
- 根据权利要求1所述的信号传输电路板,其中,所述第一连接部与所述主体部一体设置。
- 根据权利要求1所述的信号传输电路板,其中,所述第一连接部包括三个测试引脚区,且三个所述测试引脚区位置不共线,形成三角位置关系。
- 一种测试***,其中,所述测试***包括测试设备和用于连接所述测试设备与显示屏的信号传输电路板,所述信号传输电路板包括主体部和与所述主体部相连的第一连接部,所述第一连接部包括测试引脚区和与所述测试引脚区相邻的避让区,在所述避让区内不存在测试引脚。
- 根据权利要求13所述的测试***,其中,所述避让区的厚度小于所述测试引脚区的厚度。
- 根据权利要求13所述的测试***,其中,所述避让区为空区或凹槽。
- 根据权利要求13所述的测试***,其中,所述避让区设置成在所述第一连接部与所述显示屏的测试引脚电连接时,所述第一连接部至少不与所述显示屏的驱动芯片连接部接触,或接触时对所述驱动芯片连接部压力/压强小于阈值。
- 根据权利要求13所述的测试***,其中,所述显示屏为柔性显示屏或硬质显示屏,所述信号传输电路板为柔性电路板,所述主体部包括第二连接部,所述第二连接部用于连接所述测试设备。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US17/211,017 US11650245B2 (en) | 2019-03-01 | 2021-03-24 | Test system and signal transmission circuit board thereof |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910155780.X | 2019-03-01 | ||
CN201910155780.XA CN110018368B (zh) | 2019-03-01 | 2019-03-01 | 测试***及其信号传输电路板 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US17/211,017 Continuation US11650245B2 (en) | 2019-03-01 | 2021-03-24 | Test system and signal transmission circuit board thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2020177316A1 true WO2020177316A1 (zh) | 2020-09-10 |
Family
ID=67189187
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CN2019/108560 WO2020177316A1 (zh) | 2019-03-01 | 2019-09-27 | 测试***及其信号传输电路板 |
Country Status (3)
Country | Link |
---|---|
US (1) | US11650245B2 (zh) |
CN (1) | CN110018368B (zh) |
WO (1) | WO2020177316A1 (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110018368B (zh) | 2019-03-01 | 2020-09-25 | 云谷(固安)科技有限公司 | 测试***及其信号传输电路板 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101350155B1 (ko) * | 2012-07-31 | 2014-01-14 | 주식회사 오킨스전자 | 표시 패널 검사용 소켓 |
CN104360509A (zh) * | 2014-11-21 | 2015-02-18 | 京东方科技集团股份有限公司 | 点灯测试方法及装置 |
CN106057112A (zh) * | 2016-08-09 | 2016-10-26 | 武汉华星光电技术有限公司 | 成盒测试电路以及液晶显示基板 |
CN206953401U (zh) * | 2017-06-15 | 2018-02-02 | 东莞市强胜电子有限公司 | 一种高精度低成本的信号测试针载板 |
CN109064957A (zh) * | 2018-08-15 | 2018-12-21 | 京东方科技集团股份有限公司 | 点灯测试模组 |
CN110018368A (zh) * | 2019-03-01 | 2019-07-16 | 云谷(固安)科技有限公司 | 测试***及其信号传输电路板 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06102311A (ja) * | 1992-09-21 | 1994-04-15 | Kawasaki Steel Corp | 半導体パッケージのテスト方法およびその装置 |
CN101826505A (zh) * | 2009-03-05 | 2010-09-08 | 南茂科技股份有限公司 | 封装基板以及芯片封装结构 |
CN203838446U (zh) * | 2014-05-23 | 2014-09-17 | 北京京东方光电科技有限公司 | 测试线路、显示面板及显示装置 |
CN204348296U (zh) | 2014-12-31 | 2015-05-20 | 上海天马微电子有限公司 | 一种显示模组及显示装置 |
CN206115354U (zh) * | 2016-08-28 | 2017-04-19 | 江西合力泰科技有限公司 | Fpc邦定结构 |
CN107134242A (zh) * | 2017-06-27 | 2017-09-05 | 武汉华星光电技术有限公司 | 便于测试的cog面板 |
CN207180762U (zh) * | 2017-09-22 | 2018-04-03 | 天津晓林汽车配件有限公司 | 一种汽车中控触摸屏的触控测试治具 |
CN207489366U (zh) * | 2017-11-16 | 2018-06-12 | 京东方科技集团股份有限公司 | 一种芯片、柔性显示面板及显示装置 |
CN108519536B (zh) * | 2018-01-19 | 2021-12-28 | 云谷(固安)科技有限公司 | 测试***及测试方法 |
CN207799028U (zh) * | 2018-02-06 | 2018-08-31 | 夏成辉 | 一种测试电路板的转接电路板 |
CN108803164B (zh) * | 2018-05-31 | 2021-05-14 | 厦门天马微电子有限公司 | 一种显示装置 |
CN108666356A (zh) * | 2018-06-29 | 2018-10-16 | 武汉华星光电半导体显示技术有限公司 | 显示面板及移动终端 |
-
2019
- 2019-03-01 CN CN201910155780.XA patent/CN110018368B/zh active Active
- 2019-09-27 WO PCT/CN2019/108560 patent/WO2020177316A1/zh active Application Filing
-
2021
- 2021-03-24 US US17/211,017 patent/US11650245B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101350155B1 (ko) * | 2012-07-31 | 2014-01-14 | 주식회사 오킨스전자 | 표시 패널 검사용 소켓 |
CN104360509A (zh) * | 2014-11-21 | 2015-02-18 | 京东方科技集团股份有限公司 | 点灯测试方法及装置 |
CN106057112A (zh) * | 2016-08-09 | 2016-10-26 | 武汉华星光电技术有限公司 | 成盒测试电路以及液晶显示基板 |
CN206953401U (zh) * | 2017-06-15 | 2018-02-02 | 东莞市强胜电子有限公司 | 一种高精度低成本的信号测试针载板 |
CN109064957A (zh) * | 2018-08-15 | 2018-12-21 | 京东方科技集团股份有限公司 | 点灯测试模组 |
CN110018368A (zh) * | 2019-03-01 | 2019-07-16 | 云谷(固安)科技有限公司 | 测试***及其信号传输电路板 |
Also Published As
Publication number | Publication date |
---|---|
CN110018368B (zh) | 2020-09-25 |
US11650245B2 (en) | 2023-05-16 |
US20210208191A1 (en) | 2021-07-08 |
CN110018368A (zh) | 2019-07-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN111090202B (zh) | 显示面板及显示装置 | |
US8023059B2 (en) | Array substrate of liquid crystal display, method of repairing same, and liquid crystal display | |
CN101160020B (zh) | 柔性基板、具备其的电光装置以及电子设备 | |
TWI553375B (zh) | 墊片、螢幕間隔件以及具有墊片和螢幕間隔件的顯示器裝置 | |
WO2020019423A1 (zh) | 一种显示模组及其制作方法以及电子装置 | |
US10884299B2 (en) | Display module, display device and optically clear adhesive layer component | |
KR20170125187A (ko) | 표시장치 | |
CN107065272A (zh) | 显示面板和显示装置 | |
JP2006080067A (ja) | 強度を向上させたバックライトアセンブリー及びそれを備えた表示装置 | |
WO2020168762A1 (zh) | 显示面板 | |
WO2022000619A1 (zh) | 显示面板及显示装置 | |
WO2022193337A1 (zh) | 阵列基板及显示面板 | |
CN109491132A (zh) | 液晶显示面板及其制备方法 | |
WO2020177316A1 (zh) | 测试***及其信号传输电路板 | |
WO2021035847A1 (zh) | 液晶显示面板及其制作方法与无边框液晶显示装置 | |
KR20170029688A (ko) | 표시 장치 및 이의 제조 방법 | |
CN211236524U (zh) | 显示面板及其显示装置 | |
JP2009036794A (ja) | 液晶表示装置 | |
TW200813540A (en) | Liquid crystal display | |
CN209765229U (zh) | 一种显示面板及电子装置 | |
TWI687740B (zh) | 薄膜電晶體驅動電路以及液晶顯示裝置 | |
KR20050104786A (ko) | 액정표시장치 기판 구조 및 그 제조 방법 | |
US20180292865A1 (en) | Mobile terminals having home button and display panels thereof | |
US11294210B2 (en) | Narrow-bezel display panel and display device | |
JP2001135896A (ja) | Cof基板 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 19918279 Country of ref document: EP Kind code of ref document: A1 |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 19918279 Country of ref document: EP Kind code of ref document: A1 |