WO2020134083A1 - 显示面板及其制备方法、显示装置 - Google Patents

显示面板及其制备方法、显示装置 Download PDF

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Publication number
WO2020134083A1
WO2020134083A1 PCT/CN2019/098813 CN2019098813W WO2020134083A1 WO 2020134083 A1 WO2020134083 A1 WO 2020134083A1 CN 2019098813 W CN2019098813 W CN 2019098813W WO 2020134083 A1 WO2020134083 A1 WO 2020134083A1
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WIPO (PCT)
Prior art keywords
layer
substrate
display area
transistor
driving circuit
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PCT/CN2019/098813
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English (en)
French (fr)
Inventor
彭兆基
刘明星
甘帅燕
Original Assignee
云谷（固安）科技有限公司
昆山国显光电有限公司
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Publication of WO2020134083A1 publication Critical patent/WO2020134083A1/zh
Priority to US17/143,429 priority Critical patent/US11910691B2/en
Priority to US18/406,751 priority patent/US20240147809A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/17—Carrier injection layers
    • H10K50/171—Electron injection layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/816—Multilayers, e.g. transparent multilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/828—Transparent cathodes, e.g. comprising thin metal layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/127—Active-matrix OLED [AMOLED] displays comprising two substrates, e.g. display comprising OLED array and TFT driving circuitry on different substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/10—Transparent electrodes, e.g. using graphene
    • H10K2102/101—Transparent electrodes, e.g. using graphene comprising transparent conductive oxides [TCO]
    • H10K2102/103—Transparent electrodes, e.g. using graphene comprising transparent conductive oxides [TCO] comprising indium oxides, e.g. ITO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/311—Flexible OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/351—Thickness
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80517—Multilayers, e.g. transparent multilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80523—Multilayers, e.g. opaque multilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80524—Transparent cathodes, e.g. comprising thin metal layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells

Definitions

  • the present application relates to the field of display technology, and in particular, to a display panel, a preparation method thereof, and a display device.
  • a display panel having a first display area and a second display area, the display panel including the first display area and the second display Area substrate, drive circuit layer, light-emitting functional film layer and conductive layer; the drive circuit layer is formed on the substrate; the light-emitting functional film layer is formed on the drive circuit layer; the conductive layer is formed On the light emitting functional film layer, the thickness of the conductive layer in the first display area is smaller than the thickness of the conductive layer in the second display area.
  • a display device including: a device body having a device area; the above display panel covering the device body; wherein the device area is located in the first Below the display area, and in the device area, a photosensitive element for collecting light through the first display area is provided.
  • the thickness of the conductive layer in the first display area of the display panel included is smaller than the thickness of the conductive layer in the second display area, the light transmittance of the first display area is greater than that of the second display area Light transmittance, so that the photosensitive element disposed under the first display area can receive enough light to ensure that the photosensitive element can work normally.
  • a method for manufacturing a display panel the display panel having a first display area and a second display area
  • the preparation method includes: forming a substrate; Forming a driving circuit layer thereon; forming a light emitting functional film layer on the driving circuit layer; forming a conductive layer on the light emitting functional film layer, the thickness of the conductive layer located in the first display area is smaller than that located in the second display The thickness of the conductive layer of the zone.
  • an array substrate includes a transparent first OLED substrate and a non-transparent second OLED substrate, the first OLED substrate is at least partially Surrounded by an OLED substrate; the first OLED substrate and the second OLED substrate include a substrate, a driving circuit layer formed on the substrate, and a light-emitting functional film layer formed on the driving circuit layer.
  • the driving circuit layer of the first OLED substrate includes a plurality of first driving circuit units, the first driving circuit unit includes a storage capacitor and a first transistor, and the storage capacitor includes a first plate and a second plate
  • the first driving circuit unit has a first conductive layer, a part of the first conductive layer serves as the first plate, and another part serves as the gate of the first transistor.
  • the gate of the first transistor and the first of the storage capacitor When the plate and the connection between the two can be completed in the same step, there is no need to prepare the connection structure between the gate of the first transistor and the first plate of the storage capacitor after the formation, which can simplify the first driving circuit Preparation process flow of the unit.
  • a display screen including the above array substrate and a packaging structure, the packaging structure being provided on a side of the array substrate away from the substrate .
  • the gate of the first transistor and the first of the storage capacitor When the plate and the connection between the two can be completed in the same step, there is no need to prepare the connection structure between the gate of the first transistor and the first plate of the storage capacitor after the formation, which can simplify the first driving circuit
  • the manufacturing process flow of the unit further simplifies the manufacturing process flow of the driving circuit layer of the first OLED substrate.
  • a display device comprising: a device body having a device area; the above display screen covering the device body; wherein the device area is located Below the first OLED substrate, and in the device area, a photosensitive element for collecting light through the first OLED substrate is provided.
  • FIG. 1 is a top view of a display panel provided by an embodiment of the present application.
  • FIG. 2 is a cross-sectional view of the display panel shown in FIG. 1 taken along line CC';
  • FIG. 3 is a partial cross-sectional view of the display panel shown in FIG. 1 taken along line CC';
  • FIG. 4 is a cross-sectional view of the substrate of the display panel shown in FIG. 1;
  • FIG. 5 is a partial cross-sectional view of another display panel shown in FIG. 1 taken along line CC';
  • FIG. 6 is a cross-sectional view of a first display area of a display panel provided by an embodiment of this application;
  • FIG. 7 is a circuit diagram of a first driving circuit unit provided by an embodiment of the present application.
  • FIG. 8 is a cross-sectional view of a first display area of another display panel provided by an embodiment of the present application.
  • FIG. 9 is a circuit diagram of another first driving circuit unit provided by an embodiment of the present application.
  • FIG. 10 is a side view of the display device provided by an embodiment of the present application.
  • FIG. 11 is a schematic structural diagram of the device body of the display device shown in FIG. 10;
  • FIG. 12 is a flowchart of a method for manufacturing a display panel provided by an embodiment of the present application.
  • FIG. 13 is a flowchart of the method for forming a substrate in FIG. 12;
  • FIG. 14 is a schematic structural diagram of a substrate layer provided by an embodiment of the present application.
  • FIG. 15 is a schematic structural diagram of a first intermediate structure provided by an embodiment of the present application.
  • 16 is a schematic structural diagram of a second intermediate structure provided by an embodiment of the present application.
  • FIG. 17 is a schematic structural diagram of a third intermediate structure provided by an embodiment of the present application.
  • FIG. 19 is a schematic structural diagram of a fourth intermediate structure provided by an embodiment of the present application.
  • FIG. 20 is a schematic structural diagram of a fifth intermediate structure provided by an embodiment of the present application.
  • 21 is a flowchart of another method for forming a conductive layer on the light-emitting functional film layer provided by an embodiment of the present application.
  • FIG. 22 is a schematic structural diagram of a sixth intermediate structure provided by an embodiment of the present application.
  • FIG. 23 is a schematic structural diagram of a seventh intermediate structure provided by an embodiment of the present application.
  • FIG. 24 is a schematic structural diagram of a transparent OLED substrate provided by an embodiment of the present application.
  • 25 is a cross-sectional view of a transparent OLED substrate provided by an embodiment of the present application.
  • 26 is a cross-sectional view of another transparent OLED substrate provided by an embodiment of the present application.
  • the photosensitive elements can be placed on the backlight surface of the display panel of the electronic device.
  • the light transmittance of the display panel is low, and it is difficult for the photosensitive element provided on the backlight surface of the display panel to receive enough light, resulting in the photosensitive element not working properly.
  • the camera provided on the backlight surface of the display panel collects less light. , The quality of the captured images is poor.
  • the reason for this problem is that the thickness of the film layer of the display panel is large, which results in a low light transmittance.
  • the embodiments of the present application provide a display panel.
  • the display panel 100 has a first display area A and a second display area B, and a photosensitive element may be disposed below the first display area A.
  • the display panel 100 includes a substrate 1 located in the first display area A and the second display area B, a driving circuit layer 2, a light-emitting functional film layer 3, and a conductive layer 4.
  • the driving circuit layer 2 is formed on the substrate 1, the light emitting functional film layer 3 is formed on the driving circuit layer 2, and the conductive layer 4 is formed on the light emitting functional film layer 3 and is located
  • the thickness d1 of the conductive layer in the first display area A is smaller than the thickness d2 of the conductive layer in the second display area B.
  • the direction from the substrate 1 to the driving circuit layer 2 is defined as up, and the direction from the driving circuit layer 2 to the substrate 1 is defined as down, so as to determine the up and down directions.
  • Different direction definitions will not affect the actual operation content of the process and the actual shape of the product.
  • the light transmittance of the first display area A is greater than that of the second display The light transmittance of the area B, so that the photosensitive element disposed under the first display area A can receive enough light to ensure that the photosensitive element can work normally.
  • the second display area B may at least partially surround the first display area A. As shown in the display panel 100 shown in FIG. 1, the second display area B completely surrounds the first display area A. In other implementations, the second display area B may partially surround the first display area A.
  • the second display area B is the main display area of the display panel 100, and usually occupies more than 90% of the area of the display panel.
  • the lower portion of the first display area A can generally be used to set up photosensitive devices such as cameras and light sensors.
  • the portion of the conductive layer 4 located in the first display area A is the first sub-conductive layer 41
  • the portion of the conductive layer 4 located in the second display area includes the second sub-conductive layer 42 and The third sub-conductive layer 43 on the second sub-conductive layer 42.
  • the material of the first sub-conductive layer 41 is indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, or silver-doped indium zinc oxide; or, the material of the first sub-conductive layer 41 includes Mg and Ag At least one.
  • the first sub-conductive layer 41 includes two materials of Mg and Ag, and the ratio of the mass of Mg to the mass of Ag ranges from 1:4 to 1:20. In this way, the light transmittance of the first display area A can be ensured to be large, so that the sensor provided under the first display area A can receive more light.
  • One of the second sub-conductive layer 42 and the third sub-conductive layer 43 may be made of the same material as the first sub-conductive layer 41 and formed in the same process step.
  • the conductive layer 4 is formed, the second sub-conductive layer 42 and the first sub-conductive layer 41 are formed simultaneously, and then the third sub-conductive layer 43, the second sub-conductive layer 42 and the first
  • the material of the one sub-conductive layer 41 is the same, and the material of the third sub-conductive layer 43 may include at least one of Mg and Ag.
  • the second sub-conductive layer 42 is formed first, and then the first sub-conductive layer 41 and the third sub-conductive layer 43 are formed at the same time, and the materials of the first sub-conductive layer 41 and the third sub-conductive layer 43 Similarly, the material of the second sub-conductive layer 42 may include at least one of Mg and Ag.
  • the conductive layer 4 may be a cathode layer.
  • the cathode layer may be a surface electrode, covering the entire area of the display panel 100. That is, the first sub-conductive layer 41 covers the first display area A, and the second sub-conductive layer 42 and the third sub-conductive layer 43 cover the second display area B.
  • the thickness of the first sub-conductive layer 41 in the first display area A and the thickness of the conductive layer in the second display area B may range from 0.25:1 to 0.85:1, for example, 0.3, 0.5, 0.7, 0.85, etc.
  • the thickness refers to the dimension of the film layer in the vertical direction.
  • the thickness of the first sub-conductive layer 41 in the first display area A may be 5-10 nm, and the total thickness of the second sub-conductive layer 42 and the third sub-conductive layer 43 in the second display area B The range can be 12-20nm. In this way, the light transmittance of the first sub-conductive layer 41 can be ensured, and the conductive performance and mechanical performance of the conductive layer 4 can be ensured, and the display panel 100 can work normally.
  • the light-emitting functional film layer 3 may include an organic light-emitting material and a common layer.
  • the common layer may include an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer.
  • the electron injection layer and the electron transport layer are located between the organic light emitting material and the conductive layer 4, and the hole injection layer and the hole transport layer are located between the driving circuit layer 2 and the light emitting functional film layer 3.
  • the electron injection layer, the electron transport layer, the hole injection layer and the hole transport layer are all arranged in one layer, covering the first display area A and the second display area B.
  • the material of the electron injection layer includes Ag, and at least one of Mg, K, Li, and Cs.
  • the ratio of the mass of Ag in the electron injection layer to the total mass of the electron injection layer ranges from 1:5 to 1:21, that is, the mass of Ag in the electron injection layer and the mass of other components The ratio ranges from 1:4 to 1:20.
  • the display panel 100 may further include a pixel defining layer 7 disposed in the same layer as the light emitting functional film layer 3, a pixel opening may be opened on the pixel defining layer 7, and the organic light emitting material of the light emitting functional film layer 3 is disposed within the pixel opening.
  • the substrate 1 may include a first substrate 11 and a second substrate 12, the first substrate 11 is located in the first display area A, and the second substrate 12 is located in the second display area B, and the light transmittance of the first substrate 11 is greater than that of the second substrate 12. In this way, the light transmittance of the first display area A can be greater, which is more conducive to the photosensitive element disposed under the first display area A to receive more light.
  • the substrate 1 may be a flexible substrate or a rigid substrate.
  • the rigid substrate may be a transparent substrate such as a glass substrate, a quartz substrate, or a plastic substrate.
  • the second substrate 12 may be a stack of multiple organic material layers and multiple inorganic material layers; the first substrate includes at least transparent In the material layer 111, the thickness of the first substrate 11 is the same as the thickness of the second substrate 12.
  • the thickness of the first substrate 11 is the same as the thickness of the second substrate 12, it is advantageous to set the entire display panel 100 to the same thickness, thereby making the overall display panel 100 more beautiful.
  • the material of the transparent material layer 111 needs to use a material with a high light transmittance.
  • the light transmittance of the transparent material layer 111 of the first substrate 11 may be greater than 90%.
  • the material of the transparent material layer 111 of the first substrate 11 may include at least one of PET (polyethylene terephthalate) and PC (polycarbonate). The light transmittance of both PET and PC is 92%, which can make the light transmittance of the first substrate 11 higher.
  • the light transmittance of the second display area B needs to be lower to reduce the brightness loss of the second display area B.
  • the light transmittance of the second substrate 12 of the second display area B may be within 30%-60% to reduce the light transmittance of the second display area B and increase the brightness of the second display area B during display.
  • the material of the organic material layer of the second substrate 12 can be PI (polyimide), the refractive index of PI is not much different from that of PET and PC, then the first substrate 11 and the second substrate 12 The refractive index of is close to each other, so that the difference in the refractive index between the first substrate 11 and the second substrate 12 may cause a large difference in the display effect between the first display area A and the second display area B, so that the entire display panel 100 The effect is more consistent.
  • the material of the inorganic material layer of the second substrate 12 may be SiO 2 , SiNx, or the like.
  • the first substrate 11 further includes a stacked layer 112 in which an organic material layer and an inorganic material layer are overlapped, the stacked layer 112 of the first substrate 11 and the stacked layer of the second substrate 12 share a part Membrane material.
  • the organic material layer of the first substrate 11 and the organic material layer of the second substrate 12 at the same layer share the film layer material, and the inorganic material layer of the first substrate and the second substrate 12 are at the same layer The inorganic material layer shares the film material.
  • the stack 112 of the first substrate 11 may include a first organic layer 113 and a first inorganic layer 114 on the first organic layer 113, and the stack of the second substrate 12 It includes a second organic layer 121, a second inorganic layer 122, a third organic layer 123, and a third inorganic layer 124 that are sequentially overlapped from bottom to top.
  • the first organic layer 113 and part of the third organic layer 123 share the same Film material, the first inorganic layer 114 and the third inorganic layer 124 share the same film material, the thickness of the first organic layer 113 is smaller than the thickness of the third organic layer 123, the first inorganic The thickness of the layer 114 is equal to the thickness of the third inorganic layer 124.
  • the first inorganic layer 114 and the third inorganic layer 124 share the same film layer material means that the two materials are the same and are formed in the same process step, the first organic layer 113 is shared with part of the third organic layer 123
  • the same film layer material means that both materials are the same and are formed at the same time.
  • an organic material layer of the same thickness can be formed at the same time, and then the organic material layer located in the first display area A is partially etched away to obtain the first organic layer 113 ⁇ thirdorganic layer123.
  • the transparent material layer 111 of the first substrate 11 may be disposed under the stack 112 of the first substrate 11, and the lower end surface of the transparent material layer 111 of the first substrate 11 and the second The lower end surface of the substrate 12 is flush. Furthermore, if the upper end surface of the stack 112 of the first substrate 11 is flush with the upper end surface of the second substrate 12, then the total thickness of the first substrate 11 is the same as the total thickness of the second substrate 12, so that It is advantageous to make the thickness of the display panel 100 substantially the same as a whole, and to improve the aesthetics of the display panel 100.
  • a protective layer 5 is provided between the upper end of the transparent material layer 111 of the first substrate 11 and/or the stacked layer 112 of the first substrate 11.
  • the protective layer 5 can protect the first substrate 11 and the second substrate 12, improve the mechanical strength of the display panel, and thereby increase the service life of the display panel 100.
  • the material of the protective layer 5 may include at least one of IZO, ITO, SiNx, and SiOx. The above materials can make the light transmittance of the protective layer 5 higher, and prevent the arrangement of the protective layer 5 from affecting the light transmittance of the first display area A.
  • a buffer layer 8 may be provided between the substrate 1 and the driving circuit layer 2, the material of the buffer layer 8 may be SiNx or SiOx, and the buffer layer 8 may improve the viscosity performance of the substrate 1 and the driving circuit layer 2 In order to prevent the substrate 1 from being separated from the driving circuit layer 2 and improve the service life of the display panel 100.
  • the driving method of the first display area A may be passive driving or active driving.
  • the first display area A is PMOLED (Passive-Matrix Organic Light-Emitting Diode) display area; when the driving method of the first display area A is active driving, the first display area A is an AMOLED (Active-Matrix Organic Light-Emitting Diode) display area.
  • the driving method of the second display area B is active driving, and the second display area is an AMOLED display area.
  • the portion of the driving circuit layer 2 located in the second display area B may include a gate insulating layer 24, a capacitor insulating layer 25 on the gate insulating layer 24, and an interlayer dielectric layer 26 on the capacitor insulating layer 25.
  • the material of the anode layer 23 may be a sandwich structure in which an Ag film layer is provided between two indium tin oxide film layers.
  • the structure in which the driving circuit layer 2 is located in the first display area A may have the following ways.
  • the portion of the driving circuit layer 2 located in the first display area A includes a gate insulating layer 24, a capacitive insulating layer 25 on the gate insulating layer 24, and a layer on the capacitive insulating layer 25
  • the gate insulating layer 24, the capacitor insulating layer 25, the interlayer dielectric layer 26, the planarization layer 27, and the corresponding film layers located on the planarization layer 27 and the second display area B are located in the same layer, And formed in the same process.
  • the material of the anode layer 21 may be a single-layer film layer structure made of a transparent material.
  • the transparency of the transparent material of the anode layer 21 is greater than or equal to 90%.
  • the transparent material is indium tin oxide, indium zinc oxide, silver-doped indium tin oxide or silver-doped indium zinc oxide. In this way, the light transmittance of the anode layer 21 of the first display area A can be ensured to be high, and the light transmittance of the first display area A can be improved.
  • the portion of the driving circuit layer 2 located in the first display area A may only include the anode layer 21 and not other film layers, so that the light transmittance of the driving circuit layer of the first display area A may be higher .
  • the material of the anode layer 21 may be a single-layer film structure made of a transparent material. Further, the transparency of the transparent material for preparing the anode layer 21 is greater than or equal to 90%.
  • the transparent material is indium tin oxide, indium zinc oxide, silver-doped indium tin oxide or silver-doped indium zinc oxide.
  • the driving circuit layer 2 is located
  • the portion of the first display area A may include an anode layer 21 and a transparent organic material film layer 22 disposed under the anode layer 21.
  • the transparent organic material film layer 22 and the anode layer 21 may be made of a transparent material, and the material of the anode layer 21 may be a single-layer film layer structure made of a transparent material. Further, the light transmittance of the transparent organic material film layer 22 and the anode layer 21 are both greater than 90%.
  • the transparent material for preparing the anode layer 21 is indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, or silver-doped indium zinc oxide.
  • the material of the transparent organic material film layer 22 may be PET, PC, or the like.
  • the total thickness of the multiple insulating layers of the second display area B (ie, the gate insulating layer 24, the capacitive insulating layer 25, the interlayer dielectric layer 26, and the planarization layer 27 of the second display area B) is equal to
  • the thickness of the transparent organic material film layer 22 of the first display area A is the same, so that the portion of the driving circuit layer 2 located in the first display area A and the portion located in the second display area B have the same thickness, which facilitates the thickness of the display panel 100 The whole is substantially the same, thereby improving the aesthetics of the display panel 100.
  • the first display area A is an AMOLED display area
  • a portion of the driving circuit layer 2 located in the first display area A is provided with a plurality of transistors and a plurality of storage capacitors, and the plurality of transistors and the plurality of storage capacitors constitute a plurality of first drive circuits
  • the unit is used to drive the organic light-emitting material of the light-emitting functional film layer 3 to emit light, so that the first display area A displays.
  • the second display area B is an AMOLED display area.
  • a portion of the driving circuit layer 2 located in the second display area B is provided with a plurality of transistors and a plurality of storage capacitors.
  • the plurality of transistors and the plurality of storage capacitors constitute a plurality of second drive circuit units .
  • the organic light-emitting material used to drive the light-emitting functional film layer 3 emits light, so that the second display area B displays.
  • the number of transistors of the first driving circuit unit is smaller than the number of transistors of the second driving circuit unit.
  • the first driving circuit unit may be a 2TIC driving circuit (that is, the first driving circuit unit includes two transistors and a storage capacitor), or the first driving circuit unit may be a 3TIC driving circuit (that is, the first driving circuit The unit includes three transistors and a storage capacitor).
  • the second drive circuit unit may be, for example, a 7TIC circuit (that is, the second drive circuit unit includes seven transistors and a storage capacitor), a 5TIC circuit (that is, the second drive circuit unit includes five transistors and a storage capacitor), and a 4TIC circuit (That is, the second driving circuit unit includes four transistors and a storage capacitor).
  • the structural complexity of the first driving circuit unit is less than the structural complexity of the second driving circuit unit, so that the area of the conductive layer in the portion of the driving circuit layer 2 located in the first display area A is smaller, which can improve the first The light transmittance of the display area A.
  • the transistor of the first driving circuit unit may include a first transistor, and the storage capacitor of the first driving circuit unit includes a first electrode plate and a second electrode plate. 6 and 8, the portion of the driving circuit layer 2 located in the first display area A has a gate insulating layer 24, a capacitor insulating layer 25 on the gate insulating layer 24, and an interlayer dielectric layer on the capacitor insulating layer 25 26.
  • a planarization layer 27 on the interlayer dielectric layer 26, and a first conductive layer 91 between the gate insulating layer 24 and the capacitor insulating layer 25, a portion 912 of the first conductive layer 91 serves as the storage
  • the first plate of the capacitor and the other part 911 serve as the gate of the first transistor.
  • the first polar plate may be the lower polar plate of the storage capacitor
  • the second polar plate may be the upper polar plate of the storage capacitor
  • the driving circuit layer in the first display area further includes a power supply line, a data line, a scanning line, and an anode layer corresponding to each of the plurality of first driving circuit units.
  • the portion of the driver circuit layer 2 located in the first display area has an anode layer 21 and a second conductive layer 92 on the planarization layer 27 corresponding to the first driver circuit unit in one-to-one correspondence.
  • a part 921 of the layer 92 serves as the second plate of the storage capacitor, and another part 922 serves as the power supply line.
  • the structure can simplify the manufacturing process flow of the first driving circuit unit.
  • the portion of the driver circuit layer 2 shown in FIG. 6 located in the first display area A includes data lines, scan lines, and first transistors in addition to the first conductive layer 91, the second conductive layer 92, and the anode layer 21 shown in the figure. Source and drain, the gate, source and drain of the second transistor, but these structures are not shown in FIG.
  • the transistors of the first driving circuit unit include a first transistor T1 and a second transistor T2, the source and storage of the first transistor T1
  • the second plate D2 of the capacitor C is respectively connected to the power line, the drain of the first transistor T1 is connected to the anode layer of the corresponding OLED (Organic Light-Emitting Diode), and the gate of the first transistor is connected to
  • the first plate D1 of the storage capacitor C is connected;
  • the gate of the second transistor T2 is connected to the scan line, and the drain of the second transistor T2 is respectively connected to the first plate D1 and the first of the storage capacitor C
  • the gate of the transistor T1 is connected, and the source of the second transistor T2 is connected to the data line.
  • the drain of the second transistor T2 is connected to the first plate D1 of the storage capacitor C and the gate of the first transistor T1
  • a part of the first conductive layer serves as the first plate D1 of the storage capacitor C
  • the other part serves as The gate of the first transistor T1 is structurally connected to the drain of the second transistor T2 directly with the first conductive layer.
  • the source of the first transistor T1 is respectively connected to the second plate D2 of the storage capacitor C and the power line
  • a part of the second conductive layer serves as the second plate D2 of the storage capacitor C, and the other part serves as the power line
  • the source of the first transistor T1 is connected to the second conductive layer.
  • materials of the first transistor T1, the second transistor T2, the storage capacitor C, the data line, the scan line, and the anode layer may be made of a transparent material.
  • the transparency of the transparent material is greater than or equal to 90%.
  • the transparent material is indium tin oxide, indium zinc oxide, silver-doped indium tin oxide or silver-doped indium zinc oxide. In this way, the light transmittance of the driving circuit layer of the first display area A can be made higher, and thus the light transmittance of the first display area A can be improved.
  • the driving circuit layer located in the first display area A includes a power supply line, a data line, a first scan line, a second scan line, a reference potential line, and a plurality of first drives
  • the circuit units correspond one-to-one to the anode layer.
  • the portion of the driving circuit layer 2 located in the first display area has a first conductive layer 91 and a third conductive layer 93 on the planarization layer 27.
  • a part 932 of the third conductive layer 93 serves as the second electrode plate, and another part 931 serves as a corresponding anode layer.
  • the structure can simplify the manufacturing process flow of the first driving circuit unit.
  • the portion of the driving circuit layer 2 shown in FIG. 8 located in the first display area includes the power supply line, the data line, the first scan line, and the second scan in addition to the first conductive layer 91 and the third conductive layer 93 shown in the figure Line, reference potential line, source and drain of the first transistor, gate, source and drain of the third transistor, gate, source and drain of the fourth transistor, but these are not shown in FIG. 8 structure.
  • the transistors of the first driving circuit unit include a first transistor T1, a third transistor T3 and a fourth transistor T4, and the third transistor T3 Is connected to the data line, the gate of the third transistor T3 is connected to the first scan line, and the drain of the third transistor T3 is connected to the first plate D1 and the first plate of the storage capacitor C, respectively
  • a gate of a transistor T1 is connected, a drain of the first transistor T1 is connected to the power line, a source of the first transistor T1 is respectively connected to an anode layer of the OLED, and a second plate D2 of the storage capacitor C Connected, the gate of the fourth transistor T4 is connected to the second scan line, the source of the fourth transistor T4 is connected to the reference potential line, the drain of the fourth transistor T4 is connected to the anode of the OLED ⁇ Layer connection.
  • the drain of the third transistor T3 is respectively connected to the first plate of the storage capacitor C and the gate of the first transistor T1
  • a part of the first conductive layer serves as the first plate of the storage capacitor C
  • the other portion serves as the The gate of the first transistor T1 is structurally connected to the drain of the third transistor T3 and the first conductive layer.
  • the source of the first transistor T1 is connected to the anode layer and the second plate D2 of the storage capacitor C
  • the drain of the fourth transistor T4 is connected to the anode layer
  • a part of the third conductive layer serves as the storage capacitor In the second plate D2 of C, the other part serves as a corresponding anode layer.
  • the source of the first transistor T1 is connected to the third conductive layer
  • the drain of the fourth transistor T4 is connected to the third conductive layer.
  • the first transistor T1, the third transistor T3, the fourth transistor T4, the storage capacitor C, the data line, and the first scan line of the first driving circuit unit are all made of transparent materials.
  • the transparency of the transparent material is greater than or equal to 90%.
  • the transparent material is indium tin oxide, indium zinc oxide, silver-doped indium tin oxide or silver-doped indium zinc oxide. In this way, the light transmittance of the driving circuit layer of the first display area A can be made higher, and thus the light transmittance of the first display area A can be improved.
  • the display device 200 includes an apparatus body 201 and the above-mentioned display panel 100.
  • the device body 201 has a device area 202, and the display panel 100 covers the device body 201.
  • the device area 202 is located below the first display area of the display panel 100, and the device area 202 is provided with a photosensitive element 203 that collects light through the first display area of the display panel 100.
  • the photosensitive element 203 may include a camera and/or a light sensor.
  • other devices other than the photosensitive element 203 such as a gyroscope or an earpiece, may also be provided.
  • the device area 202 may be a slotted area, and the first display area of the display panel 100 may be correspondingly arranged corresponding to the slotted area, so that the photosensitive element 203 can collect external light through the first display area.
  • the light transmittance of the first display area can be greater than that of the second display area The light transmittance of the area, so that the photosensitive element disposed under the first display area can receive enough light to ensure that the photosensitive element can work normally.
  • the aforementioned electronic equipment such as a display device may be digital equipment such as a mobile phone, a tablet, a palmtop computer, an ipad, and the like.
  • An embodiment of the present application further provides a method for manufacturing a display panel.
  • the display panel has a first display area and a second display area.
  • the preparation method includes the following steps 101 to 104, as shown in FIG. 12.
  • step 101 a substrate is formed.
  • the substrate may be a flexible substrate or a rigid substrate.
  • the rigid substrate may be a transparent substrate such as a glass substrate, a quartz substrate, or a plastic substrate.
  • the step 101 of forming a substrate may include the following steps 1011 to 1015, as shown in FIG. 13.
  • step 1011 a substrate layer is formed.
  • the substrate layer may be a stacked layer in which multiple organic material layers and multiple inorganic material layers overlap.
  • the substrate layer 101 includes a second organic layer 121, a second inorganic layer 122, a third organic layer 123, and a third inorganic layer 124 that are sequentially stacked from bottom to top.
  • step 1012 a groove is formed at a position of the substrate layer corresponding to the first display area.
  • FIG. 15 is a schematic structural diagram of the first intermediate structure. As shown in FIG. 15, a groove 102 is formed at the bottom of the substrate layer 101. Wherein, an etching process may be used to etch away the second organic layer 121, the second inorganic layer 122 and a part of the third organic layer 123 located in the first display area A to form the groove 102.
  • step 1013 a transparent material layer is formed in the groove.
  • the light transmittance of the transparent material layer may be greater than 90%.
  • the material of the transparent material layer may include at least one of PET and PC.
  • the preparation method may further include a step 1014: forming a protective layer on the inner surface of the groove and below the substrate layer.
  • a step 1014 forming a protective layer on the inner surface of the groove and below the substrate layer.
  • FIG. 16 is a schematic diagram of the structure of the second intermediate structure.
  • a protective layer 5 is formed under the inner surface of the groove 102 and the portion of the substrate layer 101 under the second display area B.
  • a second intermediate structure may be implemented, and a transparent material layer 111 may be formed in the groove 102 on the basis of the second intermediate structure to obtain a third intermediate structure.
  • 17 is a schematic structural view of a third intermediate structure.
  • the preparation method may further include step 1015: forming a protective layer below the transparent material layer.
  • the protective layer 5 is formed under the transparent material layer 111 to obtain the structure shown in FIG. 4, that is, the substrate 1 is obtained.
  • the lower end surface of the transparent material layer 111 may be flush with the lower end surface of the portion of the substrate layer located in the second display area B, so that the thickness of the substrate located in the first display area A and the substrate located in the second display area B the same.
  • step 102 a driver circuit layer is formed on the substrate.
  • step 103 a light-emitting functional film layer is formed on the driving circuit layer.
  • a conductive layer is formed on the light-emitting functional film layer, and the thickness of the conductive layer located in the first display area is smaller than the thickness of the conductive layer located in the second display area.
  • the conductive layer is formed simultaneously with part of the conductive layer of the second display area.
  • the step 104 of forming a conductive layer on the light-emitting functional film layer may be completed by the following steps 1041 and 1042.
  • a first conductive film layer is formed on the light-emitting functional film layer, and the first conductive film layer covers the first display area and the second display area.
  • FIG. 19 is a schematic structural diagram of the fourth intermediate structure.
  • the driving circuit layer 2 is formed on the substrate 1
  • the light-emitting functional film layer 3 is formed on the driving circuit layer 2
  • A is a first display area
  • B is a second display area.
  • the first conductive film layer 401 is formed on the light-emitting functional film layer 3, and the first conductive film layer 401 simultaneously covers the light-emitting functional film layer 3 located in the first display area A and the second display area B.
  • the material of the first conductive film layer 401 may be indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, or silver-doped indium zinc oxide.
  • the material of the first conductive film layer 401 includes at least one of Mg and Ag.
  • the material of the first conductive film layer 401 includes Mg and Ag, and the ratio of the mass of Mg to the mass of Ag ranges from 1:4 to 1:20.
  • a second conductive film layer is formed on the first conductive film layer, and the second conductive film layer is only disposed in the second display area.
  • the fifth intermediate structure can be obtained through step 1042.
  • 20 is a schematic structural view of a fifth intermediate structure.
  • the second conductive film layer 402 is only disposed on the second display area B.
  • the portion of the conductive layer 4 located in the first display area A is only the first conductive film layer 401, and the portion of the conductive layer 4 located in the second display area B includes the first conductive film Layer 401 and second conductive film layer 402.
  • the material of the second conductive film layer may include at least one of Mg and Ag.
  • the step 104 of forming a conductive layer on the light-emitting functional film layer may be completed by the following steps 1043 and 1044.
  • step 1043 a third conductive film layer is formed on the light-emitting functional film layer in the second display area.
  • FIG. 22 is a schematic structural diagram of the sixth intermediate structure. As shown in FIG. 22, the driving circuit layer 2 is formed on the substrate 1, the light-emitting functional film layer 3 is formed on the driving circuit layer 2, A is a first display area, and B is a second display area. The third conductive film layer 403 is formed on the light-emitting functional film layer 3 and covers only the second display area B.
  • the material of the third conductive film layer 403 may be the same as the thickness of the second conductive film layer 402, and the material of the third conductive film layer 403 and the second conductive film layer 402 may be the same, including at least one of Mg and Ag Species.
  • a fourth conductive film layer is formed on the light emitting functional film layer of the first display area and the third conductive film layer of the second display area.
  • the seventh intermediate structure can be obtained through step 1044, and a schematic structural diagram of the seventh intermediate structure shown in FIG. As shown in FIG. 23, the fourth conductive film layer 404 covers the light-emitting film layer 3 of the first display area A and the third conductive film layer 403 of the second display area B.
  • the portion of the conductive layer 4 located in the first display area A only has the fourth conductive film layer 404
  • the portion of the conductive layer 4 located in the second display area B includes the third conductive film Layer 403 and the fourth conductive film layer 404.
  • the material of the fourth conductive film layer 404 may be indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, or silver-doped indium zinc oxide.
  • the material of the fourth conductive film layer 404 includes at least one of Mg and Ag.
  • the material of the third conductive film layer 403 includes Mg and Ag, and the ratio of the mass of Mg to the mass of Ag ranges from 1:4 to 1:20.
  • the thickness of the fourth conductive film layer 404 may be the same as the thickness of the first conductive film layer 401, and the material of the fourth conductive film layer 404 may be the same as the material of the first conductive film layer 401.
  • the thickness of the conductive layer located in the first display area is smaller than the thickness of the conductive layer located in the second display area, so that the light transmittance of the first display area is greater than that of the second display The light transmittance of the area, so that the photosensitive element disposed under the first display area can receive enough light to ensure that the photosensitive element can work normally.
  • the display panel prepared by the foregoing preparation method and the display panel 100 provided in the foregoing embodiments belong to the same concept. For details, refer to the foregoing embodiment of the display panel 100, and details are not described herein again.
  • an embodiment of the present application also provides an array substrate including a transparent OLED substrate 300.
  • the transparent OLED substrate 300 or the transparent first OLED substrate includes a substrate 1′ formed on the The driving circuit layer 2'on the substrate 1'and the light emitting functional film layer 3'formed on the driving circuit layer 2'.
  • the driving circuit layer 2' includes a plurality of first driving circuit units, the first driving circuit unit includes a storage capacitor and a first transistor, and the storage capacitor includes a first plate and a second plate.
  • the first driving circuit unit has a first conductive layer 91′, a part 912′ of the first conductive layer 91′ serves as the first electrode plate, and another part 911′ serves as the first The gate of a transistor.
  • the transparent OLED substrate 300 since part of the first conductive layer serves as the first plate and the other portion serves as the gate of the first transistor, the gate of the first transistor, the first plate of the storage capacitor, and When the connection between the two can be completed by the same process step, there is no need to prepare the connection structure between the gate of the first transistor and the first plate of the storage capacitor, which can simplify the first driving circuit unit Preparation process.
  • the driving circuit layer 2'of the transparent OLED substrate 300 has a gate insulating layer 24', a capacitive insulating layer 25' on the gate insulating layer 24', and a capacitive insulating layer 25'
  • the upper interlayer dielectric layer 26', the planarization layer 27' located on the interlayer dielectric layer 26', and the first conductive layer 91' are located between the gate insulating layer 24' and the capacitor insulating layer 25'.
  • the first driving circuit unit may be a 2TIC driving circuit.
  • the driving circuit layer of the transparent OLED substrate 300 may further include a power line, a data line, a scanning line, and an anode layer corresponding to each of the plurality of first driving circuit units.
  • the driving circuit layer of the transparent OLED substrate 300 further has an anode layer 21′ and a second conductive layer 92′ corresponding to the first driving circuit unit on the planarizing layer 27′, the second A part 921' of the conductive layer 92' serves as the second plate of the storage capacitor, and another part 922' serves as the power supply line;
  • the first driving circuit unit further includes a second transistor, and a source of the first transistor Connected to the second conductive layer 92', the drain of the first transistor is connected to the corresponding anode layer, the gate of the second transistor is connected to the scan line, and the drains of the second transistor are respectively It is connected to the first conductive layer, and the source of the second transistor is connected to the data line.
  • the circuit diagram is as shown in FIG. 7, the structure when the first driving circuit unit of the first OLED substrate included in the array substrate is 2T1C and the first driving of the display panel described above
  • the structure when the circuit unit is 2T1C is the same, and will not be repeated here.
  • the materials of the first transistor T1, the second transistor T2, the storage capacitor C, the data line, the scan line, and the anode layer are made of a transparent material.
  • the transparency of the transparent material is greater than or equal to 90%.
  • the transparent material is indium tin oxide, indium zinc oxide, silver-doped indium tin oxide or silver-doped indium zinc oxide. In this way, the light transmittance of the drive circuit layer of the transparent OLED substrate or the first OLED substrate included in the array substrate can be made higher, thereby further improving the light transmittance of the transparent OLED substrate or the first OLED substrate.
  • the first driving circuit unit may be a 3TIC driving circuit.
  • the driving circuit layer may include a power supply line, a data line, a first scanning line, a second scanning line, a reference potential line, and one-to-one correspondence with the plurality of first driving circuit units Anode layer.
  • the driving circuit layer 2' has a third conductive layer 93' on the planarization layer 27', a portion 932' of the third conductive layer 93' serves as the second plate, and another portion 931 'As the corresponding anode layer.
  • the structure can simplify the manufacturing process flow of the first driving circuit unit.
  • the first drive circuit unit is a 3TIC drive circuit
  • its circuit diagram is shown in FIG. 9.
  • the structure when the first driving circuit unit of the first OLED substrate included in the array substrate is 3T1C is the same as the structure when the first driving circuit unit of the display panel described above is 3T1C, and details are not described herein again.
  • the first transistor T1, the third transistor T3, the fourth transistor T4, the storage capacitor C, the data line, the first scan line, the second scan line, all The reference potential line and the anode layer are made of transparent material.
  • the transparency of the transparent material is greater than or equal to 90%.
  • the transparent material is indium tin oxide, indium zinc oxide, silver-doped indium tin oxide or silver-doped indium zinc oxide. In this way, the light transmittance of the transparent OLED substrate of the array substrate or the drive circuit layer of the first OLED substrate can be made higher, thereby further improving the light transmittance of the transparent OLED substrate or the first OLED substrate.
  • the array substrate provided by the embodiment of the present application includes a first OLED substrate and a second OLED substrate.
  • the first OLED substrate is a transparent OLED substrate
  • the second OLED substrate is a non-transparent OLED substrate;
  • the second OLED substrate shares the same substrate 1, and the light emitting functional film layer of the first OLED substrate and the light emitting functional film layer of the second OLED substrate are formed in the same process.
  • the gate of the first transistor and the storage When the first plate of the capacitor and the connection between the two can be completed in the same step, there is no need to prepare the connection structure between the gate of the first transistor and the first plate of the storage capacitor, which can be simplified The manufacturing process flow of the first driving circuit unit.
  • the first OLED substrate ie, the above-mentioned transparent OLED substrate
  • the second OLED substrate include: a substrate; a driving circuit layer formed on the substrate; a light-emitting functional film layer, the light-emitting functional film A layer is formed on the driving circuit layer.
  • the first OLED substrate of the array substrate may be at least partially surrounded by the second OLED substrate.
  • the driving circuit layer of the second OLED substrate includes a plurality of second driving circuit units, the number of transistors included in the second driving circuit unit is greater than the number of transistors included in the first driving circuit unit .
  • the first driving circuit unit may be a 2TIC driving circuit (that is, the first driving circuit unit includes two transistors and a storage capacitor), or the first driving circuit unit may be a 3TIC driving circuit (that is, the first driving circuit The unit includes three transistors and a storage capacitor).
  • the second drive circuit unit may be, for example, a 7TIC circuit (that is, the second drive circuit unit includes seven transistors and a storage capacitor), a 5TIC circuit (that is, the second drive circuit unit includes five transistors and a storage capacitor), and a 4TIC circuit (That is, the second driving circuit unit includes four transistors and a storage capacitor).
  • a 7TIC circuit that is, the second drive circuit unit includes seven transistors and a storage capacitor
  • a 5TIC circuit that is, the second drive circuit unit includes five transistors and a storage capacitor
  • a 4TIC circuit That is, the second driving circuit unit includes four transistors and a storage capacitor.
  • An embodiment of the present application further provides a display screen including the above-mentioned array substrate and a packaging structure, the packaging structure is disposed on the array substrate, and a photosensitive may be disposed under the first OLED substrate of the array substrate element.
  • the manufacturing process flow of the first driving circuit unit further simplifies the manufacturing process flow of the driving circuit layer of the first OLED substrate.
  • the encapsulation layer may be a thin-film encapsulation structure, and the thin-film encapsulation structure may include a stack of organic material layers and inorganic material layers alternately stacked, wherein the organic material layer and the inorganic material layer are both transparent materials, and the material of the inorganic material layer may be SiO, for example 2 , SiNx, Al 2 O 3, etc.
  • the material of the organic material layer may be PI, PET, etc., for example.
  • the encapsulation layer can also be a glass cover or a glass frit encapsulation structure.
  • An embodiment of the present application further provides a display device.
  • the display device includes a device body and the above-mentioned display screen.
  • the device body has a device area, and the display screen covers the device body.
  • the device area is located below the first OLED substrate, and the device area is provided with a photosensitive element that collects light through the first OLED substrate.
  • the photosensitive element may include a camera and/or a light sensor.
  • other devices other than the photosensitive element such as a gyroscope or an earpiece, may also be provided.
  • the device area may be a slotted area, and the first OLED substrate of the display screen may be arranged correspondingly to the slotted area, so that the photosensitive element can perform operations such as collecting external light through the first OLED substrate.
  • part of the first conductive layer of the first OLED substrate serves as the first plate of the storage capacitor, and the other part serves as the gate of the first transistor, then the gate of the first transistor and the first of the storage capacitor
  • the plate and the connection between the two can be completed in the same step, there is no need to prepare the connection structure between the gate of the first transistor and the first plate of the storage capacitor after the formation, which can simplify the first driving circuit
  • the manufacturing process flow of the unit further simplifies the manufacturing process flow of the driving circuit layer of the first OLED substrate.
  • the above electronic device such as a display device may be a digital device such as a mobile phone, a tablet, a palmtop computer, an ipad, or the like.

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Abstract

本申请提供了一种显示面板及其制备方法、显示装置。所述显示面板具有第一显示区及第二显示区，所述显示面板还包括位于所述第一显示区及所述第二显示区的衬底、驱动电路层、发光功能膜层及导电层；所述驱动电路层形成于所述衬底上；所述发光功能膜层形成于所述驱动电路层上；所述导电层形成于所述发光功能膜层上，位于所述第一显示区的导电层的厚度小于位于所述第二显示区的导电层的厚度。

Description

显示面板及其制备方法、显示装置 技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板及其制备方法、显示装置。
背景技术
随着电子设备的快速发展，用户对屏占比的要求越来越高，使得电子设备的全面屏显示受到业界越来越多的关注。电子设备如手机、平板电脑等，由于需要集成诸如前置摄像头、听筒以及红外感应元件等，故而可通过在显示屏上开槽(Notch)，在开槽区域设置摄像头、听筒以及红外感应元件等，但开槽区域并不能用来显示画面，如刘海屏。或者采用在屏幕上开孔的方式来设置摄像头等，然而，对于实现摄像功能的电子设备来说，外界光线可通过屏幕上的开孔处进入位于屏幕下方的感光元件，引起不良的成像效果。如此，这些电子设备的显示屏均不是全面屏，并不能在整个屏幕的各个区域均进行显示，如在摄像头区域不能显示画面。
发明内容
根据本申请实施例的第一方面，提供了一种显示面板，所述显示面板具有第一显示区及第二显示区，所述显示面板包括位于所述第一显示区及所述第二显示区的衬底、驱动电路层、发光功能膜层及导电层；所述驱动电路层形成于所述衬底上；所述发光功能膜层形成于所述驱动电路层上；所述导电层形成于所述发光功能膜层上，位于所述第一显示区的导电层的厚度小于位于所述第二显示区的导电层的厚度。
根据本申请实施例的第二方面，提供了一种显示装置，包括：设备本体，具有器件区；上述的显示面板，覆盖在所述设备本体上；其中，所述器件区位于所述第一显示区下方，且所述器件区中设置有透过所述第一显示区进行光线采集的感光元件。
上述的显示装置，由于其包括的显示面板的位于第一显示区的导电层的厚度小于位于第二显示区的导电层的厚度，可使得第一显示区的透光率大于第二显示区的透光率，从而设置于第一显示区下方的感光元件可接收到足够的光线，保证感光元件可正常工作。
根据本申请实施例的第三方面，提供了一种显示面板的制备方法，所述显示面板具有第一显示区及第二显示区，所述制备方法包括：形成衬底；在所述衬底上形成驱动电路层；在所述驱动电路层上形成发光功能膜层；在所述发光功能膜层上形成导电层，位于所述第一显示区的导电层的厚度小于位于所述第二显示区的导电层的厚度。
根据本申请实施例的第四方面，提供了一种阵列基板，所述阵列基板包括透明的第一OLED基板及非透明的第二OLED基板，所述第一OLED基板至少部分被所述第二OLED基板包围；所述第一OLED基板和所述第二OLED基板包括衬底、形成于所述衬底上的驱动电路层、形成于所述驱动电路层上的发光功能膜层。所述第一OLED基板的所述驱动电路层包括多个第一驱动电路单元，所述第一驱动电路单元包括存储电容及第一晶体管，所述存储电容包括第一极板与第二极板；所述第一驱动电路单元具有第一导电层，所述第一导电层的一部分作为所述第一极板，另一部分作为所述第一晶体管的栅极。
上述的阵列基板，由于其第一OLED基板的第一导电层的一部分作为存储电容的第一极板，另一部分作为第一晶体管的栅极，则第一晶体管的栅极、存储电容的第一极板及二者之间的连接可通过同一步骤完成时，无需在第一晶体管的栅极、存储电容的第一极板形成之后再制备二者之间的连接结构，可简化第一驱动电路单元的制备工艺流程。
根据本申请实施例的第五方面，提供了一种显示屏，所述显示屏包括上述的阵列基板及封装结构，所述封装结构设置在所述阵列基板的远离所述衬底的一侧上。
上述的显示屏，由于其第一OLED基板的第一导电层的一部分作为存储电容的第一极板，另一部分作为第一晶体管的栅极，则第一晶体管的栅极、存储电容的第一极板及二者之间的连接可通过同一步骤完成时，无需在第一晶体管的栅极、存储电容的第一极板形成之后再制备二者之间的连接结构，可简化第一驱动电路单元的制备工艺流程，进而简化第一OLED基板的驱动电路层的制备工 艺流程。
根据本申请实施例的第六方面，提供了一种显示设备，所述显示设备包括：设备本体，具有器件区；上述的显示屏，覆盖在所述设备本体上；其中，所述器件区位于所述第一OLED基板下方，且所述器件区中设置有透过所述第一OLED基板进行光线采集的感光元件。
附图说明
图1是本申请实施例提供的显示面板的俯视图；
图2为图1所示的显示面板沿CC’线进行剖切的剖视图；
图3是图1所示的一种显示面板沿CC’线进行剖切的部分剖视图；
图4是图1所示的显示面板的衬底的剖视图；
图5是图1所示的另一种显示面板沿CC’线进行剖切的部分剖视图；
图6为本申请实施例提供的一种显示面板的第一显示区的剖视图；
图7是本申请实施例提供的一种第一驱动电路单元的电路图；
图8是本申请实施例提供的另一种显示面板的第一显示区的剖视图；
图9是本申请实施例提供的另一种第一驱动电路单元的电路图；
图10是本申请实施例提供的显示装置的侧视图；
图11是图10所示的显示装置的设备本体的结构示意图；
图12是本申请实施例提供的显示面板的制备方法的流程图；
图13是图12中的形成衬底的方法流程图；
图14是本申请实施例提供的衬底层的结构示意图；
图15是本申请实施例提供的第一中间结构的结构示意图；
图16是本申请实施例提供的第二中间结构的结构示意图；
图17是本申请实施例提供的第三中间结构的结构示意图；
图18是本申请实施例提供的在所述发光功能膜层上形成导电层的方法流程图；
图19是本申请实施例提供的第四中间结构的结构示意图；
图20是本申请实施例提供的第五中间结构的结构示意图；
图21是本申请实施例提供的在所述发光功能膜层上形成导电层的又一种方法流程图；
图22是本申请实施例提供的第六中间结构的结构示意图；
图23是本申请实施例提供的第七中间结构的结构示意图；
图24是本申请实施例提供的透明OLED基板的结构示意图；
图25是本申请实施例提供的一种透明OLED基板的剖视图；以及
图26是本申请实施例提供的另一种透明OLED基板的剖视图。
具体实施方式
下面结合附图，对本申请实施例中的显示面板及其制备方法进行详细说明。在不冲突的情况下，下述的实施例及实施方式中的特征可以相互补充或相互组合。
在诸如手机和平板电脑等智能电子设备上，由于需要集成诸如前置摄像头、光线感应器等感光元件，为了实现全面屏，则可将感光元件设置在电子设备的显示面板的背光面。然而，显示面板的透光率较低，设置在显示面板的背光面的感光元件难以接收到足够的光线，导致感光元件无法正常 工作，例如设置在显示面板的背光面的摄像头采集的光线较少，拍摄的图像的质量较差。
出现这种问题的原因在于，显示面板的膜层的厚度大而导致其透光率低。
为解决上述问题，本申请实施例提供了一种显示面板。如图1和图2所示，所述显示面板100具有第一显示区A及第二显示区B，所述第一显示区A下方可设置感光元件。所述显示面板100包括位于第一显示区A和第二显示区B的衬底1、驱动电路层2、发光功能膜层3及导电层4。所述驱动电路层2形成于所述衬底1上，所述发光功能膜层3形成于所述驱动电路层2上，所述导电层4形成于所述发光功能膜层3上，位于所述第一显示区A的导电层的厚度d1小于位于所述第二显示区B的导电层的厚度d2。
在本申请实施例中，为描述方便，将由衬底1指向驱动电路层2的方向定义为上，将由驱动电路层2指向衬底1的方向定义为下，以此确定出上下方向。不同的方向定义方式并不会影响工艺的实质操作内容以及产品的实际形态。
本申请实施例提供的显示面板100，由于位于第一显示区A的导电层的厚度小于位于第二显示区B的导电层的厚度，可使得第一显示区A的透光率大于第二显示区B的透光率，从而设置于第一显示区A下方的感光元件可接收到足够的光线，保证感光元件可正常工作。
所述第二显示区B可至少部分包围所述第一显示区A，如图1所示的显示面板100中，所述第二显示区B全部包围所述第一显示区A，在其他实施例中，所述第二显示区B可部分包围所述第一显示区A。所述第二显示区B为显示面板100的主要显示区域，通常占据显示面板90％以上的面积，第一显示区A的下方通常可用于设置摄像头、光线传感器等感光器件。
在一个实施例中，参见图3，导电层4位于所述第一显示区A的部分为第一子导电层41，导电层4位于第二显示区的部分包括第二子导电层42和位于第二子导电层42上的第三子导电层43。
其中，第一子导电层41的材料为氧化铟锡、氧化铟锌、掺杂银的氧化铟锡或者掺杂银的氧化铟锌；或者，第一子导电层41的材料包括Mg和Ag中的至少一种。优选的，第一子导电层41包括Mg和Ag两种材料，且Mg的质量与Ag的质量的比例范围为1:4～1:20。如此设置，可保证第一显示区A的透光率较大，从而设置在第一显示区A下方的传感器可接收更多的光线。
第二子导电层42和第三子导电层43中的一层可与第一子导电层41的材质相同且在同一工艺步骤中形成。在形成导电层4时，先同时形成第二子导电层42与第一子导电层41，之后再在第二子导电层42上形成第三子导电层43，第二子导电层42与第一子导电层41的材料相同，第三子导电层43的材料可包括Mg和Ag中的至少一种。或者，在形成导电层4时，首先形成第二子导电层42，再同时形成第一子导电层41和第三子导电层43，第一子导电层41和第三子导电层43的材料相同，第二子导电层42的材料可包括Mg和Ag中的至少一种。
在一个实施例中，所述导电层4可为阴极层。其中，阴极层可以是面电极，覆盖显示面板100的整个区域。也即是，第一子导电层41覆盖第一显示区域A，第二子导电层42与第三子导电层43覆盖第二显示区B。
在一个实施例中，位于所述第一显示区A的第一子导电层41的厚度与位于第二显示区B的导电层的厚度(也即是第二子导电层42和第三子导电层43的总厚度)的比例范围可为0.25:1～0.85:1，例如可为0.3、0.5、0.7、0.85等。其中，本申请实施例中，厚度指的是膜层在上下方向上的尺寸。
进一步地，位于所述第一显示区A的第一子导电层41的厚度范围可为5～10nm，位于第二显示区B的第二子导电层42和第三子导电层43的总厚度的范围可为12～20nm。如此设置，可保证第一子导电层41的透光率较好，同时保证导电层4的导电性能及机械性能良好，确保显示面板100可正常工作。
在一个实施例中，发光功能膜层3可包括有机发光材料和公共层。其中，公共层可包括电子注入层、电子传输层、空穴注入层和空穴传输层。电子注入层及电子传输层位于有机发光材料和导电层4之间，空穴注入层和空穴传输层位于驱动电路层2与发光功能膜层3之间。其中，电子注入层、电子传输层、空穴注入层和空穴传输层均为整层设置，覆盖第一显示区A及第二显示区B。
进一步地，所述电子注入层的材料包括Ag，以及Mg、K、Li、Cs中的至少一种。优选的，所述电子注入层中Ag的质量与所述电子注入层的总质量的比例范围为1:5～1:21，也即是电子注入层中Ag的质量与其他组分的质量的比值范围为1:4～1:20。
显示面板100还可包括与发光功能膜层3同层设置的像素限定层7，像素限定层7上可开设有像素开口，发光功能膜层3的有机发光材料设置在像素开口内。
在一个实施例中，再次参见图2，所述衬底1可包括第一衬底11及第二衬底12，所述第一衬底11位于第一显示区A，所述第二衬底12位于第二显示区B，所述第一衬底11的透光率大于第二衬底12的透光率。如此，可使得第一显示区A的透光率较大，更利于设置在第一显示区A下方的感光元件接收较多的光线。
所述衬底1可为柔性衬底或刚性衬底。刚性衬底例如可以是玻璃基板、石英衬底或者塑料衬底等透明衬底。
所述衬底1为柔性衬底时，参见图4，所述第二衬底12可为多层有机材料层和多层无机材料层交叠的叠层；所述第一衬底至少包括透明材料层111，所述第一衬底11的厚度与所述第二衬底12的厚度相同。第一衬底11的厚度与所述第二衬底12的厚度相同时，利于将显示面板100整体设置为同样的厚度，从而使显示面板100整体更加美观。
为保证第一衬底11的透光率较高，透明材料层111的材料需采用高透光率的材料。优选的，所述第一衬底11的透明材料层111的透光率可大于90％。进一步地，第一衬底11的透明材料层111的材料可包括PET(聚对苯二甲酸乙二酯)、PC(聚碳酸酯)中的至少一种。PET及PC的透光率均为92％，可使得第一衬底11的透光率较高。
为了保证显示面板100工作时第二显示区B的亮度较高，需使第二显示区B的透光率较低，以减小第二显示区B的亮度损失。所述第二显示区B的第二衬底12的透光率可在30％-60％以内，以降低第二显示区B的透光率，提高第二显示区B在显示时的亮度。
其中，第二衬底12的有机材料层的材质可为PI(聚酰亚胺)，PI的折射率与PET及PC的折射率差别不大，则第一衬底11与第二衬底12的折射率接近，从而可避免因第一衬底11与第二衬底12的折射率不同而导致第一显示区A与第二显示区B的显示效果差别较大，使显示面板100的整体效果比较一致。其中，第二衬底12的无机材料层的材料可为SiO 2、SiNx等。
进一步地，所述第一衬底11还包括有机材料层与无机材料层交叠的叠层112，所述第一衬底11的叠层112与所述第二衬底12的叠层共用一部分膜层材料。具体地，第一衬底11的有机材料层与第二衬底12的位于同层的有机材料层共用膜层材料，第一衬底的无机材料层与第二衬底12的位于同层的无机材料层共用膜层材料。
再次参见图4，所述第一衬底11的叠层112可包括第一有机层113和位于所述第一有机层113上的第一无机层114，所述第二衬底12的叠层包括由下至上依次交叠的第二有机层121、第二无机层122、第三有机层123和第三无机层124，所述第一有机层113与部分所述第三有机层123共用同一膜层材料，所述第一无机层114与所述第三无机层124共用同一膜层材料，所述第一有机层113的厚度小于所述第三有机层123的厚度，所述第一无机层114的厚度等于所述第三无机层124的厚度。其中，第一无机层114与所述第三无机层124共用同一膜层材料指的是二者材料相同且在同一工艺步骤中形成，第一有机层113与部分所述第三有机层123共用同一膜层材料指的是二者的材料相同且同时形成。形成第一有机层113与第三有机层123时，可先同时形成同样厚度的有机材料层，之后将位于第一显示区A的有机材料层部分地刻蚀掉，即可得到第一有机层113和第三有机层123。
所述第一衬底11的透明材料层111可设置在所述第一衬底11的叠层112的下方，且所述第一衬底11的透明材料层111的下端面与所述第二衬底12的下端面齐平。更进一步地，第一衬底11的叠层112的上端面与第二衬底12的上端面齐平，则第一衬底11的总厚度与第二衬底12的总厚度相同，从而更利于将显示面板100的厚度整体上大致相同，利于提高显示面板100的美观性。
在一个实施例中，再次参见图4，第一衬底11的下方、第二衬底12的下方、所述第一衬底11的透明材料层111的侧面与所述第二衬底12之间和/或所述第一衬底11的透明材料层111的上端与所述第一衬底11的叠层112之间设置有保护层5。保护层5可对第一衬底11和第二衬底12进行保护，提高显示面板的机械强度，进而提高显示面板100的使用寿命。
其中，所述保护层5的材料可包括IZO、ITO、SiNx、SiOx中的至少一种。上述材料可使得保护层5的透光率较高，避免保护层5的设置影响第一显示区A的透光率。
在一个实施例中，衬底1与驱动电路层2之间可设置有缓冲层8，缓冲层8的材质可为SiNx或SiOx，缓冲层8可提高衬底1与驱动电路层2的粘度性能，避免衬底1与驱动电路层2脱离，提高 显示面板100的使用寿命。
本申请实施例提供的显示面板100，第一显示区A的驱动方式可为被动驱动或者主动驱动，第一显示区A的驱动方式为被动驱动时，第一显示区A为PMOLED(Passive-Matrix Organic Light-Emitting Diode)显示区；第一显示区A的驱动方式为主动驱动时，第一显示区A为AMOLED(Active-Matrix Organic Light-Emitting Diode)显示区。第二显示区B的驱动方式为主动驱动，第二显示区为AMOLED显示区。
图3是一种显示面板100的第一显示区A及部分第二显示区B沿图1中的CC’线剖切的剖视图。参见图3，驱动电路层2位于第二显示区B的部分可包括栅极绝缘层24、位于栅极绝缘层24上的电容绝缘层25、位于电容绝缘层25上的层间介质层26、位于层间介质层26上的平坦化层27及位于平坦化层27上的阳极层23，以及设置在膜层之间的晶体管(未图示)和存储电容(未图示)。其中，阳极层23的材质可以是两层氧化铟锡膜层之间设置Ag膜层的夹层结构。
第一显示区A为PMOLED显示区时，驱动电路层2位于第一显示区A中的结构可有如下几种方式。
第一种方式中，参见图3，驱动电路层2位于第一显示区A的部分包括栅极绝缘层24、位于栅极绝缘层24上的电容绝缘层25、位于电容绝缘层25上的层间介质层26、位于层间介质层26上的平坦化层27及位于平坦化层27上的阳极层21。其中，第一显示区A的栅极绝缘层24、电容绝缘层25、层间介质层26、平坦化层27及位于平坦化层27与第二显示区B的对应的膜层位于同一层，且在同一工艺中形成。阳极层21的材料可为由透明材料制成的单层膜层结构。进一步地，阳极层21的透明材料的透明率大于或等于90％。优选的，所述透明材料为氧化铟锡、氧化铟锌、掺杂银的氧化铟锡或者掺杂银的氧化铟锌。如此可确保第一显示区A的阳极层21的透光率较高，进而使得第一显示区A的透光率提高。
第二种方式中，驱动电路层2位于第一显示区A的部分可仅包括阳极层21，而不包括其他膜层，如此可使得第一显示区A的驱动电路层的透光率较高。其中，阳极层21的材料可为由透明材料制成的单层膜层结构。进一步地，制备阳极层21的透明材料的透明率大于或等于90％。优选的，所述透明材料为氧化铟锡、氧化铟锌、掺杂银的氧化铟锡或者掺杂银的氧化铟锌。
第三种方式中，参见图5(图5是一种显示面板100的第一显示区A及部分第二显示区B沿图1中的CC’线剖切的剖视图)，驱动电路层2位于所述第一显示区A的部分可包括阳极层21及设置在阳极层21下的透明有机材料膜层22。其中，透明有机材料膜层22及阳极层21可由透明材料制成，且阳极层21的材料可为由透明材料制成的单层膜层结构。进一步地，透明有机材料膜层22和阳极层21的透光率均大于90％。优选的，制备阳极层21的透明材料为氧化铟锡、氧化铟锌、掺杂银的氧化铟锡或者掺杂银的氧化铟锌。透明有机材料膜层22的材料可为PET或PC等。更进一步地，所述第二显示区B的多层绝缘层(即第二显示区B的栅极绝缘层24、电容绝缘层25、层间介质层26及平坦化层27)的总厚度与第一显示区A的透明有机材料膜层22的厚度相同，从而使得驱动电路层2位于第一显示区A的部分与位于第二显示区B的部分的厚度相同，利于将显示面板100的厚度整体上大致相同，从而提高显示面板100的美观性。
第一显示区A为AMOLED显示区时，驱动电路层2位于第一显示区A的部分中设置有多个晶体管和多个存储电容，多个晶体管和多个存储电容构成多个第一驱动电路单元，用以驱动发光功能膜层3的有机发光材料发光，从而使第一显示区A显示。
第二显示区B为AMOLED显示区，驱动电路层2位于第二显示区B的部分中设置有多个晶体管和多个存储电容，多个晶体管和多个存储电容构成多个第二驱动电路单元，用以驱动发光功能膜层3的有机发光材料发光，从而使第二显示区B显示。
在一个实施例中，所述第一驱动电路单元的晶体管的数量小于所述第二驱动电路单元的晶体管的数量。可选的，第一驱动电路单元可为2TIC驱动电路，(即第一驱动电路单元中包括两个晶体管和一个存储电容)，或者第一驱动电路单元可为3TIC驱动电路(即第一驱动电路单元中包括三个晶体管和一个存储电容)。第二驱动电路单元例如可为7TIC电路(即第二驱动电路单元中包括七个晶体管和一个存储电容)、5TIC电路(即第二驱动电路单元中包括五个晶体管和一个存储电容)、4TIC电路(即第二驱动电路单元中包括四个晶体管和一个存储电容)等。如此设置，第一驱动电路单元的结构复杂度小于第二驱动电路单元的结构复杂度，从而驱动电路层2位于第一显示区A的部分中的导电层的面积较小，进而可提高第一显示区A的透光率。
所述第一驱动电路单元的晶体管可包括第一晶体管，所述第一驱动电路单元的存储电容包括第一极板与第二极板。参见图6和图8，驱动电路层2位于第一显示区A的部分具有栅极绝缘层24、位于栅极绝缘层24上的电容绝缘层25、位于电容绝缘层25上的层间介质层26、位于层间介质层26上的平坦化层27、以及位于栅极绝缘层24与电容绝缘层25之间的第一导电层91，所述第一导电层91的一部分912作为所述存储电容的第一极板，另一部分911作为所述第一晶体管的栅极。如此设置，第一晶体管的栅极、存储电容的第一极板及二者之间的连接可通过同一工艺步骤完成时，无需在第一晶体管的栅极、存储电容的第一极板形成之后再制备二者之间的连接结构，可简化第一驱动电路单元的制备工艺流程。其中，第一极板可为存储电容的下极板，第二极板可为存储电容的上极板。
第一驱动电路单元为2TIC驱动电路时，位于所述第一显示区的驱动电路层还包括电源线、数据线、扫描线及与多个第一驱动电路单元一一对应的阳极层。如图6所示，驱动电路层2位于第一显示区的部分具有位于平坦化层27上的与第一驱动电路单元一一对应的阳极层21及第二导电层92，所述第二导电层92的一部分921作为所述存储电容的第二极板，另一部分922作为所述电源线。如此设置，电源线、存储电容的第二极板及二者之间的连接可通过同一工艺步骤完成时，无需在电源线、存储电容的第二极板形成之后再制备二者之间的连接结构，可简化第一驱动电路单元的制备工艺流程。
图6所示的驱动电路层2位于第一显示区A的部分除了图中所示的第一导电层91、第二导电层92及阳极层21，还包括数据线、扫描线、第一晶体管的源极和漏极、第二晶体管的栅极、源极和漏极，但是图6中未示出这些结构。
第一驱动电路单元为2TIC驱动电路时，其电路图如图7所示，所述第一驱动电路单元的晶体管包括第一晶体管T1及第二晶体管T2，所述第一晶体管T1的源极及存储电容C的第二极板D2分别与所述电源线连接，所述第一晶体管T1的漏极与对应的OLED(Organic Light-Emitting Diode)的阳极层连接，所述第一晶体管的栅极与存储电容C的第一极板D1连接；所述第二晶体管T2的栅极与所述扫描线连接，所述第二晶体管T2的漏极分别与存储电容C的第一极板D1及第一晶体管T1的栅极连接，所述第二晶体管T2的源极与所述数据线连接。
由于第二晶体管T2的漏极分别与存储电容C的第一极板D1及第一晶体管T1的栅极连接，而第一导电层的一部分作为存储电容C的第一极板D1，另一部分作为所述第一晶体管T1的栅极，则在结构上来说第二晶体管T2的漏极直接与第一导电层连接。由于第一晶体管T1的源极分别与存储电容C的第二极板D2及所述电源线连接，第二导电层的一部分作为存储电容C的第二极板D2，另一部分作为所述电源线，则在结构上来说第一晶体管T1的源极与第二导电层连接。
在一个实施例中，所述第一晶体管T1、所述第二晶体管T2、所述存储电容C、所述数据线、所述扫描线及阳极层的材料可由透明材料制成。优选的，所述透明材料的透明率大于或等于90％。进一步地，所述透明材料为氧化铟锡、氧化铟锌、掺杂银的氧化铟锡或者掺杂银的氧化铟锌。如此，可使得第一显示区A的驱动电路层的透光率较高，进而使得第一显示区A的透光率提高。
第一驱动电路单元为3TIC驱动电路时，位于所述第一显示区A的驱动电路层包括电源线、数据线、第一扫描线、第二扫描线、参考电位线及与多个第一驱动电路单元一一对应的阳极层。如图8所示，驱动电路层2位于第一显示区的部分具有第一导电层91、以及位于平坦化层27上的第三导电层93。所述第三导电层93的一部分932作为所述第二极板，另一部分931作为对应的阳极层。如此设置，阳极层、存储电容的第二极板及二者之间的连接可通过同一工艺步骤完成时，无需在阳极层、存储电容的第二极板形成之后再制备二者之间的连接结构，可简化第一驱动电路单元的制备工艺流程。
图8所示的驱动电路层2位于第一显示区的部分除了图中所示的第一导电层91和第三导电层93，还包括电源线、数据线、第一扫描线、第二扫描线、参考电位线、第一晶体管的源极和漏极、第三晶体管的栅极、源极和漏极、第四晶体管的栅极、源极和漏极，但是图8中未示出这些结构。
第一驱动电路单元为3TIC驱动电路时，其电路图如图9所示，所述第一驱动电路单元的晶体管包括第一晶体管T1、第三晶体管T3和第四晶体管T4，所述第三晶体管T3的源极与所述数据线连接，所述第三晶体管T3的栅极与所述第一扫描线连接，所述第三晶体管T3的漏极分别与存储电容C的第一极板D1及第一晶体管T1的栅极连接，所述第一晶体管T1的漏极与所述电源线连接，所述第一晶体管T1的源极分别与OLED的阳极层、及存储电容C的第二极板D2连接，所述第四晶体 管T4的栅极与所述第二扫描线连接，所述第四晶体管T4的源极与所述参考电位线连接，所述第四晶体管T4的漏极与OLED的阳极层连接。
由于第三晶体管T3的漏极分别与存储电容C的第一极板及第一晶体管T1的栅极连接，而第一导电层的一部分作为存储电容C的第一极板，另一部分作为所述第一晶体管T1的栅极，则在结构上来说，第三晶体管T3的漏极与第一导电层连接。由于所述第一晶体管T1的源极分别与阳极层及存储电容C的第二极板D2连接，所述第四晶体管T4的漏极与阳极层连接，而第三导电层的一部分作为存储电容C的第二极板D2，另一部分作为对应的阳极层，则在结构上来说，第一晶体管T1的源极与第三导电层连接，第四晶体管T4的漏极与第三导电层连接。
在一个实施例中，第一驱动电路单元的所述第一晶体管T1、所述第三晶体管T3、所述第四晶体管T4、所述存储电容C、所述数据线、所述第一扫描线、所述第二扫描线、所述参考电位线及所述阳极层均由透明材料制成。优选的，所述透明材料的透明率大于或等于90％。进一步地，所述透明材料为氧化铟锡、氧化铟锌、掺杂银的氧化铟锡或者掺杂银的氧化铟锌。如此，可使得第一显示区A的驱动电路层的透光率较高，进而使得第一显示区A的透光率提高。
本申请实施例还提供了一种显示装置200，如图10所示，所述显示装置200包括设备本体201及上述的显示面板100。如图11所示，设备本体201具有器件区202，显示面板100覆盖在所述设备本体201上。其中，所述器件区202位于所述显示面板100的第一显示区下方，且所述器件区202中设置有透过所述显示面板100的第一显示区进行光线采集的感光元件203。
其中，所述感光元件203可包括摄像头和/或光线感应器。器件区403中还可设置除感光元件203的其他器件，例如陀螺仪或听筒等器件。
器件区202可以是开槽区，显示面板100的第一显示区可对应于开槽区贴合设置，以使得感光元件203能够透过该第一显示区对外部光线进行采集等操作。
上述的显示装置200，由于其包括的显示面板100的位于第一显示区的导电层的厚度小于位于第二显示区的导电层的厚度，可使得第一显示区的透光率大于第二显示区的透光率，从而设置于第一显示区下方的感光元件可接收到足够的光线，保证感光元件可正常工作。
上述的例如显示装置的电子设备可以为手机、平板、掌上电脑、ipad等数码设备。
本申请实施例还提供了一种显示面板的制备方法，所述显示面板具有第一显示区及第二显示区，所述制备方法包括如下步骤101至步骤104，如图12所示。
在步骤101中，形成衬底。
其中，衬底可为柔性衬底或刚性衬底。刚性衬底例如可以是玻璃基板、石英衬底或者塑料衬底等透明衬底。
衬底为柔性衬底时，所述形成衬底的步骤101可包括如下步骤1011至步骤1015，如图13所示。
在步骤1011中，形成衬底层。
其中，衬底层可以为多层有机材料层和多层无机材料层交叠的叠层。如图14所示，衬底层101包括由下至上依次交叠的第二有机层121、第二无机层122、第三有机层123和第三无机层124。
在步骤1012中，在所述衬底层的与所述第一显示区对应的位置处形成凹槽。
通过步骤1012可得到第一中间结构，图15为第一中间结构的结构示意图。如图15所示，衬底层101的底部形成凹槽102。其中，可采用刻蚀工艺将位于第一显示区A的第二有机层121、第二无机层122及部分厚度的第三有机层123刻蚀掉而形成凹槽102。
在步骤1013中，在所述凹槽内形成透明材料层。
其中，透明材料层的透光率可大于90％。进一步地，透明材料层的材料可包括PET、PC中的至少一种。
在一个实施例中，在所述凹槽内形成透明材料层的步骤1013之前，该制备方法还可包括步骤1014：在所述凹槽的内表面及所述衬底层的下方形成保护层。通过该步骤可得到第二中间结构，图16为第二中间结构的结构示意图，凹槽102的内表面及衬底层101的位于第二显示区B的部分的下方形成保护层5。
在步骤1013可在第二中间结构的基础上实施，在第二中间结构的基础上在凹槽102内形成透明材料层111，可得到第三中间结构。图17为第三中间结构的结构示意图。
进一步地，在所述凹槽内形成透明材料层的步骤1013之后，该制备方法还可包括步骤1015：在所述透明材料层的下方形成保护层。
该步骤中，在第三中间结构的基础上，在透明材料层111的下方形成保护层5，可得到图4所示的结构，也即是得到衬底1。
其中，透明材料层111的下端面可与衬底层位于第二显示区B的部分的下端面齐平，从而使得位于第一显示区A的衬底与位于第二显示区B的衬底的厚度相同。
在步骤102中，在所述衬底上形成驱动电路层。
在步骤103中，在所述驱动电路层上形成发光功能膜层。
在步骤104中，在所述发光功能膜层上形成导电层，位于所述第一显示区的导电层的厚度小于位于所述第二显示区的导电层的厚度，所述第一显示区的导电层与所述第二显示区的部分导电层同时形成。
在一个实施例中，如图18所示，在所述发光功能膜层上形成导电层的步骤104可通过如下步骤1041和步骤1042完成。
在步骤1041中，在所述发光功能膜层上形成第一导电膜层，所述第一导电膜层覆盖所述第一显示区及所述第二显示区。
通过步骤1041可得到第四中间结构，图19所示为第四中间结构的结构示意图。如图19所示，驱动电路层2形成于衬底1上，发光功能膜层3形成于驱动电路层2上，A为第一显示区，B为第二显示区。第一导电膜层401形成在发光功能膜层3上，第一导电膜层401同时覆盖位于第一显示区A和第二显示区B的发光功能膜层3。
其中，第一导电膜层401的材料可为氧化铟锡、氧化铟锌、掺杂银的氧化铟锡或者掺杂银的氧化铟锌。或者，第一导电膜层401的材料包括Mg和Ag中的至少一种。优选的，第一导电膜层401的材料包括Mg和Ag，且Mg的质量与Ag的质量的比例范围为1:4～1:20。
在步骤1042中，在所述第一导电膜层上形成第二导电膜层，所述第二导电膜层仅设置于第二显示区。
通过步骤1042可得到第五中间结构。图20为第五中间结构的结构示意图。其中，第二导电膜层402仅设置于第二显示区B上。
因此，通过步骤1041和步骤1042得到的导电层4中，导电层4位于第一显示区A的部分只有第一导电膜层401，导电层4位于第二显示区B的部分包括第一导电膜层401和第二导电膜层402。
其中，第二导电膜层的材料可包括Mg和Ag中的至少一种。
在另一个实施例中，如图21所示，在所述发光功能膜层上形成导电层的步骤104可通过如下步骤1043和步骤1044完成。
在步骤1043中，在位于所述第二显示区的所述发光功能膜层上形成第三导电膜层。
通过步骤1043可得到第六中间结构，图22为第六中间结构的结构示意图。如图22所示，驱动电路层2形成于衬底1上，发光功能膜层3形成于驱动电路层2上，A为第一显示区，B为第二显示区。第三导电膜层403形成在发光功能膜层3上，仅覆盖第二显示区B。
其中，第三导电膜层403的材料可与第二导电膜层402的厚度相同，第三导电膜层403的材料与第二导电膜层402的材料可相同，包括Mg和Ag中的至少一种。
在步骤1044中，在所述第一显示区的发光功能膜层上及所述第二显示区的第三导电膜层上形成第四导电膜层。
通过步骤1044可得到第七中间结构，图23所示第七中间结构的结构示意图。如图23所示，第四导电膜层404覆盖第一显示区A的发光膜层3及第二显示区B的第三导电膜层403。
因此，通过步骤1043和步骤1044得到的导电层4中，导电层4位于第一显示区A的部分只有第四导电膜层404，导电层4位于第二显示区B的部分包括第三导电膜层403和第四导电膜层404。
第四导电膜层404的材料可为氧化铟锡、氧化铟锌、掺杂银的氧化铟锡或者掺杂银的氧化铟锌。或者，第四导电膜层404的材料包括Mg和Ag中的至少一种。优选的，第三导电膜层403的材料包括Mg和Ag，且Mg的质量与Ag的质量的比例范围为1:4～1:20。第四导电膜层404的厚度可与第一导电膜层401的厚度相同，第四导电膜层404的材料可与第一导电膜层401的材料相同。
本申请实施例提供的制备方法制备得到的显示面板，位于第一显示区的导电层的厚度小于位于第二显示区的导电层的厚度，可使得第一显示区的透光率大于第二显示区的透光率，从而设置于第一显示区下方的感光元件可接收到足够的光线，保证感光元件可正常工作。
上述的制备方法制备的显示面板与上述实施例提供的显示面板100属于同一构思，相关细节参见上述显示面板100的实施例，在此不再赘述。
本申请实施例还提供了一种阵列基板，该阵列基板包括透明OLED基板300，如图24所示，所述透明OLED基板300或透明的第一OLED基板包括衬底1’、形成于所述衬底1’上的驱动电路层2’及形成于所述驱动电路层2’上的发光功能膜层3’。其中，所述驱动电路层2’包括多个第一驱动电路单元，所述第一驱动电路单元包括存储电容及第一晶体管，所述存储电容包括第一极板与第二极板。参见图25和图26，所述第一驱动电路单元具有第一导电层91’，所述第一导电层91’的一部分912’作为所述第一极板，另一部分911’作为所述第一晶体管的栅极。
在透明OLED基板300中，由于第一导电层的一部分作为所述第一极板，另一部分作为所述第一晶体管的栅极，则第一晶体管的栅极、存储电容的第一极板及二者之间的连接可通过同一工艺步骤完成时，无需在第一晶体管的栅极、存储电容的第一极板形成之后再制备二者之间的连接结构，可简化第一驱动电路单元的制备工艺流程。
其中，如图25和图26所示，透明OLED基板300的驱动电路层2’具有栅极绝缘层24’、位于栅极绝缘层24’上的电容绝缘层25’、位于电容绝缘层25’上的层间介质层26’、位于层间介质层26’上的平坦化层27’，第一导电层91’位于栅极绝缘层24’与电容绝缘层25’之间。
第一驱动电路单元可为2TIC驱动电路。第一驱动电路单元为2TIC驱动电路时，透明OLED基板300的驱动电路层还可包括电源线、数据线、扫描线及与多个第一驱动电路单元一一对应的阳极层。参见图25，透明OLED基板300的所述驱动电路层还具有位于平坦化层27’上的与第一驱动电路单元一一对应的阳极层21’及第二导电层92’，所述第二导电层92’的一部分921’作为所述存储电容的第二极板，另一部分922’作为所述电源线；所述第一驱动电路单元还包括第二晶体管，所述第一晶体管的源极与所述第二导电层92’连接，所述第一晶体管的漏极与对应的阳极层连接，所述第二晶体管的栅极与所述扫描线连接，所述第二晶体管的漏极分别与所述第一导电层连接，所述第二晶体管的源极与所述数据线连接。
图25所示的透明OLED基板300的驱动电路层2’除了图中所示的第一导电层91’、第二导电层92’、阳极层23’、栅极绝缘层24’、电容绝缘层25’、层间介质层26’及平坦化层27’，还包括数据线、扫描线、第一晶体管的源极和漏极、第二晶体管的栅极、源极和漏极，但是图25中未示出这些结构。
第一驱动电路单元为2TIC驱动电路时，其电路图如图7所示，阵列基板所包含的第一OLED基板的第一驱动电路单元为2T1C时的结构与上文描述的显示面板的第一驱动电路单元为2T1C时的结构相同，在此不再赘述。
所述第一晶体管T1、所述第二晶体管T2、所述存储电容C、所述数据线、所述扫描线及所述阳极层的材料由透明材料制成。优选的，所述透明材料的透明率大于或等于90％。进一步地，所述透明材料为氧化铟锡、氧化铟锌、掺杂银的氧化铟锡或者掺杂银的氧化铟锌。如此，可使得阵列基板所包含的透明OLED基板或第一OLED基板的驱动电路层的透光率较高，进而使得透明OLED基板或第一OLED基板的透光率提高。
第一驱动电路单元可为3TIC驱动电路。第一驱动电路单元为3TIC驱动电路时，所述驱动电路层可包括电源线、数据线、第一扫描线、第二扫描线、参考电位线及与多个第一驱动电路单元一一对应的阳极层。如图26所示，驱动电路层2’具有位于平坦化层27’上的第三导电层93’，所述 第三导电层93’的一部分932’作为所述第二极板，另一部分931’作为对应的阳极层。如此设置，阳极层、存储电容的第二极板及二者之间的连接可通过同一工艺步骤完成时，无需在阳极层、存储电容的第二极板形成之后再制备二者之间的连接结构，可简化第一驱动电路单元的制备工艺流程。
图26所示的透明OLED基板或第一OLED基板的驱动电路层2’除了图中所示的第一导电层91’、第三导电层93’、栅极绝缘层24’、电容绝缘层25’、层间介质层26’及平坦化层27’，还包括电源线、数据线、第一扫描线、第二扫描线、参考电位线、第一晶体管的源极和漏极、第三晶体管的栅极、源极和漏极、第四晶体管的栅极、源极和漏极，但是图26中未示出这些结构。
第一驱动电路单元为3TIC驱动电路时，其电路图如图9所示。阵列基板所包含的第一OLED基板的第一驱动电路单元为3T1C时的结构与上文描述的显示面板的第一驱动电路单元为3T1C时的结构相同，在此不再赘述。
优选的，所述第一晶体管T1、所述第三晶体管T3、所述第四晶体管T4、所述存储电容C、所述数据线、所述第一扫描线、所述第二扫描线、所述参考电位线及所述阳极层由透明材料制成。优选的，所述透明材料的透明率大于或等于90％。进一步地，所述透明材料为氧化铟锡、氧化铟锌、掺杂银的氧化铟锡或者掺杂银的氧化铟锌。如此，可使得阵列基板的透明OLED基板或第一OLED基板的驱动电路层的透光率较高，进而使得透明OLED基板或第一OLED基板的透光率提高。
本申请实施例提供的阵列基板包括第一OLED基板及第二OLED基板，所述第一OLED基板为透明OLED基板，所述第二OLED基板为非透明OLED基板；所述第一OLED基板与所述第二OLED基板共用同一衬底1，且所述第一OLED基板的发光功能膜层与所述第二OLED基板的发光功能膜层在同一工艺中形成。
本申请实施例提供的阵列基板，由于其第一OLED基板的第一导电层的一部分作为存储电容的第一极板，另一部分作为第一晶体管的栅极，则第一晶体管的栅极、存储电容的第一极板及二者之间的连接可通过同一步骤完成时，无需在第一晶体管的栅极、存储电容的第一极板形成之后再制备二者之间的连接结构，可简化第一驱动电路单元的制备工艺流程。第一OLED基板(即，上述的透明OLED基板)和第二OLED基板包括：衬底；驱动电路层，所述驱动电路层形成于所述衬底上；发光功能膜层，所述发光功能膜层形成于所述驱动电路层上。
其中，阵列基板的所述第一OLED基板可至少部分被所述第二OLED基板包围。
在一个实施例中，所述第二OLED基板的驱动电路层包括多个第二驱动电路单元，所述第二驱动电路单元包括的晶体管的数量大于所述第一驱动电路单元包括的晶体管的数量。可选的，第一驱动电路单元可为2TIC驱动电路，(即第一驱动电路单元中包括两个晶体管和一个存储电容)，或者第一驱动电路单元可为3TIC驱动电路(即第一驱动电路单元中包括三个晶体管和一个存储电容)。第二驱动电路单元例如可为7TIC电路(即第二驱动电路单元中包括七个晶体管和一个存储电容)、5TIC电路(即第二驱动电路单元中包括五个晶体管和一个存储电容)、4TIC电路(即第二驱动电路单元中包括四个晶体管和一个存储电容)等。如此设置，第一驱动电路单元的结构复杂度小于第二驱动电路单元的结构复杂度，从而第一OLED基板的驱动电路层的导电层的面积较小，从而可提高第一OLED基板的透光率。
本申请实施例还提供了一种显示屏，所述显示屏包括上述的阵列基板及封装结构，所述封装结构设置在所述阵列基板上，所述阵列基板的第一OLED基板下方可设置感光元件。
本申请实施例提供的显示屏，由于其第一OLED基板的第一导电层的一部分作为存储电容的第一极板，另一部分作为第一晶体管的栅极，则第一晶体管的栅极、存储电容的第一极板及二者之间的连接可通过同一步骤完成时，无需在第一晶体管的栅极、存储电容的第一极板形成之后再制备二者之间的连接结构，可简化第一驱动电路单元的制备工艺流程，进而简化第一OLED基板的的驱动电路层的制备工艺流程。
其中，封装层可以是薄膜封装结构，薄膜封装结构可包括有机材料层和无机材料层交替叠加的叠层，其中有机材料层和无机材料层均为透明材料，无机材料层的材料例如可以是SiO 2，SiNx以及Al 2O 3等，有机材料层的材料例如可以是PI、PET等。封装层也可以是玻璃盖板或者是玻璃粉封装结构。
本申请实施例还提供了一种显示设备，所述显示设备包括设备本体及上述的显示屏。设备本体具有器件区，显示屏覆盖在所述设备本体上。其中，所述器件区位于所述第一OLED基板下方， 且所述器件区中设置有透过所述第一OLED基板进行光线采集的感光元件。
其中，所述感光元件可包括摄像头和/或光线感应器。器件区中还可设置除感光元件的其他器件，例如陀螺仪或听筒等器件。
器件区可以是开槽区，显示屏的第一OLED基板可对应于开槽区贴合设置，以使得感光元件能够透过该第一OLED基板对外部光线进行采集等操作。
由于上述的显示设备中，第一OLED基板的第一导电层的一部分作为存储电容的第一极板，另一部分作为第一晶体管的栅极，则第一晶体管的栅极、存储电容的第一极板及二者之间的连接可通过同一步骤完成时，无需在第一晶体管的栅极、存储电容的第一极板形成之后再制备二者之间的连接结构，可简化第一驱动电路单元的制备工艺流程，进而简化第一OLED基板的驱动电路层的制备工艺流程。
上述例如显示设备的电子设备可以为手机、平板、掌上电脑、ipad等数码设备。
在附图中，为了图示的清晰可能夸大了层和区域的尺寸。而且可以理解，当元件或层被称为在另一元件或层“上”时，它可以直接在其他元件上，或者可以存在中间的层。另外，可以理解，当元件或层被称为在另一元件或层“下”时，它可以直接在其他元件下，或者可以存在一个以上的中间的层或元件。另外，还可以理解，当层或元件被称为在两层或两个元件“之间”时，它可以为两层或两个元件之间唯一的层，或还可以存在一个以上的中间层或元件。通篇相似的参考标记指示相似的元件。

Claims (20)

  1. 一种显示面板，包括：第一显示区及第二显示区，所述显示面板还包括：
    衬底；
    驱动电路层，所述驱动电路层形成于所述衬底上；
    发光功能膜层，所述发光功能膜层形成于所述驱动电路层上；以及
    导电层，所述导电层形成于所述发光功能膜层上；其中
    所述衬底、所述驱动电路层、所述发光功能层和所述导电层位于所述第一显示区及所述第二显示区内，位于所述第一显示区的导电层的厚度小于位于所述第二显示区的导电层的厚度。
  2. 如权利要求1所述的显示面板，其中，
    位于所述第一显示区的导电层的材料为氧化铟锡、氧化铟锌、掺杂银的氧化铟锡或者掺杂银的氧化铟锌；或者，
    位于所述第一显示区的导电层的材料包括Mg和Ag中的至少一种。
  3. 如权利要求1所述的显示面板，其中
    所述导电层为阴极层；
    所述发光功能膜层包括有机发光材料及位于所述有机发光材料与所述导电层之间的电子注入层，所述电子注入层的材料包括Ag，还包括Mg、K、Li、Cs中的至少一种；并且
    所述电子注入层中Ag的质量与所述电子注入层的总质量的比例范围为1:5～1:21。
  4. 如权利要求1所述的显示面板，其中，位于所述第一显示区的导电层的厚度与位于第二显示区的导电层的厚度的比例范围为0.25:1～0.85:1；并且
    位于所述第一显示区的导电层的厚度范围为5～10nm，位于第二显示区的导电层的厚度范围为12～20nm。
  5. 如权利要求1所述的显示面板，其中，所述衬底包括第一衬底及第二衬底，所述第一衬底位于第一显示区，第二衬底位于第二显示区，所述第一衬底的透光率大于第二衬底的透光率。
  6. 如权利要求5所述的显示面板，其中，
    所述第二衬底为多层有机材料层和多层无机材料层交叠的叠层；所述第一衬底至少包括透明材料层，所述第一衬底的厚度与所述第二衬底的厚度相同。
  7. 如权利要求6所述的显示面板，其中，
    所述第一衬底还包括有机材料层与无机材料层交叠的叠层，所述第一衬底的叠层与所述第二衬底的叠层共用一部分膜层材料。
  8. 如权利要求7所述的显示面板，其中，
    所述第一衬底的叠层包括第一有机层和位于所述第一有机层上的第一无机层，所述第二衬底的叠层包括由下至上依次交叠的第二有机层、第二无机层、第三有机层和第三无机层，所述第一有机层与部分所述第三有机层共用同一膜层材料，所述第一无机层与所述第三无机层共用同一膜层材料，所述第一有机层的厚度小于所述第三有机层的厚度，所述第一无机层的厚度等于所述第三无机层的厚度；
    所述第一衬底的透明材料层设置在所述第一衬底的叠层的下方，且所述第一衬底的透明材料层的下端面与所述第二衬底的下端面齐平。
  9. 如权利要求5所述的显示面板，其中，
    所述第一衬底的透明材料层的透光率大于90％；
    所述第一衬底的透明材料层的材料包括PET、PC中的至少一种；以及
    所述第二衬底的透光率在30％-60％以内。
  10. 如权利要求5所述的显示面板，其中，第一衬底的下方、第二衬底的下方、所述第一衬底的透明材料层的侧面与所述第二衬底之间和/或所述第一衬底的透明材料层的上端与所述第一衬底的叠层之间设置有保护层。
  11. 如权利要求1所述的显示面板，其中，位于所述第一显示区的驱动电路层包括阳极层；或者
    位于所述第一显示区的驱动电路层包括阳极层及设置在所述阳极层下的透明有机材料膜层；或者
    位于所述第一显示区的驱动电路层包括阳极层及设置在所述阳极层下的多层绝缘层。
  12. 如权利要求11所述的显示面板，其中
    位于所述第二显示区的驱动电路层包括多层绝缘层，所述透明有机材料膜层的厚度与所述第二显示区的多层绝缘层的总厚度相同。
  13. 如权利要求1所述的显示面板，其中，所述第一显示区与所述第二显示区为AMOLED显示 区；
    位于所述第一显示区的驱动电路层包括多个第一驱动电路单元，所述第一驱动电路单元包括晶体管及存储电容；位于所述第二显示区的驱动电路层包括多个第二驱动电路单元，所述第二驱动电路单元包括存储电容及晶体管，所述第一驱动电路单元的晶体管的数量小于所述第二驱动电路单元的晶体管的数量。
  14. 如权利要求13所述的显示面板，其中
    所述第一驱动电路单元的晶体管包括第一晶体管，所述第一驱动电路单元的存储电容包括第一极板与第二极板；位于所述第一显示区的驱动电路层具有第一导电层，所述第一导电层的一部分作为所述第一极板，另一部分作为所述第一晶体管的栅极；
    位于所述第一显示区的驱动电路层还包括电源线、数据线、扫描线及与多个第一驱动电路单元一一对应的阳极层，位于所述第一显示区的驱动电路层还具有第二导电层，所述第二导电层的一部分作为所述第二极板，另一部分作为所述电源线；所述第一驱动电路单元的晶体管还包括第二晶体管，所述第一晶体管的源极与所述第二导电层连接，所述第一晶体管的漏极与对应的阳极层连接，所述第二晶体管的栅极与所述扫描线连接，所述第二晶体管的漏极分别与所述第一导电层连接，所述第二晶体管的源极与所述数据线连接；
    所述第一晶体管、所述第二晶体管、所述存储电容、所述数据线、所述扫描线及所述阳极层的材料由透明材料制成。
  15. 如权利要求13所述的显示面板，其中
    位于所述第一显示区的驱动电路层包括电源线、数据线、第一扫描线、第二扫描线、参考电位线及与多个第一驱动电路单元一一对应的阳极层，所述第一驱动电路单元的晶体管包括第一晶体管，所述第一驱动电路单元的存储电容包括第一极板与第二极板，位于第一显示区的驱动电路层包括第一导电层和第三导电层，所述第一导电层的一部分作为所述第一极板，另一部分作为所述第一晶体管的栅极，所述第三导电层的一部分作为所述第二极板，另一部分作为对应的阳极层；所述第一驱动电路单元的晶体管还包括第三晶体管和第四晶体管，所述第三晶体管的源极与所述数据线连接，所述第三晶体管的栅极与所述第一扫描线连接，所述第三晶体管的漏极与所述第一导电层连接，所述第一晶体管的漏极与所述电源线连接，所述第一晶体管的源极与所述第三导电层连接，所述第四晶体管的栅极与所述第二扫描线连接，所述第四晶体管的源极与所述参考电位线连接，所述第四晶体管的漏极与所述第三导电层连接；
    所述第一晶体管、所述第三晶体管、所述第四晶体管、所述存储电容、所述数据线、所述第一扫描线、所述第二扫描线、所述参考电位线及所述阳极层由透明材料制成。
  16. 一种显示装置，包括：
    设备本体，具有器件区；
    如权利要求1所述的显示面板，覆盖在所述设备本体上；
    其中，所述器件区位于所述第一显示区下方，且所述器件区中设置有透过所述第一显示区进行光线采集的感光元件。
  17. 一种显示面板的制备方法，，所述显示面板具有第一显示区及第二显示区，所述制备方法包括：
    形成衬底；
    在所述衬底上形成驱动电路层；
    在所述驱动电路层上形成发光功能膜层；
    在所述发光功能膜层上形成导电层，位于所述第一显示区的导电层的厚度小于位于所述第二显示区的导电层的厚度。
  18. 根据权利要求17所述的制备方法，其中，在所述发光功能膜层上形成导电层包括：
    在所述发光功能膜层上形成第一导电膜层，所述第一导电膜层覆盖所述第一显示区及所述第二显示区；在所述第一导电膜层上形成第二导电膜层，所述第二导电膜层仅设置于第二显示区；或者，在位于所述第二显示区的所述发光功能膜层上形成第三导电膜层；在所述第一显示区的发光功能膜层上及所述第二显示区的第三导电膜层上形成第四导电膜层。
  19. 根据权利要求17所述的制备方法，其中，所述形成衬底包括：
    形成衬底层；
    在所述衬底层与所述第一显示区对应的位置处形成凹槽；
    在所述凹槽内形成透明材料层。
  20. 根据权利要求19所述的制备方法，其中
    所述形成衬底层包括：形成有机材料层与无机材料层交叠的叠层；
    所述在所述凹槽内形成透明材料层之前，还包括：在所述凹槽的内表面及所述衬底层的下方形成保护层；
    在所述凹槽内形成透明材料层之后，还包括：在所述透明材料层及所述衬底层的下方形成保护层。
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