WO2020098022A1 - 一种显示面板的制程方法、显示面板及显示装置 - Google Patents

一种显示面板的制程方法、显示面板及显示装置 Download PDF

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Publication number
WO2020098022A1
WO2020098022A1 PCT/CN2018/119673 CN2018119673W WO2020098022A1 WO 2020098022 A1 WO2020098022 A1 WO 2020098022A1 CN 2018119673 W CN2018119673 W CN 2018119673W WO 2020098022 A1 WO2020098022 A1 WO 2020098022A1
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WIPO (PCT)
Prior art keywords
light
shielding layer
line
substrate
display panel
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PCT/CN2018/119673
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English (en)
French (fr)
Inventor
杨春辉
Original Assignee
惠科股份有限公司
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Application filed by 惠科股份有限公司 filed Critical 惠科股份有限公司
Priority to US17/042,072 priority Critical patent/US11112661B2/en
Publication of WO2020098022A1 publication Critical patent/WO2020098022A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133512—Light shielding layers, e.g. black matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133345—Insulating layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133371—Cells with varying thickness of the liquid crystal layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel

Definitions

  • the present application relates to the field of display technology, and in particular, to a manufacturing method of a display panel, a display panel, and a display device.
  • Flat panel displays have become the mainstream products of the display due to the hot spots such as thin body, power saving and low radiation, which have been widely used.
  • Flat panel displays include thin film transistor liquid crystal displays (Thin Film Transistor-Liquid Crystal (TFT-LCD) and organic light-emitting diode (Organic Light-Emitting Diode, OLED) displays, etc.
  • TFT-LCD Thi Film Transistor-Liquid Crystal
  • OLED Organic Light-Emitting Diode
  • the thin film transistor liquid crystal display controls the rotation direction of the liquid crystal molecules to refract the light of the backlight module to generate a picture, which has many advantages such as thin body, power saving, no radiation and so on.
  • the display panel of the display includes an array substrate and a color filter substrate.
  • the array substrate and the color filter substrate are prone to misalignment during box alignment, resulting in light leakage, affecting the display effect and reducing Yield.
  • the purpose of the present application is to provide a display panel manufacturing method, display panel and display device for preventing light leakage of the display panel and improving the yield of the display panel.
  • the present application provides a display panel, including: a first substrate; a second substrate disposed opposite to the first substrate; a plurality of data lines and scanning lines disposed on the first substrate
  • the first substrate includes a first light-shielding layer that blocks the data line or the scanning line
  • the second substrate includes a second light-shielding layer that blocks the data line or the scanning line
  • each of the data line and the scanning line At least blocked by one of the first light-shielding layer and the second light-shielding layer.
  • the first shading layer corresponds to all the data lines and scanning lines in one-to-one shielding setting;
  • the second shading layer corresponds to all the data lines and scanning lines in one-to-one shielding setting;
  • the first light-shielding layer and the second light-shielding layer are provided correspondingly.
  • the shapes and sizes of the first light-shielding layer and the second light-shielding layer are equivalent.
  • the second substrate includes a plurality of color resists, and the second light shielding layer is disposed between the two adjacent color resists;
  • the first substrate includes a plurality of pixels, and the pixels include pixels An electrode, the data line and the scanning line are arranged between two adjacent pixel electrodes;
  • the second light shielding layer is shielded according to the data line or the scanning line.
  • the pixel includes a first pixel, wherein one of the data lines is disposed outside the first pixel; the first pixel includes a first pixel electrode, and a first common electrode disposed outside the first pixel electrode Electrode lines, the first common electrode line and the first pixel electrode are in different layers and partially overlap; the first common electrode line is disposed on one side of the data line, the first common electrode line and the data A first gap is provided between the lines; the first light-shielding layer blocks the data line, the first gap, and the first common electrode line, and extends beyond the edge of the first common electrode line to the first pixel electrode.
  • the pixel includes a second pixel adjacent to the first pixel, the second pixel includes a second pixel electrode, and the data line is disposed between the first pixel electrode and the second pixel electrode
  • the second pixel further includes a second common electrode line disposed between the first pixel electrode and the second pixel electrode, the second common electrode line and the second pixel electrode are on different layers and partially Overlapping; the second common electrode line is disposed on a side of the data line away from the first common electrode line, and a second gap is provided between the second common electrode line and the data line; the first light shielding The layer also blocks the second gap, the second common electrode line, and extends beyond the edge of the second common electrode line to the second pixel electrode.
  • the first substrate includes a plurality of pixels, the scan line is corresponding to the pixel, and the pixel includes a thin film transistor switch connected to the scan line; the first light-shielding layer also blocks the The scanning line and the thin film transistor switch are described.
  • the first substrate includes a plurality of data lines and a plurality of scanning lines; the first light-shielding layer is provided on the side of the first substrate to block the data lines; and the second light-shielding layer is provided on the The second substrate side shields the scanning line.
  • the present application also provides a method for manufacturing a display panel, including the steps of:
  • the first substrate and the second substrate are fixed to the box, so that the second light shielding layer shields the data line and / or the scanning line correspondingly.
  • the present application also provides a display device, including the above display panel.
  • the present application provides a first light shielding layer on the first substrate and a second light shielding layer on the second substrate, and each data line and scan line At least blocked by one of the first light-shielding layer and the second light-shielding layer, when the first substrate and the second substrate face the box, the first light-shielding layer on the first substrate can shield the portion of the first substrate that needs to be shielded ,
  • the second light-shielding layer on the second substrate can shield the portion of the second substrate that needs to be shielded, which can avoid the deviation of the structure on the first substrate or the second substrate that needs to be shielded from the light-shielding layer due to the box error Light leakage, which in turn improves the yield of the display device.
  • FIG. 1 is a schematic cross-sectional view of a display panel according to an embodiment of the present application.
  • FIG. 2 is a schematic diagram of a single pixel according to an embodiment of the present application.
  • FIG. 3 is a schematic diagram of another single pixel according to an embodiment of the present application.
  • FIG. 4 is a schematic diagram of a second light-shielding layer according to an embodiment of the present application.
  • FIG. 5 is a schematic diagram of another single pixel according to an embodiment of the present application.
  • FIG. 6 is a schematic cross-sectional view of another display panel according to an embodiment of the present application.
  • FIG. 7 is a schematic diagram of a two-pixel embodiment of the present application.
  • FIG. 8 is a schematic diagram of another two pixels according to an embodiment of the present application.
  • FIG. 9 is a schematic diagram of section A-A 'of an embodiment of the present application.
  • FIG. 10 is a schematic cross-sectional view of another display panel according to an embodiment of the present application.
  • FIG. 11 is a schematic cross-sectional view of another display panel according to an embodiment of the present application.
  • FIG. 12 is a schematic cross-sectional view of a thin film transistor switch according to an embodiment of the present application.
  • FIG. 13 is a schematic flowchart of a method for manufacturing a display panel according to an embodiment of the present application.
  • FIG. 14 is a schematic flowchart of another method for manufacturing a display panel according to an embodiment of the present application.
  • 15 is a schematic flowchart of another method for manufacturing a display panel according to an embodiment of the present application.
  • 16 is a schematic cross-sectional view of another display panel according to an embodiment of the present application.
  • 17 is a schematic diagram of a display device according to an embodiment of the present application.
  • connection should be understood in a broad sense, for example, it can be fixed connection or detachable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • installation should be understood in a broad sense, for example, it can be fixed connection or detachable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • the array substrate has five processes: first metal layer / amorphous silicon layer / ground metal layer / passivation layer / transparent conductive film, five masks are needed, and the color film substrate has black matrix layer / red color resist / Green color resist / Blue color resist / Gap particle five-step process, which requires five masks.
  • the black matrix layer process of the color filter substrate has the functions of blocking the scattered light of the liquid crystal layer, preventing color mixing between sub-pixels and preventing ambient light Irradiated to the switching channel of the thin film transistor; shielding the light leakage caused by the disorder of the liquid crystal guidance caused by the disturbance of the electric field near the data line and the scanning line.
  • an embodiment of the present application discloses a display panel 110 including a first substrate 120 and a second substrate 140 disposed opposite to the first substrate 120; a plurality of data lines 121 and scan lines 122 , Disposed on the first substrate 120; the first substrate 120 includes a first light-shielding layer 123 that blocks the data line 121 or the scanning line 122; the second substrate 140 includes a second light-shielding layer 141 that blocks the data line 121 or the scanning line 122; The data lines 121 and the scanning lines 122 are blocked by at least one of the first light-shielding layer 123 and the second light-shielding layer 141.
  • the first substrate 120 is an array substrate
  • the second substrate 140 is a color filter substrate.
  • the light shielding layer that blocks the data line 121 or the scanning line 122 may be all disposed on the second substrate 140. This design may cause misalignment when the first substrate 120 and the second substrate 140 are aligned with each other. The light-shielding layer does not have the effect of blocking the data line 121 or the scanning line 122, thereby causing light leakage.
  • the effective light-transmitting area of the display panel 110 will be reduced Small, the light transmittance is reduced, which will affect the display effect of the display panel 110; in this solution, not only the second light shielding layer 141 is provided on the second substrate 140 side, but also the first substrate 120 is formed
  • the first light-shielding layer 123 regardless of whether the first light-shielding layer 123 corresponds to the data line 121 and the scanning line 122, since the first light-shielding layer 123 can achieve a more accurate effect of blocking the data line 121 or the scanning line 122, Therefore, it is possible to improve the light leakage when the first substrate 120 and the second substrate 140 are misaligned.
  • the first substrate 120 includes a first light-shielding layer 123 that blocks the data line 121 or the scanning line 122
  • the second substrate 140 includes a second light-shielding layer 141 that blocks the data line 121 or the scanning line 122, including three cases: one is all The data line 121 or the scanning line 122 are blocked by two light-shielding layers at the same time; the second is that a part of the data line 121 is blocked by the first light-shielding layer 123 and the other part is blocked by the second light-shielding layer 141; the third is that a part of the data line 121 or The scanning line 122 is blocked by the first light-shielding layer 123, another part is blocked by the second light-shielding layer 141, and another part is blocked by two kinds of light-shielding layers, as long as the data line 121 and the scanning line 122 are blocked by at least one kind.
  • the present application provides a first light-shielding layer 123 on the first substrate 120 and a second light-shielding layer 141 on the second substrate 140, and each The data lines 121 and the scanning lines 122 are blocked by at least one of the first light-shielding layer 123 and the second light-shielding layer 141.
  • the first on the first substrate 120 The light-shielding layer 123 can shield the portion of the first substrate 120 that needs to be shielded, and the second light-shielding layer 141 on the second substrate 140 can shield the portion of the second substrate 140 that needs to be shielded, which can prevent the first substrate from being misaligned by the box
  • the portion on 120 or the second substrate 140 that needs to be shielded from light and the light shielding layer is shifted to leak light, thereby improving the yield of the display device 100.
  • the positions of the first light-shielding layer 123 and the second light-shielding layer 141 roughly correspond, and the data line 121 and the scanning line 122 are blocked by the two light-shielding layers at the same time, which can prevent the data line 121 or the scanning line 122
  • the light shielding layer is shifted to generate light leakage; however, since the main function of the first light shielding layer 123 is to block the data lines 121 and the scanning lines, the main function of the second light shielding layer 141 is to be disposed between the color resists 142 to prevent color mixing, secondary Only the data line 121 and the scanning line are blocked. Therefore, the shapes and sizes of the first light-shielding layer 123 and the second light-shielding layer 141 may be different. Of course, the same is also possible.
  • the shapes of the first light-shielding layer 123 and the second light-shielding layer 141 are equivalent.
  • the design of the first light-shielding layer 123 and the second light-shielding layer 141 generally require the same shape and size, but there may be differences in the manufacturing process, but even if there is a slight difference in shape and size, as long as the shape size difference does not exceed the threshold, it is considered to be equivalent.
  • the shapes of the first light-shielding layer 123 and the second light-shielding layer 141 are equivalent, which can well block the data lines 121 and the scanning lines, and can also share the photomasks used in the manufacturing process of the first light-shielding layer 123 and the second light-shielding layer 141 , To avoid the need to use two masks, saving production costs.
  • the difference from the above embodiment is that the second substrate 140 includes a plurality of color resists 142, and the second light-shielding layer 141 is disposed on two adjacent color resists 142;
  • the first substrate 120 includes a plurality of pixels 124, the pixel 124 includes a pixel electrode 125, the data line 121 and the scanning line 122 are disposed between two adjacent pixel electrodes 125;
  • the second light shielding layer 141 corresponds to the data line 121 or
  • the scanning line 122 is set for blocking.
  • the pixel electrode 125 is formed of a transparent conductive film.
  • the first light-shielding layer 123 and the data lines 121 and the scanning lines 122 are all on the first substrate 120.
  • the first light-shielding layer 123 and the corresponding data lines 121 or the scanning lines 122 are accurately arranged, which can effectively avoid the data lines 121 Or light leakage at the position of the scanning line 122;
  • the second light-shielding layer 141 is accurately disposed at the gap between two adjacent color resists 142, which can prevent color mixing.
  • the pixel 124 includes a first pixel 130, wherein a data line 121 is disposed outside the first pixel 130; the first pixel 130 includes a first pixel electrode 131, and a first pixel disposed outside the first pixel electrode 131 Common electrode line 132, the first common electrode line 132 and the first pixel electrode 131 are in different layers and partially overlap; the first common electrode line 132 is disposed on one side of the data line 121, the first common electrode line 132 and the data line 121 A first gap 133 is provided therebetween; the first light-shielding layer 123 blocks the data line 121, the first gap 133, the first common electrode line 132, and extends beyond the edge of the first common electrode line 132 to the first pixel electrode 131.
  • the first light-shielding layer 123 blocks the data line 121, the first gap 133, the first common electrode line 132, and extends beyond the edge of the first common electrode line 132 to the first pixel electrode 131, wherein the first common electrode line 132 Partial overlap with the first pixel electrode 131 in a different layer will produce an electric field shielding effect.
  • the liquid crystal in this overlapping area will not deflect.
  • the first light-shielding layer 123 blocks the first common electrode line 132 and exceeds the edge of the first common electrode line 132 near the first pixel electrode 131; the first gap 133 is easy to cause The first substrate 120 and the second substrate 140 are misaligned with respect to the cell to prevent light leakage. Therefore, the first light-shielding layer 123 blocks the first gap 133 between the first common electrode line 132 and the data line 121 to avoid the above situation. .
  • the first light-shielding layer 123 may be disposed on the top of the first pixel electrode 131, or may be disposed on the lower layer of the first common electrode line 132.
  • the processes corresponding to the two different structures are different; the first light-shielding layer 123 is disposed In the lower layer of the first common electrode line 132, the first light-shielding layer 123 only has a light-shielding effect; when the first light-shielding layer 123 is disposed on top of the first pixel electrode 131, the first light-shielding layer 123 has a light-shielding effect, and It functions as a flat layer and provides a standing position for the support structure between the first substrate 120 and the second substrate 140.
  • the pixel 124 includes a second pixel 134 adjacent to the first pixel 130, the second pixel 134 includes a second pixel electrode 135, and the data line 121 is disposed between the first pixel electrode 131 and the second pixel electrode 135
  • the second pixel 134 further includes a second common electrode line 136 disposed between the first pixel electrode 131 and the second pixel electrode 135, the second common electrode line 136 and the second pixel electrode 135 are in different layers and partially overlap;
  • the second common electrode line 136 is disposed on the side of the data line 121 away from the first common electrode line 132, and a second gap 137 is provided between the second common electrode line 136 and the data line 121; the first light shielding layer 123 also blocks the second The gap 137, the second common electrode line 136, and beyond the edge of the second common electrode line 136 close to the second pixel electrode 135.
  • the first common electrode line 132 and the second common electrode line 136 are respectively provided on both sides of the data line 121, and a first gap 133 is provided between the first common electrode line 132 and the data line 121, and the second common electrode line A second gap 137 is provided between the electrode line 136 and the data line 121.
  • the first light shielding layer 123 In addition to blocking the first gap 133, the data line 121, and the first common electrode line 132, the first light shielding layer 123 also blocks the second gap 137, the second common The electrode line 136 extends beyond the edge of the first common electrode line 132 near the first pixel electrode 131 and the edge of the second common electrode line 136 near the second pixel electrode 135, this design can effectively block the first pixel 130 and the second The position where the pixel 134 may leak light and the position where display unevenness occurs due to electric field shielding or other reasons.
  • first common electrode line 132 and the second common electrode line 136 are a short segment of the corresponding pixel 124 of the common level on the first substrate 120 and are connected to each other.
  • the difference from the above embodiment is that the first substrate 120 includes a plurality of pixels 124, the scanning line 122 is corresponding to the pixel 124, and the pixel 124 includes the scanning line 122
  • the connected thin film transistor switch 126; the first light-shielding layer 123 also blocks the scanning line 122 and the thin film transistor switch 126.
  • the thin film transistor switch 126 is generally provided on the scanning line 122, and the width of the place where the thin film transistor switch 126 is provided may be the same as the width of the scanning line 122, or may be wider than the width of the scanning line 122; if it is wider than the scanning line At the width of 122, the first light-shielding layer 123 is widened corresponding to the scanning line 122 to block the thin film transistor switch 126.
  • the first substrate 120 includes a plurality of data lines 121 and a plurality of scanning lines 122; the first light-shielding layer 123 is disposed on the side of the first substrate 120 to block the data lines 121 ; The second light-shielding layer 141 is disposed on the side of the second substrate 140 and blocks the scanning line 122.
  • the light leakage at the data line 121 may be serious.
  • the structure in which the common electrode line 128 is disposed between the pixel electrodes 125 has serious light leakage.
  • the first light-shielding layer 123 can effectively reduce light leakage.
  • the light leakage at the corresponding scan line 122 is slightly less, and due to the dense wiring on the array substrate side, additional structures may cause a decrease in product yield, so caution is required.
  • Unnecessary structures such as a light-shielding layer, are provided on the color filter substrate side to improve Product yield; in this solution, the second light-shielding layer 141 can be disposed at the second substrate 140 to reduce the structure on the side of the first substrate 120 while ensuring good light leakage, thereby improving the display panel 110 Yield.
  • the first light-shielding layer 123 is disposed on the first substrate 120 side, and the pixels 124 on the first substrate 120 include the first pixels 130 and the data lines 121 disposed outside the first pixels 130; the first pixels 130 include the first The pixel electrode 131 and the first common electrode line 132 disposed outside the first pixel electrode 131, the first common electrode line 132 and the first pixel electrode 131 are on different layers and partially overlap; the first common electrode line 132 is disposed on the data line On one side of 121, a first gap 133 is provided between the first common electrode line 132 and the data line 121; the first light-shielding layer 123 blocks the data line 121, the first gap 133, the first common electrode line 132, and exceeds the first common The electrode line 132 is close to the edge of the first pixel electrode 131.
  • the pixel 124 of the first substrate 120 further includes a second pixel 134 adjacent to the first pixel 130, the second pixel 134 includes a second pixel electrode 135, and the data line 121 is disposed between the first pixel electrode 131 and the second pixel electrode 135
  • the second pixel 134 further includes a second common electrode line 136 disposed between the first pixel electrode 131 and the second pixel electrode 135, the second common electrode line 136 and the second pixel electrode 135 are in different layers and partially overlap;
  • the second common electrode line 136 is disposed on the side of the data line 121 away from the first common electrode line 132, and a second gap 137 is provided between the second common electrode line 136 and the data line 121; the first light shielding layer 123 also blocks the second The gap 137, the second common electrode line 136, and beyond the edge of the second common electrode line 136 close to the second pixel electrode 135.
  • a method for manufacturing a display panel including:
  • S133 forming a second substrate including a second light-shielding layer
  • a method for manufacturing a display panel which includes a process for forming a first substrate and a process for forming a second substrate;
  • the manufacturing process of the first substrate includes:
  • S141 forming a first substrate, forming a gate, a scanning line connected to the same layer as the gate, and a common electrode line on the first substrate;
  • S143 forming a source electrode and a drain electrode arranged in the same layer above the amorphous silicon layer, and a data line connected to the source electrode or the drain electrode;
  • S145 Form a first light-shielding layer above the pixel electrode to block the scanning line, the data line, and the common electrode line beyond the edge of the common electrode line near the pixel electrode;
  • the manufacturing process of the second substrate includes:
  • the manufacturing process of the display panel also includes:
  • S148 The first substrate and the second substrate are aligned with each other, and the second light-shielding layer corresponds to the first light-shielding layer.
  • a passivation layer may be provided between the first light-shielding layer and the data line, or may not be provided.
  • a method for manufacturing a display panel which includes a process of forming a first substrate and a process of forming a second substrate;
  • the manufacturing process of the first substrate includes:
  • S152 forming a gate, a scanning line connected to the same layer as the gate, and a common electrode line on the first light-shielding layer;
  • S154 forming a source electrode and a drain electrode arranged in the same layer above the amorphous silicon, and a data line 121 connected to the source electrode or the drain electrode;
  • the manufacturing process of the second substrate includes:
  • the manufacturing process of the display panel also includes:
  • S158 The first substrate and the second substrate are aligned with each other, and the second light-shielding layer corresponds to the first light-shielding layer.
  • the first light-shielding layer blocks the data line, the common electrode line, and the edge of the pixel electrode beyond the common electrode line, and does not cover the scan line;
  • the second light-shielding layer is formed between some color resists
  • the second light-shielding layer corresponds to the scanning line and blocks the scanning line.
  • the present application discloses a display device 100 including any one of the above display panels 110.
  • the technical scheme of the present invention can be widely used in various display panels, such as twisted nematic (TN) display panel, in-plane switching (IPS) display panel, vertical alignment type (Vertical Alignment, VA) ) Display panel, multi-quadrant vertical alignment (Multi-Domain Vertical Alignment, MVA) display panel, of course, it can also be other types of display panels, such as organic light-emitting diode (Organic Light-Emitting Diode, OLED) display panel, both The above scheme is applicable.
  • TN twisted nematic
  • IPS in-plane switching
  • VA Vertical Alignment
  • MVA multi-quadrant vertical alignment
  • OLED Organic Light-Emitting Diode

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Abstract

一种显示面板（110）的制程方法、显示面板（110）及显示装置（100），显示面板（110）包括第一基板（120）和第二基板（140），第一基板（120）和第二基板（140）对盒设置；多条数据线（121）和扫描线（122），设置在第一基板（120）上；第一基板（120）包括遮挡数据线（121）或扫描线（122）的第一遮光层（123）；第二基板（140）包括遮挡数据线（121）或扫描线（122）的第二遮光层（141）；每条数据线（121）和扫描线（122）至少被第一遮光层（123）和第二遮光层（141）中的一种所遮挡。

Description

一种显示面板的制程方法、显示面板及显示装置
本申请要求于2018年11月14日提交中国专利局，申请号为CN201811350592.4，发明名称为“一种显示面板的制程方法、显示面板及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板的制程方法、显示面板及显示装置。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
随着科技的发展和进步，平板显示器由于具备机身薄、省电和辐射低等热点而成为显示器的主流产品，得到了广泛应用。平板显示器包括薄膜晶体管液晶显示器(Thin Film Transistor-Liquid Crystal Display，TFT-LCD)和有机发光二极管(Organic Light-Emitting Diode，OLED)显示器等。其中，薄膜晶体管液晶显示器通过控制液晶分子的旋转方向，以将背光模组的光线折射出来产生画面，具有机身薄、省电、无辐射等众多优点。
显示器的显示面板包括阵列基板和彩膜基板，在显示面板的制造过程中，阵列基板和彩膜基板在对盒时中易产生对盒偏差，导致漏光现象，影响显示效果，降低了显示面板的良率。
技术解决方案
本申请的目的是提供一种防止显示面板漏光、提高显示面板良率的显示面板的制程方法、显示面板及显示装置。
为实现上述目的，本申请提供了一种显示面板，包括：第一基板；与所述第一基板对盒设置的第二基板；设置在所述第一基板上的多条数据线和扫描线；所述第一基板包括遮挡所述数据线或扫描线的第一遮光层；所述第二基板包括遮挡所述数据线或扫描线的第二遮光层；每条所述数据线和扫描线至少被所述第一遮光层和第二遮光层中的一种所遮挡。
可选的，所述第一遮光层与所有的所述数据线和扫描线一一对应遮挡设置；所述第二遮光层与所有的所述数据线和扫描线一一对应遮挡设置；所述第一遮光层和第二遮光层对应设置。
可选的，所述第一遮光层和第二遮光层的形状大小相当。
可选的，所述第二基板包括多个色阻，所述第二遮光层设置在所述相邻的两个色阻之间；所述第一基板包括多个像素，所述像素包括像素电极，所述数据线和扫描线设置在相邻两个所述像素电极之间；
所述第二遮光层对应所述数据线或扫描线进行遮挡设置。
可选的，所述像素包括第一像素，其中一条所述数据线设置在所述第一像素外侧；所述第一像素包括第一像素电极，以及设置在第一像素电极外侧的第一公共电极线，所述第一公共电极线与所述第一像素电极在不同层且部分重叠；所述第一公共电极线设置在所述数据线的一侧，所述第一公共电极线和数据线之间设置第一间隙；所述第一遮光层遮挡所述数据线、第一间隙、第一公共电极线，并超出所述第一公共电极线靠近所述第一像素电极的边缘。
可选的，所述像素包括与所述第一像素相邻的第二像素，所述第二像素包括第二像素电极，所述数据线设置在所述第一像素电极和第二像素电极之间；所述第二像素还包括设置在所述第一像素电极和第二像素电极之间的第二公共电极线，所述第二公共电极线与所述第二像素电极在不同层且部分重叠；所述第二公共电极线设置在所述数据线远离所述第一公共电 极线的一侧，所述第二公共电极线和数据线之间设置有第二间隙；所述第一遮光层还遮挡所述第二间隙、第二公共电极线，并超出所述第二公共电极线靠近所述第二像素电极的边缘。
可选的，所述第一基板包括多个像素，所述扫描线与所述像素对应设置，所述像素包括与所述扫描线连接的薄膜电晶体开关；所述第一遮光层还遮挡所述扫描线和薄膜电晶体开关。
可选的，所述第一基板包括多条数据线和多条扫描线；所述第一遮光层设置在所述第一基板侧，遮挡所述数据线；所述第二遮光层设置在所述第二基板侧，遮挡所述扫描线。
为实现上述目的，本申请还提供了一种显示面板的制程方法，包括步骤：
形成包括数据线和扫描线的第一基板；
在所述数据线和/或扫描线的上方形成第一遮光层；
形成包括第二遮光层的第二基板；
对盒固定所述第一基板和第二基板，使得所述第二遮光层对应遮挡所述数据线和/或扫描线。
为实现上述目的，本申请还提供了一种显示装置，包括上述显示面板。
相对于仅在第一基板或第二基板上设置遮光层的方案，本申请在第一基板上设置第一遮光层，在第二基板上设置第二遮光层，且每条数据线和扫描线至少被第一遮光层和第二遮光层中的一种所遮挡，在第一基板和第二基板对盒时，第一基板上的第一遮光层可以对第一基板上需要遮光的部分遮光，第二基板上的第二遮光层可以对第二基板上需要遮光的部分遮光，可以避免因对盒误差使第一基板或第二基板上的部分需要遮光的结构与遮光层发生偏移产生的漏光，进而提高了显示装置的良率。
附图说明
所包括的附图用来提供对本申请实施例的进一步的理解，其构成了说明书的一部分，用于例示本申请的实施方式，并与文字描述一起来阐释本申请的原理。显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。在附图中：
图1是本申请实施例一种显示面板的截面示意图；
图2是本申请实施例一种单个像素的示意图；
图3是本申请实施例另一种单个像素的示意图；
图4是本申请实施例一种第二遮光层的示意图；
图5是本申请实施例另一种单个像素的示意图；
图6是本申请实施例另一种显示面板的截面示意图；
图7是本申请实施例一种两个像素的示意图；
图8是本申请实施例另一种两个像素的示意图；
图9是本申请实施例截面A-A’的示意图；
图10是本申请实施例另一种显示面板的截面示意图；
图11是本申请实施例另一种显示面板的截面示意图；
图12是本申请实施例一种薄膜电晶体开关的截面示意图；
图13是本申请实施例一种显示面板的制程方法的流程示意图；
图14是本申请实施例另一种显示面板的制程方法的流程示意图；
图15是本申请实施例另一种显示面板的制程方法的流程示意图；
图16是本申请实施例另一种显示面板的截面示意图；
图17是本申请实施例一种显示装置的示意图。
具体实施方式
这里所公开的具体结构和功能细节仅仅是代表性的，并且是用于描述本申请的示例性实施例的目的。但是本申请可以通过许多替换形式来具体实现，并且不应当被解释成仅仅受限于这里所阐述的实施例。
在本申请的描述中，需要理解的是，术语“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。另外，术语“包括”及其任何变形，意图在于覆盖不排他的包含。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
这里所使用的术语仅仅是为了描述具体实施例而不意图限制示例性实施例。除非上下文明确地另有所指，否则这里所使用的单数形式“一个”、“一项”还意图包括复数。还应当理解的是，这里所使用的术语“包括”和/或“包含”规定所陈述的特征、整数、步骤、操作、单元和/或组件的存在，而不排除存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
液晶显示器生产过程，阵列基板有第一金属层/非晶硅层/地二金属层/钝化层/透明导电薄膜五道制程，需要五道光罩，彩膜基板有黑色矩阵层/红色色阻/绿色色阻/蓝色色阻/间隙粒子五道制程，需要五道光罩，其中彩膜基板的黑色矩阵层制程的作用有：遮挡液晶层杂乱散射光，防止亚像素之间混色和防止环境光照射到薄膜电晶体开关沟道；遮蔽由于数据线与扫描线附近电场紊乱导致的液晶导向紊乱所引起的漏光。但在实际生产制程中，特别是阵列基板和彩膜基板对盒组立极易导致黑色矩阵层与公共电极线发生错位，进而导致公共电极线与数据线之间的漏光，这对产品良率的提升有极大影响。增大黑色矩阵层的宽度，固然能起到作用，但对产品穿透率有副作用。为了在保证穿透率的前提下，迫切需要新的像素架构设计。
下面参考附图和可选的实施例对本申请作进一步说明。
如图1至图4所示，本申请实施例公布了一种显示面板110，包括第一基板120和与第一基板120对盒设置的第二基板140；多条数据线121和扫描线122，设置在第一基板120上；第一基板120包括遮挡数据线121或扫描线122的第一遮光层123；第二基板140包括遮挡数据线121或扫描线122的第二遮光层141；每条数据线121和扫描线122至少被第一遮光层123和第二遮光层141中的一种所遮挡。
具体的，第一基板120为阵列基板，第二基板140为彩膜基板。
示例性的方案，该遮挡数据线121或扫描线122的遮光层可能全部设置在第二基板140上，这种设计可能会在第一基板120和第二基板140对盒时，由于错位而使得遮光层没有起到遮挡数据线121或扫描线122的效果，从而出现漏光，若仅仅是将设置在第二基板140上的遮光层加宽或加长，则显示面板110的有效透光面积将减小，则光透过率也就减小，会影 响到显示面板110的显示效果；本方案中，不仅在第二基板140侧设置有第二遮光层141，还在第一基板120处形成有第一遮光层123，无论该第一遮光层123是否与数据线121和扫描线122一一对应设置，由于该第一遮光层123可以达到较为精准的遮挡数据线121或扫描线122的效果，因而可以改善当第一基板120和第二基板140错位时，漏光的情况。
第一基板120包括遮挡数据线121或扫描线122的第一遮光层123，第二基板140包括遮挡数据线121或扫描线122的第二遮光层141，包括三种情况：其一是所有的数据线121或扫描线122同时被两种遮光层遮挡；其二是，一部分数据线121被第一遮光层123遮挡，另一部分被第二遮光层141遮挡；其三是，一部分数据线121或扫描线122被第一遮光层123遮挡，另一部分被第二遮光层141遮挡，还一部分被两种遮光层遮挡，只要数据线121和扫描线122至少被一种遮挡即可。
相对于仅在第一基板120或第二基板140上设置遮光层的方案，本申请在第一基板120上设置第一遮光层123，在第二基板140上设置第二遮光层141，且每条数据线121和扫描线122至少被第一遮光层123和第二遮光层141中的一种所遮挡，在第一基板120和第二基板140对盒时，第一基板120上的第一遮光层123可以对第一基板120上需要遮光的部分遮光，第二基板140上的第二遮光层141可以对第二基板140上需要遮光的部分遮光，可以避免因对盒误差使第一基板120或第二基板140上的部分需要遮光的结构与遮光层发生偏移产生的漏光，进而提高了显示装置100的良率。
在一实施例中，第一遮光层123与所有的数据线121和扫描线122一一对应遮挡设置；第二遮光层141与所有的数据线121和扫描线122一一对应遮挡设置；第一遮光层123和第二遮光层141对应设置。
本方案中，第一遮光层123和第二遮光层141的位置大概对应，数据线121和扫描线122同时被两种遮光层遮挡，可以避免因对盒误差使数据线121或扫描线122与遮光层发生偏移产生漏光；但是由于该第一遮光层123的主要作用是遮挡数据线121和扫描线，该第二遮光层141的主要作用是设置在色阻142之间防止混色，次要才是遮挡数据线121和扫面线，因而，该第一遮光层123和第二遮光层141的形状大小可以有所差异，当然，一样也是可以的。
在一实施例中，第一遮光层123和第二遮光层141的形状大小相当。第一遮光层123和第二遮光层141在设计时一般要求形状大小一致，但制程中可能会存在差异，但即便形状大小有少许差异，只要形状大小差异不超出阈值，则认为相当。第一遮光层123和第二遮光层141的形状大小相当即可以很好的遮挡数据线121和扫面线，也可以使第一遮光层123和第二遮光层141制程中使用的光罩共用，避免需要使用两个光罩，节省了生产成本。
作为本申请的另一实施例，参考图5至图11所示，与上述实施例不同在于，第二基板140包括多个色阻142，第二遮光层141设置在相邻的两个色阻142之间；第一基板120包括多个像素124，像素124包括像素电极125，数据线121和扫描线122设置在相邻两个像素电极125之间；第二遮光层141对应数据线121或扫描线122进行遮挡设置。
具体的，像素电极125由透明导电薄膜形成。
本方案中，第一遮光层123与数据线121和扫描线122都在第一基板120上，第一遮光层123且对应数据线121或扫描线122精准设置，可以很有效的避免数据线121或扫描线122的位置漏光；第二遮光层141对应准确设置在相邻两个色阻142之间的间隙处，可以起到防止混色。
在一实施例中，像素124包括第一像素130，其中一条数据线121设置在第一像素130外侧；第一像素130包括第一像素电极131、以及设置在第一像素电极131外侧的第一公共 电极线132，第一公共电极线132与第一像素电极131在不同层且部分重叠；第一公共电极线132设置在数据线121的一侧，第一公共电极线132和数据线121之间设置第一间隙133；第一遮光层123遮挡数据线121、第一间隙133、第一公共电极线132，并超出第一公共电极线132靠近第一像素电极131的边缘。
本方案中，第一遮光层123遮挡数据线121、第一间隙133、第一公共电极线132，并超出第一公共电极线132靠近第一像素电极131的边缘，其中第一公共电极线132与第一像素电极131在不同层且部分重叠会产生电场屏蔽效应，对应的，该重叠区域的液晶不会发生偏转，为避免第一公共电极线132与第一像素电极131重叠区显示出现暗纹或亮纹，该重叠区需要用遮光层遮挡，故第一遮光层123遮挡第一公共电极线132并超出第一公共电极线132靠近第一像素电极131的边缘；第一间隙133易因第一基板120和第二基板140对盒错位而遮挡不到出现漏光，因此，第一遮光层123遮挡第一公共电极线132和数据线121之间的第一间隙133，可以避免上述情况出现。
具体的，第一遮光层123可以设置在第一像素电极131的顶部，也可以设置在第一公共电极线132的下层，两种不同的结构对应的制程有所不同；第一遮光层123设置在第一公共电极线132的下层时，第一遮光层123仅具有遮光作用；第一遮光层123设置在第一像素电极131的顶部时，第一遮光层123除了具有遮光作用外，还有作为平坦层的作用，以及为第一基板120和第二基板140之间的支撑结构提供站立的位置。
在一实施例中，像素124包括与第一像素130相邻的第二像素134，第二像素134包括第二像素电极135，数据线121设置在第一像素电极131和第二像素电极135之间；第二像素134还包括设置在第一像素电极131和第二像素电极135之间的第二公共电极线136，第二公共电极线136与第二像素电极135在不同层且部分重叠；
第二公共电极线136设置在数据线121远离第一公共电极线132的一侧，第二公共电极线136和数据线121之间设置有第二间隙137；第一遮光层123还遮挡第二间隙137、第二公共电极线136，并超出第二公共电极线136靠近第二像素电极135的边缘。
本方案中，第一公共电极线132和第二公共电极线136分别设在数据线121的两侧，且第一公共电极线132和数据线121之间设置有第一间隙133，第二公共电极线136和数据线121之间设置有第二间隙137，第一遮光层123除了遮挡第一间隙133、数据线121、第一公共电极线132外，还遮挡第二间隙137、第二公共电极线136，并分别超出第一公共电极线132靠近第一像素电极131的边缘和第二公共电极线136靠近第二像素电极135的边缘，该设计可以有效的遮挡第一像素130和第二像素134的可能漏光的位置以及因电场屏蔽或其他原因出现显示不均的位置。
具体的，第一公共电极线132和第二公共电极线136是第一基板120上的公共电级的对应像素124的一小段，互相是连通的。
作为本申请的另一实施例，参考图7至8所示，与上述实施例不同在于，第一基板120包括多个像素124，扫描线122与像素124对应设置，像素124包括与扫描线122连接的薄膜电晶体开关126；第一遮光层123还遮挡扫描线122和薄膜电晶体开关126。
本方案中，薄膜电晶体开关126一般设置在扫描线122上，设置薄膜电晶体开关126的地方的宽度可能与扫描线122宽度一致，也可能宽于扫描线122的宽度；若宽于扫描线122的宽度时，则第一遮光层123对应扫描线122处进行加宽以遮挡薄膜电晶体开关126。
作为本申请的另一实施例，与上述实施例不同在于，第一基板120包括多条数据线121和多条扫描线122；第一遮光层123设置在第一基板120侧，遮挡数据线121；第二遮光层141设置在第二基板140侧，遮挡扫描线122。
本方案中，数据线121处的漏光情况可能较为严重，特别是公共电极线128设置在像素电极125之间的架构漏光严重，在此设置第一遮光层123，可以有效减少漏光。对应扫描线122处漏光情况稍少，而由于阵列基板侧布线密集，额外增加结构可能引起产品良率降低，故而需谨慎，不必要的结构，比如遮光层，设置在彩膜基板侧有利于提高产品良率；本方案，则可以将第二遮光层141设置在第二基板140处，以在保证较好的防漏光的情况下，减少第一基板120侧的结构，从而提高显示面板110的良率。
具体的，第一遮光层123设置在第一基板120侧，第一基板120上的像素124包括第一像素130、以及设置在第一像素130外侧的数据线121；第一像素130包括第一像素电极131、以及设置在第一像素电极131外侧的第一公共电极线132，第一公共电极线132与第一像素电极131在不同层且部分重叠；第一公共电极线132设置在数据线121的一侧，第一公共电极线132和数据线121之间设置第一间隙133；第一遮光层123遮挡数据线121、第一间隙133、第一公共电极线132，并超出第一公共电极线132靠近第一像素电极131的边缘。
第一基板120的像素124还包括与第一像素130相邻的第二像素134，第二像素134包括第二像素电极135，数据线121设置在第一像素电极131和第二像素电极135之间；第二像素134还包括设置在第一像素电极131和第二像素电极135之间的第二公共电极线136，第二公共电极线136与第二像素电极135在不同层且部分重叠；
第二公共电极线136设置在数据线121远离第一公共电极线132的一侧，第二公共电极线136和数据线121之间设置有第二间隙137；第一遮光层123还遮挡第二间隙137、第二公共电极线136，并超出第二公共电极线136靠近第二像素电极135的边缘。
作为本申请的另一实施例，参考图13所示，公开了一种显示面板的制程方法，包括：
S131：形成包括数据线和扫描线的第一基板；
S132：在数据线和扫描线的上方形成第一遮光层；
S133：形成包括第二遮光层的第二基板；
S134：对盒固定第一基板和第二基板，使得第二遮光层对应遮挡数据线和扫描线。
作为本申请的另一实施例，参考图1、图12和图14所示，公开了一种显示面板的制程方法，包括形成第一基板的制程，和形成第二基板的制程；
第一基板的制程包括：
S141：形成第一基底，在第一基底上形成栅极、与栅极同层且连接的扫描线，以及公共电极线；
S142：在栅极上方形成栅极绝缘层、非晶硅层；
S143：在非晶硅层的上方形成同层设置的源极和漏极，以及与源极或漏极连接的数据线；
S144：在源极和漏极上方形成钝化层，以及与公共电极线部分重叠的像素电极125得到薄膜电晶体开关；
S145：在像素电极的上方形成遮挡扫描线、数据线、公共电极线，超出公共电极线靠近像素电极的边缘的第一遮光层；
第二基板的制程包括：
S146：形成多个色阻；
S147：在色阻之间的间隙处形成第二遮光层；
显示面板的制程还包括：
S148：将第一基板和第二基板对盒，并使得第二遮光层与第一遮光层对应。
具体的，如图9和图10所示，第一遮光层与数据线之间可以设一层钝化层，也可以不设。
作为本申请的另一实施例，参考图12、图15和图16所示，公开了一种显示面板的制程方法，包括形成第一基板的制程，和形成第二基板的制程；
第一基板的制程包括：
S151：形成第一基底，在第一基底上形成第一遮光层；
S152：在第一遮光层上形成栅极、与栅极同层且连接的扫描线，以及公共电极线；
S153：在栅极上方形成栅极绝缘层、非晶硅层；
S154：在非晶硅的上方形成同层设置的源极和漏极，以及与源极或漏极连接的数据线121；
S155：在源极和漏极上方形成钝化层，以及与公共电极线部分重叠的像素电极125得到薄膜电晶体开关；
第二基板的制程包括：
S156：形成多个色阻；
S157：在色阻之间的间隙处形成第二遮光层；
显示面板的制程还包括：
S158：将第一基板和第二基板对盒，并使得第二遮光层与第一遮光层对应。
作为本申请的另一实施例，与上述实施例不同在于，第一遮光层遮挡数据线、公共电极线，以及超出公共电极线靠近像素电极的边缘，不遮扫描线；
第二遮光层，形成在部分色阻之间；
对盒时，使得第二遮光层与扫描线对应，遮挡扫描线。
作为本申请的另一实施例，参考图17所示，本申请公开了一种显示装置100，包括以上任意一项的显示面板110。
需要说明的是，本方案中涉及到的各步骤的限定，在不影响具体方案实施的前提下，并不认定为对步骤先后顺序做出限定，写在前面的步骤可以是在先执行的，也可以是在后执行的，甚至也可以是同时执行的，只要能实施本方案，都应当视为属于本申请的保护范围。
本发明的技术方案可以广泛用于各种显示面板，如扭曲向列型(Twisted Nematic，TN)显示面板、平面转换型(In-Plane Switching，IPS)显示面板、垂直配向型(Vertical Alignment，VA)显示面板、多象限垂直配向型(Multi-Domain Vertical Alignment，MVA)显示面板，当然，也可以是其他类型的显示面板，如有机发光二极管(Organic Light-Emitting Diode，OLED)显示面板，均可适用上述方案。
以上内容是结合具体可选的实施方式对本申请所作的进一步详细说明，不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本申请的保护范围。

Claims (17)

  1. 一种显示面板，包括：
    第一基板；
    第二基板，与所述第一基板对盒设置；
    多条数据线和扫描线，设置在所述第一基板上；
    所述第一基板包括遮挡所述数据线或扫描线的第一遮光层；
    所述第二基板包括遮挡所述数据线或扫描线的第二遮光层；
    每条所述数据线和扫描线至少被所述第一遮光层和所述第二遮光层中的一种所遮挡。
  2. 如权利要求1所述的一种显示面板，其中，所述第一遮光层与所有的所述数据线和扫描线一一对应遮挡设置；所述第二遮光层与所有的所述数据线和扫描线一一对应遮挡设置；
    所述第一遮光层和所述第二遮光层对应设置。
  3. 如权利要求2所述的一种显示面板，其中，所述第一遮光层和所述第二遮光层的形状大小相当。
  4. 如权利要求2所述的一种显示面板，其中，所述第二基板包括多个色阻，所述第二遮光层设置在所述相邻的两个色阻之间；
    所述第一基板包括多个像素，所述像素包括像素电极，所述数据线和扫描线设置在相邻两个所述像素电极之间；
    所述第二遮光层对应所述数据线或扫描线进行遮挡设置。
  5. 如权利要求4所述的一种显示面板，其中，所述像素电极由透明导电薄膜形成。
  6. 如权利要求4所述的一种显示面板，其中，所述像素包括第一像素，其中一条所述数据线设置在所述第一像素外侧；
    所述第一像素包括第一像素电极，以及设置在第一像素电极外侧的第一公共电极线，所述第一公共电极线与所述第一像素电极在不同层且部分重叠；
    所述第一公共电极线设置在所述数据线的一侧，所述第一公共电极线和数据线之间设置第一间隙；
    所述第一遮光层遮挡所述数据线、第一间隙、第一公共电极线，并超出所述第一公共电极线靠近所述第一像素电极的边缘。
  7. 如权利要求5所述的一种显示面板，其中，所述第一遮光层设置在第一像素电极的顶部。
  8. 如权利要求5所述的一种显示面板，其中，所述第一遮光层设置在第一像素电极的下层。
  9. 如权利要求6所述的一种显示面板，其中，所述像素包括与所述第一像素相邻的第二像素，所述第二像素包括第二像素电极，所述数据线设置在所述第一像素电极和第二像素电极之间；
    所述第二像素还包括设置在所述第一像素电极和第二像素电极之间的第二公共电极线，所述第二公共电极线与所述第二像素电极在不同层且部分重叠；
    所述第二公共电极线设置在所述数据线远离所述第一公共电极线的一侧，所述第二公共电极线和数据线之间设置有第二间隙；
    所述第一遮光层还遮挡所述第二间隙、第二公共电极线，并超出所述第二公共电极线靠近所述第二像素电极的边缘。
  10. 如权利要求6所述的一种显示面板，其中，第一公共电极线和第二公共电极线是第 一基板上的公共电级的对应像素的一段，且互相连通。
  11. 如权利要求2所述的一种显示面板，其中，所述第一基板包括多个像素，所述扫描线与所述像素对应设置，所述像素包括与所述扫描线连接的薄膜电晶体开关；
    所述第一遮光层还遮挡所述扫描线和薄膜电晶体开关。
  12. 如权利要求1所述的一种显示面板，其中，所述第一基板包括多条数据线和多条扫描线；
    所述第一遮光层设置在所述第一基板侧，遮挡所述数据线；
    所述第二遮光层设置在所述第二基板侧，遮挡所述扫描线。
  13. 一种显示面板的制程方法，包括步骤：
    形成包括数据线和扫描线的第一基板；
    在数据线和/或扫描线的上方形成第一遮光层；
    形成包括第二遮光层的第二基板；
    对盒固定所述第一基板和第二基板，使得第二遮光层对应遮挡数据线和/或扫描线。
  14. 如权利要求13所述的一种显示面板的制程方法，其中，所述在数据线和/或扫描线的上方形成第一遮光层的步骤包括：形成与所有的数据线和/或扫描线一一对应遮挡的第一遮光层。
  15. 如权利要求14所述的一种显示面板的制程方法，其中，所述对盒固定所述第一基板和第二基板，使得第二遮光层对应遮挡数据线和/或扫描线的步骤包括：形成与所有的数据线和/或扫描线一一对应遮挡，且与第一遮光层对应的第二遮光层。
  16. 如权利要求15所述的一种显示面板的制程方法，其中，所述形成与所有的数据线和/或扫描线一一对应遮挡，且与第一遮光层对应的第二遮光层的步骤包括：形成形状大小相同的第一遮光层和第二遮光层。
  17. 一种显示装置，包括显示面板，所述显示面板包括：
    第一基板；
    第二基板，与所述第一基板对盒设置；
    多条数据线和扫描线，设置在所述第一基板上；
    所述第一基板包括遮挡所述数据线或扫描线的第一遮光层；
    所述第二基板包括遮挡所述数据线或扫描线的第二遮光层；
    每条所述数据线和扫描线至少被所述第一遮光层和所述第二遮光层中的一种所遮挡。
PCT/CN2018/119673 2018-11-14 2018-12-07 一种显示面板的制程方法、显示面板及显示装置 WO2020098022A1 (zh)

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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110082975A (zh) * 2019-04-12 2019-08-02 深圳市华星光电半导体显示技术有限公司 阵列基板以及显示面板
US11953795B2 (en) 2021-09-29 2024-04-09 Tcl China Star Optoelectronics Technology Co., Ltd. Pixel unit of a display panel and display panel
CN113820883A (zh) * 2021-09-29 2021-12-21 Tcl华星光电技术有限公司 显示面板的像素单元及显示面板

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202522819U (zh) * 2012-02-21 2012-11-07 京东方科技集团股份有限公司 一种液晶面板以及显示装置
CN104267530A (zh) * 2014-08-07 2015-01-07 友达光电股份有限公司 显示面板
CN104465675A (zh) * 2014-12-31 2015-03-25 深圳市华星光电技术有限公司 薄膜晶体管阵列基板、液晶面板以及液晶显示器
CN104865730A (zh) * 2015-05-26 2015-08-26 深圳市华星光电技术有限公司 一种液晶面板和阵列基板
CN106200169A (zh) * 2016-07-08 2016-12-07 深圳市华星光电技术有限公司 液晶显示面板及其制造方法
CN106707596A (zh) * 2016-12-22 2017-05-24 深圳市华星光电技术有限公司 显示面板及显示装置
JP2018136477A (ja) * 2017-02-23 2018-08-30 セイコーエプソン株式会社 電気光学装置、電子機器

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101177720B1 (ko) 2005-09-20 2012-08-28 엘지디스플레이 주식회사 액정표시장치와 그 제조방법
KR101710574B1 (ko) 2010-05-04 2017-02-27 엘지디스플레이 주식회사 액정표시장치 및 이의 제조 방법
JP2016024304A (ja) * 2014-07-18 2016-02-08 株式会社ジャパンディスプレイ 表示装置
KR102514320B1 (ko) * 2015-12-24 2023-03-27 삼성디스플레이 주식회사 표시 장치
KR20180049420A (ko) * 2016-11-01 2018-05-11 삼성디스플레이 주식회사 색변환 패널, 이의 제조 방법 및 이를 포함하는 표시 장치

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202522819U (zh) * 2012-02-21 2012-11-07 京东方科技集团股份有限公司 一种液晶面板以及显示装置
CN104267530A (zh) * 2014-08-07 2015-01-07 友达光电股份有限公司 显示面板
CN104465675A (zh) * 2014-12-31 2015-03-25 深圳市华星光电技术有限公司 薄膜晶体管阵列基板、液晶面板以及液晶显示器
CN104865730A (zh) * 2015-05-26 2015-08-26 深圳市华星光电技术有限公司 一种液晶面板和阵列基板
CN106200169A (zh) * 2016-07-08 2016-12-07 深圳市华星光电技术有限公司 液晶显示面板及其制造方法
CN106707596A (zh) * 2016-12-22 2017-05-24 深圳市华星光电技术有限公司 显示面板及显示装置
JP2018136477A (ja) * 2017-02-23 2018-08-30 セイコーエプソン株式会社 電気光学装置、電子機器

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