WO2020006980A1 - 一种多电平逆变器的箝位调制方法、装置及逆变器 - Google Patents

一种多电平逆变器的箝位调制方法、装置及逆变器 Download PDF

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Publication number
WO2020006980A1
WO2020006980A1 PCT/CN2018/119583 CN2018119583W WO2020006980A1 WO 2020006980 A1 WO2020006980 A1 WO 2020006980A1 CN 2018119583 W CN2018119583 W CN 2018119583W WO 2020006980 A1 WO2020006980 A1 WO 2020006980A1
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Prior art keywords
output voltage
zero
clamp
tube
time
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PCT/CN2018/119583
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English (en)
French (fr)
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许飞
叶飞
石磊
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华为技术有限公司
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Priority to EP18925595.3A priority Critical patent/EP3767814A4/en
Publication of WO2020006980A1 publication Critical patent/WO2020006980A1/zh
Priority to US17/088,088 priority patent/US11356034B2/en
Priority to US17/729,340 priority patent/US11716032B2/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/175—Indicating the instants of passage of current or voltage through a given value, e.g. passage through zero
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/38—Means for preventing simultaneous conduction of switches
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/38—Means for preventing simultaneous conduction of switches
    • H02M1/385—Means for preventing simultaneous conduction of switches with means for correcting output voltage deviations introduced by the dead time

Definitions

  • the present invention relates to the field of power electronics technology, and in particular, to a clamping modulation method and device of a multilevel inverter, and an inverter.
  • An active neutral point clamp (ANPC, Active Neutral, Point Clamp) three-level inverter can use sinusoidal pulse width modulation (SPWM) to generate a drive signal for the switching element.
  • SPWM sinusoidal pulse width modulation
  • the drive signal controls the on and off of the switching element.
  • the interruption can generate voltages of three levels of "positive”, “negative” and “zero” at the output Vout, so it is called a three-level inverter.
  • Some switching elements in ANPC perform switching operations at a very high frequency. This switching element is called a high-frequency switching element.
  • the remaining switching elements in ANPC perform switching operations according to the state of the sine-modulated wave, that is, the operating frequency is the power frequency, so this part of the switching elements is called the power frequency switching element.
  • a first dead time (tdt1) is provided between corresponding high-frequency switching elements, and a second dead time (tdt2) is also provided between low-frequency switching elements, and tdt1 ⁇ tdt2.
  • the ANPC output voltage Vout is at the zero-crossing point and the low-frequency switching element is in the dead time of state switching, at this time the high-frequency switching element is turned on first (tdt1 ⁇ tdt2), then the entire bus voltage may be applied to a certain low-frequency switching element. Because the bus voltage exceeds the withstand voltage of the low-frequency switching element, the low-frequency switching element is damaged.
  • the present invention provides a clamping modulation method of a multi-level inverter, which can effectively clamp the voltage on each switching element within a safe range, and solves the problem of output voltage. Low-frequency switching elements are damaged due to excessive voltage stress during zero-crossing switching.
  • a control method for a multilevel inverter in which a switching element in the inverter is controlled when an output voltage of the active clamped multilevel inverter crosses a zero point, the active clamp
  • the switching element of each inversion bridge arm of a multilevel inverter includes: an inner tube, an outer tube, and a clamp tube.
  • the inner tube and the outer tube are connected in series between a positive bus bar and a negative bus bar, and the clamps
  • the tube is connected between the common end of the inner tube and the outer tube and the bus bar; wherein the inner tube is a low-frequency switching element, and the outer tube and the clamping tube are high-frequency switching elements;
  • the method includes:
  • control the corresponding clamps to be turned on for a predetermined period of time after the zero crossing of the output voltage, or control both clamps to be on for a predetermined period of time after the zero of the output voltage.
  • the corresponding low-frequency switching element is in the dead time. At this time, the corresponding clamp tube is turned on, and the voltage withheld by the low-frequency switching element is forcibly clamped to half of the bus voltage through the turned-on clamp tube. Because the clamp is connected to the neutral point (that is, the midpoint of the bus voltage), the voltage at the neutral point is half of the entire bus voltage. It can be solved at this time if the high-frequency switching element is turned on to cause a low-frequency switch Component withstands the entire bus voltage issue.
  • the corresponding clamp tube is controlled to be turned on for a predetermined period of time after the zero-point of the output voltage Pass, specifically:
  • the lower half-bridge clamp is controlled to be turned on for a predetermined period of time after the output voltage zero crossing.
  • the upper half-bridge clamp is controlled to be turned on for a predetermined period of time after the output voltage zero crossing.
  • the predetermined time period after the zero crossing of the output voltage is:
  • the first dead time corresponding to the high-frequency switching element is smaller than the second dead time corresponding to the low-frequency switching element.
  • the method further includes: after the second dead time corresponding to the low-frequency switching element elapses, controlling the conduction of the inner tube of the lower half bridge.
  • the method further includes: after the second dead time corresponding to the low-frequency switching element elapses, controlling the inner tube of the upper bridge to be turned on.
  • the predetermined time period can be set as required.
  • the predetermined time period after the output voltage zero crossing point is: the first high-frequency switching period after the output voltage zero crossing.
  • You can also control the corresponding clamp tube to be turned on during the first N high-frequency switching cycles after the output voltage crosses zero, where N is a positive integer, such as N 2, then the first two high-frequency switches after the output voltage crosses zero
  • the cycle always controls the conduction of the clamp tube.
  • N cannot be too large, because the shorter the predetermined time period, the better. If it is too long, the output efficiency of the inverter will be reduced. Therefore, the preset time period can be shortened as much as possible on the basis of solving the voltage stress problem of the switching element.
  • This method can not only well solve the over-voltage risk of the power frequency switching tube, but also can have the beneficial effect that it can provide multiple clamped freewheeling circuits, which greatly reduces the inverter circuit during the bridge arm voltage switching process.
  • T2 and T3 are turned on at the same time, the following two current paths exist: Bus_N-D2-T5-I_out and Bus_N-T3-D6-I_out. Due to the existence of the above two current paths, the leakage inductance of the two current paths is in a parallel relationship, which can reduce the leakage inductance in the commutation circuit. The smaller the leakage inductance in the commutation circuit, the more The lower the risk of stress.
  • a control device for a multi-level inverter to control a switching element in the inverter when an output voltage of the active-clamped multi-level inverter crosses a zero point, the active clamp
  • the switching element of each inversion bridge arm of a multilevel inverter includes: an inner tube, an outer tube, and a clamp tube.
  • the inner tube and the outer tube are connected in series between a positive bus bar and a negative bus bar, and the clamps
  • the tube is connected between the common end of the inner tube and the outer tube and the bus bar; wherein the inner tube is a low-frequency switching element, and the outer tube and the clamping tube are high-frequency switching elements;
  • the device includes: a detection module and a control module;
  • the detection module is configured to detect whether a zero-crossing occurs in an output voltage of a bridge arm of the active clamped multilevel inverter
  • the control module is configured to, when the detection module detects the zero crossing of the output voltage, control the corresponding clamp tube to be turned on for a predetermined period of time after the zero crossing of the output voltage, or, when the output voltage passes Control both clamps to be on for a predetermined period of time after zero.
  • the corresponding low-frequency switching element is in the dead time. At this time, the corresponding clamp tube is turned on, and the voltage withheld by the low-frequency switching element is forcibly clamped to half of the bus voltage through the turned-on clamp tube. Because the clamp is connected to the neutral point (that is, the middle point of the bus voltage), the voltage at the neutral point is half of the entire bus voltage, so that it will not cause a high-frequency switching element to turn on at this time. The problem of a low frequency switching element withstanding the entire bus voltage.
  • the control module controls the corresponding clamp within a predetermined time period after the output voltage zero-crossing point.
  • the position tube is always on, as follows:
  • the lower half-bridge clamp is controlled to be turned on for a predetermined period of time after the output voltage zero crossing.
  • the control module controls the corresponding clamp within a predetermined time period after the output voltage zero-crossing point.
  • the position tube is always on, as follows:
  • the upper half-bridge clamp is controlled to be turned on for a predetermined period of time after the output voltage zero crossing.
  • the predetermined time period after the output voltage zero crossing is:
  • the predetermined time period can be set as required.
  • the predetermined time period after the output voltage zero crossing point is: the first high-frequency switching period after the output voltage zero crossing.
  • You can also control the corresponding clamp tube to be turned on during the first N high-frequency switching cycles after the output voltage crosses zero, where N is a positive integer, such as N 2, then the first two high-frequency switches after the output voltage crosses zero
  • the cycle always controls the conduction of the clamp tube.
  • N cannot be too large, because the shorter the predetermined time period, the better. If it is too long, the output efficiency of the inverter will be reduced. Therefore, the preset time period can be shortened as much as possible on the basis of solving the voltage stress problem of the switching element.
  • a multi-level inverter is provided.
  • the multi-level inverter is an active clamped multi-level inverter, and each of the inverter bridges of the active clamped multi-level inverter
  • the switching element of the arm includes an inner tube, an outer tube, and a clamp tube.
  • the inner tube and the outer tube are connected in series between a positive bus bar and a negative bus bar, and the clamp tube is connected to a common end of the inner tube and the outer tube.
  • the bus wherein the inner tube is a low-frequency switching element, and the outer tube and the clamp tube are high-frequency switching elements;
  • the multilevel inverter includes: a voltage detection circuit and a controller;
  • the voltage detection circuit is configured to detect whether a zero-crossing occurs in the output voltage of the bridge arm of the active clamped multilevel inverter
  • the controller is configured to, when the voltage detection circuit detects the zero crossing point of the output voltage, control the corresponding clamp tube to be continuously turned on within a predetermined period of time after the zero crossing point of the output voltage, or, at the output voltage Both the clamps are controlled to be conductive for a predetermined period of time after the zero crossing.
  • the corresponding low-frequency switching element is in the dead time. At this time, the corresponding clamp tube is turned on, and the voltage withheld by the low-frequency switching element is forcibly clamped to half the bus voltage through the turned-on clamp tube Because the clamp is connected to the neutral point (that is, the midpoint of the bus voltage), the voltage at the neutral point is half of the entire bus voltage. It can be solved at this time if the high-frequency switching element is turned on to cause a low-frequency switch Component withstands the entire bus voltage issue.
  • the controller controls the corresponding clamp within a predetermined time period after the output voltage zero-crossing point.
  • the position tube is always on, as follows:
  • the lower half-bridge clamp is controlled to be turned on for a predetermined period of time after the output voltage zero crossing.
  • the controller controls the corresponding clamp within a predetermined time period after the output voltage zero-crossing point.
  • the position tube is always on, as follows:
  • the upper half-bridge clamp is controlled to be turned on for a predetermined period of time after the output voltage zero crossing.
  • the present invention has at least the following advantages:
  • the method includes: detecting whether the output voltage of the bridge arm of the active clamped multilevel inverter is A zero crossing occurs; if it is, the corresponding clamp tube is always turned on for a predetermined period of time after the output voltage zero crossing, or two clamps are controlled for a predetermined period of time after the output voltage zero crossing
  • the position tubes are always conducting. Because when the output voltage crosses zero, the corresponding low-frequency switching element is in the dead time. At this time, the corresponding clamp tube is turned on, and the voltage withheld by the low-frequency switching element is forcibly clamped to half of the bus voltage through the turned-on clamp tube.
  • the voltage at the neutral point is half of the entire bus voltage. It can be solved at this time if the high-frequency switching element is turned on to cause a low-frequency switch Component withstands the entire bus voltage issue.
  • FIG. 1 is a schematic diagram of an ANPC three-level inverter according to an embodiment of the present application
  • FIG. 2 is a waveform diagram of an output voltage zero-crossing driving signal corresponding to FIG. 1;
  • FIG. 3 is a flowchart of a control method of a multilevel inverter according to an embodiment of the present application
  • FIG. 4 is a timing diagram of controlling the turn-on of a clamp tube from the positive half-cycle to the zero-crossing point provided by the embodiment of the present application;
  • FIG. 5 is a timing chart of controlling the conduction of two clamp tubes by the zero crossing of the output voltage from the positive half cycle to the zero crossing provided in the embodiment of the present application;
  • FIG. 6 is a schematic diagram of a control device for a multi-level inverter according to an embodiment of the present application.
  • FIG. 7 is a schematic diagram of a multi-level inverter according to an embodiment of the present application.
  • T1-T4 perform switching operations at a very high frequency. Therefore, T1-T4 are referred to as high-frequency switching elements.
  • the states of T1 and T2 are complementary (that is, T2 is turned off when T1 is turned on and T2 is turned on when T1 is turned off), and the states of T3 and T4 are complementary.
  • T2 and T3 are clamps, T2 and T3 are called clamp tubes, and T1, T5, T6, and T4 form the bridge arm. Since T1 and T4 are outside and T5 and T6 are inside, they are called T1 and T4.
  • T5 and T6 are inner tubes. As shown in FIG. 1, the inner pipe and the outer pipe are connected in series between a positive bus Bus + and a negative bus Bus-, and the clamp pipe is connected between the common ends of the inner and outer pipes and the bus;
  • the switching elements T5 and T6 perform switching operations according to the state of the sine modulation wave, that is, the working frequency is the power frequency. Therefore, T5 and T6 are referred to as power frequency switching elements. Compared with the high frequency switching elements, the power frequency switching elements are also called low frequency switches.
  • the component, for example, the power frequency can be 50Hz, and the high frequency is generally more than ten kHz, or more than twenty kHz. And the states of T5 and T6 are complementary.
  • a first dead time (tdt1) is provided between corresponding high-frequency switching elements, and a second dead time (tdt2) is also provided between low-frequency switching elements, and tdt1 ⁇ tdt2.
  • the inventor's research found that when the ANPC output voltage Vout is at the zero crossing point and the low-frequency switching element is in the dead time of state switching, at this time the high-frequency switching element is turned on first (tdt1 ⁇ tdt2), then the entire bus voltage may be applied to a certain low frequency On the switching element, the low-frequency switching element is damaged because the bus voltage exceeds the withstand voltage of the low-frequency switching element.
  • the output voltage of ANPC is at the zero-crossing point, and the process of converting the negative output voltage to the positive output voltage; the output current remains in the positive direction (Iout> 0), that is, the output terminal of ANPC is connected to a capacitive load; Dead time (tdt2), at this time T6 has been turned off, but T5 has not been turned on; the output current will continue to flow through diodes D4 and D6; if T1 is turned on at this time, the entire bus voltage will be applied To both ends of T5; because the withstand voltage of T5 is designed according to half of the bus voltage, T5 will be damaged due to overvoltage.
  • T5 and T6 in FIG. 1 are high-frequency switching elements and set the clamp tubes (T2 and T3) as low-frequency switching elements.
  • the specific modulation method is: when the zero crossing of the output voltage command occurs, the overlap time of the two clamp tubes is maintained to ensure that the output voltage can be clamped to the midpoint voltage of the DC bus.
  • the specific measures are the modulation method of high frequency operation of the inner tube (T5 and T6) and low frequency operation of the clamp tube (T2 and T3).
  • an embodiment of the present application provides a control method for a multi-level inverter.
  • the method comprising: detecting whether an output voltage of the active-clamped multilevel inverter bridge arm has a zero-crossing point; and if so, controlling the corresponding clamp within a predetermined time period after the output voltage zero-crossing point
  • the bit tube is always on, or both the clamping tubes are controlled to be on for a predetermined period of time after the output voltage zero crossing. Because when the output voltage crosses zero, the corresponding low-frequency switching element is in the dead time.
  • the corresponding clamp tube is turned on, and the voltage withheld by the low-frequency switching element is forcibly clamped to half of the bus voltage through the turned-on clamp tube. Because the clamp is connected to the neutral point (that is, the midpoint of the bus voltage), the voltage at the neutral point is half of the entire bus voltage. It can be solved at this time if the high-frequency switching element is turned on to cause a low-frequency switch Component withstands the entire bus voltage issue.
  • the control method for the inverter shown in FIG. 1 may include multiple types.
  • the control method provided in the embodiment of the present application can solve the technical problem that the entire bus voltage is applied to a certain low-frequency switching element when the output voltage zero crosses. Detailed description is given below with reference to the drawings.
  • FIG. 3 a flowchart of a method for controlling a multi-level inverter according to an embodiment of the present application is shown.
  • the method for controlling a multi-level inverter controls a switching element in an inverter when an output voltage of the active-clamped multi-level inverter crosses a zero point.
  • the switching elements of each inverter bridge arm of a flat inverter include: an inner tube, an outer tube, and a clamp tube.
  • the inner tube and the outer tube are connected in series between a positive bus and a negative bus, and the clamp tubes are connected. Between the common end of the inner tube and the outer tube and the bus bar; wherein the inner tube is a low-frequency switching element, and the outer tube and the clamping tube are high-frequency switching elements;
  • the clamp tube includes T2 and T3, the outer tube includes T1 and T4, and the inner tube includes T5 and T6.
  • T5 and T6 are low-frequency switching elements, and T2, T3, T1, and T4 are high-frequency switching elements.
  • the method includes:
  • the inverter includes two bridge arms or three bridge arms, a judgment needs to be made for each bridge arm separately.
  • the switching element corresponding to the bridge arm is controlled according to the output voltage of the bridge arm.
  • the upper half bridge of the bridge arm in FIG. 1 includes T1, T2, and T5
  • the lower half bridge includes T3, T4, and T6.
  • the switching signals between T1 and T2 are complementary at high frequencies
  • the switching signals between T3 and T4 are complementary at high frequencies
  • the switching signals between T5 and T6 are complementary at low frequencies.
  • the voltage detection circuit can be used to detect the output voltage of the bridge arm to determine whether the zero crossing of the output voltage occurs, because the inverter output voltage is an AC voltage.
  • the corresponding low-frequency switching element since the corresponding low-frequency switching element is in the dead time when the output voltage crosses zero, and the corresponding clamp tube is turned on at this time, the voltage withheld by the low-frequency switching element is forced through the turned-on clamp tube. Clamping to half of the bus voltage. Since the clamp is connected to the neutral point (ie, the midpoint of the bus voltage), the voltage at the neutral point is half of the entire bus voltage. Continuity causes a certain low-frequency switching element to withstand the entire bus voltage problem.
  • the output voltage zero-crossing point includes two cases where the output voltage reaches the zero-crossing point from the positive half cycle and the zero-crossing point from the negative half cycle.
  • the output voltage reaches the zero-crossing point from a positive half cycle. This can be achieved in two ways, one is to control the conduction of the corresponding clamps, and the other is to control the conduction of both clamps.
  • this figure is a timing diagram of controlling the turn-on of a clamp tube when the zero crossing point of the output voltage reaches the zero crossing point from the positive half cycle.
  • the corresponding clamp tube is controlled to be turned on for a predetermined period of time after the zero-crossing point of the output voltage, specifically:
  • the lower half-bridge clamp tube T3 is controlled to be turned on for a predetermined period of time after the output voltage zero crossing.
  • the voltage detection circuit detects that the output voltage reaches the zero-crossing point from the positive half cycle, so the high-frequency switching element T2 is turned off, and the power-frequency switching element T5 is turned off at the same time, and the corresponding dead time is entered. ;
  • the first dead time (tdt1) between the corresponding high frequency switching elements is smaller than the second dead time (tdt2) between the power frequency switching elements, that is, tdt1 ⁇ tdt2, so that the distortion of the output waveform can be reduced.
  • the output waveform includes an output voltage waveform and an output current waveform.
  • the switching state of the switching element does not change, so the waveforms of the output voltage and output current are not controlled, so distortion will occur.
  • the dead zone The smaller the time, the better.
  • the first dead-time of the high-frequency switching element is greater than the second dead-time of the power-frequency switching element, the low-frequency switching element may cause a risk of overvoltage damage. Therefore, set tdt1 ⁇ tdt2.
  • the high-frequency switching element corresponding to the negative half cycle must be turned on first.
  • the driving signal of T3 is high level, that is, T3 is turned on.
  • the inner tube of the lower half bridge is controlled to be turned on. That is, after the dead time tdt2 elapses, at time t13, the power frequency switching element T6 of the negative half cycle is turned on;
  • the output voltage of the bridge arm will be clamped to the midpoint voltage of the DC bus by the clamp tube, thereby eliminating the risk of over-voltage of the power frequency switch tube. Because the maximum withstand voltage of the power frequency switching tube is designed according to half of the bus voltage.
  • the control of the clamp tube of the upper half bridge is taken as an example. It can also control the conduction of both clamp tubes, which will be described in detail in conjunction with FIG. 5 below. .
  • this figure is a timing diagram of controlling the conduction of the two clamp tubes when the zero crossing point of the output voltage reaches the zero crossing point from the positive half cycle.
  • FIG. 5 shows the switching state timing when the bridge arm output voltage is switched from positive half cycle to negative half cycle.
  • the specific modulation method is basically the same as that in Figure 4. The only difference is that at t12, two high-frequency clamp tubes are controlled. T2 and T3 are both turned on at the same time. As can be seen from the figure, T2 and T3 correspond to high levels, that is, when the driving signal is high, the switching element is turned on, otherwise the switching element is turned off.
  • This method can not only well solve the over-voltage risk of the power frequency switching tube, but also can have the beneficial effect that it can provide multiple clamped freewheeling circuits, which greatly reduces the inverter circuit during the bridge arm voltage switching process.
  • T2 and T3 are turned on at the same time, the following two current paths exist: Bus_N-D2-T5-I_out and Bus_N-T3-D6-I_out. Due to the existence of the above two current paths, the leakage inductance of the two current paths is in a parallel relationship, which can reduce the leakage inductance in the commutation circuit. The smaller the leakage inductance in the commutation circuit, the more The lower the risk of stress.
  • the corresponding clamp tube is controlled to be turned on for a predetermined period of time after the zero-crossing of the output voltage, specifically:
  • the upper half-bridge clamp is controlled to be turned on for a predetermined period of time after the output voltage zero crossing. Continuing to refer to FIG. 1, that is, the control T2 is always turned on for a predetermined period of time after the zero crossing of the output voltage.
  • both clamp tubes can also be controlled to conduct, that is, T2 and T3 are controlled to be conductive all the time within a predetermined period of time after the zero-crossing of the output voltage.
  • the predetermined time period can be set as required.
  • the predetermined time period after the zero crossing of the output voltage is: the first high-frequency switching cycle after the zero crossing of the output voltage.
  • You can also control the corresponding clamp tube to be turned on during the first N high-frequency switching cycles after the output voltage crosses zero, where N is a positive integer, such as N 2, then the first two high-frequency switches after the output voltage crosses zero
  • the cycle always controls the conduction of the clamp tube.
  • N cannot be too large, because the shorter the predetermined time period, the better. If it is too long, the output efficiency of the inverter will be reduced. Therefore, the preset time period can be shortened as much as possible on the basis of solving the voltage stress problem of the switching element.
  • the embodiment of the present application further provides a control device for a multi-level inverter, which will be described in detail below with reference to the accompanying drawings.
  • FIG. 6 is a schematic diagram of a control device for a multi-level inverter according to an embodiment of the present application.
  • the control device of the multi-level inverter controls a switching element in the inverter when an output voltage of the active-clamped multi-level inverter crosses a zero point, and the active-clamped multi-level inverter
  • the switching elements of each inverter bridge arm of a flat inverter include: an inner tube, an outer tube, and a clamp tube.
  • the inner tube and the outer tube are connected in series between a positive bus and a negative bus, and the clamp tubes are connected. Between the common end of the inner tube and the outer tube and the bus bar; wherein the inner tube is a low-frequency switching element, and the outer tube and the clamping tube are high-frequency switching elements;
  • the device includes: a detection module 601 and a control module 602;
  • the detecting module 601 is configured to detect whether a zero-crossing occurs in an output voltage of a bridge arm of the active clamped multilevel inverter
  • the control module 602 is configured to, when the detection module 601 detects the zero crossing of the output voltage, control the corresponding clamp tube to be turned on for a predetermined period of time after the zero crossing of the output voltage, or, during the output, Both clamps are controlled to be turned on for a predetermined period of time after the voltage zero crossing.
  • the detection module 601 can be implemented by a voltage detection circuit.
  • the control module 602 may be implemented by a controller of the inverter, and the controller may output a pulse driving signal to control a switching state of a switching tube in the inverter.
  • the corresponding low-frequency switching element is in the dead time. At this time, the corresponding clamp tube is turned on, and the voltage withheld by the low-frequency switching element is forcibly clamped to half of the bus voltage through the turned-on clamp tube. Because the clamp is connected to the neutral point (that is, the middle point of the bus voltage), the voltage at the neutral point is half of the entire bus voltage, so that it will not cause a high-frequency switching element to turn on at this time. The problem of a low frequency switching element withstanding the entire bus voltage.
  • control module controls the corresponding clamp tube to be turned on for a predetermined period of time after the zero cross point of the output voltage, specifically:
  • the lower half-bridge clamp is controlled to be turned on for a predetermined period of time after the output voltage zero crossing.
  • control module controls the corresponding clamp tube to be turned on for a predetermined period of time after the zero cross point of the output voltage, specifically:
  • the upper half-bridge clamp is controlled to be turned on for a predetermined period of time after the output voltage zero crossing.
  • the predetermined time period can be set according to requirements.
  • the predetermined time period after the output voltage zero crossing point is: the first high-frequency switching period after the output voltage zero crossing.
  • You can also control the corresponding clamp tube to be turned on during the first N high-frequency switching cycles after the output voltage crosses zero, where N is a positive integer, such as N 2, then the first two high-frequency switches after the output voltage crosses zero
  • the cycle always controls the conduction of the clamp tube.
  • N cannot be too large, because the shorter the predetermined time period, the better. If it is too long, the output efficiency of the inverter will be reduced. Therefore, the preset time period can be shortened as much as possible on the basis of solving the voltage stress problem of the switching element.
  • the embodiments of the present application further provide a multi-level inverter, which will be described in detail below with reference to the accompanying drawings.
  • FIG. 7 is a schematic diagram of a multi-level inverter according to an embodiment of the present application.
  • the multi-level inverter provided in this embodiment is an active-clamped multi-level inverter.
  • the switching element includes an inner tube, an outer tube, and a clamp tube.
  • the inner tube and the outer tube are connected in series between a positive bus bar and a negative bus bar, and the clamp tube is connected to a common end of the inner tube and the outer tube and the bus bar.
  • the inner tube is a low-frequency switching element, and the outer tube and the clamp tube are high-frequency switching elements;
  • the multilevel inverter includes: a voltage detection circuit 702 and a controller 701;
  • T2 and T3 are clamp tubes, and T1, T5, T6, and T4 form the bridge arm. Since T1 and T4 are outside and T5 and T6 are inside, they are called T1 and T4. T5 and T6 are inner tubes.
  • the voltage detection circuit 702 is configured to detect whether a zero-crossing occurs in the output voltage of the active clamp multi-level inverter bridge arm;
  • the controller 701 is configured to, when the voltage detection circuit detects the zero crossing point of the output voltage, control the corresponding clamp tube to be continuously turned on within a predetermined period of time after the zero crossing point of the output voltage, or, during the output, Both clamps are controlled to be turned on for a predetermined period of time after the voltage zero crossing.
  • the corresponding low-frequency switching element is in the dead time. At this time, the corresponding clamp tube is turned on, and the voltage withheld by the low-frequency switching element is forcibly clamped to half the bus voltage through the turned-on clamp tube Because the clamp is connected to the neutral point (that is, the midpoint of the bus voltage), the voltage at the neutral point is half of the entire bus voltage. It can be solved at this time if the high-frequency switching element is turned on to cause a low-frequency switch Component withstands the entire bus voltage issue.
  • the controller controls the corresponding clamp tube to be turned on for a predetermined period of time after the zero-crossing of the output voltage, specifically:
  • the lower half-bridge clamp is controlled to be turned on for a predetermined period of time after the output voltage zero crossing. That is, T3 is turned on.
  • both clamp tubes can be controlled to conduct, that is, T2 and T3 are controlled to conduct continuously within a predetermined time period after the output voltage reaches the zero-crossing point from the positive half-cycle. through.
  • the controller controls the corresponding clamp tube to be turned on for a predetermined period of time after the zero-crossing of the output voltage, specifically:
  • the upper half-bridge clamp is controlled to be turned on for a predetermined period of time after the output voltage zero crossing. That is, T2 is turned on.
  • both clamp tubes can also be controlled to conduct, that is, T2 and T3 are controlled to be conductive all the time within a predetermined period of time after the zero-crossing of the output voltage.
  • the first dead time (tdt1) between the corresponding high-frequency switching elements is smaller than the second dead time (tdt2) between the power frequency switching elements, that is, tdt1 ⁇ tdt2, which can reduce the distortion of the output waveform.
  • At least one (a), a, b, or c can represent: a, b, c, "a and b", “a and c", “b and c", or "a and b and c" ", Where a, b, and c can be single or multiple.

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Abstract

一种多电平逆变器的箝位调制方法、装置及逆变器，在逆变器的输出电压过零点时对逆变器中开关元件进行控制。多电平逆变器每个逆变桥臂的开关元件包括：内管（T5、T6）、外管（T1、T4）和箝位管（T2、T3），内管和外管串联后连接在正母线（Bus+）和负母线（Bus-）之间，箝位管连接在内管和外管的公共端与母线（Bus_N）之间，由此构成有源箝位多电平逆变器。内管为低频开关元件，外管和箝位管为高频开关元件。方法包括：检测有源箝位多电平逆变器桥臂的输出电压是否发生过零点；如果是则在输出电压过零点后的预定时间段内控制对应箝位管一直导通，或，在输出电压过零点后的预定时间段内控制两个箝位管均一直导通。将各个开关元件上的电压箝位在安全范围内，解决输出电压过零切换时低频开关元件因电压应力过高而损毁。

Description

一种多电平逆变器的箝位调制方法、装置及逆变器
本申请要求于2018年07月05日提交中国专利局、申请号为201810731979.8、申请名称为“一种多电平逆变器的箝位调制方法、装置及逆变器”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及电力电子技术领域，尤其涉及一种多电平逆变器的箝位调制方法、装置及逆变器。
背景技术
有源中点钳位(ANPC，Active Neutral Point Clamp)三电平逆变器可以采用正弦脉冲宽度调制(SPWM，Sinusoidal Pulse Width Modulation)产生开关元件的驱动信号，驱动信号控制开关元件的开通和关断可在输出端Vout产生“正”、“负”和“零”三种电平的电压，因此称为三电平逆变器。
下面说明ANPC三电平逆变器正常工作时的工作原理。
ANPC中的部分开关元件以很高的频率进行开关动作，将该部分开关元件称作高频开关元件。
ANPC中的剩余开关元件根据正弦调制波的状态进行开关动作，即工作频率为工频，因此将这部分开关元件称作工频开关元件。
相应的高频开关元件之间一般都设有第一死区时间(tdt1)，低频开关元件之间也设有第二死区时间(tdt2)，且tdt1<tdt2。
但是，当ANPC输出电压Vout处于过零点，低频开关元件处于状态切换的死区时间，此时高频开关元件先开通(tdt1<tdt2)，则可能将整个母线电压施加在某一低频开关元件上，由于母线电压超过低频开关元件耐压，从而造成该低频开关元件损毁。
发明内容
为了解决现有技术中存在的以上技术问题，本发明提供一种多电平逆变器的箝位调制方法，能够有效将各个开关元件上的电压箝位在安全范围内，解决了在输出电压过零切换时低频开关元件因电压应力过高而损毁问题。
第一方面，提供一种多电平逆变器的控制方法，在有源箝位多电平逆变器的输出电压过零点时对逆变器中开关元件进行控制，所述有源箝位多电平逆变器每个逆变桥臂的开关元件包括：内管、外管和箝位管，所述内管和外管串联后连接在正母线和负母线之间，所述箝位管连接在内管和外管的公共端与母线之间；其中所述内管为低频开关元件，所述外管和箝位管为高频开关元件；
该方法包括：
检测所述有源箝位多电平逆变器桥臂的输出电压是否发生过零点；
如果是，则在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，或，则在所述输出电压过零点后的预定时间段内控制两个箝位管均一直导通。
由于输出电压过零点时，对应低频开关元件处于死区时间，此时将对应的箝位管 导通，则将低频开关元件承受的电压通过导通的箝位管强制箝位到母线电压的一半，由于箝位管连接的是中性点(即母线电压的中点)，因此，中性点的电压是整个母线电压的一半，可以解决此时如果高频开关元件导通使某一低频开关元件承受整个母线电压的问题。
在第一方面第一种可能的实施方式中，当所述输出电压过零点为由正半周到达过零点时，则在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
在所述输出电压过零点后的预定时间段内控制下半桥箝位管一直导通。
在第一方面第二种以及综合上面任意一种可能的实现方式中，当所述输出电压过零点为由负半周到达过零点时，则在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
在所述输出电压过零点后的预定时间段内控制上半桥箝位管一直导通。
在第一方面第三种以及综合上面任意一种可能的实现方式中，所述输出电压过零点后的预定时间段为：
所述输出电压过零后的第一个高频开关周期。
在第一方面第四种以及综合上面任意一种可能的实现方式中，所述高频开关元件对应的第一死区时间小于所述低频开关元件对应的第二死区时间。
在第一方面第五种以及综合上面任意一种可能的实现方式中，还包括：当所述低频开关元件对应的第二死区时间过后，控制下半桥内管导通。
在第一方面第六种以及综合上面任意一种可能的实现方式中，还包括：当所述低频开关元件对应的第二死区时间过后，控制上半桥内管导通。
预定时间段可以根据需要进行设置，例如所述输出电压过零点后的预定时间段为：所述输出电压过零后的第一个高频开关周期。也可以在输出电压过零后的前N个高频开关周期都控制对应箝位管导通，其中N为正整数，例如N＝2，则在输出电压过零后的前2个高频开关周期一直控制箝位管导通。但是N又不能取值太大，因为预定时间段越短越好，如果太长，则会使逆变器的输出效率降低。因此，预设时间段可以在解决开关元件电压应力问题的基础上尽量缩短。
该方法既可以很好的解决工频开关管过压风险，同时可以带来的有益效果是可以提供多个箝位续流回路，大大减小桥臂电压切换过程中的换流回路。以电流为正为例进行介绍，T2和T3同时导通时，存在以下两个电流通路，分别为：Bus_N-D2-T5-I_out和Bus_N-T3-D6-I_out。由于存在以上两个电流路径，因此两个电流路径的漏感是并联关系，这样可以减小换流回路中的漏感，换流回路中的漏感越小，则换流过程中开关元件过压风险越小。
第二方面，提供一种多电平逆变器的控制装置，在有源箝位多电平逆变器的输出电压过零点时对逆变器中开关元件进行控制，所述有源箝位多电平逆变器每个逆变桥臂的开关元件包括：内管、外管和箝位管，所述内管和外管串联后连接在正母线和负母线之间，所述箝位管连接在内管和外管的公共端与母线之间；其中所述内管为低频 开关元件，所述外管和箝位管为高频开关元件；
该装置包括：检测模块和控制模块；
所述检测模块，用于检测所述有源箝位多电平逆变器桥臂的输出电压是否发生过零点；
所述控制模块，用于所述检测模块检测所述输出电压过零点时，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，或，在所述输出电压过零点后的预定时间段内控制两个箝位管均一直导通。
由于输出电压过零点时，对应低频开关元件处于死区时间，此时将对应的箝位管导通，则将低频开关元件承受的电压通过导通的箝位管强制箝位到母线电压的一半，由于箝位管连接的是中性点(即母线电压的中点)，因此，中性点的电压是整个母线电压的一半，这样就不会导致此时如果高频开关元件导通使某一低频开关元件承受整个母线电压的问题。
在第二方面的第一种可能实现方式中，当所述输出电压过零点为由正半周到达过零点时，所述控制模块，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
在所述输出电压过零点后的预定时间段内控制下半桥箝位管一直导通。
在第二方面的第二种可能实现方式中，当所述输出电压过零点为由负半周到达过零点时，所述控制模块，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
在所述输出电压过零点后的预定时间段内控制上半桥箝位管一直导通。
在第二方面的第二种可能实现方式中，所述输出电压过零点后的预定时间段为：
所述输出电压过零后的第一个高频开关周期。
预定时间段可以根据需要进行设置，例如所述输出电压过零点后的预定时间段为：所述输出电压过零后的第一个高频开关周期。也可以在输出电压过零后的前N个高频开关周期都控制对应箝位管导通，其中N为正整数，例如N＝2，则在输出电压过零后的前2个高频开关周期一直控制箝位管导通。但是N又不能取值太大，因为预定时间段越短越好，如果太长，则会使逆变器的输出效率降低。因此，预设时间段可以在解决开关元件电压应力问题的基础上尽量缩短。
第三方面，提供一种多电平逆变器，该多电平逆变器为有源箝位多电平逆变器，所述有源箝位多电平逆变器每个逆变桥臂的开关元件包括：内管、外管和箝位管，所述内管和外管串联后连接在正母线和负母线之间，所述箝位管连接在内管和外管的公共端与母线之间；其中所述内管为低频开关元件，所述外管和箝位管为高频开关元件；该多电平逆变器包括：电压检测电路和控制器；
所述电压检测电路，用于检测所述有源箝位多电平逆变器桥臂的输出电压是否发生过零点；
所述控制器，用于所述电压检测电路检测所述输出电压过零点时，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，或，在所述输出电压过零点后 的预定时间段内控制两个箝位管均一直导通。
由于输出电压过零点时，对应低频开关元件处于死区时间，此时将对应的箝位管导通，则将低频开关元件承受的电压通过导通的箝位管强制箝位到母线电压的一半，由于箝位管连接的是中性点(即母线电压的中点)，因此，中性点的电压是整个母线电压的一半，可以解决此时如果高频开关元件导通使某一低频开关元件承受整个母线电压的问题。
在第三方面的第一种可能实现方式中，当所述输出电压过零点为由正半周到达过零点时，所述控制器，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
在所述输出电压过零点后的预定时间段内控制下半桥箝位管一直导通。
在第三方面的第二种可能实现方式中，当所述输出电压过零点为由负半周到达过零点时，所述控制器，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
在所述输出电压过零点后的预定时间段内控制上半桥箝位管一直导通。
与现有技术相比，本发明至少具有以下优点：
在有源箝位多电平逆变器的输出电压过零点时对逆变器中开关元件进行控制，该方法包括：检测所述有源箝位多电平逆变器桥臂的输出电压是否发生过零点；如果是，则在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，或，则在所述输出电压过零点后的预定时间段内控制两个箝位管均一直导通。由于输出电压过零点时，对应低频开关元件处于死区时间，此时将对应的箝位管导通，则将低频开关元件承受的电压通过导通的箝位管强制箝位到母线电压的一半，由于箝位管连接的是中性点(即母线电压的中点)，因此，中性点的电压是整个母线电压的一半，可以解决此时如果高频开关元件导通使某一低频开关元件承受整个母线电压的问题。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请中记载的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1为本申请实施例提供的ANPC三电平逆变器示意图；
图2为与图1对应的输出电压过零点驱动信号的波形图；
图3为本申请实施例提供的多电平逆变器的控制方法流程图；
图4为本申请实施例提供的输出电压过零点由正半周到达过零点控制一个箝位管导通的时序图；
图5为本申请实施例提供的输出电压过零点由正半周到达过零点控制两个箝位管导通的时序图；
图6为本申请实施例提供的多电平逆变器的控制装置示意图；
图7为本申请实施例提供的多电平逆变器示意图。
具体实施方式
为了使本技术领域的人员更好地理解本发明方案，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
为了使本领域技术人员更好地理解本申请实施例提供的技术方案，下面结合图1详细介绍ANPC的工作原理。
下面说明ANPC三电平逆变器正常工作时的工作原理。
开关元件T1-T4以很高的频率进行开关动作，因此将T1-T4称作高频开关元件。其中T1和T2的状态互补(即T1导通时T2关断，T1关断时T2导通)，T3和T4的状态互补。由于T2和T3的作用是箝位，因此将T2和T3称为箝位管，T1、T5、T6和T4组成桥臂，由于T1和T4在外，T5和T6在内，因此，称T1和T4为外管，T5和T6为内管。如图1所示，内管和外管串联后连接在正母线Bus+和负母线Bus-之间，所述箝位管连接在内管和外管的公共端与母线之间；
开关元件T5和T6根据正弦调制波的状态进行开关动作，即工作频率为工频，因此将T5和T6称作工频开关元件，相对于高频开关元件，工频开关元件又称为低频开关元件，例如工频可以为50Hz，而高频一般是十几kHz，或者二十几kHz。并且T5和T6的状态互补。
相应的高频开关元件之间一般都设有第一死区时间(tdt1)，低频开关元件之间也设有第二死区时间(tdt2)，且tdt1<tdt2。
发明人研究发现，当ANPC输出电压Vout处于过零点，低频开关元件处于状态切换的死区时间，此时高频开关元件先开通(tdt1<tdt2)，则可能将整个母线电压施加在某一低频开关元件上，由于母线电压超过低频开关元件耐压，从而造成该低频开关元件损毁。
下面结合波形图举例说明过零点开关状态，参见图2所示的输出电压过零点时驱动信号的波形图。
ANPC输出电压处于过零点处，由输出负电压向输出正电压转换的过程；输出电流还是保持正方向(Iout>0)，即ANPC的输出端连接容性负载；在工频开关元件的第二死区时间内(tdt2)，此时T6已经关断，但T5还没有导通；输出电流将通过二极管D4和D6来续流；如果此时T1导通了，则将会把整个母线电压施加到T5的两端；由于T5的耐压是按照母线电压的一半来设计的，因此T5将会因承受过电压而损毁。
为了解决输出电压过零点，开关元件承受高压的问题，一种解决方案是将图1中的T5和T6设置为高频开关元件，将箝位管(T2和T3)设置为低频开关元件。
其具体的调制方法为：在输出电压指令发生过零切换时，保持两个箝位管的导通时间有一个重叠区域，从而保证输出电压可以被箝位到直流母线中点电压。具体措施是将内管(T5和T6)高频动作、箝位管(T2和T3)低频动作的调制方式。
但是，发明人研究发现，在输出电压过零点附近控制箝位管导通重叠区间的控制时序相对比较复杂。
因此，基于以上控制复杂的方案，本申请实施例提供一种多电平逆变器的控制方法，在有源箝位多电平逆变器的输出电压过零点时对逆变器中开关元件进行控制，该方法包括：检测所述有源箝位多电平逆变器桥臂的输出电压是否发生过零点；如果是，则在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，或，则在所述输出电压过零点后的预定时间段内控制两个箝位管均一直导通。由于输出电压过零点时，对应低频开关元件处于死区时间，此时将对应的箝位管导通，则将低频开关元件承受的电压通过导通的箝位管强制箝位到母线电压的一半，由于箝位管连接的是中性点(即母线电压的中点)，因此，中性点的电压是整个母线电压的一半，可以解决此时如果高频开关元件导通使某一低频开关元件承受整个母线电压的问题。
需要说明的是，ANPC的拓扑是固定不变的，如图1所示，但是，对于图1所示的逆变器的控制方式可以包括多种。本申请实施例提供的控制方法可以解决输出电压过零点时整个母线电压施加在某一低频开关元件的技术问题。下面结合附图进行详细说明。
方法实施例一：
参见图3，该图为本申请实施例提供的多电平逆变器的控制方法流程图。
本实施例提供的多电平逆变器的控制方法，在有源箝位多电平逆变器的输出电压过零点时对逆变器中开关元件进行控制，所述有源箝位多电平逆变器每个逆变桥臂的开关元件包括：内管、外管和箝位管，所述内管和外管串联后连接在正母线和负母线之间，所述箝位管连接在内管和外管的公共端与母线之间；其中所述内管为低频开关元件，所述外管和箝位管为高频开关元件；
继续参见图1，其中箝位管包括T2和T3，外管包括T1和T4，内管包括T5和T6。T5和T6为低频开关元件，T2、T3、T1和T4为高频开关元件。
该方法包括：
S301：检测所述有源箝位多电平逆变器桥臂的输出电压是否发生过零点；
由于逆变器包括两个桥臂或三个桥臂，因此，需要对于每个桥臂单独进行判断。根据桥臂的输出电压对该桥臂对应的开关元件进行控制。
继续参见图1的拓扑图，图1中桥臂的上半桥包括T1、T2和T5，下半桥包括T3、T4和T6。
并且，T1和T2之间开关信号高频互补，T3和T4之间开关信号高频互补，T5和T6之间开关信号低频互补。
具体可以利用电压检测电路检测桥臂的输出电压，判断输出电压的过零点是否发生，由于逆变器输出电压是交流电压。
S302：如果是，则在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，或，则在所述输出电压过零点后的预定时间段内控制两个箝位管均一直导通。
可以理解的是，箝位管导通时，将电压箝位到母线电压一半，即箝位到Bus_N， 因此，无论过零点高频开关元件是否导通，低频开关元件也不会承受整个母线电压，而是仅承受母线电压的一半，在低频开关元件的耐压范围内，因此，不会损坏低频开关元件。
本实施例提供的方法，由于输出电压过零点时，对应低频开关元件处于死区时间，此时将对应的箝位管导通，则将低频开关元件承受的电压通过导通的箝位管强制箝位到母线电压的一半，由于箝位管连接的是中性点(即母线电压的中点)，因此，中性点的电压是整个母线电压的一半，可以解决此时如果高频开关元件导通使某一低频开关元件承受整个母线电压的问题。
方法实施例二：
输出电压过零点包括输出电压由正半周到达过零点和由负半周到达过零点两种情况，下面分别进行介绍。
首先介绍输出电压由正半周到达过零点，此种可以通过两种方式来实现，一种是控制对应箝位管导通，另一种是控制两个箝位管均导通。
参见图4，该图为输出电压过零点由正半周到达过零点控制一个箝位管导通的时序图。
当所述输出电压过零点为由正半周到达过零点时，则在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
在所述输出电压过零点后的预定时间段内控制下半桥箝位管T3一直导通。
如图4所示，在t11时刻，电压检测电路检测到输出电压由正半周到达过零点，因此将高频开关元件T2关断，同时将工频开关元件T5关断，进入相应的死区时间；
相应高频开关元件之间的第一死区时间(tdt1)小于工频开关元件之间的第二死区时间(tdt2)，即tdt1<tdt2，这样可以减少输出波形的畸变。由于开关元件死区时间的存在，本身就会使输出波形发生畸变，但是为了能够正常工作开关元件又必须存在死区时间。输出波形包括输出电压波形和输出电流波形。当开关元件处于死区时间时，开关元件的开关状态没有变化，这样输出电压和输出电流的波形不受控制，所以会产生畸变，为了保证能够正常工作又不会产生太大畸变，则死区时间越小越好。但是，如果高频开关元件的第一死区时间大于工频开关元件的第二死区时间，则低频开关元件会产生过压损坏的风险。因此，设置tdt1<tdt2。
对应负半周的高频开关元件要先导通，在t12时刻，控制高频箝位管T3先导通，且将其占空比设置为1(即D＝1)；从图中可以看出，从t13时刻开始，T3的驱动信号为高电平，即T3导通。
当所述低频开关元件对应的第二死区时间过后，控制下半桥内管导通。即经过死区时间tdt2后，在t13时刻，负半周的工频开关元件T6导通；
由于在该高频开关周期内，桥臂输出电压会被箝位管箝位到直流母线的中点电压，从而消除了工频开关管的过压风险。因为工频开关管的最高耐压是按照母线电压一半进行的设计。
以上介绍的当输出电压过零点是由正半周到达过零点时，控制上半桥的箝位管为例进行的介绍，也可以控制两个箝位管均导通，下面结合图5进行详细介绍。
参见图5，该图为输出电压过零点由正半周到达过零点控制两个箝位管导通的时序图。
图5中是桥臂输出电压由正半周向负半周切换时的开关状态时序，具体的调制方法与图4中的方法基本一致，唯一不同的是在t12时刻，控制两个高频箝位管T2和T3同时都导通，从图中可以看出，T2和T3对应的均为高电平，即当驱动信号为高电平时，该开关元件导通，反之该开关元件关断。
该方法既可以很好的解决工频开关管过压风险，同时可以带来的有益效果是可以提供多个箝位续流回路，大大减小桥臂电压切换过程中的换流回路。以电流为正为例进行介绍，T2和T3同时导通时，存在以下两个电流通路，分别为：Bus_N-D2-T5-I_out和Bus_N-T3-D6-I_out。由于存在以上两个电流路径，因此两个电流路径的漏感是并联关系，这样可以减小换流回路中的漏感，换流回路中的漏感越小，则换流过程中开关元件过压风险越小。
以上介绍的是，输出电压过零点由正半周到达过零点的情况，下面介绍输出电压过零点由负半周到达过零点的情况。
当所述输出电压过零点为由负半周到达过零点时，则在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
在所述输出电压过零点后的预定时间段内控制上半桥箝位管一直导通。继续参见图1，即在所述输出电压过零点后的预定时间段内控制T2一直导通。
当然，输出电压过零点由负半周到达过零点时，也可以控制两个箝位管均导通，即在所述输出电压过零点后的预定时间段内控制T2和T3一直导通。
以上实施例中，预定时间段可以根据需要进行设置，例如所述输出电压过零点后的预定时间段为：所述输出电压过零后的第一个高频开关周期。也可以在输出电压过零后的前N个高频开关周期都控制对应箝位管导通，其中N为正整数，例如N＝2，则在输出电压过零后的前2个高频开关周期一直控制箝位管导通。但是N又不能取值太大，因为预定时间段越短越好，如果太长，则会使逆变器的输出效率降低。因此，预设时间段可以在解决开关元件电压应力问题的基础上尽量缩短。
装置实施例：
基于以上实施例提供的一种多电平逆变器的控制方法，本申请实施例还提供一种多电平逆变器的控制装置，下面结合附图进行详细介绍。
参见图6，该图为本申请实施例提供的多电平逆变器的控制装置示意图。
本实施例提供的多电平逆变器的控制装置，在有源箝位多电平逆变器的输出电压过零点时对逆变器中开关元件进行控制，所述有源箝位多电平逆变器每个逆变桥臂的开关元件包括：内管、外管和箝位管，所述内管和外管串联后连接在正母线和负母线之间，所述箝位管连接在内管和外管的公共端与母线之间；其中所述内管为低频开关 元件，所述外管和箝位管为高频开关元件；
该装置包括：检测模块601和控制模块602；
所述检测模块601，用于检测所述有源箝位多电平逆变器桥臂的输出电压是否发生过零点；
所述控制模块602，用于所述检测模块601检测所述输出电压过零点时，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，或，在所述输出电压过零点后的预定时间段内控制两个箝位管均一直导通。
其中检测模块601具体可以通过电压检测电路来实现。
控制模块602可以通过逆变器的控制器来实现，控制器可以输出脉冲驱动信号来控制逆变器中的开关管的开关状态。
由于输出电压过零点时，对应低频开关元件处于死区时间，此时将对应的箝位管导通，则将低频开关元件承受的电压通过导通的箝位管强制箝位到母线电压的一半，由于箝位管连接的是中性点(即母线电压的中点)，因此，中性点的电压是整个母线电压的一半，这样就不会导致此时如果高频开关元件导通使某一低频开关元件承受整个母线电压的问题。
当所述输出电压过零点为由正半周到达过零点时，所述控制模块，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
在所述输出电压过零点后的预定时间段内控制下半桥箝位管一直导通。
当所述输出电压过零点为由负半周到达过零点时，所述控制模块，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
在所述输出电压过零点后的预定时间段内控制上半桥箝位管一直导通。
其中，预定时间段可以根据需要进行设置，例如所述输出电压过零点后的预定时间段为：所述输出电压过零后的第一个高频开关周期。也可以在输出电压过零后的前N个高频开关周期都控制对应箝位管导通，其中N为正整数，例如N＝2，则在输出电压过零后的前2个高频开关周期一直控制箝位管导通。但是N又不能取值太大，因为预定时间段越短越好，如果太长，则会使逆变器的输出效率降低。因此，预设时间段可以在解决开关元件电压应力问题的基础上尽量缩短。
逆变器实施例：
基于以上实施例提供的多电平逆变器的控制方法以及控制装置，本申请实施例还提供一种多电平逆变器，下面结合附图进行详细介绍。
参见图7，该图为本申请实施例提供的多电平逆变器示意图。
本实施例提供的多电平逆变器，该多电平逆变器为有源箝位多电平逆变器，所述有源箝位多电平逆变器每个逆变桥臂的开关元件包括：内管、外管和箝位管，所述内管和外管串联后连接在正母线和负母线之间，所述箝位管连接在内管和外管的公共端与母线之间；其中所述内管为低频开关元件，所述外管和箝位管为高频开关元件；该多电平逆变器包括：电压检测电路702和控制器701；
由于T2和T3的作用是箝位，因此将T2和T3称为箝位管，T1、T5、T6和T4组成桥臂，由于T1和T4在外，T5和T6在内，因此，称T1和T4为外管，T5和T6为内管。
所述电压检测电路702，用于检测所述有源箝位多电平逆变器桥臂的输出电压是否发生过零点；
所述控制器701，用于所述电压检测电路检测所述输出电压过零点时，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，或，在所述输出电压过零点后的预定时间段内控制两个箝位管均一直导通。
由于输出电压过零点时，对应低频开关元件处于死区时间，此时将对应的箝位管导通，则将低频开关元件承受的电压通过导通的箝位管强制箝位到母线电压的一半，由于箝位管连接的是中性点(即母线电压的中点)，因此，中性点的电压是整个母线电压的一半，可以解决此时如果高频开关元件导通使某一低频开关元件承受整个母线电压的问题。
当所述输出电压过零点为由正半周到达过零点时，所述控制器，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
在所述输出电压过零点后的预定时间段内控制下半桥箝位管一直导通。即T3导通。
当然，输出电压过零点由正半周到达过零点时，也可以控制两个箝位管均导通，即在所述输出电压由正半周到达过零点后的预定时间段内控制T2和T3一直导通。
当所述输出电压过零点为由负半周到达过零点时，所述控制器，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
在所述输出电压过零点后的预定时间段内控制上半桥箝位管一直导通。即T2导通。
当然，输出电压过零点由负半周到达过零点时，也可以控制两个箝位管均导通，即在所述输出电压过零点后的预定时间段内控制T2和T3一直导通。
另外，相应高频开关元之间的第一死区时间(tdt1)小于工频开关元件之间的第二死区时间(tdt2)，即tdt1<tdt2，这样可以减少输出波形的畸变。
当输出电压过零点时，如果控制两个箝位管均导通，可以提供多个箝位续流回路，，这样可以减小换流回路中的漏感，换流回路中的漏感越小，则换流过程中开关元件过压风险越小。
应当理解，在本申请中，“至少一个(项)”是指一个或者多个，“多个”是指两个或两个以上。“和/或”，用于描述关联对象的关联关系，表示可以存在三种关系，例如，“A和/或B”可以表示：只存在A，只存在B以及同时存在A和B三种情况，其中A，B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项(个)”或其类似表达，是指这些项中的任意组合，包括单项(个)或复数项(个)的任意组合。例如，a，b或c中的至少一项(个)，可以表示：a，b，c，“a和b”，“a和c”，“b和c”，或“a和b和c”，其中a，b，c可以是单个，也可以是多个。
以上所述，以上实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述 各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的精神和范围。

Claims (14)

  1. 一种多电平逆变器的控制方法，其特征在于，在有源箝位多电平逆变器的输出电压过零点时对逆变器中开关元件进行控制，所述有源箝位多电平逆变器每个逆变桥臂的开关元件包括：内管、外管和箝位管，所述内管和外管串联后连接在正母线和负母线之间，所述箝位管连接在内管和外管的公共端与母线之间；其中所述内管为低频开关元件，所述外管和箝位管为高频开关元件；
    该方法包括：
    检测所述有源箝位多电平逆变器桥臂的输出电压是否发生过零点；
    如果是，则在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，或，则在所述输出电压过零点后的预定时间段内控制两个箝位管均一直导通。
  2. 根据权利要求1所述的多电平逆变器的控制方法，其特征在于，当所述输出电压过零点为由正半周到达过零点时，则在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
    在所述输出电压过零点后的预定时间段内控制下半桥箝位管一直导通。
  3. 根据权利要求1所述的多电平逆变器的控制方法，其特征在于，当所述输出电压过零点为由负半周到达过零点时，则在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
    在所述输出电压过零点后的预定时间段内控制上半桥箝位管一直导通。
  4. 根据权利要求1-3任一项所述的多电平逆变器的控制方法，其特征在于，所述输出电压过零点后的预定时间段为：
    所述输出电压过零后的第一个高频开关周期。
  5. 根据权利要求1-3任一项所述的多电平逆变器的控制方法，其特征在于，所述高频开关元件对应的第一死区时间小于所述低频开关元件对应的第二死区时间。
  6. 根据权利要求2所述的多电平逆变器的控制方法，其特征在于，还包括：当所述低频开关元件对应的第二死区时间过后，控制下半桥内管导通。
  7. 根据权利要求3所述的多电平逆变器的控制方法，其特征在于，还包括：当所述低频开关元件对应的第二死区时间过后，控制上半桥内管导通。
  8. 一种多电平逆变器的控制装置，其特征在于，在有源箝位多电平逆变器的输出电压过零点时对逆变器中开关元件进行控制，所述有源箝位多电平逆变器每个逆变桥臂的开关元件包括：内管、外管和箝位管，所述内管和外管串联后连接在正母线和负母线之间，所述箝位管连接在内管和外管的公共端与母线之间；其中所述内管为低频开关元件，所述外管和箝位管为高频开关元件；
    该装置包括：检测模块和控制模块；
    所述检测模块，用于检测所述有源箝位多电平逆变器桥臂的输出电压是否发生过零点；
    所述控制模块，用于所述检测模块检测所述输出电压过零点时，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，或，在所述输出电压过零点后的 预定时间段内控制两个箝位管均一直导通。
  9. 根据权利要求8所述的多电平逆变器的控制装置，其特征在于，当所述输出电压过零点为由正半周到达过零点时，所述控制模块，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
    在所述输出电压过零点后的预定时间段内控制下半桥箝位管一直导通。
  10. 根据权利要求8所述的多电平逆变器的控制装置，其特征在于，当所述输出电压过零点为由负半周到达过零点时，所述控制模块，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
    在所述输出电压过零点后的预定时间段内控制上半桥箝位管一直导通。
  11. 根据权利要求8-10任一项所述的多电平逆变器的控制方法，其特征在于，所述输出电压过零点后的预定时间段为：
    所述输出电压过零后的第一个高频开关周期。
  12. 一种多电平逆变器，其特征在于，该多电平逆变器为有源箝位多电平逆变器，所述有源箝位多电平逆变器每个逆变桥臂的开关元件包括：内管、外管和箝位管，所述内管和外管串联后连接在正母线和负母线之间，所述箝位管连接在内管和外管的公共端与母线之间；其中所述内管为低频开关元件，所述外管和箝位管为高频开关元件；该多电平逆变器包括：电压检测电路和控制器；
    所述电压检测电路，用于检测所述有源箝位多电平逆变器桥臂的输出电压是否发生过零点；
    所述控制器，用于所述电压检测电路检测所述输出电压过零点时，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，或，在所述输出电压过零点后的预定时间段内控制两个箝位管均一直导通。
  13. 根据权利要求12所述的多电平逆变器，其特征在于，当所述输出电压过零点为由正半周到达过零点时，所述控制器，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
    在所述输出电压过零点后的预定时间段内控制下半桥箝位管一直导通。
  14. 根据权利要求12所述的多电平逆变器，其特征在于，当所述输出电压过零点为由负半周到达过零点时，所述控制器，在所述输出电压过零点后的预定时间段内控制对应箝位管一直导通，具体为：
    在所述输出电压过零点后的预定时间段内控制上半桥箝位管一直导通。
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