WO2019163484A1 - Semiconductor element and method of manufacturing same - Google Patents

Semiconductor element and method of manufacturing same Download PDF

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Publication number
WO2019163484A1
WO2019163484A1 PCT/JP2019/003644 JP2019003644W WO2019163484A1 WO 2019163484 A1 WO2019163484 A1 WO 2019163484A1 JP 2019003644 W JP2019003644 W JP 2019003644W WO 2019163484 A1 WO2019163484 A1 WO 2019163484A1
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Prior art keywords
electrode
plating layer
electroless
semiconductor element
electroless plating
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PCT/JP2019/003644
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French (fr)
Japanese (ja)
Inventor
砂本 昌利
上野 隆二
祥太郎 中村
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三菱電機株式会社
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Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP2020501641A priority Critical patent/JP6873311B2/en
Priority to DE112019000957.5T priority patent/DE112019000957T5/en
Priority to CN201980012856.1A priority patent/CN111742395A/en
Publication of WO2019163484A1 publication Critical patent/WO2019163484A1/en

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    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
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    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
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    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
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    • C23C18/1633Process of electroless plating
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    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
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    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/54Contact plating, i.e. electroless electrochemical plating
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    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
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    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
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    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/18Pretreatment of the material to be coated
    • C23C18/1803Pretreatment of the material to be coated of metallic material surfaces or of a non-specific material surfaces
    • C23C18/1824Pretreatment of the material to be coated of metallic material surfaces or of a non-specific material surfaces by chemical pretreatment
    • C23C18/1837Multistep pretreatment
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes

Definitions

  • the present invention relates to a semiconductor element and a manufacturing method thereof. More specifically, the present invention relates to a front / back conduction type semiconductor device, in particular, a power semiconductor device for power conversion represented by IGBT (Insulated Gate Bipolar Transistor), a diode, and the like, and a manufacturing method thereof.
  • IGBT Insulated Gate Bipolar Transistor
  • the back electrode of the semiconductor element is soldered to a substrate or the like, and the front electrode of the semiconductor element is wire bonded.
  • a mounting method in which a metal electrode is directly soldered to a front electrode of a semiconductor element is frequently used from the viewpoint of shortening manufacturing time and reducing material costs.
  • the front electrode of the semiconductor element is generally formed from aluminum or an aluminum alloy, a nickel film, a gold film, etc. having a thickness of several ⁇ m may be formed on the front electrode of the semiconductor element in order to perform soldering. Needed.
  • a nickel film or the like is formed by using a vacuum film forming method such as vapor deposition or sputtering, usually only a thickness of about 1.0 ⁇ m can be obtained.
  • the nickel film is made thicker, the manufacturing cost increases. Therefore, a plating technique is attracting attention as a film forming method capable of increasing the thickness at a low cost at a high speed.
  • an electroless plating method capable of selectively forming a plating layer on the surface of an electrode formed from aluminum or an aluminum alloy (hereinafter, sometimes abbreviated as “Al electrode”).
  • Al electrode aluminum or an aluminum alloy
  • a palladium catalyst method and a zincate method are generally used.
  • the palladium catalyst method palladium is deposited on the surface of an Al electrode as a catalyst nucleus to form an electroless plating layer.
  • zincate method zinc is replaced with Al on the surface of the Al electrode to deposit as catalyst nuclei, thereby forming an electroless plating layer. Since the zincate solution used in this method is inexpensive, it is being widely adopted.
  • Patent Document 1 a protective film made of polyimide is formed on the side surface of an Al electrode on a semiconductor substrate, and a nickel plating layer and its surface are formed on the surface of the Al electrode where the protective film is not formed by electroless plating.
  • a method for manufacturing a semiconductor element including selectively forming an electroless plating layer comprising a gold plating layer laminated thereon.
  • the present invention has been made in order to solve the above-described problems, and the electroless plating layer does not swell and peel when soldering or wire bonding, and has a highly reliable front and back conductive type.
  • An object of the present invention is to provide a semiconductor device and a manufacturing method thereof.
  • the front side electrode or the back side electrode contains a noble element than the metal forming the electrode and has a smaller area than the electrode. It has been found that by forming one electrode and forming an electroless plating layer on the first electrode, it is possible to prevent a decrease in adhesion between the electrode and the electroless plating layer due to electrode damage.
  • the present invention has been completed.
  • the present invention is a semiconductor element in which a first electrode and an electroless plating layer are sequentially formed on an electrode on at least one side of a front and back conductive substrate having a front side electrode and a back side electrode.
  • the present invention also includes a step of forming a front side electrode on one side of a front and back conductive substrate, and deposits an element more precious than the metal forming the front side electrode using an electroless plating method on a part of the front side electrode
  • a step of forming a first electrode, and a step of forming an electroless plating layer on the first electrode using the first electrode as a catalyst using an electroless plating method. is there.
  • the present invention it is possible to provide a front-back conductive semiconductor element with high bonding reliability in which an electroless plating layer does not swell and peel when soldering or wire bonding, and a method for manufacturing the same.
  • FIG. 1 is a schematic cross-sectional view of a semiconductor element according to a first embodiment.
  • 1 is a schematic plan view of a semiconductor element according to a first embodiment.
  • 6 is a schematic cross-sectional view of another semiconductor element according to the first embodiment.
  • FIG. FIG. 6 is a schematic cross-sectional view of a semiconductor element according to a second embodiment.
  • FIG. 10 is a schematic cross-sectional view of another semiconductor element according to the second embodiment.
  • FIG. 6 is a schematic cross-sectional view of a semiconductor element according to a third embodiment.
  • FIG. 10 is a schematic cross-sectional view of another semiconductor element according to the third embodiment.
  • FIG. 1 is a schematic cross-sectional view of a semiconductor element according to the first embodiment.
  • FIG. 2 is a schematic plan view of the semiconductor element according to the first embodiment. 1 and 2, the semiconductor element 1 of the present embodiment includes a front / back conductive substrate 2, a front electrode 3a formed on one main surface (front surface) of the front / back conductive substrate 2, and a front / back conductive substrate. 2 is provided with a back-side electrode 3b formed on the other main surface (back surface), a first electrode 4 formed on the front-side electrode 3a, and an electroless plating layer 5 formed on the first electrode 4.
  • the electroless plating layer 5 includes a first bonding electroless plating layer 6 formed on the first electrode 4 and a second bonding electroless plating layer 7 formed on the first bonding electroless plating layer 6. And have.
  • the first electrode 4 contains an element nobler than the metal forming the front side electrode 3a.
  • the first electrode 4 is formed so that the area of the upper surface of the first electrode 4 is smaller than the area of the upper surface of the front electrode 3a.
  • the first electrode 4 functions as an electrode (corrosion prevention electrode) for preventing corrosion.
  • a protective film 8 is provided on the front electrode 3a on which the electroless plating layer 5 is not formed so as to surround the electroless plating layer 5.
  • FIG. 3 is a schematic cross-sectional view of another semiconductor element according to the first embodiment. Since the semiconductor element 1 shown in FIG. 3 has the same structure as that of the semiconductor element 1 shown in FIG. 1 except that the side surface of the front electrode 3a is covered with the protective film 8, the description thereof is omitted.
  • the front and back conductive substrate 2 is not particularly limited, and a semiconductor substrate known in the technical field such as a Si substrate, a SiC substrate, a GaAs substrate, or a GaN substrate can be used.
  • the front-back conductive substrate 2 has a diffusion layer (not shown) and has a function for controlling the operation of the semiconductor element 1 such as a PN junction and a gate electrode.
  • the front-side electrode 3a and the back-side electrode 3b are not particularly limited, and can be formed from materials known in the art such as aluminum, aluminum alloy, copper, nickel, and gold. In the present embodiment, it is preferable that the front side electrode 3a is formed from aluminum or an aluminum alloy, and the back side electrode 3b is formed from nickel or gold from the viewpoint of excellent bondability.
  • the 1st electrode 4 becomes easy to be formed.
  • the element more noble than aluminum is not particularly limited, and examples thereof include iron, nickel, tin, lead, silicon, copper, silver, gold, tungsten, cobalt, platinum, palladium, iridium, and rhodium. Among these elements, copper, silicon, iron, nickel, silver, and gold are preferable. Moreover, these elements may be contained independently or may be contained 2 or more types.
  • the content of the element nobler than aluminum in the aluminum alloy is not particularly limited, but is preferably 5% by mass or less, more preferably 0.05% by mass or more and 3% by mass or less, and most preferably 0.1% by mass or more. 2% by mass or less.
  • the thickness of the front side electrode 3a is not particularly limited, but is generally 1 ⁇ m or more and 8 ⁇ m or less, preferably 2 ⁇ m or more and 7 ⁇ m or less, more preferably 3 ⁇ m or more and 6 ⁇ m or less.
  • the thickness of the back-side electrode 3b is not particularly limited, but is generally from 0.1 ⁇ m to 4 ⁇ m, preferably from 0.5 ⁇ m to 3 ⁇ m, more preferably from 0.8 ⁇ m to 2 ⁇ m.
  • the first electrode 4 only needs to contain an element nobler than the metal forming the front side electrode 3a or the back side electrode 3b.
  • an electroless gold plating layer In consideration of the material for forming the front side electrode 3a and the back side electrode 3b described above, It is preferable to consist of an electroless gold plating layer.
  • the reason why the layer formed by the electroless plating method is preferable is that palladium and gold have a high melting point and a low vapor pressure. Therefore, these metals are used in vacuum deposition, sputtering, electron beam, thermal spraying, etc. In the case of forming a layer containing selenium, it is necessary to heat the front and back conductive substrate 2 to a temperature of 500 ° C.
  • the protective film 8 is often formed from a non-metal or an organic substance that is poorly reactive with a noble metal, so that the adhesive force is exerted when the lower surface of the protective film 8 is in contact with the upper surface of the first electrode 4. It is because it is easy to become low.
  • the concentration of the noble element in the first electrode 4 is not particularly limited, but is generally 85% by mass or more, preferably 88% by mass or more and 99% by mass or less, more preferably 90% by mass or more and 98% by mass or less.
  • the thickness of the first electrode 4 is preferably 0.05 ⁇ m or more and 0.8 ⁇ m or less, more preferably 0.1 ⁇ m or more and 0.6 ⁇ m or less, and most preferably 0.2 ⁇ m or more and 0 from the viewpoint of corrosion prevention effect and cost reduction. .55 ⁇ m or less.
  • the electroless plating layer 6 for the first bonding and the electroless plating layer 7 for the second bonding may contain a metal having excellent bonding properties when soldering or wire bonding. Since the first electroless plating layer 6 for bonding is formed by depositing a metal using the first electrode 4 as a catalyst, the electroless plating layer 6 is preferably composed of an electroless nickel plating layer or an electroless copper plating layer.
  • the electroless plating layer 7 for second bonding is preferably composed of an electroless gold plating layer, an electroless palladium plating layer, an electroless copper plating layer, or an electroless nickel plating layer.
  • the second bonding electroless plating layer 7 may be formed without forming the second bonding electroless plating layer 7, or the second bonding electroless plating layer.
  • a third bonding electroless plating layer may be further formed on 7 to form a three-layer bonding electroless plating layer.
  • the electroless plating layer for bonding is a single layer, it is preferable to use an electroless nickel plating layer or an electroless copper plating layer.
  • two electroless plating layers for bonding it is preferable to form two layers of an electroless nickel plating layer and an electroless gold plating layer formed in this order from the first electrode 4 side.
  • the electroless plating layer for joining when made into three layers, it may be set as three layers of the electroless nickel plating layer, the electroless palladium plating layer, and the electroless gold plating layer formed in order from the 1st electrode 4 side. preferable.
  • the thickness of the electroless plating layer 6 for first bonding is not particularly limited, but is generally 2 ⁇ m or more and 10 ⁇ m or less, preferably 3 ⁇ m or more and 9 ⁇ m or less, more preferably 4 ⁇ m or more and 8 ⁇ m or less.
  • the thickness of the electroless plating layer 7 for second bonding is not particularly limited, but is generally 0.1 ⁇ m or less, preferably 0.01 ⁇ m or more and 0.08 ⁇ m or less, more preferably 0.015 ⁇ m or more and 0.05 ⁇ m or less.
  • the protective film 8 is not particularly limited, and those known in the technical field can be used.
  • Examples of the protective film 8 include a glass-based film containing polyimide, silicon and the like from the viewpoint of excellent heat resistance.
  • the semiconductor element 1 having the above-described structure can be manufactured according to a method known in the technical field except for the step of forming the first electrode 4 and the electroless plating layer 5.
  • the semiconductor element 1 is manufactured as follows. First, the front side electrode 3 a and the back side electrode 3 b are formed on the front and back conductive substrate 2. A method for forming the front-side electrode 3a and the back-side electrode 3b on the front-back conductive substrate 2 is not particularly limited, and can be performed according to a method known in the technical field. Next, the protective film 8 is formed on a part of the front electrode 3a. The method for forming the protective film 8 is not particularly limited, and can be performed according to a method known in the technical field.
  • the front side electrode 3a and the back side electrode 3b formed on the front and back conductive substrate 2 are subjected to plasma cleaning.
  • the plasma cleaning is performed by removing organic residue, nitride, or oxide firmly attached to the front side electrode 3a and the back side electrode 3b by oxidative decomposition using plasma, and the like. This is performed to ensure reactivity and adhesion between the back electrode 3b and the protective film.
  • the plasma cleaning is performed on both the front side electrode 3a and the back side electrode 3b, but it is preferable to focus on the front side electrode 3a. Further, the order of plasma cleaning is not particularly limited, but it is preferable that the front side electrode 3a is plasma cleaned after the back side electrode 3b is plasma cleaned.
  • the conditions for the plasma cleaning step are not particularly limited, but generally, the argon gas flow rate: 10 cc / min to 300 cc / min, applied voltage: 200 W to 1000 W, vacuum: 10 Pa to 100 Pa, treatment time: 1 min to 10 Is less than a minute.
  • a protective film is attached to the plasma-cleaned back side electrode 3b so that the back side electrode 3b does not come into contact with the electroless plating solution.
  • the protective film may be formed by drying the semiconductor element 1 after forming the electroless plating layer 5 at a temperature of 60 ° C. to 150 ° C. for 15 minutes to 60 minutes.
  • a protective film is not specifically limited, The well-known ultraviolet peelable tape currently used for the protection of a plating process can be used.
  • the first electrode 4 and the electroless plating layer 5 are sequentially formed on the remaining front electrode 3a where the protective film 8 is not formed.
  • This process is generally performed by a degreasing step, a pickling step, a first zincate treatment step, a zincate peeling step, a second zincate treatment step, and an electroless plating treatment. It is important to perform sufficient water washing between each process so that the processing liquid or residue of the previous process is not brought into the next process.
  • the front electrode 3a is degreased.
  • Degreasing is performed to remove light organic substances, oils and fats, and oxide films attached to the surface of the front electrode 3a.
  • degreasing is performed using an alkaline chemical solution having a strong etching force with respect to the front electrode 3a.
  • the fat and oil are saponified by the degreasing process.
  • alkali-soluble substances are dissolved in the chemical solution, and substances that are not alkali-soluble are lifted off by etching of the front electrode 3a.
  • the conditions for the degreasing step are not particularly limited, but generally, the pH of the alkaline chemical solution is 7.5 to 10.5, the temperature is 45 ° C. to 75 ° C., and the treatment time is 30 seconds to 10 minutes.
  • the front electrode 3a is pickled.
  • the pickling is performed in order to neutralize the surface of the front electrode 3a using sulfuric acid or the like and to roughen the surface by etching, to increase the reactivity of the treatment liquid in a subsequent process, and to improve the adhesion of plating.
  • the conditions of the pickling step are not particularly limited, but generally, the temperature is 10 ° C. or more and 30 ° C. or less, and the treatment time is 30 seconds or more and 2 minutes or less.
  • the front electrode 3a is zincated.
  • the zincate process is a process for forming a zinc film while removing the oxide film by etching the surface of the front electrode 3a.
  • the standard oxidation-reduction potential of zinc is higher than that of aluminum or aluminum alloy constituting the front electrode 3a.
  • Aluminum dissolves as ions. Due to the electrons generated at this time, zinc ions receive electrons on the surface of the front electrode 3a, and a zinc film is formed on the surface of the front electrode 3a.
  • the front electrode 3a having a zinc film formed on the surface is immersed in nitric acid to dissolve zinc.
  • the front electrode 3a obtained by the zincate peeling step is immersed again in the zincate treatment solution.
  • a zinc film is formed on the surface of the front electrode 3a while removing the aluminum and its oxide film.
  • the reason for performing the above-mentioned zincate peeling step and the second zincate treatment step is to smooth the surface of the front electrode 3a.
  • the surface of the front side electrode 3a and the back side electrode 3b becomes smooth and the uniform 1st electrode 4 and the electroless-plating layer 5 are formed, so that the repetition of a zincate process and a zincate peeling process increases.
  • the zincate treatment is preferably performed twice or more, more preferably three times.
  • the electroless plating treatment step includes a step of forming the first electrode 4, a step of forming the first electroless plating layer 6 for bonding, and a step of forming the electroless plating layer 7 for second bonding.
  • an electroless palladium plating layer as the first electrode 4 is formed by immersing the front electrode 3a on which the zinc film is formed, for example, in an electroless palladium plating solution.
  • the front electrode 3a on which the zinc film is formed is immersed in an electroless palladium plating solution, initially, since zinc has a lower standard oxidation-reduction potential than palladium, palladium is deposited on the front electrode 3a. Subsequently, when the surface is covered with palladium, palladium is deposited autocatalytically by the action of the reducing agent contained in the electroless palladium plating solution. During this autocatalytic deposition, the component of the reducing agent is taken into the plating layer, so the electroless palladium plating layer as the first electrode 4 may be an alloy. Generally as a reducing agent of electroless palladium plating solution, hypophosphorous acid, formic acid, etc. are used.
  • hypophosphorous acid When hypophosphorous acid is used as a reducing agent, phosphorus is taken into the electroless palladium plating layer.
  • formic acid When formic acid is used as the reducing agent, no peculiar element is taken into the electroless palladium plating layer.
  • the electroless palladium plating layer as the first electrode 4 is chemically very stable and hardly damaged by corrosion or the like, the subsequent electroless plating layer forming process for the first bonding and the second bonding are performed. Corrosion of the front electrode 3a can be prevented in the electroless plating layer forming step. Furthermore, since the initial deposition rate of electroless palladium plating is as fast as about 0.5 ⁇ m / min, the surface of the front electrode 3a can be covered in a short time.
  • the electroless palladium plating solution is not particularly limited, and those known in the technical field can be used.
  • the palladium concentration in the electroless palladium plating solution is not particularly limited, but is generally 0.3 g / L or more and 2.0 g / L or less, preferably 0.5 g / L or more and 1.5 g / L or less.
  • the hydrogen ion concentration (pH) of the electroless palladium plating solution is not particularly limited, but is generally 7.0 or more and 8.0 or less, preferably 7.3 or more and 7.8 or less.
  • the temperature of the electroless palladium plating solution may be appropriately set according to the type of electroless palladium plating solution and the plating conditions, but is generally 40 ° C. or higher and 80 ° C. or lower, preferably 45 ° C. or higher and 75 ° C. or lower.
  • the plating time may be appropriately set according to the plating conditions and the thickness of the electroless palladium plating layer, but is generally 2 minutes to 30 minutes, preferably 5 minutes to 20 minutes.
  • the front-side electrode 3a on which the first electrode 4 containing palladium or the like is formed is immersed in, for example, an electroless nickel plating solution to thereby form the first electroless plating for bonding.
  • An electroless nickel plating layer is formed as the layer 6.
  • the front electrode 3a on which the first electrode 4 containing palladium or the like is formed is immersed in the electroless nickel plating solution, palladium or the like contained in the first electrode 4 is removed by the action of the reducing agent contained in the electroless nickel plating solution.
  • the reducing agent contained in the electroless nickel plating solution As a catalyst, electrons released from the reducing agent are supplied to nickel ions and nickel is deposited.
  • the electroless nickel plating layer as the first electroless plating layer 6 may be an alloy.
  • hypophosphorous acid or the like is generally used. When hypophosphorous acid is used as a reducing agent, phosphorus is taken into the electroless nickel plating layer.
  • the front side electrode 3a is not corroded in the subsequent process.
  • the electroless nickel plating solution is not particularly limited, and those known in the technical field can be used.
  • the nickel concentration of the electroless nickel plating solution is not particularly limited, but is generally 4.0 g / L or more and 7.0 g / L or less, preferably 4.5 g / L or more and 6.5 g / L or less.
  • the hydrogen ion concentration (pH) of the electroless nickel plating solution is not particularly limited, but is generally 4.0 or more and 6.0 or less, preferably 4.5 or more and 5.5 or less.
  • the temperature of the electroless nickel plating solution may be appropriately set according to the type of electroless nickel plating solution and the plating conditions, but is generally 70 ° C. or higher and 90 ° C. or lower, preferably 80 ° C. or higher and 90 ° C. or lower.
  • the plating time may be appropriately set according to the plating conditions and the thickness of the electroless nickel plating layer, but is generally 5 minutes to 40 minutes, preferably 10 minutes to 30 minutes.
  • the front-side electrode 3 a on which the first bonding electroless plating layer 6 is formed is immersed in, for example, an electroless gold plating solution, whereby the second bonding electroless plating is performed.
  • An electroless gold plating layer is formed as the layer 7.
  • the electroless gold plating process is generally performed by a method called a substitution type.
  • the substitutional electroless gold plating treatment is performed by replacing nickel in the electroless nickel plating layer with gold by the action of a complexing agent contained in the electroless gold plating solution.
  • the electroless gold plating solution does not contact the front electrode 3a, and the front side in the electroless gold plating process. Corrosion does not occur in the electrode 3a.
  • the reaction stops when the surface of the electroless nickel plating layer is covered with gold, so it is difficult to increase the thickness of the electroless gold plating layer. Therefore, the maximum thickness of the electroless gold plating layer to be formed is 0.08 ⁇ m, and generally about 0.05 ⁇ m. However, when used for soldering, the thickness of the electroless gold plating layer is not too small even with the above values.
  • the electroless gold plating solution is not particularly limited, and those known in the technical field can be used.
  • the gold concentration in the electroless gold plating solution is not particularly limited, but is generally 0.3 g / L or more and 2.0 g / L or less, preferably 0.5 g / L or more and 2.0 g / L or less.
  • the pH of the electroless gold plating solution is not particularly limited, but is generally 6.0 or more and 9.0 or less, preferably 6.5 or more and 8.0 or less.
  • the temperature of the electroless gold plating solution may be appropriately set according to the type of electroless gold plating solution and the plating conditions, but is generally 70 ° C. or higher and 90 ° C. or lower, preferably 80 ° C. or higher and 90 ° C. or lower.
  • the plating time may be appropriately set according to the plating conditions and the thickness of the electroless gold plating layer, but is generally 5 minutes to 30 minutes, preferably 10 minutes to 20 minutes.
  • the first electrode 4 and the electroless plating layer 5 formed on the front electrode 3a are not swollen and peeled off, and the front and back conduction with high bonding reliability is prevented.
  • a semiconductor device of a type and a method for manufacturing the same can be provided.
  • FIG. FIG. 4 is a schematic cross-sectional view of a semiconductor element according to the second embodiment.
  • the semiconductor element 1 according to the present embodiment includes a front / back conductive substrate 2, a front electrode 3 a formed on one main surface (front surface) of the front / back conductive substrate 2, and the other of the front / back conductive substrate 2.
  • the back side electrode 3b formed on the main surface (back side), the first electrode 4a formed on the front side electrode 3a, the first electrode 4b formed on the back side electrode 3b, the first electrode 4a and the first electrode And an electroless plating layer 5 formed on the electrode 4b.
  • the electroless plating layer 5 includes a first bonding electroless plating layer 6 formed on the first electrode 4a and the first electrode 4b, and a second bonding electroplating layer 6 formed on the first bonding electroless plating layer 6. And an electroless plating layer 7.
  • the first electrode 4a and the first electrode 4b contain an element nobler than the metal forming the front side electrode 3a and the back side electrode 3b.
  • the first electrode 4a is formed so that the area of the upper surface of the first electrode 4a is smaller than the area of the upper surface of the front-side electrode 3a. Since the area of the upper surface of the first electrode 4a is smaller than the area of the upper surface of the front-side electrode 3a, the amount of expensive noble metal such as palladium or gold used can be reduced.
  • the first electrode 4a and the first electrode 4b function as electrodes (corrosion prevention electrodes) for preventing corrosion.
  • a protective film 8 is provided on the front electrode 3a on which the electroless plating layer 5 is not formed so as to surround the electroless plating layer 5 formed on the first electrode 4a. That is, the semiconductor element 1 of the present embodiment is different from the first embodiment in that the first electrode 4b and the electroless plating layer 5 are sequentially formed on the back side electrode 3b.
  • FIG. 5 is a schematic cross-sectional view of another semiconductor element according to the second embodiment. Since the semiconductor element 1 shown in FIG. 5 has the same structure as that of the semiconductor element 1 shown in FIG.
  • the semiconductor element 1 of the present embodiment since the lower surface of the protective film 8 and the upper surface of the first electrode 4a are not in contact, the adhesion between the protective film 8 and the front electrode 3a is improved.
  • the protective film 8 is often made of a non-metal or an organic material that is poorly reactive with a noble metal, and therefore the adhesive force is exerted when the lower surface of the protective film 8 is in contact with the upper surface of the first electrode 4a. It is because it is easy to become low.
  • both the front side electrode 3a and the back side electrode 3b can be used without attaching a protective film to the back side electrode 3b.
  • electroless plating may be performed simultaneously.
  • the front side electrode 3a and the second side electroless plating layer forming step and the second electroless plating layer forming step are performed. Corrosion of the back side electrode 3b can be prevented.
  • the process of forming the first electrode 4a, the first electrode 4b and the electroless plating layer 5 is the same as the process described in the first embodiment, such as a degreasing step, a pickling step, a first zincate treatment step, a zincate peeling step, Since it is performed by the second zincate treatment step and the electroless plating treatment, the description is omitted.
  • the first electrode 4a, the first electrode 4b, and the electroless plating layer 5 formed on the front side electrode 3a and the back side electrode 3b may swell and peel when soldering or wire bonding. It is possible to provide a front / back conduction type semiconductor element having high bonding reliability and a method for manufacturing the same.
  • FIG. 6 is a schematic cross-sectional view of a semiconductor element according to the third embodiment.
  • the semiconductor element 1 of the present embodiment includes a front and back conductive substrate 2, a front electrode 3 a formed on one main surface (front surface) of the front and back conductive substrate 2, and the other of the front and back conductive substrate 2.
  • the back side electrode 3b formed on the main surface (back side), the first electrode 4a formed on the front side electrode 3a, the first electrode 4b formed on the back side electrode 3b, the first electrode 4a and the first electrode And an electroless plating layer 5 formed on the electrode 4b.
  • the electroless plating layer 5 includes a first bonding electroless plating layer 6 formed on the first electrode 4a and the first electrode 4b, and a second bonding electroplating layer 6 formed on the first bonding electroless plating layer 6. And an electroless plating layer 7.
  • the first electrode 4a and the first electrode 4b contain an element nobler than the metal forming the front side electrode 3a and the back side electrode 3b.
  • the first electrode 4a is formed so that the area of the upper surface of the first electrode 4a is smaller than the area of the upper surface of the front-side electrode 3a. Since the area of the upper surface of the first electrode 4a is smaller than the area of the upper surface of the front-side electrode 3a, the amount of expensive noble metal such as palladium or gold used can be reduced.
  • the first electrode 4a and the first electrode 4b function as electrodes (corrosion prevention electrodes) for preventing corrosion.
  • a protective film 8 is provided on the front electrode 3a on which the electroless plating layer 5 is not formed so as to surround the electroless plating layer 5 formed on the first electrode 4a. Further, the upper surface of the first electrode 4 a formed on the front electrode 3 a has a region in contact with the first bonding electroless plating layer 6 and a region in contact with the protective film 8. That is, the semiconductor element 1 of the present embodiment is different from the first and second embodiments in that the first electrode 4 a is formed to extend to the lower surface of the protective film 8. FIG.
  • FIG. 7 is a schematic cross-sectional view of another semiconductor element according to the third embodiment. Since the semiconductor element 1 shown in FIG. 7 has the same structure as that of the semiconductor element 1 shown in FIG. 6 except that the side surface of the front electrode 3a is covered with the protective film 8, the description thereof is omitted.
  • microetching may be performed after the degreasing step of the front electrode 3 a in the process of forming the first electrode 4 and the electroless plating layer 5. Subsequent steps are the same as those in the first embodiment, and thus description thereof is omitted.
  • the degreased front electrode 3a is immersed in a microetching solution containing a surfactant having a small surface tension, so that the microetching solution is placed in a minute gap between the front electrode 3a and the protective film 8.
  • a surfactant having a small surface tension include polyol ether and sodium alkyl sulfonate.
  • the microetching solution is not particularly limited, and those known in the technical field can be used.
  • an electroless palladium plating layer as the first electrode 4a can be deposited also in a minute gap between the front electrode 3a and the protective film 8.
  • the contact area between the front electrode 3a and the first electrode 4a increases, and the attachment between the front electrode 3a and the first electrode 4a is increased. Increases wearing power.
  • the length in the plane direction of the first electrode 4a formed on the lower surface of the protective film 8 is preferably 0.5 to 3.0 times, more preferably about 1.5 times the thickness of the first electrode 4a. is there.
  • the first electrode 4a and the electroless plating layer 5 formed on the front side electrode 3a are not swollen and peeled off, and the front and back surfaces with higher bonding reliability are provided.
  • a conductive semiconductor element and a method for manufacturing the same can be provided.
  • the semiconductor element 1 of each of the above embodiments may be manufactured by performing each plating process on a chip (front and back conductive substrate 2) obtained by dicing a semiconductor wafer, or From the viewpoint of productivity and the like, the semiconductor wafer may be manufactured by performing dicing after performing each plating process.
  • a reduction in the thickness of the front and back conductive substrate 2 has been demanded. May be difficult. Even in the case of a semiconductor wafer in which the central portion and the outer peripheral portion have different thicknesses, it is possible to form a desired plating layer by using each of the above-described plating treatments.
  • the electroless palladium plating layer as the first electrode 4, the first electrode 4a and the first electrode 4b, and the electroless nickel layer as the electroless plating layer 6 for the first bonding are mainly described in combination with the electroless gold plating layer as the second electroless plating layer 7 for bonding.
  • the same effect can be expected with combinations with other plating layers as shown in Table 1 below.
  • various bonding methods such as soldering, wire bonding, gold bonding, silver bonding, and nanoparticle bonding can be supported.
  • the front electrode and the electroless plating layer are formed after forming the front electrode and the back electrode on the front and back conductive substrates. Is not particularly limited. The effect of the present invention can be obtained no matter what time the back electrode is formed.
  • the front electrode may be formed on one side of the front / back conductive substrate, the first electrode and the electroless plating layer may be formed on the front electrode, and then the back electrode may be formed on the remaining one side of the front / back conductive substrate. .
  • Example 1 the semiconductor element 1 having the structure shown in FIG. 1 was produced.
  • a Si substrate 14 mm ⁇ 14 mm ⁇ 70 ⁇ m
  • an aluminum alloy electrode (silicon content: about 1 mass%, thickness: 5.0 ⁇ m) as the front electrode 3a is formed on the surface of the Si substrate, and aluminum as the back electrode 3b is formed on the back surface of the Si substrate.
  • An alloy electrode (silicon content: about 1% by mass, thickness: 1.3 ⁇ m) was formed.
  • a protective film 8 (polyimide, thickness: 8 ⁇ m) was formed on a part of the front side electrode 3a.
  • the first electrode 4 and the electroless plating layer 5 (the electroless plating layer 6 for the first bonding and the electroless electrode for the second bonding are formed on the front electrode 3a.
  • a plating layer 7) was sequentially formed to obtain a semiconductor element 1. In addition, between each process, the water washing using a pure water was performed.
  • the first electrode 4 electroless palladium plating layer
  • the first electroless plating layer 6 electroless nickel phosphorus plating layer
  • the second electroless plating layer 7 electroless formed on the front electrode 3a.
  • the thickness of the gold plating layer was measured using a commercially available fluorescent X-ray film thickness measuring device. As a result, the thickness of the first electrode 4 is 0.50 ⁇ m, the thickness of the electroless plating layer 6 for first bonding is 5.2 ⁇ m, and the thickness of the electroless plating layer 7 for second bonding is 0. 0.047 ⁇ m.
  • the adhesion of the electroless plating layer 5 of the obtained semiconductor element 1 was evaluated by a tape test. As a result, it was confirmed that the electroless plating layer 5 has sufficient adhesion without peeling from the surface of the aluminum alloy electrode. Further, when the semiconductor element 1 was heat-treated at 150 ° C. to simulate the mounting process, the electroless plating layer 5 did not swell. Furthermore, when the cross section of the obtained semiconductor element 1 was observed, corrosion of the aluminum alloy electrode was not recognized. From the above, it is considered that the semiconductor element 1 with high bonding reliability could be manufactured.
  • Example 2 the semiconductor element 1 having the structure shown in FIG. 4 was produced.
  • a Si substrate 14 mm ⁇ 14 mm ⁇ 70 ⁇ m
  • an aluminum alloy electrode (silicon content: about 1 mass%, thickness: 5.0 ⁇ m) as the front electrode 3a is formed on the surface of the Si substrate, and aluminum as the back electrode 3b is formed on the back surface of the Si substrate.
  • An alloy electrode (silicon content: about 1% by mass, thickness: 1.3 ⁇ m) was formed.
  • a protective film 8 (polyimide, thickness: 8 ⁇ m) was formed on a part of the front side electrode 3a.
  • the first electrode 4a and the electroless plating layer 5 are formed on the front electrode 3a.
  • the first electrode 4b and the electroless plating layer 5 are sequentially formed on the back electrode 3b.
  • a semiconductor element 1 was obtained.
  • the water washing using a pure water was performed between each process.
  • First electrode 4a and first electrode 4b electroless palladium plating layer, electroless plating layer 6 for first bonding (electroless nickel phosphorus plating layer), and electroless plating layer 7 for second bonding (electroless gold plating layer) )
  • Each thickness was measured using a commercially available fluorescent X-ray film thickness measuring device.
  • the thickness of the first electrode 4a formed on the front electrode 3a is 0.50 ⁇ m
  • the thickness of the electroless plating layer 6 for the first bonding is 5.1 ⁇ m
  • the electroless for the second bonding is 0.047 ⁇ m.
  • the thickness of the first electrode 4b formed on the back side electrode 3b is 0.45 ⁇ m
  • the thickness of the electroless plating layer 6 for the first bonding is 4.9 ⁇ m
  • the electroless plating for the second bonding was 0.046 ⁇ m.
  • the adhesion of the electroless plating layer 5 of the obtained semiconductor element 1 was evaluated by a tape test. As a result, it was confirmed that the electroless plating layer 5 has sufficient adhesion without peeling off from the surface of the aluminum alloy electrode. Further, when the semiconductor element 1 was heat-treated at 150 ° C. to simulate the mounting process, the electroless plating layer 5 did not swell. Furthermore, when the cross section of the obtained semiconductor element 1 was observed, corrosion of the aluminum alloy electrode was not recognized. From the above, it is considered that the semiconductor element 1 with high bonding reliability could be manufactured.
  • Example 3 the semiconductor element 1 having the structure shown in FIG. 6 was produced.
  • a Si substrate 14 mm ⁇ 14 mm ⁇ 70 ⁇ m
  • an aluminum alloy electrode (silicon content: about 1 mass%, thickness: 5.0 ⁇ m) as the front electrode 3a is formed on the surface of the Si substrate, and aluminum as the back electrode 3b is formed on the back surface of the Si substrate.
  • An alloy electrode (silicon content: about 1% by mass, thickness: 1.3 ⁇ m) was formed.
  • a protective film 8 (polyimide, thickness: 8 ⁇ m) was formed on a part of the front side electrode 3a.
  • the first electrode 4a and the electroless plating layer 5 are formed on the front side electrode 3a.
  • the first electrode 4b and the electroless plating layer 5 are sequentially formed on the back electrode 3b.
  • a semiconductor element 1 was obtained.
  • the water washing using a pure water was performed.
  • First electrode 4a and first electrode 4b electroless palladium plating layer, electroless plating layer 6 for first bonding (electroless nickel phosphorus plating layer), and electroless plating layer 7 for second bonding (electroless gold plating layer) )
  • Each thickness was measured using a commercially available fluorescent X-ray film thickness measuring device.
  • the thickness of the first electrode 4a formed on the front side electrode 3a is 0.51 ⁇ m
  • the thickness of the electroless plating layer 6 for the first bonding is 5.0 ⁇ m
  • the electroless for the second bonding is 0.048 ⁇ m.
  • the thickness of the first electrode 4b formed on the back electrode 3b is 0.47 ⁇ m
  • the thickness of the electroless plating layer 6 for the first bonding is 4.7 ⁇ m
  • the electroless plating for the second bonding was 0.44 ⁇ m.
  • the length in the planar direction of the first electrode 4a formed on the lower surface of the protective film 8 was measured using a cross-sectional observation image by a scanning electron microscope (SEM), and found to be 0.88 ⁇ m.
  • the adhesion of the electroless plating layer 5 of the obtained semiconductor element 1 was evaluated by a tape test. As a result, it was confirmed that the electroless plating layer 5 has sufficient adhesion without peeling off from the surface of the aluminum alloy electrode. Further, when the semiconductor element 1 was heat-treated at 150 ° C. to simulate the mounting process, the electroless plating layer 5 did not swell. Furthermore, when the cross section of the obtained semiconductor element 1 was observed, corrosion of the aluminum alloy electrode was not recognized. From the above, it is considered that the semiconductor element 1 with high bonding reliability could be manufactured.
  • Example 4 a semiconductor element in which the electroless plating layer for bonding of the semiconductor element 1 shown in FIG.
  • a Si substrate 14 mm ⁇ 14 mm ⁇ 70 ⁇ m
  • an aluminum alloy electrode (silicon content: about 1 mass%, thickness: 5.0 ⁇ m) as the front electrode 3a is formed on the surface of the Si substrate, and aluminum as the back electrode 3b is formed on the back surface of the Si substrate.
  • An alloy electrode (silicon content: about 1% by mass, thickness: 1.3 ⁇ m) was formed.
  • a protective film 8 (polyimide, thickness: 8 ⁇ m) was formed on a part of the front side electrode 3a.
  • the first electrode 4a and the electroless plating layer 5 (the electroless plating layer 6 for the first bonding, the second bonding non-use) are formed on the front side electrode 3a.
  • the electroplating layer 7 and the third electroless plating layer are sequentially formed, and the first electrode 4b and the electroless plating layer 5 (the electroless plating layer 6 for the first bonding, the second electroless plating layer) are formed on the back electrode 3b.
  • the electroplating layer 7 and the third bonding electroless plating layer) were sequentially formed to obtain the semiconductor element 1.
  • the water washing using a pure water was performed between each process.
  • First electrode 4a and first electrode 4b electroless palladium plating layer
  • electroless plating layer 6 for first bonding electroless nickel phosphorus plating layer
  • electroless plating layer 7 for second bonding electroless palladium plating layer
  • the thickness of each of the third electroless plating layer were measured using a commercially available fluorescent X-ray film thickness measuring device.
  • the thickness of the first electrode 4a formed on the front electrode 3a is 0.55 ⁇ m
  • the thickness of the electroless plating layer 6 for the first bonding is 4.9 ⁇ m
  • the electroless for the second bonding the thickness of the first electrode 4a formed on the front electrode 3a
  • the thickness of the plating layer 7 was 0.51 ⁇ m, and the thickness of the third electroless plating layer for bonding was 0.047 ⁇ m. Further, the thickness of the first electrode 4b formed on the back electrode 3b is 0.50 ⁇ m, the thickness of the electroless plating layer 6 for the first bonding is 4.9 ⁇ m, and the electroless plating for the second bonding. The thickness of the layer 7 was 0.48 ⁇ m, and the thickness of the third electroless plating layer for bonding was 0.046 ⁇ m. Further, the length in the planar direction of the first electrode 4a formed on the lower surface of the protective film 8 was measured using a cross-sectional observation image by a scanning electron microscope (SEM), and found to be 0.88 ⁇ m.
  • SEM scanning electron microscope
  • the adhesion of the electroless plating layer 5 of the obtained semiconductor element 1 was evaluated by a tape test. As a result, it was confirmed that the electroless plating layer 5 has sufficient adhesion without peeling off from the surface of the aluminum alloy electrode. Further, when the semiconductor element 1 was heat-treated at 150 ° C. to simulate the mounting process, the electroless plating layer 5 did not swell. Furthermore, when the cross section of the obtained semiconductor element was observed, corrosion of the aluminum alloy electrode was not recognized. From the above, it is considered that the semiconductor element 1 with high bonding reliability could be manufactured.
  • Example 5 a semiconductor element in which the electroless plating layer for bonding of the semiconductor element 1 shown in FIG.
  • a Si substrate 14 mm ⁇ 14 mm ⁇ 70 ⁇ m
  • an aluminum alloy electrode (silicon content: about 1 mass%, thickness: 5.0 ⁇ m) as the front electrode 3a is formed on the surface of the Si substrate, and aluminum as the back electrode 3b is formed on the back surface of the Si substrate.
  • An alloy electrode (silicon content: about 1% by mass, thickness: 1.3 ⁇ m) was formed.
  • a protective film 8 (polyimide, thickness: 8 ⁇ m) was formed on a part of the front side electrode 3a.
  • the first electrode 4a and the electroless plating layer 5 are sequentially formed on the front electrode 3a.
  • the first electrode 4b and the electroless plating layer 5 were sequentially formed on the back electrode 3b, and the semiconductor element 1 was obtained.
  • the water washing using a pure water was performed between each process.
  • each of the first electrode 4a and the first electrode 4b (electroless palladium plating layer) and the first electroless plating layer 6 (electroless copper plating layer) is measured using a commercially available fluorescent X-ray film thickness measuring device. Measured. As a result, the thickness of the first electrode 4a formed on the front electrode 3a was 0.55 ⁇ m, and the thickness of the electroless plating layer 6 for first bonding was 24.9 ⁇ m. Moreover, the thickness of the 1st electrode 4b formed on the back side electrode 3b was 0.51 micrometer, and the thickness of the electroless-plating layer 6 for 1st joining was 23.8 micrometers.
  • the length in the planar direction of the first electrode 4a formed on the lower surface of the protective film 8 was measured using a cross-sectional observation image by a scanning electron microscope (SEM), and was 0.78 ⁇ m.
  • the adhesion of the electroless plating layer 5 of the obtained semiconductor element 1 was evaluated by a tape test. As a result, it was confirmed that the electroless plating layer 5 has sufficient adhesion without peeling off from the surface of the aluminum alloy electrode. Further, when the semiconductor element 1 was heat-treated at 150 ° C. to simulate the mounting process, the electroless plating layer 5 did not swell. Furthermore, when the cross section of the obtained semiconductor element was observed, corrosion of the aluminum alloy electrode was not recognized. From the above, it is considered that the semiconductor element 1 with high bonding reliability could be manufactured.
  • Example 5 Without providing the first electrode 4a and the first electrode 4b (electroless palladium plating layer) in Example 5, an electroless plating layer 6 (electroless copper plating layer) for first bonding is formed on the aluminum alloy electrode. did. As a result, the aluminum alloy electrode was completely dissolved during the formation of the first electroless plating layer 6 (electroless copper plating layer), and a semiconductor element could not be produced.

Abstract

Provided is a semiconductor element in which a first electrode and an electroless-plated layer are successively formed on an electrode on at least one side of a front-back conductive substrate having a front-side electrode and a back-side electrode. The first electrode contains an element nobler than a metal forming the electrode on which the first electrode is formed. The area of the first electrode is smaller than the area of the electrode on which the first electrode is formed.

Description

半導体素子及びその製造方法Semiconductor device and manufacturing method thereof
 本発明は、半導体素子及びその製造方法に関する。詳細には、本発明は、表裏導通型の半導体素子、特に、IGBT(絶縁ゲート型バイポーラトランジスタ)、ダイオード等に代表される電力変換用のパワー半導体素子及びその製造方法に関する。 The present invention relates to a semiconductor element and a manufacturing method thereof. More specifically, the present invention relates to a front / back conduction type semiconductor device, in particular, a power semiconductor device for power conversion represented by IGBT (Insulated Gate Bipolar Transistor), a diode, and the like, and a manufacturing method thereof.
 従来、表裏導通型の半導体素子をモジュールに実装する場合、半導体素子の裏側電極が基板等に半田付けされ、半導体素子の表側電極がワイヤボンディングされてきた。しかしながら、近年、製造時間短縮及び材料費削減の観点から、半導体素子の表側電極に金属電極を直接半田付けする実装方法が用いられることが多くなっている。半導体素子の表側電極はアルミニウム又はアルミニウム合金から一般に形成されているため、半田付けを行うためには、半導体素子の表側電極上に数μmの厚さのニッケル膜、金膜等を形成することが必要とされる。 Conventionally, when a front and back conductive semiconductor element is mounted on a module, the back electrode of the semiconductor element is soldered to a substrate or the like, and the front electrode of the semiconductor element is wire bonded. However, in recent years, a mounting method in which a metal electrode is directly soldered to a front electrode of a semiconductor element is frequently used from the viewpoint of shortening manufacturing time and reducing material costs. Since the front electrode of the semiconductor element is generally formed from aluminum or an aluminum alloy, a nickel film, a gold film, etc. having a thickness of several μm may be formed on the front electrode of the semiconductor element in order to perform soldering. Needed.
 しかしながら、蒸着又はスパッタのような真空成膜法を用いてニッケル膜等を形成する場合、通常、1.0μm程度の厚さしか得られない。また、ニッケル膜を厚膜化しようとすると、製造コストが上昇してしまう。そこで、低コストで高速且つ厚膜化が可能な成膜方法として、めっき技術が注目されている。 However, when a nickel film or the like is formed by using a vacuum film forming method such as vapor deposition or sputtering, usually only a thickness of about 1.0 μm can be obtained. In addition, if the nickel film is made thicker, the manufacturing cost increases. Therefore, a plating technique is attracting attention as a film forming method capable of increasing the thickness at a low cost at a high speed.
 めっき技術としては、アルミニウム又はアルミニウム合金から形成される電極(以下「Al電極」と略記することがある)の表面にめっき層を選択的に形成することができる無電解めっき法がある。無電解めっき法としては、パラジウム触媒法及びジンケート法が一般に利用されている。パラジウム触媒法は、Al電極の表面にパラジウムを触媒核として析出させ、無電解めっき層を形成する。また、ジンケート法は、Al電極の表面において亜鉛をAlと置換させることで触媒核として析出させ、無電解めっき層を形成する。この方法に用いられるジンケート液は安価であるため、広く採用されつつある。 As the plating technique, there is an electroless plating method capable of selectively forming a plating layer on the surface of an electrode formed from aluminum or an aluminum alloy (hereinafter, sometimes abbreviated as “Al electrode”). As the electroless plating method, a palladium catalyst method and a zincate method are generally used. In the palladium catalyst method, palladium is deposited on the surface of an Al electrode as a catalyst nucleus to form an electroless plating layer. In the zincate method, zinc is replaced with Al on the surface of the Al electrode to deposit as catalyst nuclei, thereby forming an electroless plating layer. Since the zincate solution used in this method is inexpensive, it is being widely adopted.
 例えば、特許文献1には、半導体基板上のAl電極の側面にポリイミドからなる保護膜を形成し、保護膜が形成されていないAl電極の表面に、無電解めっき法によって、ニッケルめっき層とその上に積層された金めっき層とからなる無電解めっき層を選択的に形成することを含む半導体素子の製造方法が提案されている。 For example, in Patent Document 1, a protective film made of polyimide is formed on the side surface of an Al electrode on a semiconductor substrate, and a nickel plating layer and its surface are formed on the surface of the Al electrode where the protective film is not formed by electroless plating. There has been proposed a method for manufacturing a semiconductor element including selectively forming an electroless plating layer comprising a gold plating layer laminated thereon.
特開2005-51084号公報JP 2005-51084 A
 保護膜と無電解めっき層との間には化学的結合が形成されないので、この間には隙間が存在する。この隙間が大きかったり、無電解めっき処理の時間が長かったり、高温処理が行われたりすると、この隙間から薬液が侵入してAl電極を腐食することがある。Al電極の腐食が生じると、Al電極と接合用の無電解めっき層との間の付着力が低下し、半田付け又はワイヤボンディングする際に無電解めっき層が膨れ、剥離することがある。 Since no chemical bond is formed between the protective film and the electroless plating layer, there is a gap between them. If this gap is large, the electroless plating process takes a long time, or a high-temperature process is performed, the chemical solution may enter through this gap and corrode the Al electrode. When corrosion of the Al electrode occurs, the adhesive force between the Al electrode and the electroless plating layer for bonding decreases, and the electroless plating layer may swell and peel when soldering or wire bonding.
 本発明は、上記のような課題を解決するためになされたものであり、半田付け又はワイヤボンディングする際に無電解めっき層が膨れ、剥離することがない、接合信頼性の高い表裏導通型の半導体素子及びその製造方法を提供することを目的とする。 The present invention has been made in order to solve the above-described problems, and the electroless plating layer does not swell and peel when soldering or wire bonding, and has a highly reliable front and back conductive type. An object of the present invention is to provide a semiconductor device and a manufacturing method thereof.
 本発明者らは、上記のような課題を解決すべく鋭意研究した結果、表側電極又は裏側電極上に、その電極を形成する金属よりも貴な元素を含有し且つその電極より面積の小さい第一電極を形成し、その第一電極上に無電解めっき層を形成することにより、電極の損傷に起因する電極と無電解めっき層との間の付着力の低下を防止することができることを見出し、本発明を完成するに至った。 As a result of intensive studies to solve the above-described problems, the present inventors have found that the front side electrode or the back side electrode contains a noble element than the metal forming the electrode and has a smaller area than the electrode. It has been found that by forming one electrode and forming an electroless plating layer on the first electrode, it is possible to prevent a decrease in adhesion between the electrode and the electroless plating layer due to electrode damage. The present invention has been completed.
 すなわち、本発明は、表側電極及び裏側電極を有する表裏導通型基板の少なくとも片側の電極上に第一電極及び無電解めっき層が順次形成された半導体素子であって、前記第一電極が、前記第一電極が形成されている前記電極を形成する金属よりも貴な元素を含有し、前記第一電極の面積が、前記第一電極が形成されている前記電極の面積よりも小さい、半導体素子である。 That is, the present invention is a semiconductor element in which a first electrode and an electroless plating layer are sequentially formed on an electrode on at least one side of a front and back conductive substrate having a front side electrode and a back side electrode. A semiconductor element containing an element nobler than the metal forming the electrode on which the first electrode is formed, wherein the area of the first electrode is smaller than the area of the electrode on which the first electrode is formed It is.
 また、本発明は、表裏導通型基板の片側に表側電極を形成する工程と、前記表側電極上の一部分に、無電解めっき法を用いて前記表側電極を形成する金属よりも貴な元素を析出させて第一電極を形成する工程と、前記第一電極上に、無電解めっき法を用いて前記第一電極を触媒として無電解めっき層を形成する工程とを含む、半導体素子の製造方法である。 The present invention also includes a step of forming a front side electrode on one side of a front and back conductive substrate, and deposits an element more precious than the metal forming the front side electrode using an electroless plating method on a part of the front side electrode A step of forming a first electrode, and a step of forming an electroless plating layer on the first electrode using the first electrode as a catalyst using an electroless plating method. is there.
 本発明によれば、半田付け又はワイヤボンディングする際に無電解めっき層が膨れ、剥離することがない、接合信頼性の高い表裏導通型の半導体素子及びその製造方法を提供することができる。 According to the present invention, it is possible to provide a front-back conductive semiconductor element with high bonding reliability in which an electroless plating layer does not swell and peel when soldering or wire bonding, and a method for manufacturing the same.
実施の形態1による半導体素子の模式断面図である。1 is a schematic cross-sectional view of a semiconductor element according to a first embodiment. 実施の形態1による半導体素子の模式平面図である。1 is a schematic plan view of a semiconductor element according to a first embodiment. 実施の形態1による別の半導体素子の模式断面図である。6 is a schematic cross-sectional view of another semiconductor element according to the first embodiment. FIG. 実施の形態2による半導体素子の模式断面図である。FIG. 6 is a schematic cross-sectional view of a semiconductor element according to a second embodiment. 実施の形態2による別の半導体素子の模式断面図である。FIG. 10 is a schematic cross-sectional view of another semiconductor element according to the second embodiment. 実施の形態3による半導体素子の模式断面図である。FIG. 6 is a schematic cross-sectional view of a semiconductor element according to a third embodiment. 実施の形態3による別の半導体素子の模式断面図である。FIG. 10 is a schematic cross-sectional view of another semiconductor element according to the third embodiment.
 実施の形態1.
 図1は、実施の形態1による半導体素子の模式断面図である。図2は、実施の形態1による半導体素子の模式平面図である。
 図1及び図2において、本実施の形態の半導体素子1は、表裏導通型基板2と、表裏導通型基板2の一方の主面(表面)に形成された表側電極3aと、表裏導通型基板2の他方の主面(裏面)に形成された裏側電極3bと、表側電極3a上に形成された第一電極4と、第一電極4上に形成された無電解めっき層5とを備える。無電解めっき層5は、第一電極4上に形成された第一接合用無電解めっき層6と、第一接合用無電解めっき層6上に形成された第二接合用無電解めっき層7とを有している。第一電極4は、表側電極3aを形成する金属よりも貴な元素を含有している。第一電極4は、第一電極4の上面の面積が表側電極3aの上面の面積よりも小さくなるように形成されている。第一電極4は、腐食を防止するための電極(腐食防止用電極)として機能する。また、無電解めっき層5の周囲を囲うように、無電解めっき層5が形成されていない表側電極3a上には保護膜8が設けられている。図3は、実施の形態1による別の半導体素子の模式断面図である。図3に示される半導体素子1は、表側電極3aの側面が保護膜8で覆われていることを除き、図1に示される半導体素子1の構造と同じであるので説明を省略する。
Embodiment 1 FIG.
FIG. 1 is a schematic cross-sectional view of a semiconductor element according to the first embodiment. FIG. 2 is a schematic plan view of the semiconductor element according to the first embodiment.
1 and 2, the semiconductor element 1 of the present embodiment includes a front / back conductive substrate 2, a front electrode 3a formed on one main surface (front surface) of the front / back conductive substrate 2, and a front / back conductive substrate. 2 is provided with a back-side electrode 3b formed on the other main surface (back surface), a first electrode 4 formed on the front-side electrode 3a, and an electroless plating layer 5 formed on the first electrode 4. The electroless plating layer 5 includes a first bonding electroless plating layer 6 formed on the first electrode 4 and a second bonding electroless plating layer 7 formed on the first bonding electroless plating layer 6. And have. The first electrode 4 contains an element nobler than the metal forming the front side electrode 3a. The first electrode 4 is formed so that the area of the upper surface of the first electrode 4 is smaller than the area of the upper surface of the front electrode 3a. The first electrode 4 functions as an electrode (corrosion prevention electrode) for preventing corrosion. Further, a protective film 8 is provided on the front electrode 3a on which the electroless plating layer 5 is not formed so as to surround the electroless plating layer 5. FIG. 3 is a schematic cross-sectional view of another semiconductor element according to the first embodiment. Since the semiconductor element 1 shown in FIG. 3 has the same structure as that of the semiconductor element 1 shown in FIG. 1 except that the side surface of the front electrode 3a is covered with the protective film 8, the description thereof is omitted.
 表裏導通型基板2としては、特に限定されず、Si基板、SiC基板、GaAs基板、GaN基板などの当該技術分野において公知の半導体基板を用いることができる。表裏導通型基板2は、拡散層(図示していない)を有しており、PNジャンクション、ゲート電極などの半導体素子1の動作を司る機能を備えている。 The front and back conductive substrate 2 is not particularly limited, and a semiconductor substrate known in the technical field such as a Si substrate, a SiC substrate, a GaAs substrate, or a GaN substrate can be used. The front-back conductive substrate 2 has a diffusion layer (not shown) and has a function for controlling the operation of the semiconductor element 1 such as a PN junction and a gate electrode.
 表側電極3a及び裏側電極3bとしては、特に限定されず、アルミニウム、アルミニウム合金、銅、ニッケル、金等の当該技術分野において公知の材料から形成することができる。本実施の形態において、接合性に優れるという観点から、表側電極3aは、アルミニウム又はアルミニウム合金から形成し、裏側電極3bは、ニッケル又は金から形成することが好ましい。 The front-side electrode 3a and the back-side electrode 3b are not particularly limited, and can be formed from materials known in the art such as aluminum, aluminum alloy, copper, nickel, and gold. In the present embodiment, it is preferable that the front side electrode 3a is formed from aluminum or an aluminum alloy, and the back side electrode 3b is formed from nickel or gold from the viewpoint of excellent bondability.
 アルミニウム合金としては、特に限定されないが、アルミニウムよりも貴な元素を含有することが好ましい。アルミニウムよりも貴な元素を含有させることにより、第一電極4を形成する際に、当該元素の周囲に存在するアルミニウムから電子が流れ易くなるため、アルミニウムの溶解が促進される。そして、アルミニウムが溶解した部分に亜鉛が集中して析出し、第一電極4の形成の起点となる亜鉛の析出量が多くなるため、第一電極4が形成され易くなる。 Although it does not specifically limit as an aluminum alloy, It is preferable to contain a noble element rather than aluminum. By containing an element nobler than aluminum, when the first electrode 4 is formed, the electrons easily flow from aluminum existing around the element, so that dissolution of aluminum is promoted. And zinc concentrates and deposits in the part which aluminum melt | dissolved, and since the precipitation amount of zinc used as the starting point of formation of the 1st electrode 4 increases, the 1st electrode 4 becomes easy to be formed.
 アルミニウムよりも貴な元素としては、特に限定されないが、例えば、鉄、ニッケル、錫、鉛、ケイ素、銅、銀、金、タングステン、コバルト、白金、パラジウム、イリジウム、ロジウムなどが挙げられる。これらの元素の中でも、銅、ケイ素、鉄、ニッケル、銀、金が好ましい。また、これらの元素は、単独で含有されてもよいし、又は2種以上含有されてもよい。
 アルミニウム合金中のアルミニウムよりも貴な元素の含有量は、特に限定されないが、好ましくは5質量%以下、より好ましくは0.05質量%以上3質量%以下、最も好ましくは0.1質量%以上2質量%以下である。
The element more noble than aluminum is not particularly limited, and examples thereof include iron, nickel, tin, lead, silicon, copper, silver, gold, tungsten, cobalt, platinum, palladium, iridium, and rhodium. Among these elements, copper, silicon, iron, nickel, silver, and gold are preferable. Moreover, these elements may be contained independently or may be contained 2 or more types.
The content of the element nobler than aluminum in the aluminum alloy is not particularly limited, but is preferably 5% by mass or less, more preferably 0.05% by mass or more and 3% by mass or less, and most preferably 0.1% by mass or more. 2% by mass or less.
 表側電極3aの厚さは、特に限定されないが、一般的に1μm以上8μm以下、好ましくは2μm以上7μm以下、より好ましくは3μm以上6μm以下である。 The thickness of the front side electrode 3a is not particularly limited, but is generally 1 μm or more and 8 μm or less, preferably 2 μm or more and 7 μm or less, more preferably 3 μm or more and 6 μm or less.
 裏側電極3bの厚さは、特に限定されないが、一般的に0.1μm以上4μm以下、好ましくは0.5μm以上3μm以下、より好ましくは0.8μm以上2μm以下である。 The thickness of the back-side electrode 3b is not particularly limited, but is generally from 0.1 μm to 4 μm, preferably from 0.5 μm to 3 μm, more preferably from 0.8 μm to 2 μm.
 第一電極4は、表側電極3a又は裏側電極3bを形成する金属よりも貴な元素を含有すればよく、上述した表側電極3a及び裏側電極3bの形成材料を考慮すると、無電解パラジウムめっき層又は無電解金めっき層からなることが好ましい。無電解めっき法で形成された層であることが好ましい理由は、パラジウム及び金は、融点が高く且つ蒸気圧が低いので、真空蒸着法、スパッタ法、電子ビーム法、溶射法等でこれらの金属を含有する層を形成する場合、表裏導通型基板2の温度を500℃以上に加熱したり、高エネルギーをメタルターゲットに印加したりする必要があり、半導体素子1の特性変動を招くことがあるためである。更に、これらの形成法では、材料の収率が数%程度となるので、コスト的に不利となることが多い。また、第一電極4の面積は表側電極3aの面積よりも小さいため、パラジウム、金等の高価な貴金属の使用量を少なくすることができる。そのため、本実施の形態の半導体素子1では、コスト上昇を最小限に抑えることができる。
 また、本実施の形態の半導体素子1では、保護膜8の下面と第一電極4の上面とが接触していないので、保護膜8と表側電極3aとの間の付着力が向上する。その理由は、保護膜8は、貴金属との反応性が乏しい非金属又は有機物から形成されることが多いため、保護膜8の下面と第一電極4の上面とが接触していると付着力が低くなりやすいからである。
The first electrode 4 only needs to contain an element nobler than the metal forming the front side electrode 3a or the back side electrode 3b. In consideration of the material for forming the front side electrode 3a and the back side electrode 3b described above, It is preferable to consist of an electroless gold plating layer. The reason why the layer formed by the electroless plating method is preferable is that palladium and gold have a high melting point and a low vapor pressure. Therefore, these metals are used in vacuum deposition, sputtering, electron beam, thermal spraying, etc. In the case of forming a layer containing selenium, it is necessary to heat the front and back conductive substrate 2 to a temperature of 500 ° C. or higher, or to apply high energy to the metal target, which may cause fluctuations in the characteristics of the semiconductor element 1. Because. Furthermore, these forming methods often have a cost disadvantage because the yield of the material is about several percent. Moreover, since the area of the 1st electrode 4 is smaller than the area of the front side electrode 3a, the usage-amount of expensive noble metals, such as palladium and gold | metal | money, can be decreased. Therefore, in the semiconductor element 1 of the present embodiment, the cost increase can be minimized.
Further, in the semiconductor element 1 of the present embodiment, since the lower surface of the protective film 8 and the upper surface of the first electrode 4 are not in contact, the adhesion force between the protective film 8 and the front side electrode 3a is improved. The reason is that the protective film 8 is often formed from a non-metal or an organic substance that is poorly reactive with a noble metal, so that the adhesive force is exerted when the lower surface of the protective film 8 is in contact with the upper surface of the first electrode 4. It is because it is easy to become low.
 第一電極4中の貴な元素の濃度は、特に限定されないが、一般に85質量%以上、好ましくは88質量%以上99質量%以下、より好ましくは90質量%以上98質量%以下である。 The concentration of the noble element in the first electrode 4 is not particularly limited, but is generally 85% by mass or more, preferably 88% by mass or more and 99% by mass or less, more preferably 90% by mass or more and 98% by mass or less.
 第一電極4の厚さは、腐食防止効果及びコスト抑制の観点から、好ましくは0.05μm以上0.8μm以下、より好ましくは0.1μm以上0.6μm以下、最も好ましくは0.2μm以上0.55μm以下である。 The thickness of the first electrode 4 is preferably 0.05 μm or more and 0.8 μm or less, more preferably 0.1 μm or more and 0.6 μm or less, and most preferably 0.2 μm or more and 0 from the viewpoint of corrosion prevention effect and cost reduction. .55 μm or less.
 第一接合用無電解めっき層6及び第二接合用無電解めっき層7は、半田付け又はワイヤボンディングする際の接合性に優れる金属を含有すればよい。第一接合用無電解めっき層6は、第一電極4を触媒として金属を析出させて形成するため、無電解ニッケルめっき層又は無電解銅めっき層からなることが好ましい。また、第二接合用無電解めっき層7は、無電解金めっき層、無電解パラジウムめっき層、無電解銅めっき層又は無電解ニッケルめっき層からなることが好ましい。なお、本実施の形態による半導体素子1では、第二接合用無電解めっき層7を形成せずに、単層の接合用無電解めっき層としてもよいし、又は第二接合用無電解めっき層7上に第三接合用無電解めっき層を更に形成し、三層の接合用無電解めっき層としてもよい。接合用無電解めっき層を単層とする場合、無電解ニッケルめっき層又は無電解銅めっき層とすることが好ましい。接合用無電解めっき層を二層とする場合、第一電極4側から順に形成された無電解ニッケルめっき層と無電解金めっき層との二層とすることが好ましい。また、接合用無電解めっき層を三層とする場合、第一電極4側から順に形成された無電解ニッケルめっき層と無電解パラジウムめっき層と無電解金めっき層との三層とすることが好ましい。 The electroless plating layer 6 for the first bonding and the electroless plating layer 7 for the second bonding may contain a metal having excellent bonding properties when soldering or wire bonding. Since the first electroless plating layer 6 for bonding is formed by depositing a metal using the first electrode 4 as a catalyst, the electroless plating layer 6 is preferably composed of an electroless nickel plating layer or an electroless copper plating layer. The electroless plating layer 7 for second bonding is preferably composed of an electroless gold plating layer, an electroless palladium plating layer, an electroless copper plating layer, or an electroless nickel plating layer. In the semiconductor element 1 according to the present embodiment, the second bonding electroless plating layer 7 may be formed without forming the second bonding electroless plating layer 7, or the second bonding electroless plating layer. A third bonding electroless plating layer may be further formed on 7 to form a three-layer bonding electroless plating layer. When the electroless plating layer for bonding is a single layer, it is preferable to use an electroless nickel plating layer or an electroless copper plating layer. When two electroless plating layers for bonding are formed, it is preferable to form two layers of an electroless nickel plating layer and an electroless gold plating layer formed in this order from the first electrode 4 side. Moreover, when the electroless plating layer for joining is made into three layers, it may be set as three layers of the electroless nickel plating layer, the electroless palladium plating layer, and the electroless gold plating layer formed in order from the 1st electrode 4 side. preferable.
 第一接合用無電解めっき層6の厚さは、特に限定されないが、一般的に2μm以上10μm以下、好ましくは3μm以上9μm以下、より好ましくは4μm以上8μm以下である。 The thickness of the electroless plating layer 6 for first bonding is not particularly limited, but is generally 2 μm or more and 10 μm or less, preferably 3 μm or more and 9 μm or less, more preferably 4 μm or more and 8 μm or less.
 第二接合用無電解めっき層7の厚さは、特に限定されないが、一般に0.1μm以下、好ましくは0.01μm以上0.08μm以下、より好ましくは0.015μm以上0.05μm以下である。 The thickness of the electroless plating layer 7 for second bonding is not particularly limited, but is generally 0.1 μm or less, preferably 0.01 μm or more and 0.08 μm or less, more preferably 0.015 μm or more and 0.05 μm or less.
 保護膜8としては、特に限定されず、当該技術分野において公知のものを用いることができる。保護膜8としては、耐熱性に優れるという観点から、ポリイミド、シリコン等を含むガラス系の膜が挙げられる。 The protective film 8 is not particularly limited, and those known in the technical field can be used. Examples of the protective film 8 include a glass-based film containing polyimide, silicon and the like from the viewpoint of excellent heat resistance.
 上記のような構造を有する半導体素子1は、第一電極4及び無電解めっき層5を形成する工程を除き、当該技術分野において公知の方法に準じて製造することができる。 The semiconductor element 1 having the above-described structure can be manufactured according to a method known in the technical field except for the step of forming the first electrode 4 and the electroless plating layer 5.
 具体的には、以下のように半導体素子1を製造する。
 まず、表裏導通型基板2に表側電極3a及び裏側電極3bを形成する。表裏導通型基板2に表側電極3a及び裏側電極3bを形成する方法としては、特に限定されず、当該技術分野において公知の方法に準じて行なうことができる。
 次に、表側電極3a上の一部分に保護膜8を形成する。保護膜8を形成する方法としては、特に限定されず、当該技術分野において公知の方法に準じて行なうことができる。
Specifically, the semiconductor element 1 is manufactured as follows.
First, the front side electrode 3 a and the back side electrode 3 b are formed on the front and back conductive substrate 2. A method for forming the front-side electrode 3a and the back-side electrode 3b on the front-back conductive substrate 2 is not particularly limited, and can be performed according to a method known in the technical field.
Next, the protective film 8 is formed on a part of the front electrode 3a. The method for forming the protective film 8 is not particularly limited, and can be performed according to a method known in the technical field.
 続いて、表裏導通型基板2に形成された表側電極3a及び裏側電極3bをプラズマクリーニングする。プラズマクリーニングは、表側電極3a及び裏側電極3bに強固に付着した有機物残渣、窒化物又は酸化物をプラズマで酸化分解するなどによって除去し、表側電極3aと、めっきの前処理液又はめっき液との反応性、及び裏側電極3bと保護フィルムとの付着性を確保するために行われる。プラズマクリーニングは、表側電極3a及び裏側電極3bの両方に対して行われるが、表側電極3aを重点的に行うことが好ましい。また、プラズマクリーニングの順番としては、特に限定されないが、裏側電極3bをプラズマクリーニングした後に、表側電極3aをプラズマクリーニングすることが好ましい。その理由は、半導体素子1の表側には、表側電極3aと共に有機物で構成された保護膜8が存在しており、この保護膜8の残渣が表側電極3aに付着していることが多いためである。
なお、プラズマクリーニングは、保護膜8が消失しないように行う必要がある。
Subsequently, the front side electrode 3a and the back side electrode 3b formed on the front and back conductive substrate 2 are subjected to plasma cleaning. The plasma cleaning is performed by removing organic residue, nitride, or oxide firmly attached to the front side electrode 3a and the back side electrode 3b by oxidative decomposition using plasma, and the like. This is performed to ensure reactivity and adhesion between the back electrode 3b and the protective film. The plasma cleaning is performed on both the front side electrode 3a and the back side electrode 3b, but it is preferable to focus on the front side electrode 3a. Further, the order of plasma cleaning is not particularly limited, but it is preferable that the front side electrode 3a is plasma cleaned after the back side electrode 3b is plasma cleaned. The reason is that on the front side of the semiconductor element 1, there is a protective film 8 made of an organic material together with the front side electrode 3a, and residues of this protective film 8 are often attached to the front side electrode 3a. is there.
The plasma cleaning needs to be performed so that the protective film 8 does not disappear.
 プラズマクリーニング工程の条件は、特に限定されないが、一般に、アルゴンガス流量:10cc/分以上300cc/分以下、印加電圧:200W以上1000W以下、真空度:10Pa以上100Pa以下、処理時間:1分以上10分以下である。 The conditions for the plasma cleaning step are not particularly limited, but generally, the argon gas flow rate: 10 cc / min to 300 cc / min, applied voltage: 200 W to 1000 W, vacuum: 10 Pa to 100 Pa, treatment time: 1 min to 10 Is less than a minute.
 次に、裏側電極3bが無電解めっき液と接触しないように、プラズマクリーニングされた裏側電極3bに保護フィルムを貼り付ける。この保護フィルムは、無電解めっき層5を形成した後、半導体素子1を60℃以上150℃以下の温度で15分以上60分以下乾燥させ、剥がせばよい。なお、保護フィルムは、特に限定されず、めっき工程の保護用に用いられている公知の紫外線剥離型テープを用いることができる。 Next, a protective film is attached to the plasma-cleaned back side electrode 3b so that the back side electrode 3b does not come into contact with the electroless plating solution. The protective film may be formed by drying the semiconductor element 1 after forming the electroless plating layer 5 at a temperature of 60 ° C. to 150 ° C. for 15 minutes to 60 minutes. In addition, a protective film is not specifically limited, The well-known ultraviolet peelable tape currently used for the protection of a plating process can be used.
 プラズマクリーニングされた裏側電極3bに保護フィルムを貼り付けた後、保護膜8が形成されていない残りの部分の表側電極3a上に第一電極4及び無電解めっき層5を順次形成する。このプロセスは、一般に、脱脂工程、酸洗い工程、第一ジンケート処理工程、ジンケート剥離工程、第二ジンケート処理工程及び無電解めっき処理によって行われる。各工程の間は、十分な水洗を行い、前工程の処理液又は残渣が次工程に持ち込まれないようにすることが重要である。 After the protective film is attached to the plasma-cleaned back electrode 3b, the first electrode 4 and the electroless plating layer 5 are sequentially formed on the remaining front electrode 3a where the protective film 8 is not formed. This process is generally performed by a degreasing step, a pickling step, a first zincate treatment step, a zincate peeling step, a second zincate treatment step, and an electroless plating treatment. It is important to perform sufficient water washing between each process so that the processing liquid or residue of the previous process is not brought into the next process.
 脱脂工程では、表側電極3aの脱脂を行う。脱脂は、表側電極3aの表面に付着した軽度の有機物、油脂分及び酸化膜を除去するために行われる。一般に、脱脂は、表側電極3aに対してエッチング力が強いアルカリ性の薬液を用いて行われる。脱脂工程により、油脂分は鹸化される。また、鹸化されない物質については、アルカリ可溶の物質が当該薬液に溶解し、アルカリ可溶でない物質が表側電極3aのエッチングによってリフトオフされる。 In the degreasing step, the front electrode 3a is degreased. Degreasing is performed to remove light organic substances, oils and fats, and oxide films attached to the surface of the front electrode 3a. In general, degreasing is performed using an alkaline chemical solution having a strong etching force with respect to the front electrode 3a. The fat and oil are saponified by the degreasing process. In addition, for substances that are not saponified, alkali-soluble substances are dissolved in the chemical solution, and substances that are not alkali-soluble are lifted off by etching of the front electrode 3a.
 脱脂工程の条件は、特に限定されないが、一般に、アルカリ性薬液のpH:7.5以上10.5以下、温度:45℃以上75℃以下、処理時間:30秒以上10分以下である。 The conditions for the degreasing step are not particularly limited, but generally, the pH of the alkaline chemical solution is 7.5 to 10.5, the temperature is 45 ° C. to 75 ° C., and the treatment time is 30 seconds to 10 minutes.
 酸洗い工程では、表側電極3aを酸洗いする。酸洗いは、硫酸等を用いて表側電極3aの表面を中和すると共にエッチングによって荒らし、後工程における処理液の反応性を高め、めっきの付着力を向上させるために行われる。 In the pickling step, the front electrode 3a is pickled. The pickling is performed in order to neutralize the surface of the front electrode 3a using sulfuric acid or the like and to roughen the surface by etching, to increase the reactivity of the treatment liquid in a subsequent process, and to improve the adhesion of plating.
 酸洗い工程の条件は、特に限定されないが、一般に、温度:10℃以上30℃以下、処理時間:30秒以上2分以下である。 The conditions of the pickling step are not particularly limited, but generally, the temperature is 10 ° C. or more and 30 ° C. or less, and the treatment time is 30 seconds or more and 2 minutes or less.
 第一ジンケート処理工程では、表側電極3aをジンケート処理する。ジンケート処理とは、表側電極3aの表面をエッチングして酸化膜を除去しつつ亜鉛の皮膜を形成する処理である。一般的には、亜鉛が溶解した水溶液(ジンケート処理液)に、表側電極3aを浸漬すると、表側電極3aを構成するアルミニウム又はアルミニウム合金よりも亜鉛の方が、標準酸化還元電位が貴であるため、アルミニウムがイオンとして溶解する。このとき生じた電子により、亜鉛イオンが表側電極3aの表面で電子を受け取り、表側電極3aの表面に亜鉛の皮膜が形成される。 In the first zincate process, the front electrode 3a is zincated. The zincate process is a process for forming a zinc film while removing the oxide film by etching the surface of the front electrode 3a. Generally, when the front electrode 3a is immersed in an aqueous solution (zincate solution) in which zinc is dissolved, the standard oxidation-reduction potential of zinc is higher than that of aluminum or aluminum alloy constituting the front electrode 3a. Aluminum dissolves as ions. Due to the electrons generated at this time, zinc ions receive electrons on the surface of the front electrode 3a, and a zinc film is formed on the surface of the front electrode 3a.
 ジンケート剥離工程では、表面に亜鉛の皮膜が形成された表側電極3aを硝酸に浸漬し、亜鉛を溶解させる。 In the zincate peeling step, the front electrode 3a having a zinc film formed on the surface is immersed in nitric acid to dissolve zinc.
 第二ジンケート処理工程では、ジンケート剥離工程によって得られた表側電極3aをジンケート処理液に再度浸漬する。これにより、アルミニウム及びその酸化膜を除去しつつ、表側電極3aの表面に亜鉛の皮膜が形成される。
 上記のジンケート剥離工程及び第二ジンケート処理工程を行う理由は、表側電極3aの表面を平滑にするためである。なお、ジンケート処理工程及びジンケート剥離工程の繰り返しは、回数を増やすほど、表側電極3a及び裏側電極3bの表面が平滑になり、均一な第一電極4及び無電解めっき層5が形成される。ただし、表面平滑性と生産性とのバランスを考慮すると、ジンケート処理を2回以上行うことが好ましく、3回行うことがより好ましい。
In the second zincate treatment step, the front electrode 3a obtained by the zincate peeling step is immersed again in the zincate treatment solution. As a result, a zinc film is formed on the surface of the front electrode 3a while removing the aluminum and its oxide film.
The reason for performing the above-mentioned zincate peeling step and the second zincate treatment step is to smooth the surface of the front electrode 3a. In addition, the surface of the front side electrode 3a and the back side electrode 3b becomes smooth and the uniform 1st electrode 4 and the electroless-plating layer 5 are formed, so that the repetition of a zincate process and a zincate peeling process increases. However, considering the balance between surface smoothness and productivity, the zincate treatment is preferably performed twice or more, more preferably three times.
 無電解めっき処理工程は、第一電極4を形成する工程と第一接合用無電解めっき層6を形成する工程と第二接合用無電解めっき層7を形成する工程とからなる。 The electroless plating treatment step includes a step of forming the first electrode 4, a step of forming the first electroless plating layer 6 for bonding, and a step of forming the electroless plating layer 7 for second bonding.
 第一電極4を形成する工程では、亜鉛の皮膜が形成された表側電極3aを例えば無電解パラジウムめっき液に浸漬することにより、第一電極4としての無電解パラジウムめっき層を形成する。 In the step of forming the first electrode 4, an electroless palladium plating layer as the first electrode 4 is formed by immersing the front electrode 3a on which the zinc film is formed, for example, in an electroless palladium plating solution.
 亜鉛の皮膜が形成された表側電極3aを無電解パラジウムめっき液に浸漬すると、最初は、亜鉛の方がパラジウムよりも標準酸化還元電位が卑であるため、表側電極3a上にパラジウムが析出する。続いて、表面がパラジウムで覆われると、無電解パラジウムめっき液中に含まれる還元剤の作用によって、自触媒的にパラジウムが析出する。この自触媒的析出時には、還元剤の成分がめっき層に取り込まれるため、第一電極4としての無電解パラジウムめっき層は合金となることがある。無電解パラジウムめっき液の還元剤としては、一般に、次亜リン酸、蟻酸等が用いられる。次亜リン酸を還元剤として用いた場合は、無電解パラジウムめっき層中にリンが取り込まれる。蟻酸を還元剤として用いた場合は、無電解パラジウムめっき層中に特異な元素は取り込まれない。更に、第一電極4としての無電解パラジウムめっき層は、化学的に極めて安定であり、腐食などの損傷を受け難いため、この後に続く第一接合用無電解めっき層形成工程及び第二接合用無電解めっき層形成工程において表側電極3aが腐食することを防止できる。更に、無電解パラジウムめっきの初期析出速度は0.5μm/分程度と速いため、表側電極3aの表面を短時間で覆うことができる。無電解パラジウムめっき液としては、特に限定されず、当該技術分野において公知のものを用いることができる。 When the front electrode 3a on which the zinc film is formed is immersed in an electroless palladium plating solution, initially, since zinc has a lower standard oxidation-reduction potential than palladium, palladium is deposited on the front electrode 3a. Subsequently, when the surface is covered with palladium, palladium is deposited autocatalytically by the action of the reducing agent contained in the electroless palladium plating solution. During this autocatalytic deposition, the component of the reducing agent is taken into the plating layer, so the electroless palladium plating layer as the first electrode 4 may be an alloy. Generally as a reducing agent of electroless palladium plating solution, hypophosphorous acid, formic acid, etc. are used. When hypophosphorous acid is used as a reducing agent, phosphorus is taken into the electroless palladium plating layer. When formic acid is used as the reducing agent, no peculiar element is taken into the electroless palladium plating layer. Furthermore, since the electroless palladium plating layer as the first electrode 4 is chemically very stable and hardly damaged by corrosion or the like, the subsequent electroless plating layer forming process for the first bonding and the second bonding are performed. Corrosion of the front electrode 3a can be prevented in the electroless plating layer forming step. Furthermore, since the initial deposition rate of electroless palladium plating is as fast as about 0.5 μm / min, the surface of the front electrode 3a can be covered in a short time. The electroless palladium plating solution is not particularly limited, and those known in the technical field can be used.
 無電解パラジウムめっき液中のパラジウム濃度は、特に限定されないが、一般に0.3g/L以上2.0g/L以下、好ましくは0.5g/L以上1.5g/L以下である。
 無電解パラジウムめっき液の水素イオン濃度(pH)は、特に限定されないが、一般に7.0以上8.0以下、好ましくは7.3以上7.8以下である。
 無電解パラジウムめっき液の温度は、無電解パラジウムめっき液の種類及びめっき条件に応じて適宜設定すればよいが、一般に40℃以上80℃以下、好ましくは45℃以上75℃以下である。
 めっき時間は、めっき条件及び無電解パラジウムめっき層の厚さに応じて適宜設定すればよいが、一般に2分以上30分以下、好ましくは5分以上20分以下である。
The palladium concentration in the electroless palladium plating solution is not particularly limited, but is generally 0.3 g / L or more and 2.0 g / L or less, preferably 0.5 g / L or more and 1.5 g / L or less.
The hydrogen ion concentration (pH) of the electroless palladium plating solution is not particularly limited, but is generally 7.0 or more and 8.0 or less, preferably 7.3 or more and 7.8 or less.
The temperature of the electroless palladium plating solution may be appropriately set according to the type of electroless palladium plating solution and the plating conditions, but is generally 40 ° C. or higher and 80 ° C. or lower, preferably 45 ° C. or higher and 75 ° C. or lower.
The plating time may be appropriately set according to the plating conditions and the thickness of the electroless palladium plating layer, but is generally 2 minutes to 30 minutes, preferably 5 minutes to 20 minutes.
 第一接合用無電解めっき層6を形成する工程では、パラジウム等を含む第一電極4が形成された表側電極3aを例えば無電解ニッケルめっき液に浸漬することにより、第一接合用無電解めっき層6としての無電解ニッケルめっき層を形成する。 In the step of forming the first electroless plating layer 6 for bonding, the front-side electrode 3a on which the first electrode 4 containing palladium or the like is formed is immersed in, for example, an electroless nickel plating solution to thereby form the first electroless plating for bonding. An electroless nickel plating layer is formed as the layer 6.
 パラジウム等を含む第一電極4が形成された表側電極3aを無電解ニッケルめっき液に浸漬すると、無電解ニッケルめっき液中に含まれる還元剤の作用によって、第一電極4に含まれるパラジウム等を触媒として、還元剤から放出された電子がニッケルイオンに供給されニッケルが析出する。この析出時には、還元剤の成分がめっき層に取り込まれるため、第一接合用無電解めっき層6としての無電解ニッケルめっき層は合金となることがある。無電解ニッケルめっき液の還元剤としては、一般に、次亜リン酸等が用いられる。次亜リン酸を還元剤として用いた場合は、無電解ニッケルめっき層中にリンが取り込まれる。また、これまでの工程で表側電極3aと保護膜8と第一電極4との間に隙間があったとしても、この工程では、第一電極4の周囲にニッケルを迅速に析出させて隙間を埋めることができるので、この後に続く工程において表側電極3aが腐食することはない。無電解ニッケルめっき液としては、特に限定されず、当該技術分野において公知のものを用いることができる。 When the front electrode 3a on which the first electrode 4 containing palladium or the like is formed is immersed in the electroless nickel plating solution, palladium or the like contained in the first electrode 4 is removed by the action of the reducing agent contained in the electroless nickel plating solution. As a catalyst, electrons released from the reducing agent are supplied to nickel ions and nickel is deposited. At the time of this precipitation, since the component of the reducing agent is taken into the plating layer, the electroless nickel plating layer as the first electroless plating layer 6 may be an alloy. As a reducing agent for the electroless nickel plating solution, hypophosphorous acid or the like is generally used. When hypophosphorous acid is used as a reducing agent, phosphorus is taken into the electroless nickel plating layer. Moreover, even if there is a gap between the front electrode 3a, the protective film 8, and the first electrode 4 in the previous steps, in this step, nickel is rapidly deposited around the first electrode 4 to form the gap. Since it can be filled, the front side electrode 3a is not corroded in the subsequent process. The electroless nickel plating solution is not particularly limited, and those known in the technical field can be used.
 無電解ニッケルめっき液のニッケル濃度は、特に限定されないが、一般に4.0g/L以上7.0g/L以下、好ましくは4.5g/L以上6.5g/L以下である。無電解ニッケルめっき液の水素イオン濃度(pH)は、特に限定されないが、一般に4.0以上6.0以下、好ましくは4.5以上5.5以下である。
 無電解ニッケルめっき液の温度は、無電解ニッケルめっき液の種類及びめっき条件に応じて適宜設定すればよいが、一般に70℃以上90℃以下、好ましくは80℃以上90℃以下である。
 めっき時間は、めっき条件及び無電解ニッケルめっき層の厚さに応じて適宜設定すればよいが、一般に5分以上40分以下、好ましくは10分以上30分以下である。
The nickel concentration of the electroless nickel plating solution is not particularly limited, but is generally 4.0 g / L or more and 7.0 g / L or less, preferably 4.5 g / L or more and 6.5 g / L or less. The hydrogen ion concentration (pH) of the electroless nickel plating solution is not particularly limited, but is generally 4.0 or more and 6.0 or less, preferably 4.5 or more and 5.5 or less.
The temperature of the electroless nickel plating solution may be appropriately set according to the type of electroless nickel plating solution and the plating conditions, but is generally 70 ° C. or higher and 90 ° C. or lower, preferably 80 ° C. or higher and 90 ° C. or lower.
The plating time may be appropriately set according to the plating conditions and the thickness of the electroless nickel plating layer, but is generally 5 minutes to 40 minutes, preferably 10 minutes to 30 minutes.
 第二接合用無電解めっき層7を形成する工程では、第一接合用無電解めっき層6を形成した表側電極3aを例えば無電解金めっき液に浸漬することにより、第二接合用無電解めっき層7としての無電解金めっき層を形成する。無電解金めっき処理は、一般的に置換型と呼ばれる方法によって行われる。置換型の無電解金めっき処理は、無電解金めっき液中に含まれる錯化剤の作用により、無電解ニッケルめっき層のニッケルが金と置換されることで行われる。上述したように、表側電極3aと保護膜8と第一電極4との間の隙間は埋められているので、無電解金めっき液は表側電極3aと接触せず、無電解金めっき処理において表側電極3aに腐食が発生することはない。なお、無電解金めっき処理は、無電解ニッケルめっき層の表面が金で覆われてしまうと反応が停止するため、無電解金めっき層を厚くすることは難しい。したがって、形成される無電解金めっき層の厚さは最大で0.08μm、一般的には0.05μm程度である。ただし、半田付け用として利用する場合は、無電解金めっき層の厚さは、上記の値でも小さすぎるということはない。無電解金めっき液としては、特に限定されず、当該技術分野において公知のものを用いることができる。 In the step of forming the second bonding electroless plating layer 7, the front-side electrode 3 a on which the first bonding electroless plating layer 6 is formed is immersed in, for example, an electroless gold plating solution, whereby the second bonding electroless plating is performed. An electroless gold plating layer is formed as the layer 7. The electroless gold plating process is generally performed by a method called a substitution type. The substitutional electroless gold plating treatment is performed by replacing nickel in the electroless nickel plating layer with gold by the action of a complexing agent contained in the electroless gold plating solution. As described above, since the gaps between the front electrode 3a, the protective film 8, and the first electrode 4 are filled, the electroless gold plating solution does not contact the front electrode 3a, and the front side in the electroless gold plating process. Corrosion does not occur in the electrode 3a. In the electroless gold plating treatment, the reaction stops when the surface of the electroless nickel plating layer is covered with gold, so it is difficult to increase the thickness of the electroless gold plating layer. Therefore, the maximum thickness of the electroless gold plating layer to be formed is 0.08 μm, and generally about 0.05 μm. However, when used for soldering, the thickness of the electroless gold plating layer is not too small even with the above values. The electroless gold plating solution is not particularly limited, and those known in the technical field can be used.
 無電解金めっき液中の金濃度は、特に限定されないが、一般に0.3g/L以上2.0g/L以下、好ましくは0.5g/L以上2.0g/L以下である。
 無電解金めっき液のpHは、特に限定されないが、一般に6.0以上9.0以下、好ましくは6.5以上8.0以下である。
 無電解金めっき液の温度は、無電解金めっき液の種類及びめっき条件に応じて適宜設定すればよいが、一般に70℃以上90℃以下、好ましくは80℃以上90℃以下である。
 めっき時間は、めっき条件及び無電解金めっき層の厚さに応じて適宜設定すればよいが、一般に5分以上30分以下、好ましくは10分以上20分以下である。
The gold concentration in the electroless gold plating solution is not particularly limited, but is generally 0.3 g / L or more and 2.0 g / L or less, preferably 0.5 g / L or more and 2.0 g / L or less.
The pH of the electroless gold plating solution is not particularly limited, but is generally 6.0 or more and 9.0 or less, preferably 6.5 or more and 8.0 or less.
The temperature of the electroless gold plating solution may be appropriately set according to the type of electroless gold plating solution and the plating conditions, but is generally 70 ° C. or higher and 90 ° C. or lower, preferably 80 ° C. or higher and 90 ° C. or lower.
The plating time may be appropriately set according to the plating conditions and the thickness of the electroless gold plating layer, but is generally 5 minutes to 30 minutes, preferably 10 minutes to 20 minutes.
 実施の形態1によれば、半田付け又はワイヤボンディングする際に表側電極3a上に形成された第一電極4及び無電解めっき層5が膨れ、剥離することがない、接合信頼性の高い表裏導通型の半導体素子及びその製造方法を提供することができる。 According to the first embodiment, when the soldering or wire bonding is performed, the first electrode 4 and the electroless plating layer 5 formed on the front electrode 3a are not swollen and peeled off, and the front and back conduction with high bonding reliability is prevented. A semiconductor device of a type and a method for manufacturing the same can be provided.
 実施の形態2.
 図4は、実施の形態2による半導体素子の模式断面図である。
 図4において、本実施の形態の半導体素子1は、表裏導通型基板2と、表裏導通型基板2の一方の主面(表面)に形成された表側電極3aと、表裏導通型基板2の他方の主面(裏面)に形成された裏側電極3bと、表側電極3a上に形成された第一電極4aと、裏側電極3b上に形成された第一電極4bと、第一電極4a及び第一電極4b上にそれぞれ形成された無電解めっき層5とを備える。無電解めっき層5は、第一電極4a及び第一電極4b上に形成された第一接合用無電解めっき層6と、第一接合用無電解めっき層6上に形成された第二接合用無電解めっき層7とを有している。第一電極4a及び第一電極4bは、表側電極3a及び裏側電極3bを形成する金属よりも貴な元素を含有している。第一電極4aは、第一電極4aの上面の面積が表側電極3aの上面の面積よりも小さくなるように形成されている。第一電極4aの上面の面積は表側電極3aの上面の面積よりも小さいため、パラジウム、金等の高価な貴金属の使用量を少なくすることができる。そのため、本実施の形態の半導体素子1では、コスト上昇を最小限に抑えることができる。第一電極4a及び第一電極4bは、腐食を防止するための電極(腐食防止用電極)として機能する。また、第一電極4a上に形成された無電解めっき層5の周囲を囲うように、無電解めっき層5が形成されていない表側電極3a上には保護膜8が設けられている。すなわち、本実施の形態の半導体素子1は、裏側電極3b上にも第一電極4b及び無電解めっき層5が順次形成されている点が実施の形態1と異なる。図5は、実施の形態2による別の半導体素子の模式断面図である。図5に示される半導体素子1は、表側電極3aの側面が保護膜8で覆われていることを除き、図4に示される半導体素子1の構造と同じであるので説明を省略する。
 また、本実施の形態の半導体素子1では、保護膜8の下面と第一電極4aの上面とが接触していないので、保護膜8と表側電極3aとの間の付着力が向上する。その理由は、保護膜8は、貴金属との反応性が乏しい非金属又は有機物から形成されることが多いため、保護膜8の下面と第一電極4aの上面とが接触していると付着力が低くなりやすいからである。
Embodiment 2. FIG.
FIG. 4 is a schematic cross-sectional view of a semiconductor element according to the second embodiment.
In FIG. 4, the semiconductor element 1 according to the present embodiment includes a front / back conductive substrate 2, a front electrode 3 a formed on one main surface (front surface) of the front / back conductive substrate 2, and the other of the front / back conductive substrate 2. The back side electrode 3b formed on the main surface (back side), the first electrode 4a formed on the front side electrode 3a, the first electrode 4b formed on the back side electrode 3b, the first electrode 4a and the first electrode And an electroless plating layer 5 formed on the electrode 4b. The electroless plating layer 5 includes a first bonding electroless plating layer 6 formed on the first electrode 4a and the first electrode 4b, and a second bonding electroplating layer 6 formed on the first bonding electroless plating layer 6. And an electroless plating layer 7. The first electrode 4a and the first electrode 4b contain an element nobler than the metal forming the front side electrode 3a and the back side electrode 3b. The first electrode 4a is formed so that the area of the upper surface of the first electrode 4a is smaller than the area of the upper surface of the front-side electrode 3a. Since the area of the upper surface of the first electrode 4a is smaller than the area of the upper surface of the front-side electrode 3a, the amount of expensive noble metal such as palladium or gold used can be reduced. Therefore, in the semiconductor element 1 of the present embodiment, the cost increase can be minimized. The first electrode 4a and the first electrode 4b function as electrodes (corrosion prevention electrodes) for preventing corrosion. A protective film 8 is provided on the front electrode 3a on which the electroless plating layer 5 is not formed so as to surround the electroless plating layer 5 formed on the first electrode 4a. That is, the semiconductor element 1 of the present embodiment is different from the first embodiment in that the first electrode 4b and the electroless plating layer 5 are sequentially formed on the back side electrode 3b. FIG. 5 is a schematic cross-sectional view of another semiconductor element according to the second embodiment. Since the semiconductor element 1 shown in FIG. 5 has the same structure as that of the semiconductor element 1 shown in FIG. 4 except that the side surface of the front electrode 3a is covered with the protective film 8, the description thereof is omitted.
Further, in the semiconductor element 1 of the present embodiment, since the lower surface of the protective film 8 and the upper surface of the first electrode 4a are not in contact, the adhesion between the protective film 8 and the front electrode 3a is improved. The reason is that the protective film 8 is often made of a non-metal or an organic material that is poorly reactive with a noble metal, and therefore the adhesive force is exerted when the lower surface of the protective film 8 is in contact with the upper surface of the first electrode 4a. It is because it is easy to become low.
 表側電極3a上に第一電極4aを形成すると共に裏側電極3b上に第一電極4bを形成する方法としては、裏側電極3bに保護フィルムを貼り付けずに、表側電極3a及び裏側電極3bの両方に対して同時に無電解めっきを行えばよい。表側電極3a及び裏側電極3bの両方に無電解パラジウムめっき層を形成することで、この後に続く第一接合用無電解めっき層形成工程及び第二接合用無電解めっき層形成工程において表側電極3a及び裏側電極3bが腐食することを防止できる。第一電極4a、第一電極4b及び無電解めっき層5を形成するプロセスは、実施の形態1で説明したプロセスと同様に、脱脂工程、酸洗い工程、第一ジンケート処理工程、ジンケート剥離工程、第二ジンケート処理工程及び無電解めっき処理によって行われるので説明を省略する。 As a method of forming the first electrode 4a on the front side electrode 3a and forming the first electrode 4b on the back side electrode 3b, both the front side electrode 3a and the back side electrode 3b can be used without attaching a protective film to the back side electrode 3b. For example, electroless plating may be performed simultaneously. By forming the electroless palladium plating layer on both the front side electrode 3a and the back side electrode 3b, the front side electrode 3a and the second side electroless plating layer forming step and the second electroless plating layer forming step are performed. Corrosion of the back side electrode 3b can be prevented. The process of forming the first electrode 4a, the first electrode 4b and the electroless plating layer 5 is the same as the process described in the first embodiment, such as a degreasing step, a pickling step, a first zincate treatment step, a zincate peeling step, Since it is performed by the second zincate treatment step and the electroless plating treatment, the description is omitted.
 実施の形態2によれば、半田付け又はワイヤボンディングする際に表側電極3a及び裏側電極3b上に形成された第一電極4a、第一電極4b及び無電解めっき層5が膨れ、剥離することがない、接合信頼性の高い表裏導通型の半導体素子及びその製造方法を提供することができる。 According to the second embodiment, the first electrode 4a, the first electrode 4b, and the electroless plating layer 5 formed on the front side electrode 3a and the back side electrode 3b may swell and peel when soldering or wire bonding. It is possible to provide a front / back conduction type semiconductor element having high bonding reliability and a method for manufacturing the same.
 実施の形態3.
 図6は、実施の形態3による半導体素子の模式断面図である。
 図6において、本実施の形態の半導体素子1は、表裏導通型基板2と、表裏導通型基板2の一方の主面(表面)に形成された表側電極3aと、表裏導通型基板2の他方の主面(裏面)に形成された裏側電極3bと、表側電極3a上に形成された第一電極4aと、裏側電極3b上に形成された第一電極4bと、第一電極4a及び第一電極4b上にそれぞれ形成された無電解めっき層5とを備える。無電解めっき層5は、第一電極4a及び第一電極4b上に形成された第一接合用無電解めっき層6と、第一接合用無電解めっき層6上に形成された第二接合用無電解めっき層7とを有している。第一電極4a及び第一電極4bは、表側電極3a及び裏側電極3bを形成する金属よりも貴な元素を含有している。第一電極4aは、第一電極4aの上面の面積が表側電極3aの上面の面積よりも小さくなるように形成されている。第一電極4aの上面の面積は表側電極3aの上面の面積よりも小さいため、パラジウム、金等の高価な貴金属の使用量を少なくすることができる。そのため、本実施の形態の半導体素子1では、コスト上昇を最小限に抑えることができる。第一電極4a及び第一電極4bは、腐食を防止するための電極(腐食防止用電極)として機能する。また、第一電極4a上に形成された無電解めっき層5の周囲を囲うように、無電解めっき層5が形成されていない表側電極3a上には保護膜8が設けられている。更に、表側電極3a上に形成された第一電極4aの上面は、第一接合用無電解めっき層6と接する領域と、保護膜8と接する領域とを有している。すなわち、本実施の形態の半導体素子1は、保護膜8の下面にまで第一電極4aが延びて形成されている点が実施の形態1及び実施の形態2と異なる。図7は、実施の形態3による別の半導体素子の模式断面図である。図7に示される半導体素子1は、表側電極3aの側面が保護膜8で覆われていることを除き、図6に示される半導体素子1の構造と同じであるので説明を省略する。
Embodiment 3 FIG.
FIG. 6 is a schematic cross-sectional view of a semiconductor element according to the third embodiment.
In FIG. 6, the semiconductor element 1 of the present embodiment includes a front and back conductive substrate 2, a front electrode 3 a formed on one main surface (front surface) of the front and back conductive substrate 2, and the other of the front and back conductive substrate 2. The back side electrode 3b formed on the main surface (back side), the first electrode 4a formed on the front side electrode 3a, the first electrode 4b formed on the back side electrode 3b, the first electrode 4a and the first electrode And an electroless plating layer 5 formed on the electrode 4b. The electroless plating layer 5 includes a first bonding electroless plating layer 6 formed on the first electrode 4a and the first electrode 4b, and a second bonding electroplating layer 6 formed on the first bonding electroless plating layer 6. And an electroless plating layer 7. The first electrode 4a and the first electrode 4b contain an element nobler than the metal forming the front side electrode 3a and the back side electrode 3b. The first electrode 4a is formed so that the area of the upper surface of the first electrode 4a is smaller than the area of the upper surface of the front-side electrode 3a. Since the area of the upper surface of the first electrode 4a is smaller than the area of the upper surface of the front-side electrode 3a, the amount of expensive noble metal such as palladium or gold used can be reduced. Therefore, in the semiconductor element 1 of the present embodiment, the cost increase can be minimized. The first electrode 4a and the first electrode 4b function as electrodes (corrosion prevention electrodes) for preventing corrosion. A protective film 8 is provided on the front electrode 3a on which the electroless plating layer 5 is not formed so as to surround the electroless plating layer 5 formed on the first electrode 4a. Further, the upper surface of the first electrode 4 a formed on the front electrode 3 a has a region in contact with the first bonding electroless plating layer 6 and a region in contact with the protective film 8. That is, the semiconductor element 1 of the present embodiment is different from the first and second embodiments in that the first electrode 4 a is formed to extend to the lower surface of the protective film 8. FIG. 7 is a schematic cross-sectional view of another semiconductor element according to the third embodiment. Since the semiconductor element 1 shown in FIG. 7 has the same structure as that of the semiconductor element 1 shown in FIG. 6 except that the side surface of the front electrode 3a is covered with the protective film 8, the description thereof is omitted.
 保護膜8の下面に第一電極4aを形成する方法としては、第一電極4及び無電解めっき層5を形成するプロセスにおける表側電極3aの脱脂工程後にマイクロエッチングを行えばよい。その後の工程は、実施の形態1と同様であるので説明を省略する。 As a method for forming the first electrode 4 a on the lower surface of the protective film 8, microetching may be performed after the degreasing step of the front electrode 3 a in the process of forming the first electrode 4 and the electroless plating layer 5. Subsequent steps are the same as those in the first embodiment, and thus description thereof is omitted.
 マイクロエッチング工程は、脱脂された表側電極3aを、表面張力の小さい界面活性剤を含有するマイクロエッチング液に浸漬することにより、表側電極3aと保護膜8との間の微小な隙間にマイクロエッチング液を毛細管現象にて入り込ませ、その部分の軽度の金属酸化物を除去すると共にその部分の水濡れ性及び反応性を高めることができる。表面張力の小さい界面活性剤としては、例えば、ポリオールエーテル、アルキルスルホン酸ナトリウム等が挙げられる。マイクロエッチング液としては、特に限定されず、当該技術分野において公知のものを用いることができる。マイクロエッチングを行うことにより、表側電極3aと保護膜8との間の微小な隙間にも第一電極4aとしての無電解パラジウムめっき層を析出させることができる。このように、第一電極4aを保護膜8の下面にも形成することで、表側電極3aと第一電極4aとの接触面積が増加し、表側電極3aと第一電極4aとの間の付着力が増加する。 In the microetching step, the degreased front electrode 3a is immersed in a microetching solution containing a surfactant having a small surface tension, so that the microetching solution is placed in a minute gap between the front electrode 3a and the protective film 8. Can be introduced by capillarity to remove the light metal oxide in the portion and improve the wettability and reactivity of the portion. Examples of the surfactant having a small surface tension include polyol ether and sodium alkyl sulfonate. The microetching solution is not particularly limited, and those known in the technical field can be used. By performing microetching, an electroless palladium plating layer as the first electrode 4a can be deposited also in a minute gap between the front electrode 3a and the protective film 8. Thus, by forming the first electrode 4a also on the lower surface of the protective film 8, the contact area between the front electrode 3a and the first electrode 4a increases, and the attachment between the front electrode 3a and the first electrode 4a is increased. Increases wearing power.
 保護膜8の下面に形成される第一電極4aの平面方向の長さは、第一電極4aの厚さの好ましく0.5倍以上3.0倍以下、より好ましくは1.5倍程度である。 The length in the plane direction of the first electrode 4a formed on the lower surface of the protective film 8 is preferably 0.5 to 3.0 times, more preferably about 1.5 times the thickness of the first electrode 4a. is there.
 実施の形態3によれば、半田付け又はワイヤボンディングする際に表側電極3a上に形成された第一電極4a及び無電解めっき層5が膨れ、剥離することがない、接合信頼性のより高い表裏導通型の半導体素子及びその製造方法を提供することができる。 According to the third embodiment, when soldering or wire bonding, the first electrode 4a and the electroless plating layer 5 formed on the front side electrode 3a are not swollen and peeled off, and the front and back surfaces with higher bonding reliability are provided. A conductive semiconductor element and a method for manufacturing the same can be provided.
 なお、上記の各実施の形態の半導体素子1は、半導体ウエハをダイシングすることによって得られたチップ(表裏導通型基板2)に対して各めっき処理を行うことによって製造してもよいし、あるいは生産性などの観点から、半導体ウエハに対して各めっき処理を行った後にダイシングすることによって製造してもよい。特に、近年、半導体素子1の電気特性の改善の観点から、表裏導通型基板2の厚さの低減が求められており、中心部に比べて外周部の厚さが大きい半導体ウエハでなければハンドリングが難しいことがある。このような中心部と外周部との厚さが異なる半導体ウエハであっても、上記の各めっき処理を用いることにより、所望のめっき層を形成することが可能である。 The semiconductor element 1 of each of the above embodiments may be manufactured by performing each plating process on a chip (front and back conductive substrate 2) obtained by dicing a semiconductor wafer, or From the viewpoint of productivity and the like, the semiconductor wafer may be manufactured by performing dicing after performing each plating process. In particular, in recent years, from the viewpoint of improving the electrical characteristics of the semiconductor element 1, a reduction in the thickness of the front and back conductive substrate 2 has been demanded. May be difficult. Even in the case of a semiconductor wafer in which the central portion and the outer peripheral portion have different thicknesses, it is possible to form a desired plating layer by using each of the above-described plating treatments.
 上記の各実施の形態の半導体素子1では、第一電極4、第一電極4a及び第一電極4bとしての無電解パラジウムめっき層と、第一接合用無電解めっき層6としての無電解ニッケル層と、第二接合用無電解めっき層7としての無電解金めっき層との組み合わせで主に説明したが、下記表1に示すような他のめっき層での組み合わせでも同様の効果が期待できる。これらのめっき層の組み合わせを用いることで、半田付け、ワイヤボンディング、金接合、銀接合、ナノ粒子接合等の様々な接合方法に対応することができる。 In the semiconductor element 1 of each embodiment described above, the electroless palladium plating layer as the first electrode 4, the first electrode 4a and the first electrode 4b, and the electroless nickel layer as the electroless plating layer 6 for the first bonding. Although mainly described in combination with the electroless gold plating layer as the second electroless plating layer 7 for bonding, the same effect can be expected with combinations with other plating layers as shown in Table 1 below. By using a combination of these plating layers, various bonding methods such as soldering, wire bonding, gold bonding, silver bonding, and nanoparticle bonding can be supported.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
 なお、上記の実施の形態1~3では、表裏導通型基板に表側電極及び裏側電極を形成した後、第一電極及び無電解めっき層を形成した場合について説明したが、裏側電極を形成する時期は特に限定されない。裏側電極がどの時期に形成されたとしても本発明の効果は得られる。例えば、表裏導通型基板の片側に表側電極を形成し、その表側電極上に第一電極及び無電解めっき層を形成した後に、表裏導通型基板の残りの片側に裏側電極を形成してもよい。 In the first to third embodiments, the case where the first electrode and the electroless plating layer are formed after forming the front electrode and the back electrode on the front and back conductive substrates has been described. Is not particularly limited. The effect of the present invention can be obtained no matter what time the back electrode is formed. For example, the front electrode may be formed on one side of the front / back conductive substrate, the first electrode and the electroless plating layer may be formed on the front electrode, and then the back electrode may be formed on the remaining one side of the front / back conductive substrate. .
 以下、実施例により本発明の詳細を説明するが、これらによって本発明が限定されるものではない。
〔実施例1〕
 実施例1では、図1に示す構造を有する半導体素子1を作製した。
 まず、表裏導通型基板2として、Si基板(14mm×14mm×70μm)を準備した。
 次に、Si基板の表面に、表側電極3aとしてのアルミニウム合金電極(ケイ素含有量:約1質量%、厚さ:5.0μm)を形成し、Si基板の裏面に、裏側電極3bとしてのアルミニウム合金電極(ケイ素含有量:約1質量%、厚さ:1.3μm)を形成した。その後、表側電極3a上の一部分に保護膜8(ポリイミド、厚さ:8μm)を形成した。
 次に、下記の表2に示す条件にて各工程を行うことによって表側電極3a上に第一電極4及び無電解めっき層5(第一接合用無電解めっき層6及び第二接合用無電解めっき層7)を順次形成し、半導体素子1を得た。なお、各工程の間には、純水を用いた水洗を行った。
EXAMPLES Hereinafter, although an Example demonstrates the detail of this invention, this invention is not limited by these.
[Example 1]
In Example 1, the semiconductor element 1 having the structure shown in FIG. 1 was produced.
First, a Si substrate (14 mm × 14 mm × 70 μm) was prepared as the front and back conductive substrate 2.
Next, an aluminum alloy electrode (silicon content: about 1 mass%, thickness: 5.0 μm) as the front electrode 3a is formed on the surface of the Si substrate, and aluminum as the back electrode 3b is formed on the back surface of the Si substrate. An alloy electrode (silicon content: about 1% by mass, thickness: 1.3 μm) was formed. Thereafter, a protective film 8 (polyimide, thickness: 8 μm) was formed on a part of the front side electrode 3a.
Next, by performing each step under the conditions shown in Table 2 below, the first electrode 4 and the electroless plating layer 5 (the electroless plating layer 6 for the first bonding and the electroless electrode for the second bonding are formed on the front electrode 3a. A plating layer 7) was sequentially formed to obtain a semiconductor element 1. In addition, between each process, the water washing using a pure water was performed.
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000002
 表側電極3a上に形成された第一電極4(無電解パラジウムめっき層)、第一接合用無電解めっき層6(無電解ニッケルリンめっき層)及び第二接合用無電解めっき層7(無電解金めっき層)の厚さを、市販の蛍光X線膜厚測定装置を用いて測定した。その結果、第一電極4の厚さは0.50μmであり、第一接合用無電解めっき層6の厚さは5.2μmであり、第二接合用無電解めっき層7の厚さは0.047μmであった。 The first electrode 4 (electroless palladium plating layer), the first electroless plating layer 6 (electroless nickel phosphorus plating layer), and the second electroless plating layer 7 (electroless) formed on the front electrode 3a. The thickness of the gold plating layer was measured using a commercially available fluorescent X-ray film thickness measuring device. As a result, the thickness of the first electrode 4 is 0.50 μm, the thickness of the electroless plating layer 6 for first bonding is 5.2 μm, and the thickness of the electroless plating layer 7 for second bonding is 0. 0.047 μm.
 得られた半導体素子1の無電解めっき層5の密着性をテープ試験によって評価した。その結果、無電解めっき層5はアルミニウム合金電極の表面から剥離することなく、十分な付着力を有することが確認された。また、実装工程を模擬するため、半導体素子1を150℃で加熱処理したところ、無電解めっき層5に膨れは生じなかった。更に、得られた半導体素子1の断面を観察したところ、アルミニウム合金電極の腐食は認められなかった。
以上から、接合信頼性の高い半導体素子1を作製することができたと考えられる。
The adhesion of the electroless plating layer 5 of the obtained semiconductor element 1 was evaluated by a tape test. As a result, it was confirmed that the electroless plating layer 5 has sufficient adhesion without peeling from the surface of the aluminum alloy electrode. Further, when the semiconductor element 1 was heat-treated at 150 ° C. to simulate the mounting process, the electroless plating layer 5 did not swell. Furthermore, when the cross section of the obtained semiconductor element 1 was observed, corrosion of the aluminum alloy electrode was not recognized.
From the above, it is considered that the semiconductor element 1 with high bonding reliability could be manufactured.
〔実施例2〕
 実施例2では、図4に示す構造を有する半導体素子1を作製した。
 まず、表裏導通型基板2として、Si基板(14mm×14mm×70μm)を準備した。
 次に、Si基板の表面に、表側電極3aとしてのアルミニウム合金電極(ケイ素含有量:約1質量%、厚さ:5.0μm)を形成し、Si基板の裏面に、裏側電極3bとしてのアルミニウム合金電極(ケイ素含有量:約1質量%、厚さ:1.3μm)を形成した。その後、表側電極3a上の一部分に保護膜8(ポリイミド、厚さ:8μm)を形成した。
 次に、下記の表3に示す条件にて各工程を行うことによって、表側電極3a上に第一電極4a及び無電解めっき層5(第一接合用無電解めっき層6及び第二接合用無電解めっき層7)を順次形成すると共に裏側電極3b上に第一電極4b及び無電解めっき層5(第一接合用無電解めっき層6及び第二接合用無電解めっき層7)を順次形成し、半導体素子1を得た。なお、各工程の間には、純水を用いた水洗を行った。
[Example 2]
In Example 2, the semiconductor element 1 having the structure shown in FIG. 4 was produced.
First, a Si substrate (14 mm × 14 mm × 70 μm) was prepared as the front and back conductive substrate 2.
Next, an aluminum alloy electrode (silicon content: about 1 mass%, thickness: 5.0 μm) as the front electrode 3a is formed on the surface of the Si substrate, and aluminum as the back electrode 3b is formed on the back surface of the Si substrate. An alloy electrode (silicon content: about 1% by mass, thickness: 1.3 μm) was formed. Thereafter, a protective film 8 (polyimide, thickness: 8 μm) was formed on a part of the front side electrode 3a.
Next, by performing each step under the conditions shown in Table 3 below, the first electrode 4a and the electroless plating layer 5 (the first electroless plating layer 6 and the second bonding non-use) are formed on the front electrode 3a. The first electrode 4b and the electroless plating layer 5 (the first electroless plating layer 6 and the second electroless plating layer 7) are sequentially formed on the back electrode 3b. A semiconductor element 1 was obtained. In addition, between each process, the water washing using a pure water was performed.
Figure JPOXMLDOC01-appb-T000003
Figure JPOXMLDOC01-appb-T000003
 第一電極4a及び第一電極4b(無電解パラジウムめっき層)、第一接合用無電解めっき層6(無電解ニッケルリンめっき層)並びに第二接合用無電解めっき層7(無電解金めっき層)それぞれの厚さを、市販の蛍光X線膜厚測定装置を用いて測定した。その結果、表側電極3a上に形成された第一電極4aの厚さは0.50μmであり、第一接合用無電解めっき層6の厚さは5.1μmであり、第二接合用無電解めっき層7の厚さは0.047μmであった。また、裏側電極3b上に形成された第一電極4bの厚さは0.45μmであり、第一接合用無電解めっき層6の厚さは4.9μmであり、第二接合用無電解めっき層7の厚さは0.046μmであった。 First electrode 4a and first electrode 4b (electroless palladium plating layer), electroless plating layer 6 for first bonding (electroless nickel phosphorus plating layer), and electroless plating layer 7 for second bonding (electroless gold plating layer) ) Each thickness was measured using a commercially available fluorescent X-ray film thickness measuring device. As a result, the thickness of the first electrode 4a formed on the front electrode 3a is 0.50 μm, the thickness of the electroless plating layer 6 for the first bonding is 5.1 μm, and the electroless for the second bonding. The thickness of the plating layer 7 was 0.047 μm. The thickness of the first electrode 4b formed on the back side electrode 3b is 0.45 μm, the thickness of the electroless plating layer 6 for the first bonding is 4.9 μm, and the electroless plating for the second bonding. The thickness of layer 7 was 0.046 μm.
 得られた半導体素子1の無電解めっき層5の密着性をテープ試験によって評価した。その結果、無電解めっき層5はいずれもアルミニウム合金電極の表面から剥離することなく、十分な付着力を有することが確認された。また、実装工程を模擬するため、半導体素子1を150℃で加熱処理したところ、無電解めっき層5に膨れは生じなかった。更に、得られた半導体素子1の断面を観察したところ、アルミニウム合金電極の腐食は認められなかった。以上から、接合信頼性の高い半導体素子1を作製することができたと考えられる。 The adhesion of the electroless plating layer 5 of the obtained semiconductor element 1 was evaluated by a tape test. As a result, it was confirmed that the electroless plating layer 5 has sufficient adhesion without peeling off from the surface of the aluminum alloy electrode. Further, when the semiconductor element 1 was heat-treated at 150 ° C. to simulate the mounting process, the electroless plating layer 5 did not swell. Furthermore, when the cross section of the obtained semiconductor element 1 was observed, corrosion of the aluminum alloy electrode was not recognized. From the above, it is considered that the semiconductor element 1 with high bonding reliability could be manufactured.
〔実施例3〕
 実施例3では、図6に示す構造を有する半導体素子1を作製した。
 まず、表裏導通型基板2として、Si基板(14mm×14mm×70μm)を準備した。
 次に、Si基板の表面に、表側電極3aとしてのアルミニウム合金電極(ケイ素含有量:約1質量%、厚さ:5.0μm)を形成し、Si基板の裏面に、裏側電極3bとしてのアルミニウム合金電極(ケイ素含有量:約1質量%、厚さ:1.3μm)を形成した。その後、表側電極3a上の一部分に保護膜8(ポリイミド、厚さ:8μm)を形成した。
 次に、下記の表4に示す条件にて各工程を行うことによって、表側電極3a上に第一電極4a及び無電解めっき層5(第一接合用無電解めっき層6及び第二接合用無電解めっき層7)を順次形成すると共に裏側電極3b上に第一電極4b及び無電解めっき層5(第一接合用無電解めっき層6及び第二接合用無電解めっき層7)を順次形成し、半導体素子1を得た。なお、各工程の間には、純水を用いた水洗を行った。
Example 3
In Example 3, the semiconductor element 1 having the structure shown in FIG. 6 was produced.
First, a Si substrate (14 mm × 14 mm × 70 μm) was prepared as the front and back conductive substrate 2.
Next, an aluminum alloy electrode (silicon content: about 1 mass%, thickness: 5.0 μm) as the front electrode 3a is formed on the surface of the Si substrate, and aluminum as the back electrode 3b is formed on the back surface of the Si substrate. An alloy electrode (silicon content: about 1% by mass, thickness: 1.3 μm) was formed. Thereafter, a protective film 8 (polyimide, thickness: 8 μm) was formed on a part of the front side electrode 3a.
Next, by performing each step under the conditions shown in Table 4 below, the first electrode 4a and the electroless plating layer 5 (the first electroless plating layer 6 and the second bonding non-use) are formed on the front side electrode 3a. The first electrode 4b and the electroless plating layer 5 (the first electroless plating layer 6 and the second electroless plating layer 7) are sequentially formed on the back electrode 3b. A semiconductor element 1 was obtained. In addition, between each process, the water washing using a pure water was performed.
Figure JPOXMLDOC01-appb-T000004
Figure JPOXMLDOC01-appb-T000004
 第一電極4a及び第一電極4b(無電解パラジウムめっき層)、第一接合用無電解めっき層6(無電解ニッケルリンめっき層)並びに第二接合用無電解めっき層7(無電解金めっき層)それぞれの厚さを、市販の蛍光X線膜厚測定装置を用いて測定した。その結果、表側電極3a上に形成された第一電極4aの厚さは0.51μmであり、第一接合用無電解めっき層6の厚さは5.0μmであり、第二接合用無電解めっき層7の厚さは0.048μmであった。また、裏側電極3b上に形成された第一電極4bの厚さは0.47μmであり、第一接合用無電解めっき層6の厚さは4.7μmであり、第二接合用無電解めっき層7の厚さは0.044μmであった。また、保護膜8の下面に形成された第一電極4aの平面方向の長さを、走査型電子顕微鏡(SEM)による断面観察像を用いて測定したところ、0.88μmであった。 First electrode 4a and first electrode 4b (electroless palladium plating layer), electroless plating layer 6 for first bonding (electroless nickel phosphorus plating layer), and electroless plating layer 7 for second bonding (electroless gold plating layer) ) Each thickness was measured using a commercially available fluorescent X-ray film thickness measuring device. As a result, the thickness of the first electrode 4a formed on the front side electrode 3a is 0.51 μm, the thickness of the electroless plating layer 6 for the first bonding is 5.0 μm, and the electroless for the second bonding. The thickness of the plating layer 7 was 0.048 μm. Further, the thickness of the first electrode 4b formed on the back electrode 3b is 0.47 μm, the thickness of the electroless plating layer 6 for the first bonding is 4.7 μm, and the electroless plating for the second bonding. The thickness of layer 7 was 0.044 μm. Further, the length in the planar direction of the first electrode 4a formed on the lower surface of the protective film 8 was measured using a cross-sectional observation image by a scanning electron microscope (SEM), and found to be 0.88 μm.
 得られた半導体素子1の無電解めっき層5の密着性をテープ試験によって評価した。その結果、無電解めっき層5はいずれもアルミニウム合金電極の表面から剥離することなく、十分な付着力を有することが確認された。また、実装工程を模擬するため、半導体素子1を150℃で加熱処理したところ、無電解めっき層5に膨れは生じなかった。更に、得られた半導体素子1の断面を観察したところ、アルミニウム合金電極の腐食は認められなかった。以上から、接合信頼性の高い半導体素子1を作製することができたと考えられる。 The adhesion of the electroless plating layer 5 of the obtained semiconductor element 1 was evaluated by a tape test. As a result, it was confirmed that the electroless plating layer 5 has sufficient adhesion without peeling off from the surface of the aluminum alloy electrode. Further, when the semiconductor element 1 was heat-treated at 150 ° C. to simulate the mounting process, the electroless plating layer 5 did not swell. Furthermore, when the cross section of the obtained semiconductor element 1 was observed, corrosion of the aluminum alloy electrode was not recognized. From the above, it is considered that the semiconductor element 1 with high bonding reliability could be manufactured.
〔実施例4〕
 実施例4では、図6に示す半導体素子1の接合用無電解めっき層を三層構造とした半導体素子を作製した。
 まず、表裏導通型基板2として、Si基板(14mm×14mm×70μm)を準備した。
 次に、Si基板の表面に、表側電極3aとしてのアルミニウム合金電極(ケイ素含有量:約1質量%、厚さ:5.0μm)を形成し、Si基板の裏面に、裏側電極3bとしてのアルミニウム合金電極(ケイ素含有量:約1質量%、厚さ:1.3μm)を形成した。その後、表側電極3a上の一部分に保護膜8(ポリイミド、厚さ:8μm)を形成した。
 次に、下記の表5に示す条件にて各工程を行うことによって、表側電極3a上に第一電極4a及び無電解めっき層5(第一接合用無電解めっき層6、第二接合用無電解めっき層7及び第三接合用無電解めっき層)を順次形成すると共に裏側電極3b上に第一電極4b及び無電解めっき層5(第一接合用無電解めっき層6、第二接合用無電解めっき層7及び第三接合用無電解めっき層)を順次形成し、半導体素子1を得た。なお、各工程の間には、純水を用いた水洗を行った。
Example 4
In Example 4, a semiconductor element in which the electroless plating layer for bonding of the semiconductor element 1 shown in FIG.
First, a Si substrate (14 mm × 14 mm × 70 μm) was prepared as the front and back conductive substrate 2.
Next, an aluminum alloy electrode (silicon content: about 1 mass%, thickness: 5.0 μm) as the front electrode 3a is formed on the surface of the Si substrate, and aluminum as the back electrode 3b is formed on the back surface of the Si substrate. An alloy electrode (silicon content: about 1% by mass, thickness: 1.3 μm) was formed. Thereafter, a protective film 8 (polyimide, thickness: 8 μm) was formed on a part of the front side electrode 3a.
Next, by performing each step under the conditions shown in Table 5 below, the first electrode 4a and the electroless plating layer 5 (the electroless plating layer 6 for the first bonding, the second bonding non-use) are formed on the front side electrode 3a. The electroplating layer 7 and the third electroless plating layer are sequentially formed, and the first electrode 4b and the electroless plating layer 5 (the electroless plating layer 6 for the first bonding, the second electroless plating layer) are formed on the back electrode 3b. The electroplating layer 7 and the third bonding electroless plating layer) were sequentially formed to obtain the semiconductor element 1. In addition, between each process, the water washing using a pure water was performed.
Figure JPOXMLDOC01-appb-T000005
Figure JPOXMLDOC01-appb-T000005
 第一電極4a及び第一電極4b(無電解パラジウムめっき層)、第一接合用無電解めっき層6(無電解ニッケルリンめっき層)、第二接合用無電解めっき層7(無電解パラジウムめっき層)並びに第三接合用無電解めっき層(無電解金めっき層)それぞれの厚さを、市販の蛍光X線膜厚測定装置を用いて測定した。その結果、表側電極3a上に形成された第一電極4aの厚さは0.55μmであり、第一接合用無電解めっき層6の厚さは4.9μmであり、第二接合用無電解めっき層7の厚さは0.51μmであり、第三接合用無電解めっき層の厚さは0.047μmであった。また、裏側電極3b上に形成された第一電極4bの厚さは0.50μmであり、第一接合用無電解めっき層6の厚さは4.9μmであり、第二接合用無電解めっき層7の厚さは0.48μmであり、第三接合用無電解めっき層の厚さは0.046μmであった。また、保護膜8の下面に形成された第一電極4aの平面方向の長さを、走査型電子顕微鏡(SEM)による断面観察像を用いて測定したところ、0.88μmであった。 First electrode 4a and first electrode 4b (electroless palladium plating layer), electroless plating layer 6 for first bonding (electroless nickel phosphorus plating layer), electroless plating layer 7 for second bonding (electroless palladium plating layer) ) And the thickness of each of the third electroless plating layer (electroless gold plating layer) were measured using a commercially available fluorescent X-ray film thickness measuring device. As a result, the thickness of the first electrode 4a formed on the front electrode 3a is 0.55 μm, the thickness of the electroless plating layer 6 for the first bonding is 4.9 μm, and the electroless for the second bonding. The thickness of the plating layer 7 was 0.51 μm, and the thickness of the third electroless plating layer for bonding was 0.047 μm. Further, the thickness of the first electrode 4b formed on the back electrode 3b is 0.50 μm, the thickness of the electroless plating layer 6 for the first bonding is 4.9 μm, and the electroless plating for the second bonding. The thickness of the layer 7 was 0.48 μm, and the thickness of the third electroless plating layer for bonding was 0.046 μm. Further, the length in the planar direction of the first electrode 4a formed on the lower surface of the protective film 8 was measured using a cross-sectional observation image by a scanning electron microscope (SEM), and found to be 0.88 μm.
 得られた半導体素子1の無電解めっき層5の密着性をテープ試験によって評価した。その結果、無電解めっき層5はいずれもアルミニウム合金電極の表面から剥離することなく、十分な付着力を有することが確認された。また、実装工程を模擬するため、半導体素子1を150℃で加熱処理したところ、無電解めっき層5に膨れは生じなかった。更に、得られた半導体素子の断面を観察したところ、アルミニウム合金電極の腐食は認められなかった。以上から、接合信頼性の高い半導体素子1を作製することができたと考えられる。 The adhesion of the electroless plating layer 5 of the obtained semiconductor element 1 was evaluated by a tape test. As a result, it was confirmed that the electroless plating layer 5 has sufficient adhesion without peeling off from the surface of the aluminum alloy electrode. Further, when the semiconductor element 1 was heat-treated at 150 ° C. to simulate the mounting process, the electroless plating layer 5 did not swell. Furthermore, when the cross section of the obtained semiconductor element was observed, corrosion of the aluminum alloy electrode was not recognized. From the above, it is considered that the semiconductor element 1 with high bonding reliability could be manufactured.
〔実施例5〕
 実施例5では、図6に示す半導体素子1の接合用無電解めっき層を単層構造とした半導体素子を作製した。
 まず、表裏導通型基板2として、Si基板(14mm×14mm×70μm)を準備した。
 次に、Si基板の表面に、表側電極3aとしてのアルミニウム合金電極(ケイ素含有量:約1質量%、厚さ:5.0μm)を形成し、Si基板の裏面に、裏側電極3bとしてのアルミニウム合金電極(ケイ素含有量:約1質量%、厚さ:1.3μm)を形成した。その後、表側電極3a上の一部分に保護膜8(ポリイミド、厚さ:8μm)を形成した。
 次に、下記の表6に示す条件にて各工程を行うことによって、表側電極3a上に第一電極4a及び無電解めっき層5(第一接合用無電解めっき層6)を順次形成すると共に裏側電極3b上に第一電極4b及び無電解めっき層5(第一接合用無電解めっき層6)を順次形成し、半導体素子1を得た。なお、各工程の間には、純水を用いた水洗を行った。
Example 5
In Example 5, a semiconductor element in which the electroless plating layer for bonding of the semiconductor element 1 shown in FIG.
First, a Si substrate (14 mm × 14 mm × 70 μm) was prepared as the front and back conductive substrate 2.
Next, an aluminum alloy electrode (silicon content: about 1 mass%, thickness: 5.0 μm) as the front electrode 3a is formed on the surface of the Si substrate, and aluminum as the back electrode 3b is formed on the back surface of the Si substrate. An alloy electrode (silicon content: about 1% by mass, thickness: 1.3 μm) was formed. Thereafter, a protective film 8 (polyimide, thickness: 8 μm) was formed on a part of the front side electrode 3a.
Next, by performing each step under the conditions shown in Table 6 below, the first electrode 4a and the electroless plating layer 5 (electroless plating layer 6 for first bonding) are sequentially formed on the front electrode 3a. The first electrode 4b and the electroless plating layer 5 (first electroless plating layer 6) were sequentially formed on the back electrode 3b, and the semiconductor element 1 was obtained. In addition, between each process, the water washing using a pure water was performed.
Figure JPOXMLDOC01-appb-T000006
Figure JPOXMLDOC01-appb-T000006
 第一電極4a及び第一電極4b(無電解パラジウムめっき層)並びに第一接合用無電解めっき層6(無電解銅めっき層)それぞれの厚さを、市販の蛍光X線膜厚測定装置を用いて測定した。その結果、表側電極3a上に形成された第一電極4aの厚さは0.55μmであり、第一接合用無電解めっき層6の厚さは24.9μmであった。また、裏側電極3b上に形成された第一電極4bの厚さは0.51μmであり、第一接合用無電解めっき層6の厚さは23.8μmであった。また、保護膜8の下面に形成された第一電極4aの平面方向の長さを、走査型電子顕微鏡(SEM)による断面観察像を用いて測定したところ、0.78μmであった。 The thickness of each of the first electrode 4a and the first electrode 4b (electroless palladium plating layer) and the first electroless plating layer 6 (electroless copper plating layer) is measured using a commercially available fluorescent X-ray film thickness measuring device. Measured. As a result, the thickness of the first electrode 4a formed on the front electrode 3a was 0.55 μm, and the thickness of the electroless plating layer 6 for first bonding was 24.9 μm. Moreover, the thickness of the 1st electrode 4b formed on the back side electrode 3b was 0.51 micrometer, and the thickness of the electroless-plating layer 6 for 1st joining was 23.8 micrometers. The length in the planar direction of the first electrode 4a formed on the lower surface of the protective film 8 was measured using a cross-sectional observation image by a scanning electron microscope (SEM), and was 0.78 μm.
 得られた半導体素子1の無電解めっき層5の密着性をテープ試験によって評価した。その結果、無電解めっき層5はいずれもアルミニウム合金電極の表面から剥離することなく、十分な付着力を有することが確認された。また、実装工程を模擬するため、半導体素子1を150℃で加熱処理したところ、無電解めっき層5に膨れは生じなかった。更に、得られた半導体素子の断面を観察したところ、アルミニウム合金電極の腐食は認められなかった。以上から、接合信頼性の高い半導体素子1を作製することができたと考えられる。 The adhesion of the electroless plating layer 5 of the obtained semiconductor element 1 was evaluated by a tape test. As a result, it was confirmed that the electroless plating layer 5 has sufficient adhesion without peeling off from the surface of the aluminum alloy electrode. Further, when the semiconductor element 1 was heat-treated at 150 ° C. to simulate the mounting process, the electroless plating layer 5 did not swell. Furthermore, when the cross section of the obtained semiconductor element was observed, corrosion of the aluminum alloy electrode was not recognized. From the above, it is considered that the semiconductor element 1 with high bonding reliability could be manufactured.
〔比較例1〕
 実施例5における第一電極4a及び第一電極4b(無電解パラジウムめっき層)を設けずに、アルミウム合金電極上に第一接合用無電解めっき層6(無電解銅めっき層)を形成しようとした。その結果、第一接合用無電解めっき層6(無電解銅めっき層)の形成中にアルミウム合金電極が完全に溶解してしまい、半導体素子を作製することができなかった。
[Comparative Example 1]
Without providing the first electrode 4a and the first electrode 4b (electroless palladium plating layer) in Example 5, an electroless plating layer 6 (electroless copper plating layer) for first bonding is formed on the aluminum alloy electrode. did. As a result, the aluminum alloy electrode was completely dissolved during the formation of the first electroless plating layer 6 (electroless copper plating layer), and a semiconductor element could not be produced.
 なお、本国際出願は、2018年2月22日に出願した日本国特許出願第2018-029378号に基づく優先権を主張するものであり、この日本国特許出願の全内容を本国際出願に援用する。 Note that this international application claims priority based on Japanese Patent Application No. 2018-029378 filed on February 22, 2018, and the entire contents of this Japanese patent application are incorporated herein by reference. To do.
 1 半導体素子、2 表裏導通型基板、3a 表側電極、3b 裏側電極、4,4a,4b 第一電極、5 無電解めっき層、6 第一接合用無電解めっき層、7 第二接合用無電解めっき層、8 保護膜 DESCRIPTION OF SYMBOLS 1 Semiconductor element, 2 front and back conductive substrate, 3a front side electrode, 3b back side electrode, 4, 4a, 4b 1st electrode, 5 electroless plating layer, 6 electroless plating layer for 1st junction, 7 electroless for 2nd junction Plating layer, 8 protective film

Claims (10)

  1.  表側電極及び裏側電極を有する表裏導通型基板の少なくとも片側の電極上に第一電極及び無電解めっき層が順次形成された半導体素子であって、
     前記第一電極が、前記第一電極が形成されている前記電極を形成する金属よりも貴な元素を含有し、
     前記第一電極の面積が、前記第一電極が形成されている前記電極の面積よりも小さい、半導体素子。
    A semiconductor element in which a first electrode and an electroless plating layer are sequentially formed on an electrode on at least one side of a front and back conductive substrate having a front side electrode and a back side electrode,
    The first electrode contains an element more noble than the metal forming the electrode on which the first electrode is formed,
    A semiconductor element, wherein an area of the first electrode is smaller than an area of the electrode on which the first electrode is formed.
  2.  前記第一電極が、腐食を防止する腐食防止用電極である、請求項1に記載の半導体素子。 The semiconductor element according to claim 1, wherein the first electrode is a corrosion preventing electrode for preventing corrosion.
  3.  前記無電解めっき層の周囲を囲うように、前記第一電極が形成されている前記電極上に形成された保護膜を更に有する、請求項1又は2に記載の半導体素子。 The semiconductor element according to claim 1 or 2, further comprising a protective film formed on the electrode on which the first electrode is formed so as to surround the periphery of the electroless plating layer.
  4.  前記第一電極の上面が、前記無電解めっき層と接する領域と、前記保護膜と接する領域とを有する、請求項3に記載の半導体素子。 The semiconductor element according to claim 3, wherein an upper surface of the first electrode has a region in contact with the electroless plating layer and a region in contact with the protective film.
  5.  前記表側電極及び前記裏側電極が、アルミニウム又はアルミニウム合金で形成され、
     前記第一電極が、無電解パラジウムめっき層又は無電解金めっき層からなり、
     前記無電解めっき層が、無電解ニッケルめっき層の単層、無電解銅めっき層の単層、前記第一電極側から順に形成された無電解ニッケルめっき層と無電解金めっき層との二層又は前記第一電極側から順に形成された無電解ニッケルめっき層と無電解パラジウムめっき層と無電解金めっき層との三層からなる、請求項1~4のいずれか一項に記載の半導体素子。
    The front side electrode and the back side electrode are formed of aluminum or an aluminum alloy,
    The first electrode consists of an electroless palladium plating layer or an electroless gold plating layer,
    The electroless plating layer is a single layer of an electroless nickel plating layer, a single layer of an electroless copper plating layer, and an electroless nickel plating layer and an electroless gold plating layer formed in this order from the first electrode side. The semiconductor element according to any one of claims 1 to 4, comprising three layers of an electroless nickel plating layer, an electroless palladium plating layer, and an electroless gold plating layer formed in order from the first electrode side. .
  6.  表裏導通型基板の片側に表側電極を形成する工程と、
     前記表側電極上の一部分に、無電解めっき法を用いて前記表側電極を形成する金属よりも貴な元素を析出させて第一電極を形成する工程と、
     前記第一電極上に、無電解めっき法を用いて前記第一電極を触媒として無電解めっき層を形成する工程とを含む、半導体素子の製造方法。
    Forming a front electrode on one side of the front and back conductive substrate;
    Forming a first electrode by precipitating an element more precious than the metal forming the front electrode using an electroless plating method on a portion of the front electrode;
    Forming an electroless plating layer on the first electrode using the first electrode as a catalyst using an electroless plating method.
  7.  前記表側電極上の一部分に保護膜を形成した後、前記表側電極上の残りの部分に前記第一電極を形成する、請求項6に記載の半導体素子の製造方法。 The method for manufacturing a semiconductor element according to claim 6, wherein a protective film is formed on a part of the front electrode, and then the first electrode is formed on the remaining part of the front electrode.
  8.  前記保護膜を形成した後、前記表側電極上の残りの部分をマイクロエッチングしてから前記第一電極を形成する、請求項7に記載の半導体素子の製造方法。 The method for manufacturing a semiconductor element according to claim 7, wherein after forming the protective film, the first electrode is formed after the remaining portion on the front electrode is micro-etched.
  9.  前記表側電極が、アルミニウム又はアルミニウム合金で形成され、
     前記第一電極が、前記表側電極をジンケート処理した後に無電解パラジウムめっき層又は無電解金めっき層で形成され、
     前記無電解めっき層が、無電解ニッケルめっき層の単層、無電解銅めっき層の単層、前記第一電極側から順に形成された無電解ニッケルめっき層と無電解金めっき層との二層又は前記第一電極側から順に形成された無電解ニッケルめっき層と無電解パラジウムめっき層と無電解金めっき層との三層からなる、請求項6~8のいずれか一項に記載の半導体素子の製造方法。
    The front electrode is formed of aluminum or an aluminum alloy;
    The first electrode is formed of an electroless palladium plating layer or an electroless gold plating layer after the zincate treatment of the front side electrode,
    The electroless plating layer is a single layer of an electroless nickel plating layer, a single layer of an electroless copper plating layer, and an electroless nickel plating layer and an electroless gold plating layer formed in this order from the first electrode side. Alternatively, the semiconductor element according to any one of claims 6 to 8, comprising three layers of an electroless nickel plating layer, an electroless palladium plating layer, and an electroless gold plating layer formed in order from the first electrode side. Manufacturing method.
  10.  前記表裏導通型基板の残りの片側に裏側電極を形成する工程を更に含む、請求項6~9のいずれか一項に記載の半導体素子の製造方法。 10. The method of manufacturing a semiconductor element according to claim 6, further comprising a step of forming a back side electrode on the remaining one side of the front and back conductive substrate.
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