WO2019111874A1 - モジュール - Google Patents

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Publication number
WO2019111874A1
WO2019111874A1 PCT/JP2018/044499 JP2018044499W WO2019111874A1 WO 2019111874 A1 WO2019111874 A1 WO 2019111874A1 JP 2018044499 W JP2018044499 W JP 2018044499W WO 2019111874 A1 WO2019111874 A1 WO 2019111874A1
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WIPO (PCT)
Prior art keywords
substrate
component
module
resin
layer
Prior art date
Application number
PCT/JP2018/044499
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English (en)
French (fr)
Inventor
喜人 大坪
山本　幸男
Original Assignee
株式会社村田製作所
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Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Publication of WO2019111874A1 publication Critical patent/WO2019111874A1/ja
Priority to US16/891,206 priority Critical patent/US11264366B2/en

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    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Definitions

  • the present invention relates to a module of a package on package structure having a redistribution layer.
  • a module of a package-on-package (POP) structure is realized that achieves high functionality in a small mounting area. ing.
  • the module of the package-on-package structure can be miniaturized because the mounting area in the planar direction can be reduced. Also, in recent years, by forming a rewiring layer on a module with package-on-package structure, as a fan-out type configuration, a large number of connection terminals can be provided although the size is small; Modules have also been developed that can cope with the miniaturization of
  • a plurality of components 102 mounted on the upper surface 101a of the substrate 101 are mounted, and a support frame 103 is provided on the lower surface 101b of the substrate 101.
  • the component 104 is disposed in a cavity C surrounded by the inner peripheral surface 103 a of the support frame 103 and the lower surface 101 b of the substrate 101, and the cavity C is filled with a mold resin 105.
  • the component 104 is bonded to the lower surface 101 b of the substrate 101 by a shield member 106.
  • the support frame 103 and the component 104 are provided on the side of the lower surface 101 b of the substrate 101, it is possible to provide the module 100 having a package-on-package structure that can be easily shortened.
  • a package-on-package structure provided with a redistribution layer.
  • the rewiring layer needs a narrow gap and a fine pitch, and therefore the component 104 connected to the rewiring layer. High position accuracy is required.
  • the pressure at the time of forming the mold resin 105 shifts the position of the component 104. May occur. Further, in the configuration of the module 100, it is difficult to polish the mounting surface 100a of the module 100 after forming the mold resin 105, so it is also difficult to secure the flatness of the mounting surface 100a.
  • the present invention has been made in view of the above problems, and in a module of a package on package structure having a rewiring layer, a resin block containing a component is fixed to a substrate by a fixing conductor provided on the surface.
  • a resin block containing a component is fixed to a substrate by a fixing conductor provided on the surface.
  • the module of the present invention is a sealing resin for sealing a substrate, a first component mounted on one main surface of the substrate, the one main surface and the first component Layer, a resin block provided on the other main surface of the substrate, an intermediate layer provided on the other main surface of the substrate and having a plurality of first columnar conductors, and the intermediate layer in the intermediate layer
  • the resin block is provided with a second component inside, and the resin block is provided on the other main surface side of the substrate in the resin block;
  • the first component is fixed to the other main surface of the substrate by the fixing conductor, the first component is connected to the rewiring layer via the first columnar conductor, and the second component is on the rewiring layer side
  • An external electrode, the external electrode being connected to the redistribution layer It is characterized in that.
  • a shield film may be formed on the outer peripheral surface of the resin block. According to this configuration, it is possible to provide a module of the package-on-package structure in which the shielding property and the heat dissipation property to the second part are secured.
  • a second columnar conductor may be provided on the resin block. According to this configuration, it is possible to provide a conductive portion having a small gap with the second component. Further, by fixing the resin block to the other main surface of the substrate by the second columnar conductor, it is possible to prevent the displacement of the second component.
  • the intermediate layer may have a frame-like substrate formed so that an inner peripheral surface surrounds the resin block. According to this configuration, by using the frame-like substrate provided with the columnar conductor and the via conductor, it is not necessary to separately form the via conductor and the columnar conductor beside the second component, and the manufacturing cost can be suppressed.
  • a module of package-on-package having a rewiring layer positional deviation of parts is prevented by using a resin block containing the parts, and a module ensuring flatness is provided. it can.
  • FIG. 1 is a cross-sectional view of the module 1 according to the first embodiment
  • FIG. 2 is a top view of an intermediate layer of the module 1.
  • FIG. 3 is a bottom view of the middle layer of the module 1.
  • the module 1 according to the first embodiment is, for example, mounted on a mother substrate or the like of an electronic device.
  • the substrate 2 on which the first component 3 is mounted on the upper surface 2a (corresponding to the “one main surface” of the present invention) and the sealing resin layer 4 is stacked
  • the intermediate layer 5 is composed of a resin block 8 containing the second component 7, a mold resin 9 provided around the resin block 8, and a first columnar conductor 10 provided upright on the mold resin 9.
  • the resin block 8 is a block-like resin having a recess formed of a thermoplastic resin such as a liquid crystal polymer, and the second component 7 is fitted in the recess.
  • a fixing conductor 11 for fixing the resin block 8 to the lower surface 2b of the substrate 2 is provided on the upper surface 8a of the resin block 8, and land electrodes (not shown) are formed on the fixing conductor 11 and the lower surface 2b of the substrate 2 And the resin block 8 is fixed to the lower surface 2 b of the substrate 2.
  • the external electrode 12 formed on the lower surface 7 b is connected to the wiring electrode 13 of the redistribution layer 6 via the connection conductor 17.
  • a part of the external connection terminal 14 is electrically connected to the second component 7.
  • the external connection terminal 14 connected to the second component 7 is disposed outside the second component 7 when viewed in a direction perpendicular to the upper surface 2 a of the substrate 2 (hereinafter referred to as a plan view) be able to.
  • the external connection terminal 14 is connected by being connected to the wiring electrode 13 of the redistribution layer 6 through the wiring (not shown) of the substrate 2, the first columnar conductor 10, and the connection conductor 17. A portion of is electrically connected to the first part 3.
  • the external connection terminal 14 connected to the first component 3 in a plan view can be disposed outside the first component 3. As a result, it is possible to cope with an increase in the number of terminals.
  • module 1 upper module 15 configured with substrate 2, first component 3, and sealing resin layer 4 and lower module 16 configured with intermediate layer 5 and rewiring layer 6 are vertically connected.
  • Package-on-package structure
  • the substrate 2 is formed of, for example, low-temperature co-fired ceramic, glass epoxy resin, or the like.
  • a plurality of land electrodes (not shown) are formed on the upper surface 2a and the lower surface 2b of the substrate 2, and a plurality of ground electrodes (not shown), a plurality of wiring electrodes (not shown), and a plurality of surface electrodes and inner layers of the substrate 2 Via conductors (not shown) and the like are formed.
  • Each ground electrode is formed, for example, so as to be exposed from the side surface of the substrate 2 and can also be connected to a shield film.
  • Each land electrode, each ground electrode, and each wiring electrode are formed of a metal generally adopted as an electrode of Cu, Ag, Al or the like.
  • Each via conductor is formed of a metal such as Ag or Cu.
  • Examples of the first component 3 and the second component 7 include components such as an inductor, a capacitor, an IC, and a power amplifier.
  • the first component 3 is mounted on the upper surface 2 a of the substrate 2 by connecting connection terminals (not shown) to land electrodes formed on the upper surface 2 a of the substrate 2 by solder bumps.
  • the external electrode 12 is formed on the lower surface 7 b of the second component 7 and connected to the wiring electrode 13 of the rewiring layer 6.
  • the sealing resin layer 4 is provided on the substrate 2 so as to cover the top surface 2 a of the substrate 2 and the first component 3.
  • the sealing resin layer 4 can be formed of a resin generally employed as a sealing resin such as an epoxy resin containing silica filler.
  • a filler having a high thermal conductivity such as an alumina filler may be used.
  • the resin block 8 is a block-shaped resin formed of, for example, a thermoplastic resin such as a liquid crystal polymer, and a recess for fitting the second component 7 is formed.
  • the fixing conductor 11 is provided on a portion (upper surface 8 a of the resin block 8) of the resin block 8 exposed from the upper surface 5 a of the intermediate layer 5.
  • the resin block 8 is fixed to the lower surface 2 b of the substrate 2 by connecting to the land electrode provided on the lower surface 2 b of the substrate 2. Further, as shown in FIG. 3, the lower surface 7 b of the second component 7 fitted in the recess of the resin block 8 is exposed from the lower surface 5 b of the intermediate layer 5 and the lower surface 8 b of the resin block 8.
  • the external electrode 12 provided on the lower surface 7 b is connected to the wiring electrode 13 of the redistribution layer 6 via the connection conductor 17.
  • the mold resin 9 provided around the resin block 8 can be formed of a resin generally employed as a sealing resin such as an epoxy resin containing a silica filler.
  • a filler having a high thermal conductivity such as an alumina filler may be used.
  • the first columnar conductor 10 is a via conductor formed of a metal such as Cu, Ag, Al or the like, and electrically connects the wiring electrode of the substrate 2 and the wiring electrode 13 of the rewiring layer 6.
  • the first columnar conductor 10 may be formed using a metal pin of a material such as Cu, a Cu—Ni alloy, a Cu alloy such as a Cu—Fe alloy, Fe, Au, Ag, Al or the like.
  • the rewiring layer 6 is formed of a laminate of a plurality of resin layers 6a, and is stacked on the lower surface 5b of the intermediate layer 5.
  • a plurality of wiring electrodes 13 and a plurality of connection conductors 17 are formed on each resin layer 6a.
  • an external connection terminal 14 for connection to an external mother substrate or the like is formed on the lower surface 6b of the lowermost resin layer 6a of the rewiring layer 6.
  • the first component 3 and the second component 7 are connected to the external connection terminal 14 via the wiring electrodes 13, the connection conductors 17, and the first columnar conductors 10.
  • the external connection terminal 14 connected to the 1st component 3 is located outside the outline of the 1st component 3, and the external connection terminal 14 connected to the 2nd component 7 is the 2nd component 7 Located outside the outline of.
  • some of the external connection terminals 14 may be inside the outer shape of the first component 3.
  • the upper module 15 is formed.
  • a plurality of land electrodes are formed on the upper surface 2a and the lower surface 2b, and the substrate 2 on which a plurality of ground electrodes, a plurality of wiring electrodes, a plurality of via conductors and the like are formed on the surface or inner layer is prepared.
  • a conductive paste containing a metal such as Cu, Ag, or Al is formed by screen printing or the like.
  • each via conductor can be formed by a known method after forming a via hole using a laser or the like.
  • the first component 3 is mounted on the upper surface 2 a of the substrate 2 using a well-known surface mounting technique.
  • the first component 3 is mounted by solder bumps, and then reflow processing is performed. In addition, you may wash
  • a sealing resin layer 4 is formed to cover the first component 3 mounted on the upper surface 2 a of the substrate 2.
  • a transfer molding method, a compression molding method, a liquid resin method, a sheet resin method, or the like can be used.
  • an epoxy resin containing a general silica filler can be used for the sealing resin layer 4.
  • the sealing resin layer 4 in order to give high thermal conductivity to the sealing resin layer 4, it is also possible to use a filler-containing epoxy resin having high thermal conductivity such as alumina filler. In addition, after formation of the sealing resin layer 4, you may plasma-wash the board
  • a filler-containing epoxy resin having high thermal conductivity such as alumina filler.
  • a resin block 8 containing the second component 7 is prepared.
  • the resin block 8 is formed by molding a thermoplastic resin such as a liquid crystal polymer into a block shape having a recess.
  • the second component 7 is fitted in the recess of the resin block 8, and the fixing conductor 11 is disposed at a desired position on the upper surface 8 a of the resin block 8.
  • the fixing conductor 11 can be formed, for example, by screen printing a conductive paste containing a metal such as Cu, Ag, or Al on the upper surface 8 a of the resin block 8.
  • the upper surface 8 a of the resin block 8 may be polished. Thus, the flatness of the upper surface 8a and the lower surface 8b of the resin block 8 can be improved.
  • the resin block 8 is fixed to the lower surface 2 b of the substrate 2 by connecting the fixing conductor 11 to the land electrode formed on the lower surface 2 b of the substrate 2.
  • the first columnar conductor 10 is mounted on a desired position of the lower surface 2 b of the substrate 2 using a known mounting technique such as solder mounting so as to cover the first columnar conductor 10 and the side surface of the resin block 8
  • the intermediate layer 5 is formed.
  • the mold resin 9 can be formed by, for example, a coating method, a printing method, a transfer molding method, a compression molding method, or the like.
  • the redistribution layer 6 is formed on the lower surface 5 b of the intermediate layer 5.
  • the rewiring layer 6 is formed by laminating a plurality of resin layers 6a formed of polyimide or the like.
  • a plurality of wiring electrodes 13 and connection conductors 17 are formed on each resin layer 6a.
  • a Ti film as a base electrode is formed by sputtering or the like
  • a Cu film is similarly formed on the Ti film by sputtering or the like
  • electrolysis or Cu is performed on the Cu film. It can be formed by similarly forming a Cu film by electroless plating.
  • Each wiring electrode 13 is formed into a fine pattern by photolithography. Thereafter, the external connection terminal 14 is formed to complete the module 1.
  • the resin block 8 After fixing the resin block 8 to the lower surface 2b of the substrate 2, instead of forming the rewiring layer 6, after mounting the resin block 8 on the rewiring layer 6, the resin block 8 together with the rewiring layer 6 is a substrate It may be fixed to the lower surface 2b of 2.
  • the first columnar conductor 10 and the mold resin 9 are formed on the lower surface 2 b of the substrate 2, and then the resin block 8 mounted on the rewiring layer 6 is formed on the lower surface 2 b of the substrate 2.
  • the lower module 16 can be formed.
  • the positional deviation of the second component 7 can be prevented. It is possible to ensure high positional accuracy. Further, by polishing the upper surface 8 a of the resin block 8, the flatness of the lower surface 8 b of the resin block 8 can also be improved. In addition, since the upper module 15 and the lower module 16 can be stacked without using bumps, it is possible to provide a module having a package-on-package structure which can be easily reduced in height.
  • FIG. 4 is a cross-sectional view of the module 1a according to the second embodiment.
  • the difference between the module 1a according to the second embodiment and the module 1 according to the first embodiment described with reference to FIG. 1 is that, as shown in FIG. Are formed.
  • the other configuration is the same as that of the module 1 according to the first embodiment, and thus the description thereof will be omitted by giving the same reference numerals.
  • a shield film 18 is formed on the outer side surface 8 c, the upper surface 8 a and the lower surface 8 b of the resin block 8.
  • the shield film 18 is for shielding electromagnetic waves from the outside with respect to the second component 7 or electromagnetic waves generated from the second component 7 to the outside, and is connected to the ground electrode of the substrate 2.
  • the shield film 18 can be formed in a multilayer structure having an adhesion film, a conductive film laminated on the adhesion film, and a protective film laminated on the conductive film.
  • the adhesion film can be formed of, for example, a metal such as SUS.
  • the adhesion film may be Ti, Cr, Ni, Ti, Al or the like.
  • the conductive film is a layer responsible for the substantial shielding function of the shield film 18, and can be formed of, for example, any metal of Cu, Ag, and Al.
  • the protective film is provided to prevent the conductive film from being corroded or scratched, and can be formed of, for example, SUS.
  • the protective film may be Ti, Cr, Ni, TiAl or the like.
  • the shield film 18 may be formed by an MID method such as LDS or MIPTEC.
  • the shield film 18 on the upper surface 8 a and the lower surface 8 b of the resin block 8 may be a wiring electrode formed on the lower surface 2 b of the substrate 2 and the upper surface 6 c of the resin layer 6 a of the uppermost layer of the rewiring layer 6.
  • the shielding property for the second component 7 is secured, and at the same time, the shielding film 18 also functions as a heat dissipation material. Therefore, the heat dissipation for the second component 7 can be secured.
  • FIGS. 5 and 6 are cross-sectional views of a module 1b according to the third embodiment, and FIG. 6 is a bottom view of an intermediate layer of the module 1b.
  • the difference between the module 1b according to the third embodiment and the module 1 according to the first embodiment described with reference to FIG. 1 is that, as shown in FIG. 5 and FIG. The point is that the conductor 19 is provided.
  • the other configuration is the same as that of the module 1 according to the first embodiment, and thus the description thereof will be omitted by giving the same reference numerals.
  • the second columnar conductor 19 is provided to penetrate the resin block 8.
  • the second columnar conductor 19 is formed of a metal such as Cu, Ag, Al or the like, and electrically connects the wiring electrode of the substrate 2 and the wiring electrode 13 of the rewiring layer 6 via the connection conductor 17.
  • the second columnar conductor 19 can be formed using, for example, a metal pin made of a material such as Cu, a Cu-Ni alloy, a Cu alloy such as a Cu-Fe alloy, Fe, Au, Ag, Al or the like.
  • the second columnar conductor 19 can also be used as a fixing conductor.
  • FIG. 7 is a cross-sectional view of the module 1c.
  • a shield film 18 may be formed on the outer side surface 8 c, the upper surface 8 a and the lower surface 8 b of the resin block 8.
  • the shield film 18 of the lower surface 2b of the substrate 2 and the upper surface 6c of the uppermost resin layer 6a of the rewiring layer 6 is formed on the lower surface 2b of the substrate 2 and the upper surface 6c of the uppermost resin layer 6a of the redistribution layer 6 It may be a wired electrode. In this way, the shielding property and the heat dissipation property to the second component 7 can be improved.
  • FIGS. 8 and 9 are cross-sectional views of a module 1d according to the fourth embodiment, and FIG. 9 is a bottom view of an intermediate layer of the module 1d.
  • the module 1d according to the fourth embodiment differs from the module 1 according to the first embodiment described with reference to FIG. 1 in that the intermediate layer 5 has a frame-like substrate 21 as shown in FIGS. 8 and 9. It is.
  • the other configuration is the same as that of the module 1 according to the first embodiment, and thus the description thereof will be omitted by giving the same reference numerals.
  • the frame-like substrate 21 is a multilayer substrate formed by laminating a plurality of insulating layers formed of an insulating material such as low temperature co-fired ceramic or glass epoxy resin, for example, and has a frame shape. As shown in FIGS. 8 and 9, the outer shape of the frame-like substrate 21 is substantially the same as the shape of the substrate 2, and the resin block 8 is located in the region surrounded by the inner circumferential surface 21a of the frame-like substrate 21. To be mounted on the lower surface 2 b of the substrate 2. Further, inside the frame-like substrate 21, the first columnar conductor 10 and various wiring electrodes (not shown) are formed.
  • the frame-shaped substrate 21 may be a single layer. That is, a connection conductor formed of vias, metal plating, or metal pins may be formed in a frame-shaped resin mold body. In addition, the resin 22 may be filled between the frame-shaped substrate 21 and the resin block 8.
  • the present invention can be applied to a module of a package on package structure having a redistribution layer.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

低背化が容易な再配線層を有するパッケージオンパッケージ構造のモジュールを提供する。　モジュール１は、基板２と第１部品３と封止樹脂層４とを含む上側モジュール１６と、中間層５と再配線層６とを含む下側モジュール１７とを有する。第１部品３は中間層５に設けられた柱状導体８を介して再配線層６に接続され、第１部品３および第２部品７はともに、再配線層６により再配線される。第２部品７を内包する樹脂ブロック８を固定用導体１１で基板２の下面２ｂに固定することにより、第２部品７の位置ずれを防止することができる。また、樹脂ブロック８の上面８ａを研磨することにより、平坦性を向上させることができる。

Description

モジュール
　本発明は再配線層を有するパッケージオンパッケージ構造のモジュールに関する。
　特許文献１に記載のモジュールのように、複数のパッケージ化されたものを含む電子部品を積層することにより、小さい実装面積で高機能化を実現するパッケージオンパッケージ（ＰＯＰ）構造のモジュールが開発されている。パッケージオンパッケージ構造のモジュールは、平面方向の実装面積を小さくすることができるため小型化が可能となる。また、近年では、パッケージオンパッケージ構造のモジュールに再配線層を形成することでファンアウト（Ｆａｎ－Ｏｕｔ）型の構成として、サイズが小型でありながらも多数の接続端子を設けることができ、部品の小型化にも対応可能なモジュールも開発されている。
　特許文献１に記載のモジュール１００は、図１０に示すように、基板１０１の上面１０１ａに実装された複数の部品１０２が実装され、基板１０１の下面１０１ｂには支持枠体１０３が設けられている。また、支持枠体１０３の内周面１０３ａと基板１０１の下面１０１ｂとに囲まれたキャビティＣ内に部品１０４が配置され、キャビティＣ内にはモールド樹脂１０５が充填されている。なお、部品１０４はシールド部材１０６により基板１０１の下面１０１ｂに接着されている。
　このように、基板１０１の下面１０１ｂ側に支持枠体１０３と部品１０４とを設けることで、低背化の容易なパッケージオンパッケージ構造のモジュール１００を提供することができる。
国際公開第２０１４／１７１２２５号（段落００４７～００５１、図３参照）
　例えば、ファンアウト構造実現のために、再配線層を設けたパッケージオンパッケージ構造を構成することが考えられる。ここで、上記したモジュール１００に再配線層を設けてファンアウト型モジュールとする場合、再配線層は、狭ギャップかつ微細ピッチが必要であるため、当該再配線層に接続される部品１０４には高い位置精度が求められる。また、薄膜により再配線層を形成するために、モジュール１００の実装面１００ａの平坦性を確保する必要がある。しかしながら、部品１０４を、半田や導電性ペースト、または樹脂性の接着剤等を用いて基板１０１の下面１０１ｂ側に配置する場合には、モールド樹脂１０５を形成する際の圧力で部品１０４の位置ずれが発生する恐れがある。また、モジュール１００の構成では、モールド樹脂１０５を形成した後に、モジュール１００の実装面１００ａを研磨することが困難であるため、実装面１００ａの平坦性を確保することも難しい。
　本発明は、上記した課題に鑑みてなされたものであり、再配線層を有するパッケージオンパッケージ構造のモジュールにおいて、部品を内包する樹脂ブロックを、表面に設けられた固定用導体により基板に固定することで、部品と再配線層との位置ずれを防止し、また、樹脂ブロックを研磨することにより平坦性を確保したモジュールを提供することを目的とする。
　上記した目的を達成するために、本発明のモジュールは、基板と、前記基板の一方主面に実装された第１部品と、前記一方主面と前記第１部品とを封止する封止樹脂層と、前記基板の他方主面に設けられた樹脂ブロックと、前記基板の前記他方主面に設けられており、複数の第１柱状導体を有する中間層と、前記中間層における、前記基板の前記他方主面側と反対側の面に積層された再配線層とを備え、前記樹脂ブロックは、内部に第２部品が設けられ、該樹脂ブロックにおける前記基板の前記他方主面側に設けられた固定用導体により、前記基板の前記他方主面に固定され、前記第１部品は、前記第１柱状導体を介して前記再配線層に接続され、前記第２部品は、前記再配線層側に外部電極を有し、前記外部電極が前記再配線層に接続されていることを特徴としている。
　この構成によれば、第２部品を内包した樹脂ブロックを、表面に設けられた固定用導体で基板に固定することにより、第２部品の位置ずれを防止することができるため、高い位置精度を確保することができる。また、樹脂ブロックの表面を研磨することにより、平坦性を確保することもできる。
　また、前記樹脂ブロックの外周面にシールド膜が形成されていてもよい。この構成によれば、第２部品に対するシールド性や放熱性を確保したパッケージオンパッケージ構造のモジュールを提供することができる。
　また、前記樹脂ブロックに第２柱状導体が設けられていてもよい。この構成によれば、第２部品とのギャップが小さい導通部を設けることが可能となる。また、第２柱状導体により樹脂ブロックを基板の他方主面に固定することで第２部品の位置ずれを防止することができる。
　また、前記中間層は、内周面が前記樹脂ブロックを囲むように形成された枠状基板を有していてもよい。この構成によれば、柱状導体やビア導体が設けられた枠状基板を用いることで、第２部品横のビア導体や柱状導体を別途形成する必要がなく、製造コストを抑制することができる。
　本発明によれば、再配線層を有するパッケージオンパッケージのモジュールにおいて、部品を内包した樹脂ブロックを使用することで部品の位置ずれを防止し、また、平坦性を確保したモジュールを提供することができる。
本発明の第１実施形態に係るモジュールの断面図である。 図１のモジュールの中間層の上面図である。 図１のモジュールの中間層の下面図である。 図１のモジュールの変形例を示す図である。 本発明の第２実施形態に係るモジュールの断面図である。 図５のモジュールの平面図である。 図５のモジュールの変形例を示す図である。 本発明の第３実施形態に係るモジュールの断面図である。 図８のモジュールの平面図である。 従来のモジュールの断面図である。
　＜第１実施形態＞
　本発明の第１実施形態に係るモジュール１について図１～図３を参照して説明する。なお、図１は第１実施形態に係るモジュール１の断面図、図２はモジュール１の中間層の上面図である。図３はモジュール１の中間層の下面図である。
　第１実施形態に係るモジュール１は、例えば、電子機器のマザー基板等に搭載されるものである。モジュール１は、図１に示すように、上面２ａ（本発明の「一方主面」に相当する）に第１部品３が実装され、封止樹脂層４が積層された基板２と、基板２の下面２ｂ（本発明の「他方主面」に相当する）に設けられた中間層５と、中間層５の下面５ｂに積層された再配線層６とを備える。
　中間層５は、第２部品７を内包する樹脂ブロック８と、樹脂ブロック８の周囲に設けられたモールド樹脂９と、モールド樹脂９に立設された第１柱状導体１０とで構成される。樹脂ブロック８は、液晶ポリマーなどの熱可塑性樹脂で形成された凹部を有するブロック状の樹脂であり、凹部に第２部品７が嵌合されている。樹脂ブロック８の上面８ａには、樹脂ブロック８を基板２の下面２ｂに固定するための固定用導体１１が設けられ、固定用導体１１と基板２の下面２ｂに形成されたランド電極（図示省略）とを接続することにより樹脂ブロック８が基板２の下面２ｂに固定されている。また、第２部品７は、その下面７ｂに形成された外部電極１２が、接続導体１７を介して再配線層６の配線電極１３に接続される。このようにすると外部接続端子１４の一部が第２部品７に電気的に接続される。このような構成により、基板２の上面２ａと垂直な方向から見たときに（以下、平面視という）、第２部品７に接続された外部接続端子１４を第２部品７の外側に配置することができる。さらに、第１部品３においても、基板２の配線（図示省略）、第１柱状導体１０、および接続導体１７を介して再配線層６の配線電極１３に接続されることにより、外部接続端子１４の一部が第１部品３に電気的に接続される。このような構成により、平面視で第１部品３と接続された外部接続端子１４を第１部品３の外側に配置することができる。その結果、端子数の増加に対応することができる。
　また、モジュール１は、基板２、第１部品３、および封止樹脂層４で構成される上側モジュール１５と中間層５および再配線層６とで構成される下側モジュール１６とが上下に連結されたパッケージオンパッケージ構造となっている。
　基板２は、例えば低温同時焼成セラミックスやガラスエポキシ樹脂等で形成される。基板２の上面２ａおよび下面２ｂには複数のランド電極（図示省略）が形成され、基板２の表層および内層には複数のグランド電極（図示省略）、複数の配線電極（図示省略）、および複数のビア導体（図示省略）等が形成されている。なお、各グランド電極は、例えば、基板２の側面から露出するように形成されており、シールド膜と接続することもできる。
　各ランド電極、各グランド電極、および各配線電極は、それぞれ、ＣｕやＡｇ、Ａｌ等の電極として一般的に採用される金属で形成されている。また、各ビア導体は、ＡｇやＣｕ等の金属で形成されている。
　第１部品３および第２部品７は、例えば、インダクタ、コンデンサ、ＩＣ、パワーアンプ等の部品が挙げられる。第１部品３は、接続端子（図示省略）が基板２の上面２ａに形成されたランド電極に半田バンプにより接続されることによって、基板２の上面２ａに実装されている。また、外部電極１２は第２部品７の下面７ｂに形成され、再配線層６の配線電極１３に接続されている。
　封止樹脂層４は、基板２の上面２ａと第１部品３を被覆するように基板２に設けられる。封止樹脂層４は、シリカフィラー入りのエポキシ樹脂等の封止樹脂として一般に採用される樹脂で形成することができる。また、熱伝導率を高めるために、アルミナフィラーなどの熱伝導率が高いフィラーを使用してもよい。
　樹脂ブロック８は、例えば液晶ポリマーなどの熱可塑性樹脂で形成させたブロック状の樹脂であり、第２部品７を嵌合させるための凹部が形成されている。図２に示すように、樹脂ブロック８における、中間層５の上面５ａから露出した部分（樹脂ブロック８の上面８ａ）には、固定用導体１１が設けられており、固定用導体１１を基板２の下面２ｂに設けられたランド電極に接続することで、樹脂ブロック８が基板２の下面２ｂに固定される。また、図３に示すように、樹脂ブロック８の凹部に嵌合された第２部品７の下面７ｂは、中間層５の下面５ｂおよび樹脂ブロック８の下面８ｂから露出し、第２部品７の下面７ｂに設けられた外部電極１２が接続導体１７を介して再配線層６の配線電極１３に接続される。
　樹脂ブロック８の周囲に設けられたモールド樹脂９は、シリカフィラー入りのエポキシ樹脂等の封止樹脂として一般に採用される樹脂で形成することができる。また、熱伝導率を高めるために、アルミナフィラーなどの熱伝導率が高いフィラーを使用してもよい。
　第１柱状導体１０は、Ｃｕ、Ａｇ、Ａｌ等の金属で形成されたビア導体であり、基板２の配線電極と再配線層６の配線電極１３とを電気的に接続する。なお、第１柱状導体１０は、Ｃｕ、Ｃｕ－Ｎｉ合金、Ｃｕ－Ｆｅ合金などのＣｕ合金、Ｆｅ、Ａｕ、Ａｇ、Ａｌなどの材質の金属ピンを用いて形成されていてもよい。
　再配線層６は、複数の樹脂層６ａの積層体からなり、中間層５の下面５ｂに積層され、各樹脂層６ａには複数の配線電極１３および複数の接続導体１７が形成される。再配線層６の最下層の樹脂層６ａの下面６ｂには、外部のマザー基板等へ接続するための外部接続端子１４が形成される。各配線電極１３、各接続導体１７、および第１柱状導体１０を介して、第１部品３および第２部品７が外部接続端子１４と接続される。この際、平面視において、第１部品３に接続される外部接続端子１４は第１部品３の外形よりも外側に位置し、第２部品７に接続される外部接続端子１４は第２部品７の外形よりも外側に位置する。また、平面視において、一部の外部接続端子１４は第１部品３の外形より内側にあってもよい。
　（モジュールの製造方法）
　次に、モジュール１の製造方法について説明する。
　まず、上側モジュール１５を形成する。その上面２ａおよび下面２ｂに複数のランド電極が形成され、表層または内層に複数のグランド電極、複数の配線電極、および複数のビア導体等が形成された基板２を用意する。各ランド電極、各グランド電極、および各配線電極については、例えば、低温同時焼成セラミック基板の場合、ＣｕやＡｇ、Ａｌ等の金属を含有する導電性ペーストをスクリーン印刷するなどしてそれぞれ形成することができる。また、各ビア導体については、レーザー等を用いてビアホールを形成した後、周知の方法により形成することができる。
　次に、基板２の上面２ａに周知の表面実装技術を用いて第１部品３を実装する。例えば、半田バンプにより第１部品３を実装し、その後、リフロー処理を行う。なお、リフロー処理の後に、必要に応じて基板２の洗浄を行ってもよい。その後、基板２の上面２ａに実装された第１部品３を被覆するように、封止樹脂層４を形成する。なお、封止樹脂層４は、例えば、トランスファーモールド方式、コンプレッションモールド方式、液状樹脂工法、シート樹脂工法等を用いることができる。また、封止樹脂層４には、一般的なシリカフィラー入りのエポキシ樹脂を用いることができる。なお、封止樹脂層４に高い熱伝導性を持たせるために、アルミナフィラーなどの熱伝導率が高いフィラー入りのエポキシ樹脂を用いることもできる。なお、封止樹脂層４の形成後に、必要に応じて基板２のプラズマ洗浄を行ってもよい。
　次に、下側モジュール１６を形成する。まず、第２部品７を内包した樹脂ブロック８を準備する。樹脂ブロック８は、液晶ポリマー等の熱可塑性樹脂を、凹部を有するブロック状に成形したものである。樹脂ブロック８の凹部に第２部品７を嵌合し、また、樹脂ブロック８の上面８ａの所望の位置に固定用導体１１を配置する。固定用導体１１は、例えば、樹脂ブロック８の上面８ａに、ＣｕやＡｇ、Ａｌ等の金属を含有する導電性ペーストをスクリーン印刷するなどして形成することができる。なお、樹脂ブロック８の上面８ａを研磨してもよい。このようにすると、樹脂ブロック８の上面８ａおよび下面８ｂの平坦性を向上させることができる。
　次に、固定用導体１１を基板２の下面２ｂに形成されたランド電極に接続することにより、樹脂ブロック８を基板２の下面２ｂに固定する。その後、基板２の下面２ｂの所望の位置に半田実装などの周知の実装技術を用いて第１柱状導体１０を実装し、第１柱状導体１０と樹脂ブロック８の側面とを被覆するように、モールド樹脂９を積層すると中間層５が形成される。モールド樹脂９は、例えば、塗布方式、印刷方式、トランスファモールド方式、コンプレッションモールド方式などで形成することができる。
　次に、中間層５の下面５ｂに再配線層６を形成する。再配線層６はポリイミドなどで形成された複数の樹脂層６ａが積層されることにより形成される。各樹脂層６ａには、複数の配線電極１３および接続導体１７が形成される。各配線電極１３および各接続導体１７は、例えば、下地電極としてのＴｉ膜をスパッタ等により成膜し、同じくスパッタ等によりＴｉ膜上にＣｕ膜を成膜し、さらに、Ｃｕ膜上に電解または無電解めっきにより同じくＣｕ膜を成膜することで形成することができる。また、各配線電極１３は、フォトリソグラフィ加工により微細パターンに形成する。その後、外部接続端子１４を形成してモジュール１が完成する。
　なお、樹脂ブロック８を基板２の下面２ｂに固定した後、再配線層６を形成する代わりに、再配線層６に樹脂ブロック８を搭載してから、再配線層６ごと樹脂ブロック８を基板２の下面２ｂに固定してもかまわない。この場合、上側モジュール１５を形成した後、基板２の下面２ｂに第１柱状導体１０およびモールド樹脂９を形成してから、再配線層６に搭載された樹脂ブロック８を基板２の下面２ｂに固定することにより、下側モジュール１６を形成することができる。
　上記した実施形態によれば、第２部品７を内包した樹脂ブロック８を固定用導体１１により基板２の下面２ｂに固定することにより、第２部品７の位置ずれを防止することができるため、高い位置精度を確保することが可能である。また、樹脂ブロック８の上面８ａを研磨することにより、樹脂ブロック８の下面８ｂの平坦性も向上させることができる。また、上側モジュール１５と下側モジュール１６とをバンプを使用せずにスタックすることができるため、低背化が容易なパッケージオンパッケージ構造のモジュールを提供することができる。
　＜第２実施形態＞
　本発明の第２実施形態に係るモジュール１ａについて、図４を参照して説明する。なお、図４は第２実施形態に係るモジュール１ａの断面図である。
　第２実施形態に係るモジュール１ａが図１を用いて説明した第１実施形態に係るモジュール１と異なる点は、図４に示すように、樹脂ブロック８の外側面、上面および下面にシールド膜１８が形成されている点である。その他の構成は第１実施形態に係るモジュール１と同様であるため、同一符号を付すことによりその説明を省略する。
　図４に示すように、樹脂ブロック８の外側面８ｃ、上面８ａおよび下面８ｂにシールド膜１８が形成されている。シールド膜１８は、第２部品７に対する外部からの電磁波、または第２部品７から外部へ向けて発生する電磁波を遮断するためのものであり、基板２のグランド電極に接続される。シールド膜１８は、密着膜と、密着膜に積層された導電膜と、導電膜に積層された保護膜とを有する多層構造で形成することができる。密着膜は、例えば、ＳＵＳなどの金属で形成することができる。また、密着膜は、Ｔｉ、Ｃｒ、Ｎｉ、Ｔｉ、Ａｌ等であってもよい。導電膜は、シールド膜１８の実質的なシールド機能を担う層であり、例えば、Ｃｕ、Ａｇ、Ａｌのうちいずれかの金属で形成することができる。保護膜は、導電膜が腐食したり、傷が付いたりするのを防止するために設けられたものであり、例えば、ＳＵＳで形成することができる。なお、保護膜は、Ｔｉ、Ｃｒ、Ｎｉ、ＴｉＡｌ等であってもよい。なお、シールド膜１８は、ＬＤＳやＭＩＰＴＥＣなどのＭＩＤ工法により形成してもよい。
　また、樹脂ブロック８の上面８ａおよび下面８ｂのシールド膜１８は、基板２の下面２ｂおよび再配線層６の最上層の樹脂層６ａの上面６ｃに形成された配線電極であってもよい。
　上記した実施形態によれば、第２部品７に対するシールド性を確保すると同時に、シールド膜１８が放熱材としても機能するため、第２部品７に対する放熱性も確保することができる。
　＜第３実施形態＞
　本発明の第３実施形態に係るモジュール１ｂについて、図５および図６を参照して説明する。なお、図５は第３実施形態に係るモジュール１ｂの断面図、図６はモジュール１ｂの中間層の下面図である。
　第３実施形態に係るモジュール１ｂが図１を用いて説明した第１実施形態に係るモジュール１と異なる点は、図５および図６に示すように、樹脂ブロック８を貫通するように第２柱状導体１９が設けられている点である。その他の構成は第１実施形態に係るモジュール１と同様であるため、同一符号を付すことによりその説明を省略する。
　この実施形態では、図５および図６に示すように、樹脂ブロック８を貫通するように第２柱状導体１９が設けられている。第２柱状導体１９は、Ｃｕ、Ａｇ、Ａｌ等の金属で形成され、基板２の配線電極と再配線層６の配線電極１３とを接続導体１７を介して電気的に接続する。なお、第２柱状導体１９は、例えば、Ｃｕ、Ｃｕ－Ｎｉ合金、Ｃｕ－Ｆｅ合金などのＣｕ合金、Ｆｅ、Ａｕ、Ａｇ、Ａｌなどの材質の金属ピンを用いて形成することができる。樹脂ブロック８を貫通するように第２柱状導体１９を形成することで、第１柱状導体１０よりも第２部品７とのギャップを小さくすることができる。これは、予め第２柱状導体１９が形成された樹脂ブロック８に部品を嵌め込むので、樹脂モールド時に柱状導体が倒れたり、位置ずれを起こすことがないためである。そして、このような構成とすることにより、モジュール全体を小型化することができる。また、第２柱状導体１９を固定用導体として使用することもできる。
　上記した実施形態によると、第２部品７とのギャップが第１柱状導体１０よりも小さい基板２と再配線層６との導通部を設けることができる。さらに、第２柱状導体１９を、樹脂ブロック８を基板２の下面２ｂへの固定するための固定部材として使用することで、第２部品７の位置ずれを防止することができる。
　（変形例）
　第３実施形態の変形例について、図７を参照して説明する。なお、図７はモジュール１ｃの断面図である。
　図７に示すように、樹脂ブロック８の外側面８ｃ、上面８ａおよび下面８ｂにシールド膜１８が形成されていてもよい。なお、基板２の下面２ｂおよび再配線層６の最上層の樹脂層６ａの上面６ｃのシールド膜１８は、基板２の下面２ｂおよび再配線層６の最上層の樹脂層６ａの上面６ｃに形成された配線電極であってもよい。このようにすると、第２部品７に対するシールド性と放熱性を向上させることができる。
　＜第４実施形態＞
　本発明の第４実施形態に係るモジュール１ｄについて、図８および図９を参照して説明する。なお、図８は、第４実施形態に係るモジュール１ｄの断面図、図９はモジュール１ｄの中間層の下面図である。
　第４実施形態に係るモジュール１ｄが図１を用いて説明した第１実施形態に係るモジュール１と異なる点は、図８および図９に示すように、中間層５が枠状基板２１を有する点である。その他の構成は第１実施形態に係るモジュール１と同様であるため、同一符号を付すことによりその説明を省略する。
　枠状基板２１は、例えば低温同時焼成セラミックスやガラスエポキシ樹脂等の絶縁材料で形成された複数の絶縁層が積層されて成る多層基板であり、枠形状を有している。枠状基板２１は、図８および図９に示すように、その外形形状が基板２の形状とほぼ同一であり、枠状基板２１の内周面２１ａに囲まれた領域に樹脂ブロック８が位置するように、基板２の下面２ｂに搭載される。また、枠状基板２１の内部には、第１柱状導体１０や各種配線電極（図示省略）が形成されている。なお、枠状基板２１は、単層であってもよい。つまり、枠状の樹脂モールド体にビアや金属めっき、あるいは金属ピンで形成された接続導体が形成されていてもよい。また、枠状基板２１と樹脂ブロック８との間には、樹脂２２が充填されていてもよい。
　上記した実施形態によれば、下側モジュール１６に枠状基板２１を使用することで、ビア導体や柱状導体を別途形成する必要がないため、製造コストを抑制することができる。
　なお、本発明は上記した各実施形態に限定されるものではなく、その趣旨を逸脱しない限りにおいて、上記したもの以外に種々の変更を行うことができる。
　また、本発明は、再配線層を有するパッケージオンパッケージ構造のモジュールに適用することができる。
　１、１ａ～１ｄ　モジュール
　２　　　基板
　２ａ　　上面（一方主面）
　２ｂ　　下面（他方主面）
　３　　　第１部品
　４　　　封止樹脂層
　５　　　中間層
　６　　　再配線層
　７　　　第２部品
　８　　　樹脂ブロック
　１０　　第１柱状導体
　１１　　固定用導体
　１８　　シールド膜
　１９　　第２柱状導体
　２１　　枠状基板

Claims (4)

  1. 　基板と、
    　前記基板の一方主面に実装された第１部品と、
    　前記一方主面と前記第１部品とを封止する封止樹脂層と、
    　前記基板の他方主面に設けられた樹脂ブロックと、
    　前記基板の前記他方主面に設けられており、複数の第１柱状導体を有する中間層と、
    　前記中間層における、前記基板の前記他方主面側と反対側の面に積層された再配線層とを備え、
    　前記樹脂ブロックは、内部に第２部品が設けられ、該樹脂ブロックにおける前記基板の前記他方主面側に設けられた固定用導体により、前記基板の前記他方主面に固定され、
    　前記第１部品は、前記第１柱状導体を介して前記再配線層に接続され、
    　前記第２部品は、前記再配線層側に外部電極を有し、前記外部電極が前記再配線層に接続されている
    　ことを特徴とするモジュール。
  2. 　前記樹脂ブロックの外周面にシールド膜が形成されていることを特徴とする請求項１に記載のモジュール。
  3. 　前記樹脂ブロックに第２柱状導体が設けられていることを特徴とする請求項１または２に記載のモジュール。
  4. 　前記中間層は、内周面が前記樹脂ブロックを囲むように形成された枠状基板を有することを特徴とする請求項１ないし３のいずれか１項に記載のモジュール。
PCT/JP2018/044499 2017-12-05 2018-12-04 モジュール WO2019111874A1 (ja)

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