WO2017206243A1 - Amoled像素驱动电路的制作方法 - Google Patents
Amoled像素驱动电路的制作方法 Download PDFInfo
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- WO2017206243A1 WO2017206243A1 PCT/CN2016/087329 CN2016087329W WO2017206243A1 WO 2017206243 A1 WO2017206243 A1 WO 2017206243A1 CN 2016087329 W CN2016087329 W CN 2016087329W WO 2017206243 A1 WO2017206243 A1 WO 2017206243A1
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- 229920001621 AMOLED Polymers 0.000 title claims abstract description 55
- 238000000034 method Methods 0.000 title claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 239000010409 thin film Substances 0.000 claims abstract description 206
- 239000004065 semiconductor Substances 0.000 claims abstract description 21
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 18
- 239000010410 layer Substances 0.000 claims description 219
- 239000011229 interlayer Substances 0.000 claims description 32
- 238000000151 deposition Methods 0.000 claims description 31
- 239000003990 capacitor Substances 0.000 claims description 30
- 229910052751 metal Inorganic materials 0.000 claims description 29
- 239000002184 metal Substances 0.000 claims description 29
- 238000003860 storage Methods 0.000 claims description 29
- 239000000758 substrate Substances 0.000 claims description 26
- 238000000059 patterning Methods 0.000 claims description 22
- 239000000463 material Substances 0.000 claims description 20
- 229920005591 polysilicon Polymers 0.000 claims description 16
- 150000002500 ions Chemical class 0.000 claims description 11
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 10
- 230000000149 penetrating effect Effects 0.000 claims description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 8
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 7
- 238000004151 rapid thermal annealing Methods 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 238000004140 cleaning Methods 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 239000010949 copper Substances 0.000 claims description 5
- 239000011521 glass Substances 0.000 claims description 5
- 229910052750 molybdenum Inorganic materials 0.000 claims description 5
- 239000011733 molybdenum Substances 0.000 claims description 5
- 229910052796 boron Inorganic materials 0.000 claims description 4
- -1 boron ions Chemical class 0.000 claims description 3
- 230000003071 parasitic effect Effects 0.000 abstract description 5
- 238000002425 crystallisation Methods 0.000 abstract description 3
- 230000008025 crystallization Effects 0.000 abstract description 3
- 239000007790 solid phase Substances 0.000 abstract description 3
- 238000013508 migration Methods 0.000 abstract 1
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- 238000010586 diagram Methods 0.000 description 10
- 238000005516 engineering process Methods 0.000 description 4
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
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- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical group [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 239000002346 layers by function Substances 0.000 description 1
- 230000011218 segmentation Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- OPCPDIFRZGJVCE-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) titanium(4+) Chemical compound [O-2].[Zn+2].[In+3].[Ti+4] OPCPDIFRZGJVCE-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
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Definitions
- the present invention relates to the field of display technologies, and in particular, to a method for fabricating an AMOLED pixel driving circuit.
- OLED Organic Light Emitting Display
- OLED Organic Light Emitting Display
- advantages such as large-area full-color display, it is recognized by the industry as the most promising display device.
- the OLED display device can be divided into two types: passive matrix OLED (PMOLED) and active matrix OLED (AMOLED), namely direct addressing and thin film transistor (Thin Film Transistor, according to the driving method). TFT) matrix addressing two types.
- the AMOLED has pixels arranged in an array, belongs to an active display type, has high luminous efficiency, and is generally used as a high-definition large-sized display device.
- the AMOLED is a current driving device. When a current flows through the organic light emitting diode, the organic light emitting diode emits light, and the luminance of the light is determined by the current flowing through the organic light emitting diode itself. Most existing integrated circuits (ICs) only transmit voltage signals, so the pixel driving circuit of AMOLED needs to complete the task of converting a voltage signal into a current signal.
- the conventional AMOLED pixel driving circuit is usually 2T1C, that is, a structure in which two thin film transistors are added with a capacitor to convert a voltage into a current. The two thin film transistors are respectively a driving thin film transistor and a switching thin film transistor.
- the driving thin film transistor and the switching thin film transistor are generally one type, and are either an oxide semiconductor (Oxide) thin film transistor or a polysilicon (Poly Silicon) thin film transistor.
- Low temperature polysilicon (LTPS) based on Excimer Laser Annealing (ELA) technology has high mobility, but its uniformity is poor, leakage is relatively high, and oxide semiconductor thin film transistors are uniform. The sex is better, the leakage is very low, but the mobility is low and the reliability is not good. Therefore, there is a defect in the existing 2T1C AMOLED pixel driving circuit using either an oxide semiconductor thin film transistor or a polycrystalline silicon thin film transistor.
- An object of the present invention is to provide a method for fabricating an AMOLED pixel driving circuit, which can reduce leakage current of a switching thin film transistor, enhance mobility and reliability of a driving thin film transistor, and reduce parasitic capacitance.
- the present invention provides a method for fabricating an AMOLED pixel driving circuit, comprising the following steps:
- Step 1 providing a substrate, cleaning and pre-baking the substrate
- Step 2 depositing a buffer layer on the substrate, depositing an amorphous silicon layer on the buffer layer;
- Step 3 performing P-type ion doping and rapid thermal annealing on the amorphous silicon layer to crystallize into a polysilicon layer, patterning the polysilicon layer to form a driving thin film transistor active layer, and a storage capacitor lower electrode;
- Step 4 depositing a gate insulating layer on the active layer of the driving thin film transistor, the lower electrode of the storage capacitor, and the buffer layer;
- Step 5 depositing a first metal layer on the gate insulating layer, patterning the first metal layer, forming a driving thin film transistor gate over the active layer of the driving thin film transistor, and the driving thin film transistor a gate of the switching thin film transistor arranged at intervals of the gate, and a storage capacitor upper electrode located above the lower electrode of the storage capacitor;
- Step 6 depositing an interlayer insulating layer on the gate of the driving thin film transistor, the gate of the switching thin film transistor, the upper electrode of the storage capacitor, and the gate insulating layer;
- Step 7 depositing an oxide semiconductor layer on the interlayer insulating layer, and patterning the oxide semiconductor layer to form a switching thin film transistor active layer above the gate of the switching thin film transistor;
- Step 8 Patterning the interlayer insulating layer and the gate insulating layer to form a first via hole and a second via hole penetrating the interlayer insulating layer and the gate insulating layer, and the first via hole and the second via hole Exposing both ends of the active layer of the driving thin film transistor respectively;
- Step 9 Depositing a second metal layer on the interlayer insulating layer and the active layer of the switching thin film transistor, and patterning the second metal layer to form a source of the driving thin film transistor, a drain of the driving thin film transistor, and a source of the switching thin film transistor a pole, and a drain of the switching thin film transistor;
- the driving thin film transistor source and the driving thin film transistor drain are respectively in contact with both ends of the driving thin film transistor active layer through the first via and the second via;
- the source of the switching thin film transistor and the drain of the switching thin film transistor are respectively in contact with both ends of the active layer of the switching thin film transistor;
- the drain of the switching thin film transistor is electrically connected to the source of the driving thin film transistor.
- the substrate is a glass substrate.
- the buffer layer, the gate insulating layer, and the interlayer insulating layer are all made of silicon oxide and nitrided. A combination of one or more of silicon.
- the materials of the first metal layer and the second metal layer are both molybdenum, aluminum, or copper.
- the P-type ions doped in the step 3 are boron ions.
- the material of the oxide semiconductor layer in the step 7 is IGZO or ITZO.
- the method further includes: step 10, forming a planarization layer and a pixel from bottom to top sequentially on the driving thin film transistor source, the driving thin film transistor drain, the switching thin film transistor source, the switching thin film transistor drain, and the interlayer insulating layer; Electrode, pixel definition layer, and pixel segmentation layer.
- a third via hole penetrating the planarization layer is formed on a position of the planarization layer corresponding to a drain of the driving thin film transistor; and the pixel electrode is in contact with a drain of the driving thin film transistor through a third via hole.
- the pixel defining layer is formed with an opening corresponding to a position of the pixel electrode.
- the material of the pixel electrode is ITO.
- the invention also provides a method for fabricating an AMOLED pixel driving circuit, comprising the following steps:
- Step 1 providing a substrate, cleaning and pre-baking the substrate
- Step 2 depositing a buffer layer on the substrate, depositing an amorphous silicon layer on the buffer layer;
- the source of the switching thin film transistor and the drain of the switching thin film transistor are respectively in contact with both ends of the active layer of the switching thin film transistor;
- step 2 is a schematic diagram of step 2 of a method for fabricating an AMOLED pixel driving circuit of the present invention
- step 8 is a schematic diagram of step 8 of a method for fabricating an AMOLED pixel driving circuit of the present invention.
- step 10 is a schematic diagram of step 10 of a method for fabricating an AMOLED pixel driving circuit of the present invention
- polysilicon as the active layer of the driving thin film transistor can improve the uniformity, reliability, and mobility of the driving thin film transistor.
- the material of the gate insulating layer 4 is a combination of one or more of silicon oxide and silicon nitride.
- the material of the first metal layer is molybdenum (Mo), aluminum (Al), or copper (Gu), and the driving thin film transistor gate 41 is located above the active layer 31 of the driving thin film transistor, thereby forming Top-gate thin film transistors, top-gate thin film transistors can greatly reduce the parasitic capacitance of the driving thin film transistor.
- Step 8 referring to FIG. 8, patterning the interlayer insulating layer 5 and the gate insulating layer 4 to form a first via hole 51 and a second via hole 52 penetrating the interlayer insulating layer 5 and the gate insulating layer 4,
- the first via 51 and the second via 52 respectively expose both ends of the driving thin film transistor active layer 31.
- Step 9 a second metal layer is deposited on the interlayer insulating layer 5 and the switching thin film transistor active layer 61, and the second metal layer is patterned to form a driving thin film transistor source 73 and a driving film.
- the driving thin film transistor source 73 and the driving thin film transistor drain 74 are in contact with both ends of the driving thin film transistor active layer 31 through the first via 51 and the second via 52, respectively.
- the driving thin film transistor source 73, the driving thin film transistor drain 74, the driving thin film transistor gate 41, and the driving thin film transistor active layer 31 together constitute a driving thin film transistor of the AMOLED pixel driving circuit.
- the switching thin film transistor source 71 and the switching thin film transistor drain 72 are respectively in contact with both ends of the switching thin film transistor active layer 61.
- the switching thin film transistor source 71, the switching thin film transistor drain 72, the switching thin film transistor gate 42, and the switching thin film transistor active layer 61 together constitute a switching thin film transistor of the AMOLED pixel driving circuit.
- the drain transistor 72 of the switching thin film transistor is electrically connected to the source of the driving thin film transistor 73.
- the switching thin film transistor, the driving thin film transistor, and the storage capacitor together form a 2T1C type AMOLED pixel driving circuit.
- Step 10 referring to FIG. 10, the bottom surface of the driving thin film transistor source 73, the driving thin film transistor drain 74, the switching thin film transistor source 71, the switching thin film transistor drain 72, and the interlayer insulating layer 5
- the planarization layer 8, the pixel electrode 9, the pixel definition layer 10, and the pixel division layer 11 are sequentially formed.
- a third via 81 penetrating through the planarization layer 8 is formed on the planarization layer 8 at a position corresponding to the drain electrode 72 of the driving thin film transistor, and the pixel electrode 9 passes through the third via 81 and The drain electrode 74 of the driving thin film transistor is in contact with each other, and the pixel defining layer 10 is formed with an opening 101 corresponding to the position of the pixel electrode 9, and the opening 101 is used for depositing an organic functional layer of the OLED device to form an organic light emitting diode.
- the material of the planarization layer 8 is a combination of one or more of silicon oxide and silicon nitride.
- the method for fabricating an AMOLED pixel driving circuit uses an oxide semiconductor thin film transistor as a switching thin film transistor of an AMOLED pixel driving circuit, which can reduce leakage current of a switching thin film transistor, and is fabricated by solid phase crystallization technology.
- the P-type polysilicon thin film transistor is used as a driving thin film transistor of the AMOLED pixel driving circuit, and can improve the mobility, uniformity, and reliability of the driving thin film transistor, and can form a constant current type OLED by using a P-type thin film transistor as a driving thin film transistor.
- the device is more stable than the source follower OLED device formed by the N-type thin film transistor, while reducing its parasitic capacitance by the top gate type structure.
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Abstract
一种AMOLED像素驱动电路的制作方法,采用氧化物半导体薄膜晶体管作为AMOLED像素驱动电路的开关薄膜晶体管,能够减小开关薄膜晶体管的漏电流,采用固相晶化技术制作的P型多晶硅薄膜晶体管作为AMOLED像素驱动电路的驱动薄膜晶体管,能够提升驱动薄膜晶体管的迁移率、均一性、以及可靠性,并且用P型薄膜晶体管作为驱动薄膜晶体管,能够形成恒定电流型的OLED器件,相比于N型薄膜晶体管形成的源极跟随型OLED器件更加稳定,同时通过顶栅型结构减小其寄生电容。
Description
本发明涉及显示技术领域,尤其涉及一种AMOLED像素驱动电路的制作方法。
有机发光二极管(Organic Light Emitting Display,OLED)显示装置具有自发光、驱动电压低、发光效率高、响应时间短、清晰度与对比度高、近180°视角、使用温度范围宽、及可实现柔性显示与大面积全色显示等诸多优点,被业界公认为是最有发展潜力的显示装置。
OLED显示装置按照驱动方式可以分为无源矩阵型OLED(Passive Matrix OLED,PMOLED)和有源矩阵型OLED(Active Matrix OLED,AMOLED)两大类,即直接寻址和薄膜晶体管(Thin Film Transistor,TFT)矩阵寻址两类。其中,AMOLED具有呈阵列式排布的像素,属于主动显示类型,发光效能高,通常用作高清晰度的大尺寸显示装置。
AMOLED是电流驱动器件,当有电流流过有机发光二极管时,有机发光二极管发光,且发光亮度由流过有机发光二极管自身的电流决定。大部分已有的集成电路(Integrated Circuit,IC)都只传输电压信号,故AMOLED的像素驱动电路需要完成将电压信号转变为电流信号的任务。传统的AMOLED像素驱动电路通常为2T1C,即两个薄膜晶体管加一个电容的结构,将电压变换为电流。其中,两个薄膜晶体管分别为驱动薄膜晶体管、及开关薄膜晶体管。
对于2T1C的AMOLED像素驱动电路,驱动薄膜晶体管、及开关薄膜晶体管通常都是一种类型的,都是氧化物半导体(Oxide)薄膜晶体管或者都是多晶硅(Poly Silicon)薄膜晶体管。基于准分子激光退火(Excimer Laser Annealing,ELA)技术的低温多晶硅薄膜晶体管(Low Temperature Poly Silicon,LTPS)虽然迁移率高,但是其均一性不好,漏电比较高,而氧化物半导体薄膜晶体管的均一性比较好,漏电很低,但是迁移率较低,可靠性不好。因此,无论是采用氧化物半导体薄膜晶体管或者多晶硅薄膜晶体管现有的2T1C的AMOLED像素驱动电路都存在缺陷。
发明内容
本发明的目的在于提供一种AMOLED像素驱动电路的制作方法,能够减小开关薄膜晶体管的漏电流,增强驱动薄膜晶体管的迁移率和可靠性,减小寄生电容。
为实现上述目的,本发明提供一种AMOLED像素驱动电路的制作方法,包括如下步骤:
步骤1、提供一基板,对所述基板进行清洗和预烘烤;
步骤2、在所述基板上沉积一缓冲层,在所述缓冲层上沉积一非晶硅层;
步骤3、对所述非晶硅层进行P型离子掺杂和快速热退火使其结晶为多晶硅层,图案化所述多晶硅层形成驱动薄膜晶体管有源层、以及存储电容下电极;
步骤4、在所述驱动薄膜晶体管有源层、存储电容下电极、以及缓冲层上沉积一层栅极绝缘层;
步骤5、在所述栅极绝缘层上沉积第一金属层,图案化所述第一金属层,形成位于所述驱动薄膜晶体管有源层上方的驱动薄膜晶体管栅极、与所述驱动薄膜晶体管栅极间隔排列的开关薄膜晶体管栅极、以及位于所述存储电容下电极上方的存储电容上电极;
步骤6、在所述驱动薄膜晶体管栅极、开关薄膜晶体管栅极、存储电容上电极、及栅极绝缘层上沉积一层间绝缘层;
步骤7、在所述层间绝缘层上沉积一氧化物半导体层,图案化所述氧化物半导体层形成位于所述开关薄膜晶体管栅极上方的开关薄膜晶体管有源层;
步骤8、图案化所述层间绝缘层及栅极绝缘层,形成贯穿层间绝缘层及栅极绝缘层的第一过孔与第二过孔,所述第一过孔与第二过孔分别暴露出驱动薄膜晶体管有源层的两端;
步骤9、在所述层间绝缘层、及开关薄膜晶体管有源层上沉积第二金属层,图案化所述第二金属层形成驱动薄膜晶体管源极、驱动薄膜晶体管漏极、开关薄膜晶体管源极、及开关薄膜晶体管漏极;
所述驱动薄膜晶体管源极、及驱动薄膜晶体管漏极分别通过第一过孔与第二过孔与所述驱动薄膜晶体管有源层的两端相接触;
所述开关薄膜晶体管源极、及开关薄膜晶体管漏极分别与所述开关薄膜晶体管有源层的两端相接触;
所述开关薄膜晶体管漏极与所述驱动薄膜晶体管源极电性连接。
所述步骤1中基板为玻璃基板。
所述缓冲层、栅极绝缘层、及层间绝缘层的材料均为氧化硅、及氮化
硅中的一种或多种的组合。
所述第一金属层与第二金属层的材料均为钼、铝、或铜。
所述步骤3中掺杂的P型离子为硼离子。
所述步骤7中氧化物半导体层的材料为IGZO、或ITZO。
还包括:步骤10、在所述驱动薄膜晶体管源极、驱动薄膜晶体管漏极、开关薄膜晶体管源极、开关薄膜晶体管漏极、以及层间绝缘层上自下而上依次形成平坦化层、像素电极、像素定义层、以及像素分割层。
所述平坦化层上对应所述驱动薄膜晶体管漏极的位置形成有贯穿所述平坦化层的第三过孔;所述像素电极通过第三过孔与所述驱动薄膜晶体管漏极相接触。
所述像素定义层对应所述像素电极的位置形成有开口。
所述像素电极的材料为ITO。
本发明还提供一种AMOLED像素驱动电路的制作方法,包括如下步骤:
步骤1、提供一基板,对所述基板进行清洗和预烘烤;
步骤2、在所述基板上沉积一缓冲层,在所述缓冲层上沉积一非晶硅层;
步骤3、对所述非晶硅层进行P型离子掺杂和快速热退火使其结晶为多晶硅层,图案化所述多晶硅层形成驱动薄膜晶体管有源层、以及存储电容下电极;
步骤4、在所述驱动薄膜晶体管有源层、存储电容下电极、以及缓冲层上沉积一层栅极绝缘层;
步骤5、在所述栅极绝缘层上沉积第一金属层,图案化所述第一金属层,形成位于所述驱动薄膜晶体管有源层上方的驱动薄膜晶体管栅极、与所述驱动薄膜晶体管栅极间隔排列的开关薄膜晶体管栅极、以及位于所述存储电容下电极上方的存储电容上电极;
步骤6、在所述驱动薄膜晶体管栅极、开关薄膜晶体管栅极、存储电容上电极、及栅极绝缘层上沉积一层间绝缘层;
步骤7、在所述层间绝缘层上沉积一氧化物半导体层,图案化所述氧化物半导体层形成位于所述开关薄膜晶体管栅极上方的开关薄膜晶体管有源层;
步骤8、图案化所述层间绝缘层及栅极绝缘层,形成贯穿层间绝缘层及栅极绝缘层的第一过孔与第二过孔,所述第一过孔与第二过孔分别暴露出驱动薄膜晶体管有源层的两端;
步骤9、在所述层间绝缘层、及开关薄膜晶体管有源层上沉积第二金属
层,图案化所述第二金属层形成驱动薄膜晶体管源极、驱动薄膜晶体管漏极、开关薄膜晶体管源极、及开关薄膜晶体管漏极;
所述驱动薄膜晶体管源极、及驱动薄膜晶体管漏极分别通过第一过孔与第二过孔与所述驱动薄膜晶体管有源层的两端相接触;
所述开关薄膜晶体管源极、及开关薄膜晶体管漏极分别与所述开关薄膜晶体管有源层的两端相接触;
所述开关薄膜晶体管漏极与所述驱动薄膜晶体管源极电性连接;
其中,所述步骤1中基板为玻璃基板;
其中,所述缓冲层、栅极绝缘层、及层间绝缘层的材料均为氧化硅、及氮化硅中的一种或多种的组合;
其中,所述第一金属层与第二金属层的材料均为钼、铝、或铜。
本发明的有益效果:本发明提供的AMOLED像素驱动电路的制作方法,采用氧化物半导体薄膜晶体管作为AMOLED像素驱动电路的开关薄膜晶体管,能够减小开关薄膜晶体管的漏电流,采用固相晶化技术制作的P型多晶硅薄膜晶体管作为AMOLED像素驱动电路的驱动薄膜晶体管,能够提升驱动薄膜晶体管的迁移率、均一性、以及可靠性,并且用P型薄膜晶体管作为驱动薄膜晶体管,能够形成恒定电流型的OLED器件,相比于N型薄膜晶体管形成的源极跟随型OLED器件更加稳定,同时通过顶栅型结构减小其寄生电容。
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图中,
图1为本发明的AMOLED像素驱动电路的制作方法的步骤1的示意图;。
图2为本发明的AMOLED像素驱动电路的制作方法的步骤2的示意图;
图3为本发明的AMOLED像素驱动电路的制作方法的步骤3的示意图;
图4为本发明的AMOLED像素驱动电路的制作方法的步骤4的示意图;
图5为本发明的AMOLED像素驱动电路的制作方法的步骤5的示意
图;
图6为本发明的AMOLED像素驱动电路的制作方法的步骤6的示意图;
图7为本发明的AMOLED像素驱动电路的制作方法的步骤7的示意图;
图8为本发明的AMOLED像素驱动电路的制作方法的步骤8的示意图;
图9为本发明的AMOLED像素驱动电路的制作方法的步骤9的示意图;
图10为本发明的AMOLED像素驱动电路的制作方法的步骤10的示意图;
图11为本发明的AMOLED像素驱动电路的制作方法的流程图。
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图11,本发明提供一种AMOLED像素驱动电路的制作方法,包括如下步骤:
步骤1、请参阅图1,提供一基板1,对所述基板1进行清洗和预烘烤。
具体地,所述基板1为透明基板,优选玻璃基板。
步骤2、请参阅图2,在所述基板1上沉积一缓冲层2,在所述缓冲层2上沉积一非晶硅层3’。
具体地,所述缓冲层2的材料为氧化硅(SiOX)、及氮化硅(SiNX)中的一种或多种的组合。
步骤3、请参阅图3,对所述非晶硅层3’进行P型离子掺杂和快速热退火(rapid thermal annealing,RTA)使其结晶为多晶硅层,图案化所述多晶硅层形成驱动薄膜晶体管有源层31、以及存储电容下电极32。
具体地,所述步骤3中掺杂的P型离子为硼(B)离子,通过掺杂P型离子使得后续形成的驱动薄膜晶体管为P型薄膜晶体管,P型薄膜晶体管能够制作恒定电流型的OLED器件,相比于N型薄膜晶体管的源极跟随型的OLED器件更加稳定。
进一步地,采用多晶硅作为驱动薄膜晶体管有源层能够提升驱动薄膜晶体管的均一性、可靠性、及迁移率。
步骤4、请参阅图4,在所述驱动薄膜晶体管有源层31、存储电容下电
极32、以及缓冲层2上沉积一层栅极绝缘层4。
具体地,所述栅极绝缘层4的材料为氧化硅、及氮化硅中的一种或多种的组合。
步骤5、请参阅图5,在所述栅极绝缘层4上沉积第一金属层,图案化所述第一金属层,形成位于所述驱动薄膜晶体管有源层31上方的驱动薄膜晶体管栅极41、与所述驱动薄膜晶体管栅极41间隔排列的开关薄膜晶体管栅极42、以及位于所述存储电容下电极32上方的存储电容上电极43。
优选地,所述第一金属层的材料为钼(Mo)、铝(Al)、或铜(Gu),该驱动薄膜晶体管栅极41位于所述驱动薄膜晶体管有源层31的上方,从而形成顶栅型薄膜晶体管,顶栅型薄膜晶体管能够大大减少驱动薄膜晶体管的寄生电容。
所述存储电容下电极32、及存储电容上电极43共同组成AMOLED像素驱动电路的存储电容。
步骤6、请参阅图6,在所述驱动薄膜晶体管栅极41、开关薄膜晶体管栅极42、存储电容上电极43、及栅极绝缘层4上沉积一层间绝缘层5。
具体地,所层间绝缘层5的材料为氧化硅、及氮化硅中的一种或多种的组合。
步骤7、请参阅图7,在所述层间绝缘层5上沉积一氧化物半导体层,图案化所述氧化物半导体层形成位于所述开关薄膜晶体管栅极42上方的开关薄膜晶体管有源层61。
优选地,所述氧化物半导体层的材料为铟镓锌氧化物(Indium Gallium Zinc Oxide,IGZO)、或者铟钛锌氧化物(Indium Titanium Zinc Oxide,ITZO)。
进一步地,采用氧化物半导体作为开关薄膜晶体管有源层61,能够减少开关薄膜晶体管的漏电流。
步骤8、请参阅图8,图案化所述层间绝缘层5及栅极绝缘层4,形成贯穿层间绝缘层5及栅极绝缘层4的第一过孔51与第二过孔52,所述第一过孔51与第二过孔52分别暴露出驱动薄膜晶体管有源层31的两端。
步骤9、请参阅图9,在所述层间绝缘层5、及开关薄膜晶体管有源层61上沉积第二金属层,图案化所述第二金属层形成驱动薄膜晶体管源极73、驱动薄膜晶体管漏极74、开关薄膜晶体管源极71、开关薄膜晶体管漏极72。
具体地,所述驱动薄膜晶体管源极73、及驱动薄膜晶体管漏极74分别通过第一过孔51与第二过孔52与所述驱动薄膜晶体管有源层31的两端相接触。
所述驱动薄膜晶体管源极73、驱动薄膜晶体管漏极74、驱动薄膜晶体管栅极41、以及驱动薄膜晶体管有源层31共同组成AMOLED像素驱动电路的驱动薄膜晶体管。
所述开关薄膜晶体管源极71、及开关薄膜晶体管漏极72分别与所述开关薄膜晶体管有源层61的两端相接触。
所述开关薄膜晶体管源极71、开关薄膜晶体管漏极72、开关薄膜晶体管栅极42、以及开关薄膜晶体管有源层61共同组成AMOLED像素驱动电路的开关薄膜晶体管。
所述开关薄膜晶体管漏极72与所述驱动薄膜晶体管源极73电性连接,所述开关薄膜晶体管、驱动薄膜晶体管、以及存储电容共同组成一2T1C型AMOLED像素驱动电路。
步骤10、请参阅图10,在所述驱动薄膜晶体管源极73、驱动薄膜晶体管漏极74、开关薄膜晶体管源极71、开关薄膜晶体管漏极72、以及层间绝缘层5上自下而上依次形成平坦化层8、像素电极9、像素定义层10、以及像素分割层11。
具体地,所述平坦化层8上对应所述驱动薄膜晶体管漏极72的位置形成有贯穿所述平坦化层8的第三过孔81,所述像素电极9通过第三过孔81与所述驱动薄膜晶体管漏极74相接触,所述像素定义层10对应所述像素电极9的位置形成有开口101,所述开口101用于沉积OLED器件的有机功能层,形成有机发光二极管。
所述平坦化层8的材料为氧化硅、及氮化硅中的一种或多种的组合。
优选地,所述像素电极9的材料为氧化铟锡(Indium tin oxide,ITO)。
综上所述,本发明提供的AMOLED像素驱动电路的制作方法,采用氧化物半导体薄膜晶体管作为AMOLED像素驱动电路的开关薄膜晶体管,能够减小开关薄膜晶体管的漏电流,采用固相晶化技术制作的P型多晶硅薄膜晶体管作为AMOLED像素驱动电路的驱动薄膜晶体管,能够提升驱动薄膜晶体管的迁移率、均一性、以及可靠性,并且用P型薄膜晶体管作为驱动薄膜晶体管,能够形成恒定电流型的OLED器件,相比于N型薄膜晶体管形成的源极跟随型OLED器件更加稳定,同时通过顶栅型结构减小其寄生电容。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。
Claims (17)
- 一种AMOLED像素驱动电路的制作方法,包括如下步骤:步骤1、提供一基板,对所述基板进行清洗和预烘烤;步骤2、在所述基板上沉积一缓冲层,在所述缓冲层上沉积一非晶硅层;步骤3、对所述非晶硅层进行P型离子掺杂和快速热退火使其结晶为多晶硅层,图案化所述多晶硅层形成驱动薄膜晶体管有源层、以及存储电容下电极;步骤4、在所述驱动薄膜晶体管有源层、存储电容下电极、以及缓冲层上沉积一层栅极绝缘层;步骤5、在所述栅极绝缘层上沉积第一金属层,图案化所述第一金属层,形成位于所述驱动薄膜晶体管有源层上方的驱动薄膜晶体管栅极、与所述驱动薄膜晶体管栅极间隔排列的开关薄膜晶体管栅极、以及位于所述存储电容下电极上方的存储电容上电极;步骤6、在所述驱动薄膜晶体管栅极、开关薄膜晶体管栅极、存储电容上电极、及栅极绝缘层上沉积一层间绝缘层;步骤7、在所述层间绝缘层上沉积一氧化物半导体层,图案化所述氧化物半导体层形成位于所述开关薄膜晶体管栅极上方的开关薄膜晶体管有源层;步骤8、图案化所述层间绝缘层及栅极绝缘层,形成贯穿层间绝缘层及栅极绝缘层的第一过孔与第二过孔,所述第一过孔与第二过孔分别暴露出驱动薄膜晶体管有源层的两端;步骤9、在所述层间绝缘层、及开关薄膜晶体管有源层上沉积第二金属层,图案化所述第二金属层形成驱动薄膜晶体管源极、驱动薄膜晶体管漏极、开关薄膜晶体管源极、及开关薄膜晶体管漏极;所述驱动薄膜晶体管源极、及驱动薄膜晶体管漏极分别通过第一过孔与第二过孔与所述驱动薄膜晶体管有源层的两端相接触;所述开关薄膜晶体管源极、及开关薄膜晶体管漏极分别与所述开关薄膜晶体管有源层的两端相接触;所述开关薄膜晶体管漏极与所述驱动薄膜晶体管源极电性连接。
- 如权利要求1所述的AMOLED像素驱动电路的制作方法,其中,所述步骤1中基板为玻璃基板。
- 如权利要求1所述的AMOLED像素驱动电路的制作方法,其中, 所述缓冲层、栅极绝缘层、及层间绝缘层的材料均为氧化硅、及氮化硅中的一种或多种的组合。
- 如权利要求1所述的AMOLED像素驱动电路的制作方法,其中,所述第一金属层与第二金属层的材料均为钼、铝、或铜。
- 如权利要求1所述的AMOLED像素驱动电路的制作方法,其中,所述步骤3中掺杂的P型离子为硼离子。
- 如权利要求1所述的AMOLED像素驱动电路的制作方法,其中,所述步骤7中氧化物半导体层的材料为IGZO、或ITZO。
- 如权利要求1所述的AMOLED像素驱动电路的制作方法,还包括:步骤10、在所述驱动薄膜晶体管源极、驱动薄膜晶体管漏极、开关薄膜晶体管源极、开关薄膜晶体管漏极、以及层间绝缘层上自下而上依次形成平坦化层、像素电极、像素定义层、以及像素分割层。
- 如权利要求7所述的AMOLED像素驱动电路的制作方法,其中,所述平坦化层上对应所述驱动薄膜晶体管漏极的位置形成有贯穿所述平坦化层的第三过孔;所述像素电极通过第三过孔与所述驱动薄膜晶体管漏极相接触。
- 如权利要求7所述的AMOLED像素驱动电路的制作方法,其中,所述像素定义层对应所述像素电极的位置形成有开口。
- 如权利要求7所述的AMOLED像素驱动电路的制作方法,其中,所述像素电极的材料为ITO。
- 一种AMOLED像素驱动电路的制作方法,包括如下步骤:步骤1、提供一基板,对所述基板进行清洗和预烘烤;步骤2、在所述基板上沉积一缓冲层,在所述缓冲层上沉积一非晶硅层;步骤3、对所述非晶硅层进行P型离子掺杂和快速热退火使其结晶为多晶硅层,图案化所述多晶硅层形成驱动薄膜晶体管有源层、以及存储电容下电极;步骤4、在所述驱动薄膜晶体管有源层、存储电容下电极、以及缓冲层上沉积一层栅极绝缘层;步骤5、在所述栅极绝缘层上沉积第一金属层,图案化所述第一金属层,形成位于所述驱动薄膜晶体管有源层上方的驱动薄膜晶体管栅极、与所述驱动薄膜晶体管栅极间隔排列的开关薄膜晶体管栅极、以及位于所述存储电容下电极上方的存储电容上电极;步骤6、在所述驱动薄膜晶体管栅极、开关薄膜晶体管栅极、存储电容上电极、及栅极绝缘层上沉积一层间绝缘层;步骤7、在所述层间绝缘层上沉积一氧化物半导体层,图案化所述氧化物半导体层形成位于所述开关薄膜晶体管栅极上方的开关薄膜晶体管有源层;步骤8、图案化所述层间绝缘层及栅极绝缘层,形成贯穿层间绝缘层及栅极绝缘层的第一过孔与第二过孔,所述第一过孔与第二过孔分别暴露出驱动薄膜晶体管有源层的两端;步骤9、在所述层间绝缘层、及开关薄膜晶体管有源层上沉积第二金属层,图案化所述第二金属层形成驱动薄膜晶体管源极、驱动薄膜晶体管漏极、开关薄膜晶体管源极、及开关薄膜晶体管漏极;所述驱动薄膜晶体管源极、及驱动薄膜晶体管漏极分别通过第一过孔与第二过孔与所述驱动薄膜晶体管有源层的两端相接触;所述开关薄膜晶体管源极、及开关薄膜晶体管漏极分别与所述开关薄膜晶体管有源层的两端相接触;所述开关薄膜晶体管漏极与所述驱动薄膜晶体管源极电性连接;其中,所述步骤1中基板为玻璃基板;其中,所述缓冲层、栅极绝缘层、及层间绝缘层的材料均为氧化硅、及氮化硅中的一种或多种的组合;其中,所述第一金属层与第二金属层的材料均为钼、铝、或铜。
- 如权利要求11所述的AMOLED像素驱动电路的制作方法,其中,所述步骤3中掺杂的P型离子为硼离子。
- 如权利要求11所述的AMOLED像素驱动电路的制作方法,其中,所述步骤7中氧化物半导体层的材料为IGZO、或ITZO。
- 如权利要求11所述的AMOLED像素驱动电路的制作方法,还包括:步骤10、在所述驱动薄膜晶体管源极、驱动薄膜晶体管漏极、开关薄膜晶体管源极、开关薄膜晶体管漏极、以及层间绝缘层上自下而上依次形成平坦化层、像素电极、像素定义层、以及像素分割层。
- 如权利要求14所述的AMOLED像素驱动电路的制作方法,其中,所述平坦化层上对应所述驱动薄膜晶体管漏极的位置形成有贯穿所述平坦化层的第三过孔;所述像素电极通过第三过孔与所述驱动薄膜晶体管漏极相接触。
- 如权利要求14所述的AMOLED像素驱动电路的制作方法,其中,所述像素定义层对应所述像素电极的位置形成有开口。
- 如权利要求14所述的AMOLED像素驱动电路的制作方法,其中,所述像素电极的材料为ITO。
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113327924A (zh) * | 2021-05-25 | 2021-08-31 | 北京京东方技术开发有限公司 | 半导体器件、显示基板及显示装置 |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106783921A (zh) * | 2016-12-22 | 2017-05-31 | 深圳市华星光电技术有限公司 | 有机发光显示面板及其制作方法 |
CN106935549B (zh) * | 2017-03-20 | 2019-11-29 | 昆山工研院新型平板显示技术中心有限公司 | 薄膜晶体管阵列基板的制作方法及薄膜晶体管阵列基板 |
CN106784412B (zh) * | 2017-03-30 | 2019-02-26 | 武汉华星光电技术有限公司 | 柔性有机发光二极管显示器及其制作方法 |
CN106952928B (zh) * | 2017-03-30 | 2018-10-23 | 深圳市华星光电技术有限公司 | 一种tft背板的制作方法及tft背板 |
CN107146855A (zh) * | 2017-05-16 | 2017-09-08 | 京东方科技集团股份有限公司 | Oled基板及其制备方法、显示装置 |
CN107240550B (zh) * | 2017-06-02 | 2019-09-27 | 深圳市华星光电技术有限公司 | 薄膜晶体管制造方法及阵列基板的制作方法 |
CN107481938B (zh) * | 2017-09-26 | 2020-02-18 | 武汉华星光电技术有限公司 | 显示面板、显示装置及低温多晶硅薄膜晶体管的制备方法 |
CN108962936B (zh) * | 2017-12-11 | 2021-03-30 | 广东聚华印刷显示技术有限公司 | 像素界定结构及其制作方法、显示面板 |
WO2019140007A1 (en) * | 2018-01-11 | 2019-07-18 | Applied Materials, Inc. | Thin film transistor with small storage capacitor with metal oxide switch |
CN108231860B (zh) * | 2018-01-29 | 2020-10-02 | 信利(惠州)智能显示有限公司 | 一种显示屏制作方法及amoled显示屏 |
EP4004981B1 (en) | 2019-07-31 | 2023-08-30 | BOE Technology Group Co., Ltd. | Array substrate, display apparatus, and method of fabricating array substrate |
CN112987420A (zh) * | 2019-12-17 | 2021-06-18 | 京东方科技集团股份有限公司 | 像素电路布局结构、显示面板和显示装置 |
CN112599571B (zh) * | 2020-12-08 | 2022-11-25 | 武汉华星光电半导体显示技术有限公司 | 显示面板 |
TWI778496B (zh) * | 2021-01-15 | 2022-09-21 | 友達光電股份有限公司 | 主動元件及其製造方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101272644A (zh) * | 2007-03-20 | 2008-09-24 | 三星电子株式会社 | 有机发光显示面板及其制造方法 |
CN104851388A (zh) * | 2014-02-19 | 2015-08-19 | 三星显示有限公司 | 有机发光显示器及其制造方法 |
CN104867921A (zh) * | 2014-02-24 | 2015-08-26 | 乐金显示有限公司 | 薄膜晶体管基板及利用该薄膜晶体管基板的显示装置 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100747491B1 (ko) * | 2006-02-20 | 2007-08-08 | 삼성전자주식회사 | 디스플레이장치 |
KR101281167B1 (ko) * | 2006-11-22 | 2013-07-02 | 삼성전자주식회사 | 유기발광 디스플레이의 단위 화소부 구동소자 및 그제조방법 |
KR20140064328A (ko) * | 2012-11-20 | 2014-05-28 | 엘지디스플레이 주식회사 | 유기전계 발광소자 및 이의 제조 방법 |
KR102124025B1 (ko) * | 2013-12-23 | 2020-06-17 | 엘지디스플레이 주식회사 | 유기발광다이오드 표시장치 및 그 제조방법 |
US9721973B2 (en) * | 2014-02-24 | 2017-08-01 | Lg Display Co., Ltd. | Thin film transistor substrate and display using the same |
KR20160053001A (ko) * | 2014-10-30 | 2016-05-13 | 삼성디스플레이 주식회사 | 투명 표시 기판, 투명 표시 장치 및 투명 표시 장치의 제조 방법 |
KR102292514B1 (ko) * | 2014-11-19 | 2021-08-23 | 삼성디스플레이 주식회사 | 유기 발광 표시 장치 및 그 제조 방법 |
CN105161516B (zh) * | 2015-08-13 | 2018-10-30 | 深圳市华星光电技术有限公司 | 有机发光显示器及其制造方法 |
KR102491873B1 (ko) * | 2015-11-03 | 2023-01-27 | 삼성디스플레이 주식회사 | 박막트랜지스터 어레이 기판, 그 제조 방법, 및 유기 발광 표시 장치 |
JP2017162852A (ja) * | 2016-03-07 | 2017-09-14 | 株式会社ジャパンディスプレイ | 半導体装置および表示装置 |
TWI602306B (zh) * | 2016-07-05 | 2017-10-11 | Innolux Corp | 陣列基板結構與顯示裝置 |
JP2018036290A (ja) * | 2016-08-29 | 2018-03-08 | 株式会社ジャパンディスプレイ | 表示装置 |
-
2016
- 2016-05-30 CN CN201610371058.6A patent/CN105931988B/zh active Active
- 2016-06-27 US US15/120,745 patent/US10056445B2/en active Active
- 2016-06-27 WO PCT/CN2016/087329 patent/WO2017206243A1/zh active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101272644A (zh) * | 2007-03-20 | 2008-09-24 | 三星电子株式会社 | 有机发光显示面板及其制造方法 |
CN104851388A (zh) * | 2014-02-19 | 2015-08-19 | 三星显示有限公司 | 有机发光显示器及其制造方法 |
CN104867921A (zh) * | 2014-02-24 | 2015-08-26 | 乐金显示有限公司 | 薄膜晶体管基板及利用该薄膜晶体管基板的显示装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113327924A (zh) * | 2021-05-25 | 2021-08-31 | 北京京东方技术开发有限公司 | 半导体器件、显示基板及显示装置 |
CN113327924B (zh) * | 2021-05-25 | 2024-04-12 | 北京京东方技术开发有限公司 | 半导体器件、显示基板及显示装置 |
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