WO2017143678A1 - 氧化物薄膜晶体管及其制备方法 - Google Patents
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- 239000010409 thin film Substances 0.000 title claims abstract description 36
- 238000002360 preparation method Methods 0.000 title claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 238000004381 surface treatment Methods 0.000 claims abstract description 27
- 238000000034 method Methods 0.000 claims abstract description 20
- 238000010849 ion bombardment Methods 0.000 claims abstract description 16
- 239000010408 film Substances 0.000 claims description 24
- 238000002161 passivation Methods 0.000 claims description 20
- 238000000206 photolithography Methods 0.000 claims description 11
- 239000007789 gas Substances 0.000 claims description 7
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 239000001301 oxygen Substances 0.000 claims description 6
- 229910052760 oxygen Inorganic materials 0.000 claims description 6
- 229910052786 argon Inorganic materials 0.000 claims description 3
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 claims description 3
- 230000007547 defect Effects 0.000 abstract description 9
- 238000000151 deposition Methods 0.000 abstract description 4
- 230000008021 deposition Effects 0.000 abstract description 4
- 239000004065 semiconductor Substances 0.000 abstract description 4
- 238000001125 extrusion Methods 0.000 abstract description 3
- 239000000853 adhesive Substances 0.000 abstract 1
- 230000001070 adhesive effect Effects 0.000 abstract 1
- 238000012360 testing method Methods 0.000 description 9
- 230000000052 comparative effect Effects 0.000 description 8
- 150000002500 ions Chemical class 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 6
- 238000005240 physical vapour deposition Methods 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000011056 performance test Methods 0.000 description 3
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 238000009832 plasma treatment Methods 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000004043 responsiveness Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
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- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
Definitions
- the invention relates to the field of wafer manufacturing and display technology, in particular to an oxide thin film transistor and a preparation method thereof.
- a thin film transistor liquid crystal flat panel display is a type of active matrix liquid crystal display device.
- Each liquid crystal pixel on the display screen is driven by a thin film transistor integrated behind the pixel, and a thin film transistor (TFT, Thin Film Transistor)
- TFT Thin Film Transistor
- TFT driver classifications mainly include a-Si TFT (amorphous silicon), LTPS TFT (low-temperature polysilicon), and IGZO TFT (indium gallium zinc oxide) also fall into this category. Because IGZO materials have advantages such as high carrier mobility, good stability and uniformity, and simple preparation process, it has become a research hotspot in the LCD industry as an emerging technology in recent years.
- the core structure of the IGZO TFT, the IGZO film layer is formed by a physical vapor deposition (PVD) device under low temperature conditions. According to the low temperature film formation characteristics of the PVD device, the film formation of the IGZO film layer is known. The quality will be relatively poor, mainly reflected in the internal defect state, the adhesion of the film layer is poor, and the roughness is large.
- PVD physical vapor deposition
- the IGZO film layer in the mass-produced IGZO TFT is generally relatively thin, about 50 nm, but the surface has a roughness of 1-10 nm, so carriers are easily exposed to surface radicals during the transmission of the IGZO film layer. In addition to the Coulomb force, carriers are more likely to be trapped by the defect state in the IGZO film layer, causing problems such as deterioration of the electrical properties of the IGZO TFT. Based on the above analysis, it is necessary to improve the existing IGZO TFT fabrication technology to optimize the film formation quality of the IGZO film layer.
- an object of the present invention is to provide an oxide thin film transistor and
- the preparation method is to improve the film formation quality of the active layer by the preparation method, thereby obtaining a thin film transistor structure having superior performance.
- the present invention includes two aspects.
- the present invention provides a method of fabricating an oxide thin film transistor, comprising the steps of:
- the active layer is subjected to plasma surface treatment to obtain an active layer having a roughness of less than 10 nm.
- the active layer is an IGZO film layer.
- the active layer has a roughness of less than 6 nm.
- the active layer has a roughness of 1-5 nm.
- the gas used for plasma surface treatment of the active layer is one or more of oxygen, carbon tetrafluoride, nitrogen or argon.
- the gas used for plasma surface treatment of the active layer is oxygen.
- the active layer of plasma surface treatment was employed 0.2-0.5W / cm 2.
- the power density is 0.2-0.5 W/cm 2 refers to any point value within the numerical range, for example, the power density may be 0.2 W/cm 2 , 0.25 W/cm 2 , 0.28 W/cm 2 , 0.3 W. / cm 2, 0.34W / cm 2 , 0.38W / cm 2, 0.4W / cm 2, 0.42W / cm 2, 0.45W / cm 2 or 0.5W / cm 2.
- the power density is 0.34 W/cm 2 .
- the ion bombardment angle of the active layer for plasma surface treatment is 0°-180°.
- the ion bombardment angle of 0°-180° means any point value within the numerical range, for example, the ion bombardment angle may be 0°, 30°, 60°, 90°, 120°, 150° or 180°.
- the ion bombardment angle of the active layer for plasma surface treatment is 0°-180°.
- the ion bombardment angle of 0°-180° means any point value within the numerical range, for example, the ion bombardment angle may be 0°, 30°, 60°, 90°, 120°, 150° or 180°.
- a substrate 100 is provided, and a gate electrode 200 is deposited on the substrate 100, and the gate electrode 200 is photolithographically etched to obtain a patterned gate electrode 200;
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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Abstract
提供一种氧化物薄膜晶体管及其制备方法,其制备方法包括以下步骤:提供一基板(100);在所述基板(100)上形成有源层(400),并对所述有源层(400)进行等离子表面处理,得到粗糙度小于10nm的有源层(400)。虽然沉积形成的有源层粗糙度较大,并且存在缺陷,但通过等离子表面处理技术对有源层进行处理,合理控制所选用的气体离子种类、离子轰击能量和角度等工艺参数,实现对有源层的有效挤压,这种挤压可分解为纵向和横向的作用力,使得氧化物半导体层表面的粗糙度和缺陷可以得到修饰,同时也使得氧化物半导体层的附着力得以提升。
Description
本发明涉及晶圆制造领域及显示技术领域,具体是一种氧化物薄膜晶体管及其制备方法。
薄膜晶体管液晶平板显示器是一类有源矩阵液晶显示设备,该类显示屏上的每个液晶像素点都是由集成在像素点后面的薄膜晶体管来驱动,薄膜晶体管(TFT,Thin Film Transistor)对于显示器的响应度及色彩真实度等具有重要影响,是该类显示器中的重要组成部分。常见的TFT驱动分类主要有a-Si TFT(非晶硅)、LTPS TFT(低温多晶硅),IGZO TFT(铟镓锌氧化物)也属于这一范畴。由于IGZO材料具有载流子迁移率高、稳定性及均匀性佳、制备工艺简单等方面的优势,因此近来年已经作为一项新兴技术成为LCD行业的研究热点。
LCD行业内对于IGZO TFT性能改善方面的研究主要集中在选择TFT结构、改善栅极绝缘层(GI)与IGZO层的界面、改善IGZO膜层沉积条件以及控制退火温度和存放条件等方面。其中,IGZO TFT的核心结构——IGZO膜层,是采用物理气相沉积(PVD,Physical Vapor Deposition)设备在低温条件下完成成膜的,根据PVD设备的低温成膜特性可知IGZO膜层的成膜质量会比较差,主要体现在内部缺陷态较多、膜层附着力较差、粗糙度较大等方面。
目前量产的IGZO TFT中IGZO膜层一般都比较薄,为50nm左右,但其表面却存在1-10nm的粗糙度,因此载流子在IGZO膜层传输的过程中很容易受到来自表面原子团的库伦力作用;除此之外,载流子也更容易被IGZO膜层中的缺陷态捕获,导致IGZO TFT电性恶化等问题。基于上述分析,实有必要对现有的IGZO TFT制造技术进行改进,以优化IGZO膜层的成膜质量。
发明内容
为克服现有技术的不足,本发明的目的在于提供一种氧化物薄膜晶体管及
其制备方法,以期通过该制备方法改善有源层的成膜质量、进而得到具有较优异性能的薄膜晶体管结构。
本发明包括两个方面,第一个方面,本发明提供一种氧化物薄膜晶体管的制备方法,包括以下步骤:
提供一基板;
在所述基板上形成有源层;
对所述有源层进行等离子表面处理,得到粗糙度小于10nm的有源层。
进一步地,所述有源层为IGZO膜层。
优选地,所述有源层的粗糙度小于6nm。
更优选地,所述有源层的粗糙度为1-5nm。
【plasma-气体】可选地,对所述有源层进行等离子表面处理所采用的气体为氧气、四氟化碳、氮气或氩气中的一种或几种。
优选地,对所述有源层进行等离子表面处理所采用的气体为氧气。
【plasma-功率】进一步地,对所述有源层进行等离子表面处理所采用的功率密度为0.2-0.5W/cm2。其中,所述功率密度为0.2-0.5W/cm2是指该数值范围内的任一点值,例如功率密度可以为0.2W/cm2、0.25W/cm2、0.28W/cm2、0.3W/cm2、0.34W/cm2、0.38W/cm2、0.4W/cm2、0.42W/cm2、0.45W/cm2或0.5W/cm2。
优选地,所述功率密度为0.34W/cm2。
【plasma-角度】进一步地,对所述有源层进行等离子表面处理所采用离子轰击角度为0°-180°。其中,离子轰击角度为0°-180°是指该数值范围内的任一点值,例如离子轰击角度可以为0°、30°、60°、90°、120°、150°或180°。
优选地,对所述有源层进行等离子表面处理所采用离子轰击角度为0°-90°。
【栅极、栅极绝缘层】进一步地,在所述基板上形成有源层的步骤包括:在所述基板上形成栅极;在所述基板、所述栅极上形成栅极绝缘层;在所述栅
极绝缘层上形成所述有源层。
更进一步地,所述栅极包覆在所述栅极绝缘层中。
【离子轰击后-有源层光刻】进一步地,对所述有源层进行等离子表面处理之后,对所述有源层进行光刻。
更进一步地,对所述有源层进行光刻的步骤包括在所述有源层上形成光刻胶图案、通过使用所述光刻胶图案对所述有源层进行刻蚀,得到图形化的有源层。
【源漏极、钝化层】进一步地,对所述有源层进行光刻后,在所述有源层上分别形成源极和漏极,且所述源极和所述漏极分开设置;在所述有源层、所述源极、所述漏极上形成钝化层;在所述钝化层上形成部分暴露所述漏极的接触孔。
进一步地,形成像素电极,并通过所述接触孔使所述像素电极与所述漏极接触。
第二个方面,本发明提供一种利用上述制备方法得到的氧化物薄膜晶体管,所述氧化物薄膜晶体管中设有基板和位于所述基板上方的有源层,通过对所述有源层进行等离子表面处理,使所述有源层的粗糙度小于10nm。
进一步地,所述有源层为IGZO膜层。
优选地,所述有源层的粗糙度小于6nm。
更优选地,所述有源层的粗糙度为1-5nm。
可选地,对所述有源层进行等离子表面处理所采用的气体为氧气、四氟化碳、氮气或氩气中的一种或几种。
优选地,对所述有源层进行等离子表面处理所采用的气体为氧气。
进一步地,对所述有源层进行等离子表面处理所采用的功率密度为0.2-0.5W/cm2。其中,所述功率密度为0.2-0.5W/cm2是指该数值范围内的任一点值,例如功率密度可以为0.2W/cm2、0.25W/cm2、0.28W/cm2、0.3W/cm2、0.34W/cm2、0.38W/cm2、0.4W/cm2、0.42W/cm2、0.45W/cm2或0.5W/cm2。
优选地,所述功率密度为0.34W/cm2。
进一步地,对所述有源层进行等离子表面处理所采用离子轰击角度为0°-180°。其中,离子轰击角度为0°-180°是指该数值范围内的任一点值,例如离子轰击角度可以为0°、30°、60°、90°、120°、150°或180°。
优选地,对所述有源层进行等离子表面处理所采用离子轰击角度为0°-90°。最优选地,对所述有源层进行等离子表面处理所采用离子轰击角度为90°。
进一步地,所述氧化物薄膜晶体管还包括设置在所述基板上和所述有源层之间的栅极、栅极绝缘层,所述栅极设置在所述基板上,所述栅极绝缘层设置在所述基板、所述栅极上,且所述栅极绝缘层设置在所述有源层下。
更进一步地,所述栅极包覆在所述栅极绝缘层中。
进一步地,对所述有源层进行等离子表面处理后,对所述有源层进行光刻。
更进一步地,对所述有源层进行光刻的步骤包括在所述有源层上形成光刻胶图案、通过使用所述光刻胶图案对所述有源层进行刻蚀,得到图形化的有源层。
进一步地,所述氧化物薄膜晶体管还包括设置在所述有源层上方的源极和漏极,且所述源极和所述漏极分开设置;在所述源极、所述漏极和所述有源层上方设置有钝化层,所述钝化层上设置有部分暴露所述漏极的接触孔。
进一步地,所述氧化物薄膜晶体管还包括像素电极,所述像素电极通过接触孔与所述漏极接触。
现有技术中,一般将等离子处理技术应用于刻蚀、掺杂等工艺,由于工艺条件的需要,离子轰击需要给予离子较大能量,这会对相应的薄膜表面造成一定损伤。但是在本发明中,通过采用合适能量的离子对IGZO膜层表面进行轰击处理,反而达到了对IGZO膜层的修饰作用,从而起到改善IGZO TFT性能的作用。
在本发明中,虽然沉积形成的有源层粗糙度较大,并且存在缺陷,但本发明通过等离子表面处理技术对有源层进行处理,合理控制所选用的气体离子种类、离子轰击能量和角度等工艺参数,实现对有源层的有效挤压,这种挤压可分解为纵向和横向的作用力,使得氧化物半导体层表面的粗糙度和缺陷可以得到修饰,同时也使得氧化物半导体层的附着力得以提升。
图1至图8是本发明实施例制备氧化物薄膜晶体管的工艺流程。
图9是本发明实施例中等离子处理的作用效果示意图。
图10是本发明实施例中对薄膜晶体管的有源层进行粗糙度测试的结果图。
图11是对比例中对薄膜晶体管的有源层进行粗糙度测试的结果图。
图12是本发明实施例中对薄膜晶体管进行电学性能测试的结果图。
图13是对比例中对薄膜晶体管进行电学性能测试的结果图。
实施例
本实施例提供一种氧化物薄膜晶体管的制备方法,包括以下步骤:
如图1所示,提供一基板100,并在该基板100上沉积形成栅极200,并对该栅极200进行光刻、刻蚀,得到图形化的栅极200;
如图2所示,在基板100和图形化的栅极200上沉积形成栅极绝缘层300,该栅极绝缘层300将栅极200包覆在其中;
如图3所示,在栅极绝缘层300上方采用物理气相沉积工艺沉积形成有源层400,该有源层为IGZO膜层;
如图4所示,对该有源层400进行等离子表面处理,采用功率密度为0.34W/cm2的氧气对该有源层400进行离子轰击,离子轰击角度为0°-90°,通过离子轰击,使有源层的粗糙度为1-5nm;
如图5所示,对经过等离子表面处理的有源层400进行光刻、刻蚀,具体为:在该有源层上形成光刻胶图案、通过使用该光刻胶图案对有源层进行刻蚀,得到图形化的有源层400;
如图6所示,在已经图形化的有源层400上分别沉积形成源极500和漏极600,且源极500和漏极600是分开设置的,源极500位于有源层400的左侧,漏极600位于有源层400的右侧;
如图7所示,在源极500、漏极600、有源层400上沉积形成钝化层700;在该钝化层700对应于漏极上方的区域(即图7中钝化层的右侧区域)形成一
贯穿于该钝化层700的接触孔800;
如图8所示,在该氧化物薄膜晶体管中还形成有像素电极900,该像素电极为ITO膜层,该像素电极900通过接触孔800与漏极600相接触。
本实施例还提供一种利用上述制备方法得到的氧化物薄膜晶体管,其结构的剖面示意图如图8所示,该氧化物薄膜晶体管包括位于最底层的基板100,在该基板100上方设有图形化的栅极200,在基板100、栅极200上方设有栅极绝缘层300,且该栅极绝缘层300将栅极200包覆在其内部,在栅极绝缘层300上设有图形化的有源层400,该有源层为IGZO膜层,在有源层上表面的左侧设有源极500、右侧设有漏极600,在源极500、漏极600、有源层400的上方设有钝化层700,在钝化层700的右侧区域中设有贯穿于该钝化层的接触孔800,该接触孔800使漏极600的部分区域暴露,在该氧化物薄膜晶体管中还设有像素电极900,该像素电极为ITO膜层,该像素电极900通过接触孔800与漏极600接触。
利用本实施例制备方法制得的氧化物薄膜晶体管,其有源层的粗糙度为1-5nm。在本实施例中,在栅极绝缘层上沉积形成有源层(即IGZO膜层)时是采用PVD设备在低温条件下完成成膜的,此时,如图9中(a)处的结构所示,经过PVD设备沉积后形成的有源层,其内部的缺陷态较多、粗糙度较大,如第一区域1和第二区域2都是导致有源层具有较大粗糙度和产生缺陷的区域。当利用合适能量的离子对该有源层表面进行轰击处理时,由于离子的轰击对有源层产生了挤压力,这种挤压力可以分解为纵向和横向的作用力,结果使得有源层表面得到修饰,如图9中(b)处的结构所述,经过离子轰击进行修饰后得到的有源层,其表面的粗糙度和缺陷都得到了优化,这样的结构也使得有源层的附着力得到提升。
对比例
本对比例与上述实施例的区别仅在于,在栅极绝缘层上方沉积形成有源层之后,直接对该有源层进行光刻、刻蚀,并未对该有源层进行等离子表面处理。
性能测试
1、有源层粗糙度测试
分别对实施例和对比例制得的薄膜晶体管的有源层进行粗糙度测试,测试结果如图10和图11所示。结果表明,实施例的薄膜晶体管的有源层的粗糙度
为1-5nm,有源层表面颗粒较小,可知通过离子轰击,已将有源层中较大颗粒击碎。对比例的薄膜晶体管的有源层的粗糙度为1-10nm,有源层表面颗粒较大。
2、电学性能测试测试
分别对实施例和对比例制得的薄膜晶体管进行电学性能测试,测试结果如图12和图13所示。结果表明,实施例的薄膜晶体管亚域特性较好,在个别点漏电数较少。对比例的薄膜晶体管亚域特性不佳。
可以理解的是,以上仅对薄膜晶体管的主体结构进行了说明,上述器件还可以包括其他常规的功能结构本发明不再赘述。
以上所述为本发明的具体实施方式,其目的是为了清楚说明本发明而作的举例,并非是对本发明的实施方式的限定。对于所属领域的普通技术人员来说,在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明权利要求的保护范围之内。
Claims (20)
- 一种氧化物薄膜晶体管的制备方法,其中,包括以下步骤:提供一基板;在所述基板上形成有源层,并对所述有源层进行等离子表面处理,得到粗糙度小于10nm的有源层。
- 如权利要求1所述的制备方法,其中:所述有源层为IGZO膜层。
- 如权利要求1所述的制备方法,其中:对所述有源层进行等离子表面处理所采用的气体为氧气、四氟化碳、氮气或氩气中的一种或几种。
- 如权利要求1所述的制备方法,其中:对所述有源层进行等离子表面处理所采用的功率密度为0.2-0.5W/cm2。
- 如权利要求1所述的制备方法,其中:对所述有源层进行等离子表面处理所采用离子轰击角度为0°-180°。
- 如权利要求1所述的制备方法,其中:在所述基板上形成有源层的步骤包括:在所述基板上形成栅极;在所述基板、所述栅极上形成栅极绝缘层;在所述栅极绝缘层上形成所述有源层。
- 如权利要求2所述的制备方法,其中:在所述基板上形成有源层的步骤包括:在所述基板上形成栅极;在所述基板、所述栅极上形成栅极绝缘层;在所述栅极绝缘层上形成所述有源层。
- 如权利要求3所述的制备方法,其中:在所述基板上形成有源层的步骤包括:在所述基板上形成栅极;在所述基板、所述栅极上形成栅极绝缘层;在所述栅极绝缘层上形成所述有源层。
- 如权利要求4所述的制备方法,其中:在所述基板上形成有源层的步骤包括:在所述基板上形成栅极;在所述基板、所述栅极上形成栅极绝缘层;在所述栅极绝缘层上形成所述有源层。
- 如权利要求5所述的制备方法,其中:在所述基板上形成有源层的步骤包括:在所述基板上形成栅极;在所述基板、所述栅极上形成栅极绝缘层; 在所述栅极绝缘层上形成所述有源层。
- 如权利要求1所述的制备方法,其中:对所述有源层进行等离子表面处理之后,对所述有源层进行光刻。
- 如权利要求2所述的制备方法,其中:对所述有源层进行等离子表面处理之后,对所述有源层进行光刻。
- 如权利要求3所述的制备方法,其中:对所述有源层进行等离子表面处理之后,对所述有源层进行光刻。
- 如权利要求4所述的制备方法,其中:对所述有源层进行等离子表面处理之后,对所述有源层进行光刻。
- 如权利要求1所述的制备方法,其中:对所述有源层进行光刻后,在所述有源层上分别形成源极和漏极,且所述源极和所述漏极分开设置;在所述有源层、所述源极、所述漏极上形成钝化层;在所述钝化层上形成部分暴露所述漏极的接触孔。
- 如权利要求2所述的制备方法,其中:对所述有源层进行光刻后,在所述有源层上分别形成源极和漏极,且所述源极和所述漏极分开设置;在所述有源层、所述源极、所述漏极上形成钝化层;在所述钝化层上形成部分暴露所述漏极的接触孔。
- 如权利要求3所述的制备方法,其中:对所述有源层进行光刻后,在所述有源层上分别形成源极和漏极,且所述源极和所述漏极分开设置;在所述有源层、所述源极、所述漏极上形成钝化层;在所述钝化层上形成部分暴露所述漏极的接触孔。
- 如权利要求4所述的制备方法,其中:对所述有源层进行光刻后,在所述有源层上分别形成源极和漏极,且所述源极和所述漏极分开设置;在所述有源层、所述源极、所述漏极上形成钝化层;在所述钝化层上形成部分暴露所述漏极的接触孔。
- 一种氧化物薄膜晶体管,所述氧化物薄膜晶体管中设有基板和位于所述基板上方的有源层,其中:通过对所述有源层进行等离子表面处理,使所述有源层的粗糙度小于10nm。
- 如权利要求19所述的制备方法,其中:所述氧化物薄膜晶体管还包括 设置在所述基板上和所述有源层之间的栅极、栅极绝缘层,所述栅极设置在所述基板上,所述栅极绝缘层设置在所述基板、所述栅极上,且所述栅极绝缘层设置在所述有源层下。
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