WO2017054737A1 - 一种基于大容量固态存储的地址映射方法及装置 - Google Patents

一种基于大容量固态存储的地址映射方法及装置 Download PDF

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Publication number
WO2017054737A1
WO2017054737A1 PCT/CN2016/100631 CN2016100631W WO2017054737A1 WO 2017054737 A1 WO2017054737 A1 WO 2017054737A1 CN 2016100631 W CN2016100631 W CN 2016100631W WO 2017054737 A1 WO2017054737 A1 WO 2017054737A1
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level
mapping table
logical block
block address
main memory
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PCT/CN2016/100631
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English (en)
French (fr)
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许璐
孙亚萍
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华为技术有限公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7201—Logical to physical mapping or translation of blocks or pages

Definitions

  • the present invention relates to the field of electronic communication technologies, and in particular, to an address mapping method and apparatus based on large-capacity solid-state storage.
  • the data carriers commonly used in the storage field are mechanical hard disks and solid state drives (SSDs).
  • SSDs solid state drives
  • the solid state drives have the advantages of small size, low power consumption, strong anti-interference ability, minimal addressing time, and high number of read/write operations per second (IOPS).
  • IOPS read/write operations per second
  • solid state hard disk storage such as flash can achieve microsecond delay, while traditional disk intelligence achieves millisecond delay.
  • the solid state hard disk such as flash (1), the modified data cannot be directly rewritten on the original data, resulting in non-fixed point update; (2) the basic unit of data reading and writing is the page, and the basic unit of erasing is the block; (3) Due to the life problem, each erase block can only be erased for a limited number of times and other inherent characteristics. Therefore, based on the storage system of a solid state hard disk such as flash, it is necessary to simulate the behavior of a conventional block device for reading and writing a mechanical hard disk, and shield the solid state drive from the system. characteristic.
  • the Flash Translation Layer (FTL) algorithm is actually a mapping of logical block address (LBA) to physical page number (PPN).
  • LBA logical block address
  • PPN physical page number
  • the Flash Translation Layer (FTL) actually writes the data to a different free physical page and updates the mapping table, and the old data contained on the page. Set to invalid.
  • the operating system can be used as a hard disk drive. Therefore, the performance of the Flash Translation Layer (FTL) algorithm directly affects the performance of solid state drives such as flash.
  • the early SSDs such as flash have smaller capacity and the number of pages per chip is limited.
  • the small-grained page-level mapping strategy is an efficient and flexible mapping method that can map any logical page to any physical page. Each mapping relationship corresponds to one mapping entry.
  • Due to the small granularity of the mapping when the capacity of the solid state hard disk such as flash is large, a large amount of memory is required to store the mapping table information, which is not suitable for a large-capacity solid-state storage system.
  • the conversion of the block-level mapped address is used to convert the logical block number into a physical block number by address mapping, and the data is written to the physical page having the same offset in the physical block according to the block number offset in the logical address.
  • the mapping table is significantly reduced due to the coarse-grained mapping. However, if N pages form a block, the number of mapping tables of the block mapping is reduced to 1/N compared with the basic page mapping algorithm, so that the entire mapping table can be completely stored in the main memory RAM. In the block-level mapping scheme, the space utilization of the replacement block is very low, which causes waste of storage space.
  • the erase operation of the solid state hard disk such as flash a large amount of data erasure and apologetic operation are required, and the system runs for a while. Time requires frequent garbage collection, causing system performance jitter.
  • Embodiments of the present invention provide an address mapping method and apparatus based on large-capacity solid-state storage, by searching a logical block address corresponding to data to be read or written, and searching for a logical block address corresponding to a logical level block in a 2-level mapping table.
  • a level 3 mapping table reading the data from the level 3 mapping table or writing a multi-level sequential mapping scheme of the data in a physical page number allocated for the logical block address, due to mapping at level 2 Only the index of the level 3 mapping table is stored in the table, and the logical block address in the solid state hard disk is corresponding only when the level 3 mapping table in the main memory does not store the data to be read or to be written.
  • the level 3 mapping table is written to the main memory, which solves the problem that the page level mapping needs to consume a large amount of main storage space due to the small granularity of the mapping in the case of large-capacity storage, and also avoids the data involved in the block operation of the block level mapping.
  • the resulting performance instability problem achieves a simplified mapping relationship to reduce the consumption of main memory space and maintain stable performance.
  • the first aspect provides an address mapping method based on large-capacity solid-state storage, which includes:
  • the level 3 mapping table in the main memory corresponding to the logical block address
  • the global level 2 mapping table is used to index the level 3 mapping table in the main memory and a 3-level mapping table in the solid state hard disk, wherein the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk are used to store the logical block address and a physical page number corresponding to the logical block address Mapping relations;
  • level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the logical block according to the global level 2 mapping table indexing the level 3 mapping table in the solid state hard disk
  • the level 3 mapping table in the solid state hard disk corresponding to the address is read out and stored in the main memory;
  • the data to be written is written into the storage space corresponding to the physical page number.
  • the level 3 mapping table corresponding to the logical block address does not exist in the main memory, according to the global level 2 mapping table index
  • the third-level mapping table in the SSD before the third-level mapping table in the SSD corresponding to the logical block address is read and stored in the main storage, and further includes:
  • the main memory Determining whether the space in the main memory storing the level 3 mapping table reaches a preset threshold, and reaching the preset threshold In case, the cold data is removed from the main storage according to a preset cache rule and written into the solid state hard disk, so as to write a 3-level mapping table corresponding to the logical block address in the solid state hard disk.
  • the main memory provides storage space.
  • the control solid state hard disk controller allocates a physical page number to the logical block address, and the After the physical page number is stored in the level 3 mapping table corresponding to the logical block address in the main memory, the physical page number further includes:
  • the method further includes:
  • the logical block address and the physical page number are updated in the level 2 mapping table and the level 1 mapping table.
  • the third level mapping table corresponding to the logical block address is not present in the main memory And reading, according to the global level 2 mapping table, the level 3 mapping table in the solid state hard disk, and reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the After the main memory, it also includes:
  • control solid state hard disk controller After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a level 3 mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the three-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number.
  • the second aspect provides an address mapping method based on large-capacity solid-state storage, which includes:
  • the global level 2 mapping table Querying, by the global level 2 mapping table, the physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table is used to index the main a 3-level mapping table in the storage and a 3-level mapping table in the solid state hard disk;
  • the third aspect provides an address mapping method based on large-capacity solid-state storage, which includes:
  • Obtaining a command for reading or writing data in a solid state hard disk the command including a read command or a write command
  • the read command If the command is a read command, the read command carries a logical block address, and the global logical level 2 mapping table is used in the main memory to query the logical block address stored in the level 3 mapping table in the main memory. Physical page number, the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;
  • the write command carries the logical block address of the data to be written and the data to be written, and queries the location corresponding to the logical block address according to the global level 2 mapping table.
  • the level 3 mapping table in the main memory is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk, and the level 3 mapping table is used for storing a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;
  • level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the logical block according to the global level 2 mapping table indexing the level 3 mapping table in the solid state hard disk
  • the level 3 mapping table in the solid state hard disk corresponding to the address is read out and stored in the main memory;
  • the data to be written is written into the storage space corresponding to the physical page number.
  • the level 3 mapping table corresponding to the logical block address does not exist in the main memory, according to the global level 2 mapping table index
  • the third-level mapping table in the SSD before the third-level mapping table in the SSD corresponding to the logical block address is read and stored in the main storage, and further includes:
  • the level 3 mapping table in the main memory reaches a preset threshold. If the preset threshold is reached, the cold data is removed from the main memory and written according to a preset cache rule. To the solid state hard disk, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory providing storage space.
  • the SSD controller allocates a physical page number to the logical block address, and stores the physical page number in the third-level mapping table corresponding to the logical block address in the main memory, and further includes:
  • the method further includes:
  • the logical block address and the physical page number are updated in the level 2 mapping table and the level 1 mapping table.
  • the level 3 mapping table corresponding to the logical block address does not exist in the main memory And reading, according to the global level 2 mapping table, the level 3 mapping table in the solid state hard disk, and reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the After the main memory, it also includes:
  • control solid state hard disk controller After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a three-level mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the three-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number.
  • the fourth aspect provides an address mapping apparatus based on large-capacity solid-state storage, which includes:
  • Obtaining a module acquiring a write command for writing data to the solid state hard disk, where the write command carries a logical block address of the data to be written and the data to be written;
  • a processing module configured to query, according to the global level 2 mapping table, the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the main a 3-level mapping table in the storage level 3 mapping table and the solid state hard disk, wherein the level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;
  • the processing module is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the level 3 mapping table in the solid state hard disk according to the global level 2 mapping table The third level mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;
  • the processing module is further configured to control a solid state hard disk controller to allocate a physical page number to the logical block address, and store the physical page number in a third level corresponding to the logical block address in the main memory.
  • a solid state hard disk controller to allocate a physical page number to the logical block address, and store the physical page number in a third level corresponding to the logical block address in the main memory.
  • the processing module is further configured to: in the three-level mapping table corresponding to the logical block address in the main memory, Writing data to the storage space corresponding to the physical page number;
  • the storage module includes the SSD module and the main storage module, configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
  • the processing module in the third level mapping table corresponding to if the logical block address does not exist in the main memory And reading, according to the global level 2 mapping table, the level 3 mapping table in the solid state hard disk, and reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the Before the main memory, it is also used to:
  • the level 3 mapping table in the main memory reaches a preset threshold. If the preset threshold is reached, the cold data is removed from the main memory and written according to a preset cache rule. To the solid state hard disk, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory providing storage space.
  • the processing module is configured to control a physical hard disk controller to allocate a physical address to the logical block address.
  • the physical page number After the page number is stored in the three-level mapping table corresponding to the logical block address in the main memory, the physical page number further includes:
  • the processing module is further used after the processing is further used to write the physical page number into the solid state hard disk.
  • the logical block address and the physical page number are updated in the level 2 mapping table and the level 1 mapping table.
  • the processing module in the if the main memory does not exist, the level 3 mapping corresponding to the logical block address a table, according to the global level 2 mapping table indexing the level 3 mapping table in the solid state hard disk, reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the After the main memory, it is also used to:
  • control solid state hard disk controller After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a three-level mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the three-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number.
  • a fifth aspect provides an address mapping apparatus based on a large-capacity solid-state storage, including:
  • a processing module configured to query, by using a global level 2 mapping table in the main memory, a physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table is used Indexing the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;
  • the processing module is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, index the solid state according to the global level 2 mapping table
  • the level 3 mapping table in the hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;
  • the processing module is further configured to read the data from the physical page
  • the storage module includes the SSD module and the main storage module, configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
  • a sixth aspect provides an address mapping apparatus based on a large-capacity solid-state storage, comprising: an obtaining module, acquiring a command for reading or writing data in a solid state hard disk, where the command includes a read command or a write command;
  • a processing module configured to determine that the command is a read command or a write command
  • the processing module is further configured to: if the command is a read command, the read command carries a logical block address, and in a main memory, through a global level 2 mapping table, querying the third level mapping table stored in the main memory a physical page number corresponding to the logical block address, where the global level 2 mapping table is used to index a level 3 mapping table in the main memory and a level 3 mapping table in the solid state hard disk;
  • the processing module is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, index the solid state according to the global level 2 mapping table
  • the level 3 mapping table in the hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;
  • the processing module is further configured to read the data from the physical page
  • the processing module is further configured to: if the command is a write command, the write command carries a logical block address to be written data and the to-be-written data, and the query is performed according to the global level 2 mapping table.
  • a level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
  • the level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;
  • the processing module is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, And reading, according to the global level 2 mapping table, the level 3 mapping table in the solid state hard disk, and reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the main Deposit
  • the processing module is further configured to control a solid state hard disk controller to allocate a physical page number to the logical block address, and store the physical page number in a third level corresponding to the logical block address in the main memory.
  • a solid state hard disk controller to allocate a physical page number to the logical block address, and store the physical page number in a third level corresponding to the logical block address in the main memory.
  • the processing module is further configured to write the data to be written into the storage space corresponding to the physical page number in the three-level mapping table corresponding to the logical block address in the main memory;
  • the storage module includes the SSD module and the main storage module, configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
  • ,Also includes:
  • the level 3 mapping table in the main memory reaches a preset threshold. If the preset threshold is reached, the cold data is removed from the main memory and written according to a preset cache rule. To the solid state hard disk, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory providing storage space.
  • the processing module is configured to allocate a physical page number to the logical block address in the control solid state disk controller After the physical page number is stored in the three-level mapping table corresponding to the logical block address in the main memory, the method further includes:
  • the processing module after the writing the physical page number into the solid state hard disk, further includes:
  • the logical block address and the physical page number are updated in the level 2 mapping table and the level 1 mapping table.
  • the processing module is configured to: if the logical block address does not exist in the main memory a level 3 mapping table, according to the global level 2 mapping table indexing the level 3 mapping table in the solid state hard disk, reading the level 3 mapping table in the solid state hard disk corresponding to the logical block address And after being stored in the main memory, the method further includes:
  • control solid state hard disk controller After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a three-level mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the three-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number.
  • the seventh aspect provides an address mapping apparatus based on large-capacity solid-state storage, which includes:
  • a processor configured to query, according to the global level 2 mapping table, the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the main a 3-level mapping table in the storage level 3 mapping table and the solid state hard disk, wherein the level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;
  • the processor is further configured to: if a level 3 mapping table corresponding to the logical block address does not exist in the main memory, index a level 3 mapping table in the solid state hard disk according to the global level 2 mapping table.
  • the third level mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;
  • the processor is further configured to control a solid state hard disk controller to allocate a physical page number to the logical block address, and store the physical page number in a third level corresponding to the logical block address in the main memory.
  • a solid state hard disk controller to allocate a physical page number to the logical block address, and store the physical page number in a third level corresponding to the logical block address in the main memory.
  • the processor is further configured to write data to be written into a storage space corresponding to the physical page number in a three-level mapping table corresponding to the logical block address in the main memory;
  • the memory includes the solid state hard disk and the main memory, and is configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
  • the processor in the third level mapping table corresponding to if the logical block address does not exist in the main memory And reading, according to the global level 2 mapping table, the level 3 mapping table in the solid state hard disk, and reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the Before the main memory, it is also used to:
  • the level 3 mapping table in the main memory reaches a preset threshold. If the preset threshold is reached, the cold data is removed from the main memory and written according to a preset cache rule. To the solid state hard disk, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory providing storage space.
  • the processor is configured to control a physical hard disk controller to allocate a physical address to the logical block address.
  • the processor after being used to write the physical page number into the solid state hard disk, further to:
  • the logical block address and the physical page number are updated in the level 2 mapping table and the level 1 mapping table.
  • the processor in the if the main memory does not exist, the level 3 mapping corresponding to the logical block address a table, according to the global level 2 mapping table indexing the level 3 mapping table in the solid state hard disk, reading and storing the level 3 mapping table in the solid state hard disk corresponding to the logical block address to the After the main memory, it is also used to:
  • control solid state hard disk controller After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a three-level mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the three-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number.
  • the eighth aspect provides an address mapping apparatus based on large-capacity solid-state storage, which includes:
  • a receiver that acquires a read command for reading data in the solid state hard disk, the read command carrying a logical block address of the data to be written;
  • a processor configured to query, by using a global level 2 mapping table in the main memory, a physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table is used Indexing the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;
  • the processor is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, index the solid state according to the global level 2 mapping table
  • the level 3 mapping table in the hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;
  • the processor is further configured to read the data from the physical page
  • the memory includes the solid state hard disk and the main memory, and is configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
  • the ninth aspect provides an address mapping apparatus based on large-capacity solid-state storage, which includes:
  • a receiver for obtaining a command for reading or writing data in the solid state hard disk, the command comprising a read command or a write command;
  • a processor configured to determine that the command is a read command or a write command
  • the processor is further configured to: if the command is a read command, the read command carries a logical block address, and in a main memory, through a global level 2 mapping table, querying the third level mapping table stored in the main memory a physical page number corresponding to the logical block address, where the global level 2 mapping table is used to index a level 3 mapping table in the main memory and a level 3 mapping table in the solid state hard disk;
  • the processor is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, index the solid state according to the global level 2 mapping table
  • the level 3 mapping table in the hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;
  • the processor is further configured to read the data from the physical page
  • the processor is further configured to: if the command is a write command, the write command carries a logical block address of the data to be written and the data to be written, and the query is performed according to the global level 2 mapping table.
  • a level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
  • the level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;
  • the processor is further configured to: if a level 3 mapping table corresponding to the logical block address does not exist in the main memory, index a level 3 mapping table in the solid state hard disk according to the global level 2 mapping table.
  • the third level mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;
  • the processor is further configured to control a solid state hard disk controller to allocate a physical page number to the logical block address, and store the physical page number in a third level corresponding to the logical block address in the main memory.
  • a solid state hard disk controller to allocate a physical page number to the logical block address, and store the physical page number in a third level corresponding to the logical block address in the main memory.
  • the processor is further configured to write data to be written into a storage space corresponding to the physical page number in a three-level mapping table corresponding to the logical block address in the main memory;
  • the memory includes the solid state hard disk and the main memory, and is configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
  • the processor if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, The global level 2 mapping table indexes the level 3 mapping table in the solid state hard disk, and reads and stores the level 3 mapping table in the solid state hard disk corresponding to the logical block address into the main memory.
  • the global level 2 mapping table indexes the level 3 mapping table in the solid state hard disk, and reads and stores the level 3 mapping table in the solid state hard disk corresponding to the logical block address into the main memory.
  • the level 3 mapping table in the main memory reaches a preset threshold. If the preset threshold is reached, the cold data is removed from the main memory and written according to a preset cache rule. To the solid state hard disk, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory providing storage space.
  • the processor in the control solid state disk controller, assigns a physical page number to the logical block address After the physical page number is stored in the three-level mapping table corresponding to the logical block address in the main memory, the method further includes:
  • the processor after the writing the physical page number into the solid state hard disk, further includes:
  • the logical block address and the physical page number are updated in the level 2 mapping table and the level 1 mapping table.
  • the processor does not exist in the main memory
  • the level 3 mapping table corresponding to the logical block address according to the global level 2 mapping table, indexing the solid state hard disk corresponding to the logical block address in the level 3 mapping table in the solid state hard disk.
  • control solid state hard disk controller After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a three-level mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the three-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number.
  • the present invention reads the 3-level mapping table corresponding to the logical block address in the 2-level mapping table by reading the logical block address of the data to be read or written, and reads the above-mentioned 3-level mapping table from the 3-level mapping table.
  • Data or a multi-level sequential mapping scheme in which the data is written in a physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory
  • the level 3 mapping table does not store the data to be read or to be written, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory.
  • the solution does not need to traverse directly from the 3-level mapping table of the SSD to query the physical page number corresponding to the logical block address, and the main memory only has a 3-level mapping table corresponding to the hot data that is frequently accessed.
  • the mapping granularity is small, it needs to consume a large amount of main storage space. It also avoids the performance instability caused by the data involved in the block-level mapping. Therefore, the mapping relationship is simplified to reduce the consumption of the main storage space. And maintain the effect of stable performance.
  • FIG. 1 is a flowchart of an address mapping method based on large-capacity solid-state storage according to an embodiment of the present invention
  • FIG. 2 is a flowchart of another address mapping method based on large-capacity solid-state storage according to an embodiment of the present invention
  • FIG. 3 is a flowchart of another method for address mapping based on large-capacity solid-state storage according to an embodiment of the present invention
  • FIG. 4 is a flowchart of another address mapping method based on large-capacity solid-state storage according to an embodiment of the present invention.
  • FIG. 5 is a structural diagram of an apparatus for address mapping based on large-capacity solid-state storage according to an embodiment of the present disclosure
  • FIG. 6 is a structural diagram of another apparatus for address mapping based on large-capacity solid-state storage according to an embodiment of the present disclosure
  • FIG. 7 is a structural diagram of another apparatus for address mapping based on large-capacity solid-state storage according to an embodiment of the present disclosure.
  • FIG. 8 is a structural diagram of another apparatus for address mapping based on large-capacity solid-state storage according to an embodiment of the present disclosure
  • FIG. 9 is an address mapping table based on large-capacity solid-state storage according to an embodiment of the present invention.
  • FIG. 10 is another address mapping table based on large-capacity solid-state storage according to an embodiment of the present invention.
  • an address mapping method based on large-capacity solid-state storage includes:
  • Step S101 acquiring a write command for writing data to the solid state hard disk, where the write command carries the logical block address of the data to be written and the data to be written;
  • Step S102 querying, according to the global level 2 mapping table, the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 in the main memory.
  • Mapping table and 3-level mapping in SSD a table of the third level mapping table, configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;
  • Step S103 if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the level 3 mapping table in the solid state hard disk according to the global level 2 mapping table, a level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;
  • Step S104 the SSD controller is configured to allocate a physical page number to the logical block address, and store the physical page number in a three-level mapping table corresponding to the logical block address in the main memory.
  • Step S105 in the three-level mapping table corresponding to the logical block address in the main memory, write the data to be written into the storage space corresponding to the physical page number.
  • the beneficial effect is: looking up the level 3 mapping table corresponding to the logical block address in the level 2 mapping table according to the logical block address of the data to be read or written, and reading out the level 3 mapping table from the level 3 mapping table
  • the data or the multi-level sequential mapping scheme in which the data is written in the physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory
  • the level 3 mapping table does not store the data to be read or write, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory, thereby solving the problem of mass storage.
  • Another address mapping method based on large-capacity solid-state storage includes:
  • Step S201 acquiring a write command for writing data to the solid state hard disk, where the write command carries the logical block address of the data to be written and the data to be written;
  • Step S202 querying, according to the global level 2 mapping table, the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the main memory.
  • a level 3 mapping table and a level 3 mapping table in the solid state hard disk wherein the level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;
  • Step S203 if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the level 3 mapping table in the solid state hard disk according to the global level 2 mapping table, a level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;
  • Step S204 controlling the SSD controller to allocate a physical page number for the logical block address, and the physical page The number is stored in a three-level mapping table corresponding to the logical block address in the main memory;
  • Step S205 in the three-level mapping table corresponding to the logical block address in the main memory, write the data to be written into the storage space corresponding to the physical page number.
  • step S206 if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the level 3 mapping in the solid state hard disk according to the global level 2 mapping table In the table, before the third level mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory, the method further includes:
  • the level 3 mapping table in the main memory reaches a preset threshold. If the preset threshold is reached, the cold data is removed from the main memory and written according to a preset cache rule. To the solid state hard disk, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory providing storage space.
  • step S207 the control solid-state hard disk controller allocates a physical page number for the logical block address, and stores the physical page number in the third corresponding to the logical block address in the main memory.
  • the level mapping table it also includes:
  • step S208 further includes:
  • the logical block address and the physical page number are updated in the level 2 mapping table and the level 1 mapping table.
  • step S209 if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the level 3 mapping in the solid state hard disk according to the global level 2 mapping table In the table, after reading and storing the 3-level mapping table in the SSD corresponding to the logical block address in the main storage, the method further includes:
  • control solid state hard disk controller After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a three-level mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the three-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number.
  • the beneficial effect is: looking up the level 3 mapping table corresponding to the logical block address in the level 2 mapping table according to the logical block address of the data to be read or written, and reading out the level 3 mapping table from the level 3 mapping table
  • the level 3 mapping table in the middle does not store the data to be read or written
  • the 3-level mapping table corresponding to the logical block address in the SSD is written into the main memory, thereby solving the problem that the page-level mapping needs a large amount of main storage space due to the small mapping granularity in the case of large-capacity storage. It also avoids the performance instability problem caused by the data involved in the block-level mapping block operation, thereby simplifying the mapping relationship to reduce the consumption of the main memory space and maintaining the performance stability.
  • Another address mapping method based on large-capacity solid-state storage includes:
  • Step S301 acquiring a read command for reading data in the solid state hard disk, where the read command carries a logical block address of the data to be written;
  • step S302 the physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory is queried through the global level 2 mapping table in the main memory, and the global level 2 mapping table is used for indexing.
  • Step S303 if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, indexing the solid state hard disk according to the global level 2 mapping table. a level 3 mapping table, the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address are read out;
  • Step S304 reading the data from the physical page.
  • the beneficial effect is: looking up the level 3 mapping table corresponding to the logical block address in the level 2 mapping table according to the logical block address of the data to be read or written, and reading out the level 3 mapping table from the level 3 mapping table
  • the data or the multi-level sequential mapping scheme in which the data is written in the physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory
  • the level 3 mapping table does not store the data to be read or write, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory, thereby solving the problem of mass storage.
  • Another address mapping method based on large-capacity solid-state storage includes:
  • Step S401 acquiring a command for reading or writing data in the solid state hard disk, where the command includes a read command or a write command;
  • Step S402 determining that the command is a read command or a write command
  • Step S403 if the command is a read command, the read command carries a logical block address, and passes through the main memory.
  • a level 2 mapping table which is configured to query a physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table is used to index level 3 in the main memory. Mapping table and level 3 mapping table in SSD;
  • Step S404 if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, indexing the solid state hard disk according to the global level 2 mapping table. a level 3 mapping table, the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address are read out;
  • Step S405 reading the data from the physical page
  • Step S406 if the command is a write command, the write command carries a logical block address of the data to be written and the data to be written, and queries the logical block address according to the global level 2 mapping table.
  • the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk, the level 3 mapping table a mapping relationship for storing the logical block address and a physical page number corresponding to the logical block address;
  • Step S407 if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the level 3 mapping table in the solid state hard disk according to the global level 2 mapping table, a level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;
  • Step S408 the SSD controller is configured to allocate a physical page number to the logical block address, and store the physical page number in a three-level mapping table corresponding to the logical block address in the main memory.
  • Step S409 in the three-level mapping table corresponding to the logical block address in the main memory, write the data to be written into the storage space corresponding to the physical page number.
  • the beneficial effect is: looking up the level 3 mapping table corresponding to the logical block address in the level 2 mapping table according to the logical block address of the data to be read or written, and reading out the level 3 mapping table from the level 3 mapping table
  • the data or the multi-level sequential mapping scheme in which the data is written in the physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory
  • the level 3 mapping table does not store the data to be read or write, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory, thereby solving the problem of mass storage.
  • another address mapping device based on large-capacity solid-state storage includes:
  • the obtaining module 501 is configured to obtain a write command for writing data to the solid state hard disk, where the write command carries the logical block address of the data to be written and the data to be written;
  • the processing module 502 is configured to query, according to the global level 2 mapping table, the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the a level 3 mapping table in the main memory and a level 3 mapping table in the solid state hard disk, wherein the level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;
  • the processing module 502 is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the level 3 mapping in the solid state hard disk according to the global level 2 mapping table In the table, the level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;
  • the processing module 502 is further configured to control the SSD controller to allocate a physical page number to the logical block address, and store the physical page number in the third corresponding to the logical block address in the main memory.
  • Level mapping table
  • the processing module 502 is further configured to: in the three-level mapping table corresponding to the logical block address in the main memory, write data to be written into a storage space corresponding to the physical page number;
  • the storage module 503 includes the solid state hard disk 505 module and the main memory module 504, configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk. .
  • the obtaining module 501 is connected to the processing module 502 and the storage module 503 via a bus 506.
  • processing module 502 is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the solid state according to the global level 2 mapping table
  • the level 3 mapping table in the hard disk is used to read and store the level 3 mapping table in the solid state hard disk corresponding to the logical block address before the main memory.
  • the level 3 mapping table in the main memory reaches a preset threshold. If the preset threshold is reached, the cold data is removed from the main memory and written according to a preset cache rule. To the solid state hard disk, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory providing storage space.
  • processing module 502 is further configured to: control a solid state hard disk controller to allocate a physical page number for the logical block address, and store the physical page number in the logical area of the main memory.
  • control a solid state hard disk controller to allocate a physical page number for the logical block address, and store the physical page number in the logical area of the main memory.
  • processing module 502 is further configured to write the physical page number into the solid state hard disk. Later, it is also used to:
  • the logical block address and the physical page number are updated in the level 2 mapping table and the level 1 mapping table.
  • the processing module 502 if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the solid state hard disk according to the global level 2 mapping table In the level 3 mapping table, after the level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory, it is further used to:
  • control solid state hard disk controller After the control solid state hard disk controller allocates a physical page number to the logical block address, and stores the physical page number in a three-level mapping table corresponding to the logical block address in the main memory, And decrementing a counter corresponding to the logical block address in the three-level mapping table to confirm that the logical block address of the data to be written obtains a corresponding physical page number;
  • the storage module 503 includes the solid state hard disk 505 module and the main memory module 504, configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk. .
  • the obtaining module 501 is connected to the processing module 502 and the storage module 503 via a bus 506.
  • the beneficial effect is: looking up the level 3 mapping table corresponding to the logical block address in the level 2 mapping table according to the logical block address of the data to be read or written, and reading out the level 3 mapping table from the level 3 mapping table
  • the data or the multi-level sequential mapping scheme in which the data is written in the physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory
  • the level 3 mapping table does not store the data to be read or write, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory, thereby solving the problem of mass storage.
  • another address mapping device based on large-capacity solid-state storage includes:
  • the obtaining module 501 is configured to acquire a read command for reading data in the solid state hard disk, where the read command carries a logical block address of the data to be written;
  • the processing module 502 is configured to query, by using a global level 2 mapping table in the main memory, a physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table Used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;
  • the processing module 502 is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, according to the global level 2 mapping table index
  • the level 3 mapping table in the solid state hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;
  • the processing module 502 is further configured to read the data from the physical page;
  • the storage module 503 includes the solid state hard disk 505 module and the main memory module 504, configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk. .
  • the obtaining module 501 is connected to the processing module 502 and the storage module 503 via a bus 506.
  • the beneficial effect is: looking up the level 3 mapping table corresponding to the logical block address in the level 2 mapping table according to the logical block address of the data to be read or written, and reading out the level 3 mapping table from the level 3 mapping table
  • the data or the multi-level sequential mapping scheme in which the data is written in the physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory
  • the level 3 mapping table does not store the data to be read or write, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory, thereby solving the problem of mass storage.
  • another address mapping device based on large-capacity solid-state storage includes:
  • the obtaining module 501 is configured to acquire a command for reading or writing data in the solid state hard disk, where the command includes a read command or a write command;
  • the processing module 502 is configured to determine that the command is a read command or a write command
  • the processing module 502 is further configured to: if the command is a read command, the read command carries a logical block address, and in a main memory, the global level 2 mapping table is used to query the storage in the level 3 mapping table in the main memory.
  • the physical page number corresponding to the logical block address, the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;
  • the processing module 502 is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, according to the global level 2 mapping table index
  • the level 3 mapping table in the solid state hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;
  • the processing module 502 is further configured to read the data from the physical page;
  • the processing module 502 is further configured to: if the command is a write command, the write command carries a logical block address to be written data and the to-be-written data, and the query is performed according to the global level 2 mapping table.
  • the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
  • the level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;
  • the processing module 502 is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the level 3 mapping in the solid state hard disk according to the global level 2 mapping table In the table, the level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;
  • the processing module 502 is further configured to control the SSD controller to allocate a physical page number to the logical block address, and store the physical page number in the main memory.
  • Level mapping table
  • the processing module 502 is further configured to write the data to be written into the storage space corresponding to the physical page number in the level 3 mapping table corresponding to the logical block address in the main memory;
  • the storage module 503 includes the solid state hard disk 505 module and the main memory module 504, configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk. .
  • the obtaining module 501 is connected to the processing module 502 and the storage module 503 via a bus 506.
  • the beneficial effect is: looking up the level 3 mapping table corresponding to the logical block address in the level 2 mapping table according to the logical block address of the data to be read or written, and reading out the level 3 mapping table from the level 3 mapping table
  • the data or the multi-level sequential mapping scheme in which the data is written in the physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory
  • the level 3 mapping table does not store the data to be read or write, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory, thereby solving the problem of mass storage.
  • an address mapping device based on a large-capacity solid-state storage includes:
  • the receiver 601 acquires a write command for writing data to the solid state hard disk, where the write command carries the logical block address of the data to be written and the data to be written;
  • the processor 602 is configured to query, according to the global level 2 mapping table, the primary corresponding to the logical block address And the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk, where the level 3 mapping table is used to store the a mapping relationship between a logical block address and a physical page number corresponding to the logical block address;
  • the processor 602 is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the level 3 mapping in the solid state hard disk according to the global level 2 mapping table. In the table, the level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;
  • the processor 602 is further configured to control the SSD controller to allocate a physical page number to the logical block address, and store the physical page number in the third corresponding to the logical block address in the main memory.
  • Level mapping table
  • the processor 602 is further configured to write data to be written into a storage space corresponding to the physical page number in a three-level mapping table corresponding to the logical block address in the main memory;
  • the memory 603 includes the solid state hard disk 605 and the main memory 604, configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;
  • the receiver 601 is connected to the processor 602 and the memory 603 via a bus 606.
  • the beneficial effect is: looking up the level 3 mapping table corresponding to the logical block address in the level 2 mapping table according to the logical block address of the data to be read or written, and reading out the level 3 mapping table from the level 3 mapping table
  • the data or the multi-level sequential mapping scheme in which the data is written in the physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory
  • the level 3 mapping table does not store the data to be read or write, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory, thereby solving the problem of mass storage.
  • the processor 602 is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the solid state according to the global level 2 mapping table The level 3 mapping table in the hard disk is used to read and store the level 3 mapping table in the solid state hard disk corresponding to the logical block address before the main memory.
  • the level 3 mapping table in the main memory reaches a preset threshold. If the preset threshold is reached, the cold data is removed from the main memory and written according to a preset cache rule. To the solid state hard disk, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory providing storage space.
  • the processor 602 is further configured to: control a solid state hard disk controller to allocate a physical page number for the logical block address, and store the physical page number in the logical area of the main memory.
  • Three-level mapping corresponding to the block address it also includes:
  • processor 602 is further configured to write the physical page number into the solid state hard disk
  • the processor 602 is further configured to:
  • the logical block address and the physical page number are updated in the level 2 mapping table and the level 1 mapping table.
  • the processor 602 if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, indexing the solid state hard disk according to the global level 2 mapping table In the level 3 mapping table, after the level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory, it is further used to:
  • Another address mapping device based on large-capacity solid-state storage includes:
  • the receiver 601 is configured to acquire a read command for reading data in the solid state hard disk, where the read command carries a logical block address of the data to be written;
  • the processor 602 is configured to query, by using a global level 2 mapping table in the main memory, a physical page number corresponding to the logical block address stored in the level 3 mapping table in the main memory, where the global level 2 mapping table Used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;
  • the processor 602 is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, according to the global level 2 mapping table index
  • the level 3 mapping table in the solid state hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;
  • the processor 602 is further configured to read the data from the physical page;
  • the memory 603 includes the solid state hard disk 605 and the main memory 604, configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;
  • the receiver 601 is connected to the processor 602 and the memory 603 via a bus 606.
  • the beneficial effect is: looking up the level 3 mapping table corresponding to the logical block address in the level 2 mapping table according to the logical block address of the data to be read or written, and reading out the level 3 mapping table from the level 3 mapping table
  • the data or the multi-level sequential mapping scheme in which the data is written in the physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory
  • the level 3 mapping table does not store the data to be read or write, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory, thereby solving the problem of mass storage.
  • another address mapping device based on large-capacity solid-state storage includes:
  • the receiver 601 acquires a command for reading or writing data in the solid state hard disk, and the command includes a read command or a write command;
  • the processor 602 is configured to determine that the command is a read command or a write command.
  • the processor 602 is further configured to: if the command is a read command, the read command carries a logical block address, and in a main memory, through a global level 2 mapping table, querying the storage in the level 3 mapping table in the main memory.
  • the physical page number corresponding to the logical block address, the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;
  • the processor 602 is further configured to: if the physical page number corresponding to the logical block address is not stored in the level 3 mapping table in the main memory, according to the global level 2 mapping table index
  • the level 3 mapping table in the solid state hard disk reads the logical block address stored in the level 3 mapping table in the solid state hard disk and a physical page number corresponding to the logical block address;
  • the processor 602 is further configured to read the data from the physical page;
  • the processor 602 is further configured to: if the command is a write command, the write command carries a logical block address to be written data and the to-be-written data, and the query is performed according to the global level 2 mapping table.
  • the level 3 mapping table in the main memory corresponding to the logical block address, where the global level 2 mapping table is used to index the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk.
  • the level 3 mapping table is configured to store a mapping relationship between the logical block address and a physical page number corresponding to the logical block address;
  • the processor 602 is further configured to: if the level 3 mapping table corresponding to the logical block address does not exist in the main memory, index the level 3 mapping in the solid state hard disk according to the global level 2 mapping table. In the table, the level 3 mapping table in the solid state hard disk corresponding to the logical block address is read out and stored in the main memory;
  • the processor 602 is further configured to control the SSD controller to allocate a physical page number to the logical block address, and store the physical page number in the third corresponding to the logical block address in the main memory.
  • Level mapping table
  • the processor 602 is further configured to write data to be written into a storage space corresponding to the physical page number in a three-level mapping table corresponding to the logical block address in the main memory;
  • the memory 603 includes the solid state hard disk 605 and the main memory 604, configured to store the global level 2 mapping table, and store the level 3 mapping table in the main memory and the level 3 mapping table in the solid state hard disk;
  • the receiver 601 is connected to the processor 602 and the memory 603 via a bus 606.
  • the beneficial effect is: looking up the level 3 mapping table corresponding to the logical block address in the level 2 mapping table according to the logical block address of the data to be read or written, and reading out the level 3 mapping table from the level 3 mapping table
  • the data or the multi-level sequential mapping scheme in which the data is written in the physical page number allocated for the logical block address, since only the index of the level 3 mapping table is stored in the level 2 mapping table, and only in the main memory
  • the level 3 mapping table does not store the data to be read or write, the level 3 mapping table corresponding to the logical block address in the solid state hard disk is written into the main memory, thereby solving the problem of mass storage.
  • FIG. 7 is a structural diagram of another apparatus for address mapping based on large-capacity solid-state storage according to an embodiment of the present invention.
  • the apparatus is configured to perform the foregoing various address mapping methods based on large-capacity solid-state storage in the present application.
  • the device includes: a server 701, a solid state hard disk 702, a bus 707, the server 701 includes a processor 702 and a main memory 703, the solid state hard disk includes a solid state hard disk control right 705 and a memory chip 706, the solid state hard disk 704, processing Both the 702 and the main memory 703 are connected to the bus 707.
  • FIG. 8 is a structural diagram of another apparatus for address mapping based on large-capacity solid-state storage according to an embodiment of the present invention.
  • the apparatus is configured to perform the foregoing various address mapping methods based on large-capacity solid-state storage in the present application.
  • the device includes: a server 801, a solid state hard disk 802, a bus 807, and a receiver 808.
  • the server 801 includes a processor 802 and a main memory 803.
  • the solid state hard disk includes a solid state hard disk control right 805 and a memory chip 806.
  • the solid state hard disk 804, the processor 802, the main memory 803, and the receiver 808 are both connected to the bus 807, and the receiver 808 is connected to the solid state hard disk 804.
  • FIG. 9 is an address mapping table based on large-capacity solid-state storage according to an embodiment of the present invention.
  • Level 2 mapping table in the main memory by the level 1 mapping table in the main memory, and indexing the level 3 mapping table in the main memory by the level 2 mapping table in the main memory according to the logical block address (LBA), if The level 2 mapping table in the main memory is displayed as TRN as shown in the figure, and N is a positive integer. Then the level 3 mapping table in the main memory is directly continued to find the physical page number (PPN), and there is no need to continue indexing the solid state hard disk.
  • PPN physical page number
  • the level 3 mapping table if it is displayed as null as shown in the level 2 mapping table in the main memory, it means that there is no physical page number to be searched in the main memory, and it is necessary to continue indexing the level 3 in the solid state hard disk. Map the table to find the PPN corresponding to the logical block address.
  • FIG. 10 Another address mapping table based on large-capacity solid-state storage provided by an embodiment of the present invention.
  • LBA logical block address
  • the content 1 corresponding to the fourth entry of the main storage level 3 mapping table is the PPN address of the data to be searched, and the upper layer operating system is fed back, and the read data is obtained according to the PPN; If the table is missing, the level 3 mapping table corresponding to the logical block address in the SSD is found according to the address information of the level 3 table in the main memory mapping table, and is stored in the main memory, and the PPN is fed back to the upper operating system.
  • LBA logical block address
  • LBA 8 ⁇ 10 ⁇ 12
  • the index is directly indexed into the main memory.
  • the mapping relationship 13-J (LBA-PPN) is added, and the newly obtained PPN is added. Feedback to the upper operating system.
  • the present invention can be implemented by various embodiments, and the embodiments of the present invention can be implemented by specific software and hardware components, and those skilled in the art can think that various software or hardware combinations can also be applied to implement the embodiments of the present invention.
  • the above specific operations performed by hardware can also be implemented by software.

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Abstract

一种基于大容量固态存储的地址映射方法，其特征在于，包括：获取用于将数据写入固态硬盘的写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址(101)；根据全局2级映射表，查询所述逻辑区块地址所对应的主存中的3级映射表(S102)；如果主存中不存在所述逻辑区块地址所对应的3级映射表，则根据全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到主存中(S103)；控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中逻辑区块地址所对应的3级映射表中(S104)；将待写入数据写入所述物理页号(S105)。

Description

一种基于大容量固态存储的地址映射方法及装置 技术领域
本发明涉及电子通信技术领域，尤其涉及一种一种基于大容量固态存储的地址映射方法及装置。
背景技术
存储领域常用的数据载体是机械硬盘和固态硬盘(SSD)，固态硬盘具有体积小，能耗低，抗干扰能力强，寻址时间极小，每秒进行读写操作的次数(IOPS)高等特点，相较于传统磁盘，flash等固态硬盘存储可以做到微秒级的的延迟，而传统磁盘智能做到毫秒级延迟。但是，由于flash等固态硬盘本身(1)修改数据不能直接在原数据上重写，导致非定点更新；(2)数据读写的基本单位是页，而擦除的基本单位是块；(3)由于寿命问题，每个擦除块只能被擦除有限的次数等固有特性，所以基于flash等固态硬盘的存储***，需要模拟读写机械硬盘的传统块设备的行为，对***屏蔽固态驱动器的特性。
闪存转换层(FTL)算法，其实就是一种逻辑区块地址(LBA)到物理页号(PPN)的映射。当文件***发送指令要写入或者更新一个特定的逻辑页，闪存转换层(FTL)实际上就是把数据写入到一个不同的空闲物理页并更新映射表，并把这个页上包含的旧数据置为无效。正是因为闪存转换层(FTL)的存在，操作***才能把当成硬盘驱动器那样的操作，因此，闪存转换层(FTL)算法的性能也就直接影响flash等固态硬盘的性能表现。
早期的flash等固态硬盘容量较小，每个芯片的页数有限，所述小粒度的页级映射策略，是一种高效灵活的映射方法，可以把任何一个逻辑页映射到任意的物理页，每个映射关系对应一个映射条目。但是由于映射的粒度小，当flash等固态硬盘容量较大时，需要消耗大量的内存来存储映射表信息，不适宜大容量的固态存储***。
使用块级映射地址的转换，通过地址映射将逻辑块号转化成物理块号，根据逻辑地址中的块号偏移将数据写入物理块中具有相同偏移的物理页。由于采用粗粒度的映射，映射表显著减少。但是假如N个页面组成一个块，跟基本的页映射算法相比，块映射的映射表数量降低为原来的1/N，使得整个映射表能够完全存储在主存RAM中。块级映射方案中，替代块的空间利用率很低，造成存储空间的浪费；另一方面，当进行flash等固态硬盘的擦除操作时，需要大量的数据擦除和歉意操作，***运行一段时间需要频繁的垃圾回收，造成***的性能抖动。
发明内容
本发明实施例提供一种基于大容量固态存储的地址映射方法及装置,通过根据将要被读或写入的数据的逻辑区块地址，在2级映射表中查找所述逻辑区块地址对应的3级映射表，从所述3级映射表中读出所述数据或者在为所述逻辑区块地址分配的物理页号中写入所述数据的多级顺序映射方案，由于在2级映射表中仅存储3级映射表的索引，而且只有在主存中的3级映射表没有存储所述待读或待写入数据时，才将固态硬盘中的所述逻辑区块地址所对应的3级映射表写入主存，从而解决了在大容量存储的情形下页级映射由于映射粒度小需要消耗大量主存存储空间的问题，也避免了块级映射进行块操作时涉及数据较多导致的性能不稳定问题，从而达到了简化映射关系以减少主存存储空间的消耗并且维持性能稳定的效果。
第一方面提供一种基于大容量固态存储的地址映射方法，其特征在于，包括：
获取用于将数据写入固态硬盘的写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址；
根据所述全局2级映射表，查询所述逻辑区块地址所对应的主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述主存中3级映射表和固态硬盘中的3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中；
在所述主存中所述逻辑区块地址所对应的3级映射表中，将待写入数据写入所述物理页号所对应的存储空间。
在第一方面第一种可能的实现方式中，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之前，其特征在于，还包括：
判断所述主存中存储所述3级映射表的空间是否到达预设阈值，在达到所述预设阈值 的情况下，则根据预设缓存规则将冷数据从所述主存移出并写入到所述固态硬盘中，以为将所述固态硬盘中的逻辑区块地址所对应的3级映射表写入所述主存提供存储空间。
结合第一方面或第一方面第一种可能的实现方式，在第二种可能的实现方式中，在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中之后，还包括：
将所述物理页号写入所述固态硬盘中；或，将所述逻辑区块地址与所述物理页号写入主存中后，将所述物理页号写入所述固态硬盘中。
结合第一方面第二种可能的实现方式，在第三种可能的实现方式中，在所述将所述物理页号写入所述固态硬盘中之后，还包括：
将所述逻辑区块地址与所述物理页号在所述2级映射表与1级映射表中进行更新。
结合第一方面至第一方面第三种可能的实现方式，在第四种可能的实现方式中，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之后，还包括：
将所述3级映射表中的所述逻辑区块地址所对应的计数器加一；
在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中之后，对所述三级映射表中的所述逻辑区块地址所对应的计数器减一，以确认所述待写入数据的所述逻辑区块地址获得了对应的物理页号。
第二方面提供一种一种基于大容量固态存储的地址映射方法，其特征在于，包括：
获取用于读固态硬盘中数据的读命令，所述读命令携带待写入数据的逻辑区块地址；
在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
从所述物理页上读取所述数据。
第三方面提供一种基于大容量固态存储的地址映射方法，其特征在于，包括：
获取用于读或写固态硬盘中数据的命令，所述命令包括读命令或写命令；
判断所述命令是读命令或写命令；
如果所述命令是读命令，所述读命令携带逻辑区块地址，在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
从所述物理页上读取所述数据；
如果所述命令是写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址，根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中；
在所述主存中所述逻辑区块地址所对应的三级映射表中，将待写入数据写入所述物理页号所对应的存储空间。
在第三方面第一种可能的实现方式中，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之前，其特征在于，还包括：
判断所述主存中存储所述3级映射表的空间是否到达预设阈值，在达到所述预设阈值的情况下，则根据预设缓存规则将冷数据从所述主存移出并写入到所述固态硬盘中，以为将所述固态硬盘中的逻辑区块地址所对应的3级映射表写入所述主存提供存储空间。
结合第三方面或第三方面第一种可能的实现方式，在第二种可能的实现方式中，在所述控 制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，还包括：
将所述物理页号写入所述固态硬盘中；或，将所述逻辑区块地址与所述物理页号写入主存中后，将所述物理页号写入所述固态硬盘中。
结合第三方面第二种可能的实现方式，在第三种可能的实现方式中，在所述将所述物理页号写入所述固态硬盘中之后，还包括：
将所述逻辑区块地址与所述物理页号在所述2级映射表与1级映射表中进行更新。
结合第三方面至第三方面第三种可能的实现方式，在第四种可能的实现方式中，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之后，还包括：
将所述3级映射表中的所述逻辑区块地址所对应的计数器加一；
在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，对所述三级映射表中的所述逻辑区块地址所对应的计数器减一，以确认所述待写入数据的所述逻辑区块地址获得了对应的物理页号。
第四方面提供一种基于大容量固态存储的地址映射装置，其特征在于，包括：
获取模块，获取用于将数据写入固态硬盘的写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址；
处理模块，用于根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
所述处理模块，还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
所述处理模块，还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中；
所述处理模块，还用于在所述主存中所述逻辑区块地址所对应的三级映射表中，将待 写入数据写入所述物理页号所对应的存储空间；
存储模块，包括所述固态硬盘模块与所述主存模块，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
结合第四方面，在第四方面第一种可能的实现方式中，所述处理模块，在所述还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之前，还用于：
判断所述主存中存储所述3级映射表的空间是否到达预设阈值，在达到所述预设阈值的情况下，则根据预设缓存规则将冷数据从所述主存移出并写入到所述固态硬盘中，以为将所述固态硬盘中的逻辑区块地址所对应的3级映射表写入所述主存提供存储空间。
结合第四方面第一种可能的实现方式，在第四方面第二种可能的实现方式中，所述处理模块，在所述还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，还包括：
将所述物理页号写入所述固态硬盘中；或，将所述逻辑区块地址与所述物理页号写入主存中后，将所述物理页号写入所述固态硬盘中。
结合第四方面第二种可能的实现方式，在第三种可能的实现方式中，所述处理模块，在所述还用于将所述物理页号写入所述固态硬盘中之后，还用于：
将所述逻辑区块地址与所述物理页号在所述2级映射表与1级映射表中进行更新。
结合第四方面第三种可能的实现方式，在第四种可能的实现方式中，所述处理模块，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之后，还用于：
将所述3级映射表中的所述逻辑区块地址所对应的计数器加一；
在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，对所述三级映射表中的所述逻辑区块地址所对应的计数器减一，以确认所述待写入数据的所述逻辑区块地址获得了对应的物理页号。
第五方面提供一种基于大容量固态存储的地址映射装置，其特征在于，包括：
获取模块，获取用于读固态硬盘中数据的读命令，所述读命令携带待写入数据的逻辑 区块地址；
处理模块，用于在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
所述处理模块，还用于如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
所述处理模块，还用于从所述物理页上读取所述数据；
存储模块，包括所述固态硬盘模块与所述主存模块，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
第六方面提供一种基于大容量固态存储的地址映射装置，其特征在于，包括：获取模块，获取用于读或写固态硬盘中数据的命令，所述命令包括读命令或写命令；
处理模块，用于判断所述命令是读命令或写命令；
所述处理模块，还用于如果所述命令是读命令，所述读命令携带逻辑区块地址，在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
所述处理模块，还用于如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
所述处理模块，还用于从所述物理页上读取所述数据；
所述处理模块，还用于如果所述命令是写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址，根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
所述处理模块，还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表， 则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
所述处理模块，还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中；
所述处理模块，还用于在所述主存中所述逻辑区块地址所对应的三级映射表中，将待写入数据写入所述物理页号所对应的存储空间；
存储模块，包括所述固态硬盘模块与所述主存模块，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
结合第六方面，在第六方面第一种可能的实现方式中，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之前，其特征在于，还包括：
判断所述主存中存储所述3级映射表的空间是否到达预设阈值，在达到所述预设阈值的情况下，则根据预设缓存规则将冷数据从所述主存移出并写入到所述固态硬盘中，以为将所述固态硬盘中的逻辑区块地址所对应的3级映射表写入所述主存提供存储空间。
结合第六方面或第六方面第一种可能的实现方式，在第二种可能的实现方式中，所述处理模块，在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，还包括：
将所述物理页号写入所述固态硬盘中；或，将所述逻辑区块地址与所述物理页号写入主存中后，将所述物理页号写入所述固态硬盘中。
结合第六方面第二种可能的实现方式，在第三种可能的实现方式中，所述处理模块，在所述将所述物理页号写入所述固态硬盘中之后，还包括：
将所述逻辑区块地址与所述物理页号在所述2级映射表与1级映射表中进行更新。
结合第六方面至第六方面第三种可能的实现方式，在第四种可能的实现方式中，所述处理模块，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之后，还包括：
将所述3级映射表中的所述逻辑区块地址所对应的计数器加一；
在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，对所述三级映射表中的所述逻辑区块地址所对应的计数器减一，以确认所述待写入数据的所述逻辑区块地址获得了对应的物理页号。
第七方面提供一种基于大容量固态存储的地址映射装置，其特征在于，包括：
接收器，获取用于将数据写入固态硬盘的写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址；
处理器，用于根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
所述处理器，还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
所述处理器，还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中；
所述处理器，还用于在所述主存中所述逻辑区块地址所对应的三级映射表中，将待写入数据写入所述物理页号所对应的存储空间；
存储器，包括所述固态硬盘与所述主存，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
结合第七方面，在第七方面第一种可能的实现方式中，所述处理器，在所述还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之前，还用于：
判断所述主存中存储所述3级映射表的空间是否到达预设阈值，在达到所述预设阈值的情况下，则根据预设缓存规则将冷数据从所述主存移出并写入到所述固态硬盘中，以为将所述固态硬盘中的逻辑区块地址所对应的3级映射表写入所述主存提供存储空间。
结合第七方面第一种可能的实现方式，在第七方面第二种可能的实现方式中，所述处理器，在所述还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物 理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，还包括：
将所述物理页号写入所述固态硬盘中；或，将所述逻辑区块地址与所述物理页号写入主存中后，将所述物理页号写入所述固态硬盘中。
结合第七方面第二种可能的实现方式，在第三种可能的实现方式中，所述处理器，在所述还用于将所述物理页号写入所述固态硬盘中之后，还用于：
将所述逻辑区块地址与所述物理页号在所述2级映射表与1级映射表中进行更新。
结合第七方面第三种可能的实现方式，在第四种可能的实现方式中，所述处理器，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之后，还用于：
将所述3级映射表中的所述逻辑区块地址所对应的计数器加一；
在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，对所述三级映射表中的所述逻辑区块地址所对应的计数器减一，以确认所述待写入数据的所述逻辑区块地址获得了对应的物理页号。
第八方面提供一种基于大容量固态存储的地址映射装置，其特征在于，包括：
接收器，获取用于读固态硬盘中数据的读命令，所述读命令携带待写入数据的逻辑区块地址；
处理器，用于在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
所述处理器，还用于如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
所述处理器，还用于从所述物理页上读取所述数据；
存储器，包括所述固态硬盘与所述主存，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
第九方面提供一种基于大容量固态存储的地址映射装置，其特征在于，包括：
接收器，获取用于读或写固态硬盘中数据的命令，所述命令包括读命令或写命令；
处理器，用于判断所述命令是读命令或写命令；
所述处理器，还用于如果所述命令是读命令，所述读命令携带逻辑区块地址，在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
所述处理器，还用于如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
所述处理器，还用于从所述物理页上读取所述数据；
所述处理器，还用于如果所述命令是写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址，根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
所述处理器，还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
所述处理器，还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中；
所述处理器，还用于在所述主存中所述逻辑区块地址所对应的三级映射表中，将待写入数据写入所述物理页号所对应的存储空间；
存储器，包括所述固态硬盘与所述主存，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
结合第九方面，在第九方面第一种可能的实现方式中，所述处理器，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之前，其特征在于，还包括：
判断所述主存中存储所述3级映射表的空间是否到达预设阈值，在达到所述预设阈值的情况下，则根据预设缓存规则将冷数据从所述主存移出并写入到所述固态硬盘中，以为将所述固态硬盘中的逻辑区块地址所对应的3级映射表写入所述主存提供存储空间。
结合第九方面或第九方面第一种可能的实现方式，在第二种可能的实现方式中，所述处理器，在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，还包括：
将所述物理页号写入所述固态硬盘中；或，将所述逻辑区块地址与所述物理页号写入主存中后，将所述物理页号写入所述固态硬盘中。
结合第九方面第二种可能的实现方式，在第三种可能的实现方式中，所述处理器，在所述将所述物理页号写入所述固态硬盘中之后，还包括：
将所述逻辑区块地址与所述物理页号在所述2级映射表与1级映射表中进行更新。
结合第九方面至第九方面第三种可能的实现方式中的任一可能的实现方式，在第四种可能的实现方式中，所述处理器，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之后，还包括：
将所述3级映射表中的所述逻辑区块地址所对应的计数器加一；
在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，对所述三级映射表中的所述逻辑区块地址所对应的计数器减一，以确认所述待写入数据的所述逻辑区块地址获得了对应的物理页号。
本发明通过根据将要被读或写入的数据的逻辑区块地址，在2级映射表中查找所述逻辑区块地址对应的3级映射表，从所述3级映射表中读出所述数据或者在为所述逻辑区块地址分配的物理页号中写入所述数据的多级顺序映射方案，由于在2级映射表中仅存储3级映射表的索引，而且只有在主存中的3级映射表没有存储所述待读或待写入数据时，才将固态硬盘中的所述逻辑区块地址所对应的3级映射表写入主存。因为本方案无需直接从固态硬盘的3级映射表中遍历查询所述逻辑区块地址所对应的物理页号，且在主存仅仅存有一部分经常被访问的热数据对应的3级映射表，从而解决了在大容量存储的情形下页级 映射由于映射粒度小需要消耗大量主存存储空间的问题，也避免了块级映射进行块操作时涉及数据较多导致的性能不稳定问题，从而达到了简化映射关系以减少主存存储空间的消耗并且维持性能稳定的效果。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的一种基于大容量固态存储的地址映射方法的流程图；
图2为本发明实施例提供的另一种基于大容量固态存储的地址映射方法的流程图；
图3为本发明实施例提供的另一种基于大容量固态存储的地址映射方法的流程图；
图4为本发明实施例提供的另一种基于大容量固态存储的地址映射方法的流程图；
图5为本发明实施例提供的一种基于大容量固态存储的地址映射的装置的结构图；
图6为本发明实施例提供的另一种基于大容量固态存储的地址映射的装置的结构图；
图7为本发明实施例提供的另一种基于大容量固态存储的地址映射的装置的结构图；
图8为本发明实施例提供的另一种基于大容量固态存储的地址映射的装置的结构图；
图9为本发明实施例提供的一种基于大容量固态存储的地址映射表；
图10为本发明实施例提供的另一种基于大容量固态存储的地址映射表；
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
如图1所示，本发明实施例提供的一种基于大容量固态存储的地址映射方法，其特征在于，包括：
步骤S101，获取用于将数据写入固态硬盘的写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址；
步骤S102，根据所述全局2级映射表，查询所述逻辑区块地址所对应的主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映 射表，所述3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
步骤S103，如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
步骤S104，控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中；
步骤S105，在所述主存中所述逻辑区块地址所对应的三级映射表中，将待写入数据写入所述物理页号所对应的存储空间。
有益效果：通过根据将要被读或写入的数据的逻辑区块地址，在2级映射表中查找所述逻辑区块地址对应的3级映射表，从所述3级映射表中读出所述数据或者在为所述逻辑区块地址分配的物理页号中写入所述数据的多级顺序映射方案，由于在2级映射表中仅存储3级映射表的索引，而且只有在主存中的3级映射表没有存储所述待读或代写入数据时，才将固态硬盘中的所述逻辑区块地址所对应的3级映射表写入主存，从而解决了在大容量存储的情形下页级映射由于映射粒度小需要消耗大量主存存储空间的问题，也避免了块级映射进行块操作时涉及数据较多导致的性能不稳定问题，从而达到了简化映射关系以减少主存存储空间的消耗并且维持性能稳定的效果。
如图2所示，本发明实施例提供的另一种基于大容量固态存储的地址映射方法，其特征在于，包括：
步骤S201，获取用于将数据写入固态硬盘的写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址；
步骤S202，根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
步骤S203，如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
步骤S204，控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页 号存储在所述主存中所述逻辑区块地址所对应的三级映射表中；
步骤S205，在所述主存中所述逻辑区块地址所对应的三级映射表中，将待写入数据写入所述物理页号所对应的存储空间。
进一步地，步骤S206，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之前，其特征在于，还包括：
判断所述主存中存储所述3级映射表的空间是否到达预设阈值，在达到所述预设阈值的情况下，则根据预设缓存规则将冷数据从所述主存移出并写入到所述固态硬盘中，以为将所述固态硬盘中的逻辑区块地址所对应的3级映射表写入所述主存提供存储空间。
进一步地，步骤S207，在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，还包括：
将所述物理页号写入所述固态硬盘中；或，将所述逻辑区块地址与所述物理页号写入主存中后，将所述物理页号写入所述固态硬盘中。
进一步地，步骤S208，在所述将所述物理页号写入所述固态硬盘中之后，还包括：
将所述逻辑区块地址与所述物理页号在所述2级映射表与1级映射表中进行更新。
进一步地，步骤S209，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之后，还包括：
将所述3级映射表中的所述逻辑区块地址所对应的计数器加一；
在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，对所述三级映射表中的所述逻辑区块地址所对应的计数器减一，以确认所述待写入数据的所述逻辑区块地址获得了对应的物理页号。
有益效果：通过根据将要被读或写入的数据的逻辑区块地址，在2级映射表中查找所述逻辑区块地址对应的3级映射表，从所述3级映射表中读出所述数据或者在为所述逻辑区块地址分配的物理页号中写入所述数据的多级顺序映射方案，由于在2级映射表中仅存储3级映射表的索引，而且只有在主存中的3级映射表没有存储所述待读或代写入数据时， 才将固态硬盘中的所述逻辑区块地址所对应的3级映射表写入主存，从而解决了在大容量存储的情形下页级映射由于映射粒度小需要消耗大量主存存储空间的问题，也避免了块级映射进行块操作时涉及数据较多导致的性能不稳定问题，从而达到了简化映射关系以减少主存存储空间的消耗并且维持性能稳定的效果。
如图3所示，本发明实施例提供的另一种基于大容量固态存储的地址映射方法，其特征在于，包括：
步骤S301，获取用于读固态硬盘中数据的读命令，所述读命令携带待写入数据的逻辑区块地址；
步骤S302，在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
步骤S303，如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
步骤S304，从所述物理页上读取所述数据。
有益效果：通过根据将要被读或写入的数据的逻辑区块地址，在2级映射表中查找所述逻辑区块地址对应的3级映射表，从所述3级映射表中读出所述数据或者在为所述逻辑区块地址分配的物理页号中写入所述数据的多级顺序映射方案，由于在2级映射表中仅存储3级映射表的索引，而且只有在主存中的3级映射表没有存储所述待读或代写入数据时，才将固态硬盘中的所述逻辑区块地址所对应的3级映射表写入主存，从而解决了在大容量存储的情形下页级映射由于映射粒度小需要消耗大量主存存储空间的问题，也避免了块级映射进行块操作时涉及数据较多导致的性能不稳定问题，从而达到了简化映射关系以减少主存存储空间的消耗并且维持性能稳定的效果。
如图4所示，本发明实施例提供的另一种基于大容量固态存储的地址映射方法，其特征在于，包括：
步骤S401，获取用于读或写固态硬盘中数据的命令，所述命令包括读命令或写命令；
步骤S402，判断所述命令是读命令或写命令；
步骤S403，如果所述命令是读命令，所述读命令携带逻辑区块地址，在主存中通过全 局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
步骤S404，如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
步骤S405，从所述物理页上读取所述数据；
步骤S406，如果所述命令是写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址，根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
步骤S407，如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
步骤S408，控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中；
步骤S409，在所述主存中所述逻辑区块地址所对应的三级映射表中，将待写入数据写入所述物理页号所对应的存储空间。
有益效果：通过根据将要被读或写入的数据的逻辑区块地址，在2级映射表中查找所述逻辑区块地址对应的3级映射表，从所述3级映射表中读出所述数据或者在为所述逻辑区块地址分配的物理页号中写入所述数据的多级顺序映射方案，由于在2级映射表中仅存储3级映射表的索引，而且只有在主存中的3级映射表没有存储所述待读或代写入数据时，才将固态硬盘中的所述逻辑区块地址所对应的3级映射表写入主存，从而解决了在大容量存储的情形下页级映射由于映射粒度小需要消耗大量主存存储空间的问题，也避免了块级映射进行块操作时涉及数据较多导致的性能不稳定问题，从而达到了简化映射关系以减少主存存储空间的消耗并且维持性能稳定的效果。
如图5所示，本发明实施例提供的另一种基于大容量固态存储的地址映射装置，其特征在于，包括：
获取模块501，获取用于将数据写入固态硬盘的写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址；
处理模块502，用于根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
所述处理模块502，还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
所述处理模块502，还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中；
所述处理模块502，还用于在所述主存中所述逻辑区块地址所对应的三级映射表中，将待写入数据写入所述物理页号所对应的存储空间；
存储模块503，包括所述固态硬盘505模块与所述主存模块504，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
所述获取模块501，与所述处理模块502，与所述存储模块503都通过总线506连接。
进一步地，所述处理模块502，在所述还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之前，还用于：
判断所述主存中存储所述3级映射表的空间是否到达预设阈值，在达到所述预设阈值的情况下，则根据预设缓存规则将冷数据从所述主存移出并写入到所述固态硬盘中，以为将所述固态硬盘中的逻辑区块地址所对应的3级映射表写入所述主存提供存储空间。
进一步地，所述处理模块502，在所述还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，还包括：
将所述物理页号写入所述固态硬盘中；或，将所述逻辑区块地址与所述物理页号写入主存中后，将所述物理页号写入所述固态硬盘中。
进一步地，所述处理模块502，在所述还用于将所述物理页号写入所述固态硬盘中之 后，还用于：
将所述逻辑区块地址与所述物理页号在所述2级映射表与1级映射表中进行更新。
进一步地，所述处理模块502，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之后，还用于：
将所述3级映射表中的所述逻辑区块地址所对应的计数器加一；
在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，对所述三级映射表中的所述逻辑区块地址所对应的计数器减一，以确认所述待写入数据的所述逻辑区块地址获得了对应的物理页号；
存储模块503，包括所述固态硬盘505模块与所述主存模块504，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
所述获取模块501，与所述处理模块502，与所述存储模块503都通过总线506连接。
有益效果：通过根据将要被读或写入的数据的逻辑区块地址，在2级映射表中查找所述逻辑区块地址对应的3级映射表，从所述3级映射表中读出所述数据或者在为所述逻辑区块地址分配的物理页号中写入所述数据的多级顺序映射方案，由于在2级映射表中仅存储3级映射表的索引，而且只有在主存中的3级映射表没有存储所述待读或代写入数据时，才将固态硬盘中的所述逻辑区块地址所对应的3级映射表写入主存，从而解决了在大容量存储的情形下页级映射由于映射粒度小需要消耗大量主存存储空间的问题，也避免了块级映射进行块操作时涉及数据较多导致的性能不稳定问题，从而达到了简化映射关系以减少主存存储空间的消耗并且维持性能稳定的效果。
如图5所示，本发明实施例提供的另一种基于大容量固态存储的地址映射装置，其特征在于，包括：
获取模块501，获取用于读固态硬盘中数据的读命令，所述读命令携带待写入数据的逻辑区块地址；
处理模块502，用于在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
所述处理模块502，还用于如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
所述处理模块502，还用于从所述物理页上读取所述数据；
存储模块503，包括所述固态硬盘505模块与所述主存模块504，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
获取模块501，与所述处理模块502，与所述存储模块503都通过总线506连接。
有益效果：通过根据将要被读或写入的数据的逻辑区块地址，在2级映射表中查找所述逻辑区块地址对应的3级映射表，从所述3级映射表中读出所述数据或者在为所述逻辑区块地址分配的物理页号中写入所述数据的多级顺序映射方案，由于在2级映射表中仅存储3级映射表的索引，而且只有在主存中的3级映射表没有存储所述待读或代写入数据时，才将固态硬盘中的所述逻辑区块地址所对应的3级映射表写入主存，从而解决了在大容量存储的情形下页级映射由于映射粒度小需要消耗大量主存存储空间的问题，也避免了块级映射进行块操作时涉及数据较多导致的性能不稳定问题，从而达到了简化映射关系以减少主存存储空间的消耗并且维持性能稳定的效果。
如图5所示，本发明实施例提供的另一种基于大容量固态存储的地址映射装置，其特征在于，包括：
获取模块501，获取用于读或写固态硬盘中数据的命令，所述命令包括读命令或写命令；
处理模块502，用于判断所述命令是读命令或写命令；
所述处理模块502，还用于如果所述命令是读命令，所述读命令携带逻辑区块地址，在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
所述处理模块502，还用于如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
所述处理模块502，还用于从所述物理页上读取所述数据；
所述处理模块502，还用于如果所述命令是写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址，根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
所述处理模块502，还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
所述处理模块502，还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中；
所述处理模块502，还用于在所述主存中所述逻辑区块地址所对应的3级映射表中，将待写入数据写入所述物理页号所对应的存储空间；
存储模块503，包括所述固态硬盘505模块与所述主存模块504，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
获取模块501，与所述处理模块502，与所述存储模块503都通过总线506连接。
有益效果：通过根据将要被读或写入的数据的逻辑区块地址，在2级映射表中查找所述逻辑区块地址对应的3级映射表，从所述3级映射表中读出所述数据或者在为所述逻辑区块地址分配的物理页号中写入所述数据的多级顺序映射方案，由于在2级映射表中仅存储3级映射表的索引，而且只有在主存中的3级映射表没有存储所述待读或代写入数据时，才将固态硬盘中的所述逻辑区块地址所对应的3级映射表写入主存，从而解决了在大容量存储的情形下页级映射由于映射粒度小需要消耗大量主存存储空间的问题，也避免了块级映射进行块操作时涉及数据较多导致的性能不稳定问题，从而达到了简化映射关系以减少主存存储空间的消耗并且维持性能稳定的效果。
如图6所示，本发明实施例提供的一种基于大容量固态存储的地址映射装置，其特征在于，包括：
接收器601，获取用于将数据写入固态硬盘的写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址；
处理器602，用于根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主 存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
所述处理器602，还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
所述处理器602，还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中；
所述处理器602，还用于在所述主存中所述逻辑区块地址所对应的三级映射表中，将待写入数据写入所述物理页号所对应的存储空间；
存储器603，包括所述固态硬盘605与所述主存604，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表；
所述接收器601，与所述处理器602，与存储器603都通过总线606连接。
有益效果：通过根据将要被读或写入的数据的逻辑区块地址，在2级映射表中查找所述逻辑区块地址对应的3级映射表，从所述3级映射表中读出所述数据或者在为所述逻辑区块地址分配的物理页号中写入所述数据的多级顺序映射方案，由于在2级映射表中仅存储3级映射表的索引，而且只有在主存中的3级映射表没有存储所述待读或代写入数据时，才将固态硬盘中的所述逻辑区块地址所对应的3级映射表写入主存，从而解决了在大容量存储的情形下页级映射由于映射粒度小需要消耗大量主存存储空间的问题，也避免了块级映射进行块操作时涉及数据较多导致的性能不稳定问题，从而达到了简化映射关系以减少主存存储空间的消耗并且维持性能稳定的效果。进一步地，所述处理器602，在所述还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之前，还用于：
判断所述主存中存储所述3级映射表的空间是否到达预设阈值，在达到所述预设阈值的情况下，则根据预设缓存规则将冷数据从所述主存移出并写入到所述固态硬盘中，以为将所述固态硬盘中的逻辑区块地址所对应的3级映射表写入所述主存提供存储空间。
进一步地，所述处理器602，在所述还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射 表中之后，还包括：
将所述物理页号写入所述固态硬盘中；或，将所述逻辑区块地址与所述物理页号写入主存中后，将所述物理页号写入所述固态硬盘中。
进一步地，所述处理器602，在所述还用于将所述物理页号写入所述固态硬盘中之后，还用于：
将所述逻辑区块地址与所述物理页号在所述2级映射表与1级映射表中进行更新。
进一步地，所述处理器602，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之后，还用于：
将所述3级映射表中的所述逻辑区块地址所对应的计数器加一；
在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中之后，对所述三级映射表中的所述逻辑区块地址所对应的计数器减一，以确认所述待写入数据的所述逻辑区块地址获得了对应的物理页号。如图6所示，本发明实施例提供的另一种基于大容量固态存储的地址映射装置，其特征在于，包括：
接收器601，获取用于读固态硬盘中数据的读命令，所述读命令携带待写入数据的逻辑区块地址；
处理器602，用于在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
所述处理器602，还用于如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
所述处理器602，还用于从所述物理页上读取所述数据；
存储器603，包括所述固态硬盘605与所述主存604，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表；
所述接收器601，与所述处理器602，与存储器603都通过总线606连接。
有益效果：通过根据将要被读或写入的数据的逻辑区块地址，在2级映射表中查找所述逻辑区块地址对应的3级映射表，从所述3级映射表中读出所述数据或者在为所述逻辑区块地址分配的物理页号中写入所述数据的多级顺序映射方案，由于在2级映射表中仅存储3级映射表的索引，而且只有在主存中的3级映射表没有存储所述待读或代写入数据时，才将固态硬盘中的所述逻辑区块地址所对应的3级映射表写入主存，从而解决了在大容量存储的情形下页级映射由于映射粒度小需要消耗大量主存存储空间的问题，也避免了块级映射进行块操作时涉及数据较多导致的性能不稳定问题，从而达到了简化映射关系以减少主存存储空间的消耗并且维持性能稳定的效果。
如图6所示，本发明实施例提供的另一种基于大容量固态存储的地址映射装置，其特征在于，包括：
接收器601，获取用于读或写固态硬盘中数据的命令，所述命令包括读命令或写命令；
处理器602，用于判断所述命令是读命令或写命令；
所述处理器602，还用于如果所述命令是读命令，所述读命令携带逻辑区块地址，在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
所述处理器602，还用于如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
所述处理器602，还用于从所述物理页上读取所述数据；
所述处理器602，还用于如果所述命令是写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址，根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
所述处理器602，还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
所述处理器602，还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的三级映射表中；
所述处理器602，还用于在所述主存中所述逻辑区块地址所对应的三级映射表中，将待写入数据写入所述物理页号所对应的存储空间；
存储器603，包括所述固态硬盘605与所述主存604，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表；
所述接收器601，与所述处理器602，与存储器603都通过总线606连接。
有益效果：通过根据将要被读或写入的数据的逻辑区块地址，在2级映射表中查找所述逻辑区块地址对应的3级映射表，从所述3级映射表中读出所述数据或者在为所述逻辑区块地址分配的物理页号中写入所述数据的多级顺序映射方案，由于在2级映射表中仅存储3级映射表的索引，而且只有在主存中的3级映射表没有存储所述待读或代写入数据时，才将固态硬盘中的所述逻辑区块地址所对应的3级映射表写入主存，从而解决了在大容量存储的情形下页级映射由于映射粒度小需要消耗大量主存存储空间的问题，也避免了块级映射进行块操作时涉及数据较多导致的性能不稳定问题，从而达到了简化映射关系以减少主存存储空间的消耗并且维持性能稳定的效果。
如图7所示，为本发明实施例提供的另一种基于大容量固态存储的地址映射的装置的结构图；
所述装置用于执行本申请文件中前述各种基于大容量固态存储的地址映射方法。所述装置包括：服务器701，固态硬盘702，总线707，所述服务器701包括处理器702和主存703，所述固态硬盘包括固态硬盘控制权705和存储芯片706，所述固态硬盘704、处理器702与主存703都与所述总线707相连。
如图8所示，为本发明实施例提供的另一种基于大容量固态存储的地址映射的装置的结构图；
所述装置用于执行本申请文件中前述各种基于大容量固态存储的地址映射方法。所述装置包括：服务器801，固态硬盘802，与总线807，与接收器808，所述服务器801包括处理器802和主存803，所述固态硬盘包括固态硬盘控制权805和存储芯片806，所述固态硬盘804、处理器802与主存803、与接收器808都与所述总线807相连，所述接收器808与所述固态硬盘804相连。
图9所示，为本发明实施例提供的一种基于大容量固态存储的地址映射表；
通过主存中的1级映射表索引主存中的2级映射表，根据逻辑区块地址(LBA)，再通过主存中的2级映射表索引主存中的3级映射表，如果在主存中的2级映射表中显示为如图所示的TRN,N为正整数，则直接继续所述主存中的3级映射表，找到物理页号(PPN)，无需继续索引固态硬盘中的3级映射表；如果在主存中的2级映射表中显示为如图所示的null，则说明主存中不存在需要查找的物理页号，需要继续索引固态硬盘中的3级映射表以查找逻辑区块地址所对应的PPN。
如图10所示，为本发明实施例提供的另一种基于大容量固态存储的地址映射表；
当上层操作***下发一个逻辑区块地址(LBA)＝3的读操作，在主存2级映射表中命中(第一个条目LBA＝0)，得到其主存3级映射表表所在地址100，所述主存3级映射表的第四个条目中所对应内容1，即为所要查找的数据的PPN地址，反馈上层操作***，根据该PPN可获取所读数据；当主存2级映射表中未命中，则根据主存映射表中3级表的地址信息，找到固态硬盘中所述逻辑区块地址对应的3级映射表，存储到主存中，同时向上层操作***反馈PPN。
当上层操作***下发一个逻辑区块地址LBA＝10的写请求的时候，首先查询主存中2级映射表，因为LBA＝10(8<10<12),所以直接索引到主存中2级表的第一个表的第三个条目，主存地址命中，为热数据，即主存地址为200的地址所在的主存3级表中第三个条目，其中PPN＝11为之前的LBA-PPN关系，当前，为新写数据分配新的物理地址13，第三个条目中PPN＝11改写为13，同时存储到SSD的日志表中，追加映射关系10-13(LBA-PPN)，将新得到的PPN反馈给上层操作***；如果查询主存中2级映射表未命中，如LBA＝13的写请求，则根据主存2级表中的固态硬盘地址找到固态硬盘中3级映射表的位置，LBA＝13所对应的PPN为2，将该表中条目内容写到主存3级表中，为该主存3级表分配地址空间，并将所述地址空间的信息写到主存2级映射表相应条目中，对所述LBA＝13所在条目，为新写数据分配新的PPN地址(PPN＝J)，将LBA＝13所对应的PPN的值null改写为J，同时存储到固态硬盘的日志表中，追加映射关系13-J(LBA-PPN)，将新得到的PPN反馈给上层操作***。
本发明可以通过多种实施方式来实现，本发明实施例可以由特定软硬件组件进行执行，那些本领域技术人员认为各种不同的软件或硬件的组合也可以被应用来执行本发明实施例，上述被硬件执行的特定操作也可以被软件来实施。
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管 参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (21)

  1. 一种基于大容量固态存储的地址映射方法，其特征在于，包括：
    获取用于将数据写入固态硬盘的写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址；
    根据全局2级映射表，查询所述逻辑区块地址所对应的主存中的3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述主存中3级映射表和固态硬盘中的3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
    如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
    控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中；
    在所述主存中所述逻辑区块地址所对应的3级映射表中，将所述待写入数据写入所述物理页号所对应的存储空间。
  2. 根据权利要求1所述的方法，其特征在于，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之前，其特征在于，还包括：
    判断所述主存中存储所述3级映射表的空间是否到达预设阈值，在达到所述预设阈值的情况下，则根据预设缓存规则将冷数据从所述主存移出并写入到所述固态硬盘中，以为将所述固态硬盘中的逻辑区块地址所对应的3级映射表写入所述主存提供存储空间。
  3. 根据权利要求1或2所述的方法，其特征在于，在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中之后，还包括：
    将所述物理页号写入所述固态硬盘中；或，将所述逻辑区块地址与所述物理页号写入主存中后，将所述物理页号写入所述固态硬盘中。
  4. 根据权利要求3所述的方法，其特征在于，在所述将所述物理页号写入所述固态硬盘中之后，还包括：
    将所述逻辑区块地址与所述物理页号在所述2级映射表与1级映射表中进行更新。
  5. 如权利要求1-4任一所述的方法，其特征在于，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之后，还包括：
    将所述3级映射表中的所述逻辑区块地址所对应的计数器加一；
    在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中之后，对所述3级映射表中的所述逻辑区块地址所对应的计数器减一，以确认所述待写入数据的所述逻辑区块地址获得了对应的物理页号。
  6. 一种基于大容量固态存储的地址映射方法，其特征在于，包括：
    获取用于读固态硬盘中数据的读命令，所述读命令携带待写入数据的逻辑区块地址；
    在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
    如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
    从所述物理页上读取所述数据。
  7. 一种基于大容量固态存储的地址映射方法，其特征在于，包括：
    获取用于读或写固态硬盘中数据的命令，所述命令包括读命令或写命令；
    判断所述命令是读命令或写命令；
    如果所述命令是读命令，所述读命令携带逻辑区块地址，在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
    如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
    从所述物理页上读取所述数据；
    如果所述命令是写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址，根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述主存中3级映射表和固态硬盘中的3级映射表3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
    如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
    控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中；
    在所述主存中所述逻辑区块地址所对应的3级映射表中，将所述待写入数据写入所述物理页号所对应的存储空间。
  8. 一种基于大容量固态存储的地址映射装置，其特征在于，包括：
    获取模块，获取用于将数据写入固态硬盘的写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址；
    处理模块，用于根据全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述主存中3级映射表和固态硬盘中的3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
    所述处理模块，还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
    所述处理模块，还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中；
    所述处理模块，还用于在所述主存中所述逻辑区块地址所对应的3级映射表中，将所述待写入数据写入所述物理页号所对应的存储空间；
    存储模块，包括所述固态硬盘与所述主存，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
  9. 根据权利要求8所述的装置，其特征在于，所述处理模块，在所述还用于如果所述 主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之前，还用于：
    判断所述主存中存储所述3级映射表的空间是否到达预设阈值，在达到所述预设阈值的情况下，则根据预设缓存规则将冷数据从所述主存移出并写入到所述固态硬盘中，以为将所述固态硬盘中的逻辑区块地址所对应的3级映射表写入所述主存提供存储空间。
  10. 根据权利要求8或9所述的装置，其特征在于，所述处理模块，在所述还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中之后，还包括：
    将所述物理页号写入所述固态硬盘中；或，将所述逻辑区块地址与所述物理页号写入主存中后，将所述物理页号写入所述固态硬盘中。
  11. 根据权利要求10所述的装置，其特征在于，所述处理模块，在所述还用于将所述物理页号写入所述固态硬盘中之后，还用于：
    将所述逻辑区块地址与所述物理页号在所述2级映射表与1级映射表中进行更新。
  12. 如权利要求8-11所述的装置，其特征在于，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之后，还用于：
    将所述3级映射表中的所述逻辑区块地址所对应的计数器加一；
    在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中之后，对所述3级映射表中的所述逻辑区块地址所对应的计数器减一，以确认所述待写入数据的所述逻辑区块地址获得了对应的物理页号。
  13. 一种基于大容量固态存储的地址映射装置，其特征在于，包括：
    获取模块，获取用于读固态硬盘中数据的读命令，所述读命令携带待写入数据的逻辑区块地址；
    处理模块，用于在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
    所述处理模块，还用于如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
    所述处理模块，还用于从所述物理页上读取所述数据；
    存储模块，包括所述固态硬盘与所述主存，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
  14. 一种基于大容量固态存储的地址映射装置，其特征在于，包括：
    获取模块，获取用于读或写固态硬盘中数据的命令，所述命令包括读命令或写命令；
    处理模块，用于判断所述命令是读命令或写命令；
    所述处理模块，还用于如果所述命令是读命令，所述读命令携带逻辑区块地址，在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
    所述处理模块，还用于如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
    所述处理模块，还用于从所述物理页上读取所述数据；
    所述处理模块，还用于如果所述命令是写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址，根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述主存中3级映射表和固态硬盘中3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
    所述处理模块，还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
    所述处理模块，还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中；
    所述处理模块，还用于在所述主存中所述逻辑区块地址所对应的3级映射表中，将所述待写入数据写入所述物理页号所对应的存储空间；
    存储模块，包括所述固态硬盘与所述主存，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
  15. 一种基于大容量固态存储的地址映射装置，其特征在于，包括：
    接收器，获取用于将数据写入固态硬盘的写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址；
    处理器，用于根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述主存中3级映射表和固态硬盘中的3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
    所述处理器，还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
    所述处理器，还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中；
    所述处理器，还用于在所述主存中所述逻辑区块地址所对应的3级映射表中，将所述待写入数据写入所述物理页号所对应的存储空间；
    存储器，包括所述固态硬盘与所述主存，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
  16. 根据权利要求15所述的装置，其特征在于，所述处理器，在所述还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之前，还用于：
    判断所述主存中存储所述3级映射表的空间是否到达预设阈值，在达到所述预设阈值的情况下，则根据预设缓存规则将冷数据从所述主存移出并写入到所述固态硬盘中，以为将所述固态硬盘中的逻辑区块地址所对应的3级映射表写入所述主存提供存储空间。
  17. 根据权利要求15或16所述的装置，其特征在于，所述处理器，在所述还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存 中所述逻辑区块地址所对应的3级映射表中之后，还包括：
    将所述物理页号写入所述固态硬盘中；或，将所述逻辑区块地址与所述物理页号写入主存中后，将所述物理页号写入所述固态硬盘中。
  18. 根据权利要求17所述的装置，其特征在于，所述处理器，在所述还用于将所述物理页号写入所述固态硬盘中之后，还用于：
    将所述逻辑区块地址与所述物理页号在所述2级映射表与1级映射表中进行更新。
  19. 如权利要求15-18所述的装置，其特征在于，所述处理器，在所述如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中之后，还用于：
    将所述3级映射表中的所述逻辑区块地址所对应的计数器加一；
    在所述控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中之后，对所述3级映射表中的所述逻辑区块地址所对应的计数器减一，以确认所述待写入数据的所述逻辑区块地址获得了对应的物理页号。
  20. 一种基于大容量固态存储的地址映射装置，其特征在于，包括：
    接收器，获取用于读固态硬盘中数据的读命令，所述读命令携带待写入数据的逻辑区块地址；
    处理器，用于在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
    所述处理器，还用于如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
    所述处理器，还用于从所述物理页上读取所述数据；
    存储器，包括所述固态硬盘与所述主存，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
  21. 一种基于大容量固态存储的地址映射装置，其特征在于，包括：
    接收器，获取用于读或写固态硬盘中数据的命令，所述命令包括读命令或写命令；
    处理器，用于判断所述命令是读命令或写命令；
    所述处理器，还用于如果所述命令是读命令，所述读命令携带逻辑区块地址，在主存中通过全局2级映射表，查询所述主存中3级映射表中存储的所述逻辑区块地址所对应的物理页号，所述全局2级映射表用于索引所述主存中的3级映射表和固态硬盘中的3级映射表；
    所述处理器，还用于如果所述主存中的所述3级映射表中未存储所述逻辑区块地址所对应的物理页号，则根据所述全局2级映射表索引所述固态硬盘中的所述3级映射表，将所述固态硬盘中的所述3级映射表中存储的所述逻辑区块地址及与所述逻辑区块地址对应的物理页号读出；
    所述处理器，还用于从所述物理页上读取所述数据；
    所述处理器，还用于如果所述命令是写命令，所述写命令携带待写入数据及所述待写入数据的逻辑区块地址，根据所述全局2级映射表，查询所述逻辑区块地址所对应的所述主存中的所述3级映射表，所述全局2级映射表用于索引所述主存中3级映射表和固态硬盘中的3级映射表，所述主存中3级映射表和固态硬盘中的3级映射表用于存储所述逻辑区块地址及与所述逻辑区块地址对应的物理页号的映射关系；
    所述处理器，还用于如果所述主存中不存在所述逻辑区块地址所对应的3级映射表，则根据所述全局2级映射表索引所述固态硬盘中的3级映射表中，将所述逻辑区块地址所对应的所述固态硬盘中的3级映射表读出并存储到所述主存中；
    所述处理器，还用于控制固态硬盘控制器为所述逻辑区块地址分配物理页号，并将所述物理页号存储在所述主存中所述逻辑区块地址所对应的3级映射表中；
    所述处理器，还用于在所述主存中所述逻辑区块地址所对应的3级映射表中，将所述待写入数据写入所述物理页号所对应的存储空间；
    存储器，包括所述固态硬盘与所述主存，用于存储所述全局2级映射表、及存储所述主存中3级映射表和固态硬盘中的3级映射表。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080189490A1 (en) * 2007-02-06 2008-08-07 Samsung Electronics Co., Ltd. Memory mapping
CN101751343A (zh) * 2009-12-28 2010-06-23 成都市华为赛门铁克科技有限公司 固态硬盘数据写入方法及装置
CN103440206A (zh) * 2013-07-25 2013-12-11 记忆科技(深圳)有限公司 一种固态硬盘及其混合映射方法
CN105205009A (zh) * 2015-09-30 2015-12-30 华为技术有限公司 一种基于大容量固态存储的地址映射方法及装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7660941B2 (en) * 2003-09-10 2010-02-09 Super Talent Electronics, Inc. Two-level RAM lookup table for block and page allocation and wear-leveling in limited-write flash-memories
US8321597B2 (en) * 2007-02-22 2012-11-27 Super Talent Electronics, Inc. Flash-memory device with RAID-type controller
CN101645043B (zh) * 2009-09-08 2012-01-04 成都市华为赛门铁克科技有限公司 写数据的方法、读数据的方法及存储设备
CN101819509A (zh) * 2010-04-19 2010-09-01 清华大学深圳研究生院 一种固态硬盘读写方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080189490A1 (en) * 2007-02-06 2008-08-07 Samsung Electronics Co., Ltd. Memory mapping
CN101751343A (zh) * 2009-12-28 2010-06-23 成都市华为赛门铁克科技有限公司 固态硬盘数据写入方法及装置
CN103440206A (zh) * 2013-07-25 2013-12-11 记忆科技(深圳)有限公司 一种固态硬盘及其混合映射方法
CN105205009A (zh) * 2015-09-30 2015-12-30 华为技术有限公司 一种基于大容量固态存储的地址映射方法及装置

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020087955A1 (zh) * 2018-11-01 2020-05-07 郑州云海信息技术有限公司 一种硬盘盘符重复问题的处理方法、装置及***
CN112433892A (zh) * 2019-08-26 2021-03-02 点序科技股份有限公司 存储器验证方法及存储器验证***
CN111459919A (zh) * 2020-04-26 2020-07-28 深圳佰维存储科技股份有限公司 数据查询方法、加载组件、搜索组件和存储介质
CN111459919B (zh) * 2020-04-26 2024-06-11 深圳佰维存储科技股份有限公司 数据查询方法、加载组件、搜索组件和存储介质
CN111639037A (zh) * 2020-05-12 2020-09-08 深圳大普微电子科技有限公司 一种缓存的动态分配方法、装置及DRAM-Less固态硬盘
CN111639037B (zh) * 2020-05-12 2023-06-09 深圳大普微电子科技有限公司 一种缓存的动态分配方法、装置及DRAM-Less固态硬盘
CN112486861B (zh) * 2020-11-30 2024-05-14 深圳忆联信息***有限公司 固态硬盘映射表数据查询方法、装置、计算机设备及存储介质
CN112486861A (zh) * 2020-11-30 2021-03-12 深圳忆联信息***有限公司 固态硬盘映射表数据查询方法、装置、计算机设备及存储介质
CN112764685A (zh) * 2021-01-26 2021-05-07 华中科技大学 一种消除固态盘中预写式日志重复数据写的方法及设备
CN112764685B (zh) * 2021-01-26 2022-07-15 华中科技大学 一种消除固态盘中预写式日志重复数据写的方法及设备
CN113704140A (zh) * 2021-08-27 2021-11-26 锐掣(杭州)科技有限公司 一种固态硬盘地址映射方法及装置
CN116737064B (zh) * 2023-03-29 2024-04-05 深圳市领德创科技有限公司 一种固态硬盘的数据管理方法和***
CN116737064A (zh) * 2023-03-29 2023-09-12 深圳市领德创科技有限公司 一种固态硬盘的数据管理方法和***

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