WO2017012233A1 - 一种叠加式电路板制造方法及叠加式电路板 - Google Patents

一种叠加式电路板制造方法及叠加式电路板 Download PDF

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WO2017012233A1
WO2017012233A1 PCT/CN2015/095576 CN2015095576W WO2017012233A1 WO 2017012233 A1 WO2017012233 A1 WO 2017012233A1 CN 2015095576 W CN2015095576 W CN 2015095576W WO 2017012233 A1 WO2017012233 A1 WO 2017012233A1
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circuit board
stamping
adhesive
manufacturing
substrate
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PCT/CN2015/095576
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English (en)
French (fr)
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李新明
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惠州绿草电子科技有限公司
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits

Definitions

  • the present invention relates to the field of circuit board manufacturing technology, and in particular to a method for manufacturing a stacked circuit board and a stacked circuit board.
  • the circuit board manufacturing method mainly includes a subtractive method, a semi-additive method, and a full additive method.
  • the conventional lithography etching method belongs to the subtractive method.
  • the entire copper foil is covered on the substrate, and the lithographic etching method is used to etch away the unnecessary copper foil. Therefore, there are high material consumption and many production processes. Disadvantages such as large waste liquid discharge and heavy environmental pressure.
  • the semi-additive method uses an electroplating process, which reduces the consumption of the etching solution compared to the photolithography etching method, but still has environmental pollution, uneven wiring of the pattern plating, difficulty in controlling the process parameters, high requirements on the substrate, and a flexible board. Problems such as manufacturing difficulties.
  • the full additive method specifically refers to a process of manufacturing a PCB by using a catalytic substrate.
  • the full addition method does not require etching of the copper foil, and the process is simple, and the double panel can be directly manufactured, but the full additive method requires a special catalytic substrate and is costly. Line performance and reliability need to be improved.
  • the invention provides a superimposed circuit board manufacturing method and a superimposed circuit board, which solves the technical problem that the circuit board has good line performance, high reliability, low manufacturing cost, high manufacturing efficiency and environmental protection.
  • An aspect of the present invention provides a method of manufacturing a stacked circuit board, including:
  • Cutting step cutting the substrate according to the set shape and size
  • Printing step printing the adhesive onto the substrate to form an insulating layer
  • Bonding step bonding a mechanically formed conductive layer to a corresponding insulating layer on the substrate to form an adhesive structure
  • Press-bonding step pressing the bonded structure to form a circuit board.
  • the conductive layer is formed by stamping, and the stamping step is: stamping the metal sheet into a conductive layer of a shape, a pattern and a size by a stamping die.
  • the metal sheet between the stamping upper mold and the stamping lower mold is punched into a conductive layer of a shape, a pattern and a size by a stamping upper mold and a stamping lower mold of the stamping die. At least one punch punching the bottom of the upper die is engaged with at least one die of the stamping die.
  • the adhesive used in the printing step is a thermal conductive adhesive or an insulating adhesive.
  • Another aspect of the present invention provides a stacked circuit board comprising a substrate on which an adhesive is printed as an insulating layer, and the adhesive is bonded and pressed with a mechanically formed conductive layer.
  • the conductive wire layer is stamped from a thin metal plate by a stamping die.
  • the stamping die includes a stamping upper die and a punching die, and the stamping die is provided with at least one punch at the bottom, and the stamping die is provided with a die matched with the punch.
  • the adhesive is a thermal conductive adhesive or an insulating adhesive.
  • the method for manufacturing a superposed circuit board of the present invention is an all-mechanical processing method, which does not require non-environmental processes such as electroplating and etching, and does not use chemicals, and is more environmentally friendly;
  • the superposed circuit board manufactured by using the superposed circuit board manufacturing method of the present invention has excellent line performance and high reliability.
  • FIG. 1 is a schematic view showing a method of manufacturing a superposed circuit board of the present invention
  • FIG. 2 is a schematic view showing an implementation process of a method for manufacturing a stacked circuit board of the present invention
  • FIG. 3 is a schematic structural view of a stacked circuit board of the present invention.
  • the embodiment provides a method for manufacturing a stacked circuit board, including:
  • Cutting step cutting the substrate 1 according to the set shape and size
  • Printing step the adhesive is printed onto the substrate 1 by a wire mesh screen printing method to form an insulating layer 2;
  • Stamping step the metal thin plate 31 is punched into a conductive layer 3 of a set shape, pattern and size by a stamping die 4; the conductive layer 3 can also be prepared by other mechanical means.
  • Bonding step bonding the conductive layer 3 to the corresponding insulating layer on the substrate to form an adhesive structure
  • Press-bonding step press-bonding the bonded structure to form a circuit board.
  • the substrate 1 may be an aluminum substrate, a fiberglass board (FR4), a paper substrate, a CEM-1 board, or the like.
  • the graphic printing method is adopted, and the adhesive is a thermal conductive adhesive or an insulating adhesive.
  • the metal thin plate 31 located between the press upper mold 41 and the press lower mold 42 is punched into a set shape by the press upper mold 41 of the press die 4 and the press lower mold 42.
  • the pattern and size of the conductive wire 3, the at least one punch 411 at the bottom of the stamping die 41 is engaged with the at least one die 421 of the stamping die 42. The greater the number of punches 411, the higher the efficiency of stamping.
  • the metal thin plate 31 may be a copper foil or the like.
  • the fabricated circuit board needs to be tested. If there is no problem with the technical parameters such as thermal conductivity, peel strength and withstand voltage of the circuit board after inspection, it can be packaged and shipped.
  • the method of manufacturing a superposed circuit board of the present invention is suitable for manufacturing a circuit board having a simple circuit and a large amount of use, and the circuit board produced by the present invention can be widely used for various LED products.
  • the embodiment further provides a superimposed circuit board including a substrate 1 on which an adhesive is printed as an insulating layer 2, and the insulating layer 2 is bonded and laminated with conductive
  • the wiring layer 3 is formed by stamping a thin metal plate 31 through a stamping die 4.
  • the conductive layer 3 can also be prepared by other mechanical means.
  • the substrate 1 may be an aluminum substrate, a fiberglass board (FR4), a paper substrate, a CEM-1 board, or the like.
  • the adhesive is a thermal conductive adhesive or an insulating adhesive.
  • the stamping die 4 includes a stamping upper die 41 and a stamping lower die 42, the stamping At least one punch 411 is provided at the bottom of the upper mold 41, and the stamping lower mold 42 is provided with a concave die 421 that cooperates with the punch 411.
  • the metal thin plate 31 may be a conductive material such as copper foil.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

一种叠加式电路板制造方法，包括：开料步骤：将基板（1）按设定形状与尺寸裁剪；印刷步骤：将粘胶印刷到基板（1）上形成绝缘层（2）；粘合步骤：将通过机械方式制成的导电线层（3）粘合到基板上对应的绝缘层上，形成粘合结构；压合步骤：将粘合结构进行压合，制成电路板。一种叠加式电路板，在基板（1）上印刷有粘胶作为绝缘层（2），绝缘层上粘合并压合有导电线层（3），导电线层由金属薄板通过冲压模具（4）冲压而成。叠加式电路板制造方法将冲压制成的导电线层粘合并压合至有强力胶粘性及散热性能的基材上来制造电路板，加工方便、制造效率高；无需蚀刻，不使用化学药品，更环保；制造成本降低；叠加式电路板线路性能佳、可靠性高。

Description

一种叠加式电路板制造方法及叠加式电路板 技术领域
本发明涉及电路板制造技术领域，具体涉及一种叠加式电路板制造方法及叠加式电路板。
背景技术
目前，电路板制造方法主要包括减成法、半加成法、全加成法。传统的光刻腐蚀法即属于减成法，首先将整张铜箔覆盖在基板上，采用光刻腐蚀法，再将不需要的铜箔腐蚀掉，因此，存在材料消耗高、生产工序多、废液排放大、环保压力重等缺点。半加成法使用电镀工艺，相较于光刻腐蚀法减少了刻蚀液的消耗，但仍具有环境污染、图形电镀得到线路不均匀、工艺参数控制困难、对基板要求较高、挠性板制造困难等问题。全加成法特指使用催化性基板加成制造PCB的工艺，全加成法不需要腐蚀铜箔，工艺简单，可以直接制造双面板，不过全加成法由于需要特制催化性基板而成本高、线路性能与可靠性有待提高。
现有技术中，还有采取激光和铣刀切割去除不需要的铜制出线路的方法，该方法效率太低，无法大批量生产。
因此，需研究一种线路性能佳、可靠性高、制造成本低、制造效率高又环保的电路板制造方法，以适用于生产线路简单用量大的电路板。
发明内容
本发明提供一种叠加式电路板制造方法及叠加式电路板，解决了使电路板的线路性能佳、可靠性高、制造成本低、制造效率高又环保的技术问题。
本发明为解决上述问题所采用的技术方案为：
本发明一方面提供一种叠加式电路板制造方法，包括：
开料步骤：将基板按设定形状与尺寸裁剪；
印刷步骤：将粘胶印刷到基板上形成绝缘层；
粘合步骤：将通过机械方式制成的导电线层粘合到基板上对应的绝缘层上，形成粘合结构；
压合步骤：将所述粘合结构进行压合，制成电路板。
进一步地，所述导电线层通过冲压方式制成，冲压步骤为：通过冲压模具将金属薄板冲压为设定形状、图案与尺寸的导电线层。
更进一步地，在所述冲压步骤中，通过冲压模具的冲压上模、冲压下模将位于冲压上模与冲压下模之间的金属薄板冲压为设定形状、图案与尺寸的导电线层，冲压上模底部的至少一个冲头与冲压下模至少一个凹模相配合。
进一步地，在所述印刷步骤中使用的粘胶为导热胶或绝缘胶。
本发明另一方面提供一种叠加式电路板，包括基板，在所述基板上印刷有粘胶作为绝缘层，所述粘胶上粘合并压合有通过机械方式制成的导电线层。
进一步地，所述导电线层由金属薄板通过冲压模具冲压而成。
更进一步地，所述冲压模具包括冲压上模和冲压下模，所述冲压上模底部设有至少一个冲头，冲压下模设有与所述冲头配合的凹模。
进一步地，粘胶为导热胶或绝缘胶。
本发明的有益效果在于：
(1)本发明的叠加式电路板制造方法将铜箔冲压成所需的导电线后，将导电线粘合并压合至有强力胶粘性及散热性能的基材上来制造电路板，加工方便、制造效率高；
(2)本发明的叠加式电路板制造方法为全机械式加工方法，无需电镀、蚀刻等非环保工序，不使用化学药品，更环保；
(3)本发明的叠加式电路板制造方法制造成本降低30％，节约制造能源消耗；
(4)使用本发明的叠加式电路板制造方法制造的叠加式电路板线路性能佳、可靠性高。
附图说明
图1是本发明的叠加式电路板制造方法的示意图；
图2是本发明的叠加式电路板制造方法的实施过程示意图；
图3是本发明的叠加式电路板的结构示意图。
具体实施方式
下面结合附图具体阐明本发明的实施方式，附图仅供参考和说明使用，不构成对本发明专利保护范围的限制。
如图1、2所示，本实施例提供一种叠加式电路板制造方法，包括：
开料步骤：将基板1按设定形状与尺寸裁剪；
印刷步骤：将粘胶通过钢网丝印方法印刷到基板1上，形成绝缘层2；
冲压步骤：通过冲压模具4将金属薄板31冲压为设定形状、图案与尺寸的导电线层3；导电线层3还可以采用其他机械方式制备。
粘合步骤：将导电线层3粘合到基板上对应的绝缘层上，形成粘合结构；
压合步骤：将所述粘合结构进行压合固化，制成电路板。
在本实施例中，所述基板1可为铝基板、玻璃纤维板(FR4)、纸基板或CEM-1板等。
在本实施例中，在所述印刷步骤中，采用图形印刷法，粘胶为导热胶或绝缘胶等。
在本实施例中，在所述冲压步骤中，通过冲压模具4的冲压上模41、冲压下模42将位于冲压上模41与冲压下模42之间的金属薄板31冲压为设定形状、图案与尺寸的导电线3，冲压上模41底部的至少一个冲头411与冲压下模42至少一个凹模421相配合。冲头411的数量越多，冲压的效率越高。
在本实施例中，所述金属薄板31可为铜箔等。
制成的电路板需进行检测，如检测后电路板的导热系数、剥离强度、耐电压等技术参数无问题后，即可包装入库出货。
本发明的叠加式电路板制造方法适用于制造线路简单且用量大的电路板，如本发明制成的电路板可广泛用于各种LED产品。
如图3所示，本实施例还提供一种叠加式电路板，包括基板1，在所述基板1上印刷有粘胶作为绝缘层2，所述绝缘层2上粘合并压合有导电线层3，所述导电线层3由金属薄板31通过冲压模具4冲压而成。导电线层3还可以采用其他机械方式制备。
在本实施例中，所述基板1可为铝基板、玻璃纤维板(FR4)、纸基板或CEM-1板等。
在本实施例中，粘胶为导热胶或绝缘胶等。
在本实施例中，所述冲压模具4包括冲压上模41和冲压下模42，所述冲压 上模41底部设有至少一个冲头411，冲压下模42设有与所述冲头411配合的凹模421。
在本实施例中，所述金属薄板31可为铜箔等导电材料。
上述实施例为本发明较佳的实施方式，但本发明的实施方式并不受上述实施例的限制，其他的任何未背离本发明的精神实质与原理下所作的改变、修饰、替代、组合、简化，均应为等效的置换方式，都包含在本发明的保护范围之内。

Claims (8)

  1. 一种叠加式电路板制造方法，包括：
    开料步骤：将基板按设定形状与尺寸裁剪；
    其特征在于，还包括：
    印刷步骤：将粘胶印刷到基板上形成绝缘层；
    粘合步骤：将通过机械方式制成的导电线层粘合到基板上对应的绝缘层上，形成粘合结构；
    压合步骤：将所述粘合结构进行压合，制成电路板。
  2. 根据权利要求1所述的叠加式电路板制造方法，其特征在于：
    所述导电线层通过冲压方式制成，冲压步骤为：通过冲压模具将金属薄板冲压为设定形状、图案与尺寸的导电线层。
  3. 根据权利要求2所述的叠加式电路板制造方法，其特征在于：
    在所述冲压步骤中，通过冲压模具的冲压上模、冲压下模将位于冲压上模与冲压下模之间的金属薄板冲压为设定形状、图案与尺寸的导电线层，冲压上模底部的至少一个冲头与冲压下模至少一个凹模相配合。
  4. 根据权利要求1所述的叠加式电路板制造方法，其特征在于：
    在所述印刷步骤中使用的粘胶为导热胶或绝缘胶。
  5. 一种叠加式电路板，包括基板，其特征在于：在所述基板上印刷有粘胶作为绝缘层，所述粘胶上粘合并压合有通过机械方式制成的导电线层。
  6. 根据权利要求5所述的叠加式电路板，其特征在于：所述导电线层由金属薄板通过冲压模具冲压而成。
  7. 根据权利要求6所述的叠加式电路板，其特征在于：所述冲压模具包括冲压上模和冲压下模，所述冲压上模底部设有至少一个冲头，冲压下模设有与所述冲头配合的凹模。
  8. 根据权利要求5所述的叠加式电路板，其特征在于：粘胶为导热胶或绝缘胶。
PCT/CN2015/095576 2015-07-20 2015-11-25 一种叠加式电路板制造方法及叠加式电路板 WO2017012233A1 (zh)

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