WO2016125673A1 - Semiconductor module and power control unit - Google Patents

Semiconductor module and power control unit Download PDF

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Publication number
WO2016125673A1
WO2016125673A1 PCT/JP2016/052458 JP2016052458W WO2016125673A1 WO 2016125673 A1 WO2016125673 A1 WO 2016125673A1 JP 2016052458 W JP2016052458 W JP 2016052458W WO 2016125673 A1 WO2016125673 A1 WO 2016125673A1
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WO
WIPO (PCT)
Prior art keywords
lead terminal
semiconductor switching
switching element
semiconductor
layer
Prior art date
Application number
PCT/JP2016/052458
Other languages
French (fr)
Japanese (ja)
Inventor
要一 守屋
山本　祐樹
晴哉 宮田
斉 高木
高田　隆裕
伊東　拓二
Original Assignee
株式会社村田製作所
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Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to JP2016573312A priority Critical patent/JPWO2016125673A1/en
Publication of WO2016125673A1 publication Critical patent/WO2016125673A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Definitions

  • the present invention relates to a semiconductor module, and more particularly, to a semiconductor module in which a passive element of a peripheral circuit is sealed in a sealing resin to achieve high functionality.
  • the present invention also relates to a power control unit using the semiconductor module of the present invention.
  • Semiconductor modules for power conversion corresponding to inverters and the like are used as power sources for in-vehicle devices and industrial devices.
  • the semiconductor module is a combination of a plurality of semiconductor switching elements or a plurality of switching elements and a plurality of switching elements.
  • a circuit can be configured in combination with the freewheeling diode.
  • Patent Document 1 discloses two IGBTs (Insulated Gate Bipolar Transistors) as semiconductor switching elements between lead terminals (electrodes) arranged in three layers.
  • IGBTs Insulated Gate Bipolar Transistors
  • a semiconductor module is disclosed in which an insulated gate bipolar transistor) is connected to two free-wheeling diodes and the whole is sealed with a sealing resin.
  • Patent Document 2 two IGBTs each having a metal block (conductor block) attached to the upper surface between lead terminals arranged in three layers, and a metal block attached to each upper surface are also attached.
  • a semiconductor module is disclosed in which two freewheeling diodes are connected and the whole is sealed with a sealing resin.
  • JP 2014-183078 A Japanese Patent No. 4239580
  • a semiconductor module used as power sources for in-vehicle equipment and industrial equipment are not allowed to malfunction in order to ensure safety. Therefore, a semiconductor module is operating normally by arranging a shunt resistor element as a detection element for detecting an abnormal current and a thermistor element as a detection element for detecting abnormal heat generation around the semiconductor module. There is a case where it is constantly monitored.
  • a circuit such as a resistor element, a capacitor element, an inductor element or the like may be used to improve the power supply efficiency.
  • these passive elements can be sealed in the sealing resin of the semiconductor module, the functionality of the semiconductor module can be enhanced. Moreover, in vehicle equipment and industrial equipment, the number of parts used can be reduced, and productivity is improved. However, until now, these passive elements have been prepared as peripheral circuit components of the semiconductor module and have not been incorporated into the semiconductor module.
  • a detection element for detecting abnormal heat generation can be incorporated in the sealing resin of the semiconductor module, abnormal heat generation of the semiconductor switching element incorporated in the semiconductor module can be detected with high accuracy. However, until now, the detection element has not been incorporated into a semiconductor module.
  • the present invention has been made to solve the above-described conventional problems, and provides a semiconductor module in which passive elements (including detection elements) are functionally and reasonably incorporated in a sealing resin. For the purpose.
  • the semiconductor module of the present invention includes a plurality of semiconductor switching elements and at least one passive element bonded to the lead terminals, respectively, and sealing resin
  • the lead terminals are arranged in at least three layers of a first lead terminal layer, a second lead terminal layer, and a third lead terminal layer in the sealing resin.
  • the semiconductor switching element has both main surfaces, the signal electrode pad and one power electrode pad are formed on one main surface, the other power electrode pad is formed on the other main surface, Arranged in two lead terminal layers One lead terminal has both main surfaces, the other power electrode pad of the first semiconductor switching element is joined to one main surface, and the second semiconductor switching is connected to the other main surface via a metal block.
  • One power electrode pad of the element is bonded, and one power electrode pad of the first semiconductor switching element is bonded to a lead terminal disposed in the first lead terminal layer via a metal block, and the first semiconductor switching
  • the signal electrode pad of the element is connected to the lead terminal arranged in the second lead terminal layer via the connecting conductor, and the other power electrode pad of the second semiconductor switching element is arranged in the third lead terminal layer.
  • the signal electrode pad of the second semiconductor switching element is connected to the lead terminal disposed in the third lead terminal layer via the connection conductor, At least one passive element is sealed in the first sealing resin layer and / or at least one passive element is sealed in the second sealing resin layer and sealed in the first sealing resin layer
  • the height of the passive element having the largest height is higher than the sum of the height of the first semiconductor switching element and the height of the metal block bonded to one power electrode pad of the first semiconductor switching element.
  • the passive elements encapsulated in the second encapsulating resin layer that is small and / or has the largest height
  • the height of the second semiconductor switching element and one of the second semiconductor switching elements The total height of the metal blocks bonded to the power supply electrode pads was made smaller.
  • the semiconductor module further includes a third semiconductor switching element, and the passive element is sealed in the first sealing resin layer or the second sealing resin.
  • the third semiconductor switching element is sealed with the second sealing resin layer when the passive element is sealed with the first sealing resin layer, and the passive element is sealed with the second sealing resin layer.
  • the stop resin layer it may be encapsulated in the first encapsulating resin layer.
  • the third semiconductor switching element can be further sealed in the sealing resin.
  • this semiconductor module when the sealing resin layer is seen through in the vertical direction, the first semiconductor switching element and the second semiconductor switching element are completely overlapped. It can not be. That is, the first semiconductor switching element and the second semiconductor switching element may not overlap at all or may partially overlap even if they overlap. In this case, the heat generated by the first and second semiconductor switching elements can be efficiently dissipated.
  • a plurality of semiconductor switching elements and at least one passive element are bonded to lead terminals, respectively, and then sealed.
  • the lead terminal sealed with resin is arranged in at least three layers of a first lead terminal layer, a second lead terminal layer, and a third lead terminal layer in the sealing resin.
  • the semiconductor switching element has both main surfaces, a signal electrode pad and one power electrode pad are formed on one main surface, and the other power electrode pad is formed on the other main surface, Arranged in the second lead terminal layer
  • One lead terminal has both main surfaces, the other power electrode pad of the first semiconductor switching element is joined to one main surface, and the second semiconductor switching is connected to the other main surface via a metal block.
  • One power electrode pad of the element is bonded, and one power electrode pad of the first semiconductor switching element is bonded to a lead terminal disposed in the first lead terminal layer via a metal block, and the first semiconductor switching
  • the signal electrode pad of the element is connected to the lead terminal arranged in the second lead terminal layer via the connecting conductor, and the other power electrode pad of the second semiconductor switching element is arranged in the third lead terminal layer.
  • the signal electrode pad of the second semiconductor switching element is connected to the lead terminal disposed in the third lead terminal layer via the connection conductor, At least one passive element is bonded to the lead terminal disposed in the first lead terminal layer or the third lead terminal layer, and penetrates the second lead terminal layer to pass through the first sealing resin layer and the second sealing layer.
  • the height of the sealed passive element having the greatest height among the sealed passive elements is the height of the first semiconductor switching element and one power supply electrode of the first semiconductor switching element. Bonded to the height of the metal block bonded to the pad, the thickness of the lead terminal disposed in the second lead terminal layer, the height of the second semiconductor switching element, and one power electrode pad of the second semiconductor switching element It was made to become smaller than the sum total of the height of the made metal block.
  • the semiconductor module of the present invention (the semiconductor module described in claims 1 and 2) has a linear expansion coefficient of the sealing resin, the semiconductor switching element, the passive element, the lead terminal, the metal block, and the connection conductor constituting the semiconductor module. It is preferable that it is an intermediate value between the largest linear expansion coefficient and the smallest linear expansion coefficient among the respective linear thermal expansion coefficients. The reason will be described below. In the members constituting the semiconductor module, members having a large linear expansion coefficient and small members are mixed. Therefore, thermal stress due to the difference in linear expansion coefficient between these members is generated inside the semiconductor module.
  • the space of the semiconductor module is filled with a sealing resin having a linear expansion coefficient which is an intermediate value between the largest linear expansion coefficient and the smallest linear expansion coefficient among the linear expansion coefficients of the respective members constituting the semiconductor module. In this case, it is possible to suppress breakage of the joint portion and breakage of the mounting element.
  • the mechanical structure strength of the semiconductor module can be maintained by filling the space of the semiconductor module with a sealing resin. That is, when the sealing resin is an elastic body, the mechanical structure strength cannot be maintained. Therefore, the sealing resin preferably has an elastic modulus of 1 GPa or more.
  • the semiconductor module of the present invention includes a power supply circuit including a semiconductor switching element (a circuit for controlling opening and closing of the gate of the semiconductor switching element is a “control circuit”) It is preferable that a passive element, which is a component of “a power supply circuit” is a circuit whose flow is controlled, is joined to a lead terminal arranged in the first lead terminal layer or the third lead terminal layer. The reason will be described below.
  • a passive element which is a component of a power supply circuit including a semiconductor switching element, has a very small resistance component, not only when the passive element is a resistance element, but also a capacitor element and an inductor element.
  • the semiconductor module of the present invention is a semiconductor module for power conversion corresponding to an inverter or the like, and may be used for applications where a large amount of power is applied to a power supply circuit.
  • the passive element which is a component of the power supply circuit may generate a large amount of heat even if its resistance component is very small, resulting in a situation where the function guarantee temperature is exceeded. Therefore, measures against heat dissipation are required for the passive elements, which are the components of the power supply circuit, as in the semiconductor switching elements.
  • the heat generated inside the module is dissipated through the lead terminals, and at the same time, the heat is dissipated from the heat sinks described later disposed on both main surfaces of the module. Therefore, it is preferable that the passive element that is a component of the power supply circuit is bonded to the lead terminal arranged in the first lead terminal layer or the third lead terminal layer. As a result, heat generated from the passive element that is a constituent element of the power supply circuit is transferred to the lead terminals arranged in the joined first lead terminal layer or the third lead terminal layer and is radiated in the planar direction.
  • the resin plates described later are transmitted in the respective thickness directions, and are discharged to the outside from the heat radiating plates. .
  • the passive element which is a component of the power supply circuit, is dissipated through the two paths, and a sufficient heat dissipation path is secured, thereby preventing an excessive temperature rise. As a result, it is possible to continue to operate normally within the range of the guaranteed functional temperature of the passive element.
  • the passive element that is a component of the power supply circuit is a resistance element
  • the amount of heat generated due to the power loss due to the resistance component increases, so the passive element includes the first lead terminal layer. Or it is especially preferable to join to the lead terminal arrange
  • the first semiconductor switching element is bonded to the lead terminal arranged in the second lead terminal layer, but the heat generated from the first semiconductor switching element is applied to the second lead terminal layer.
  • the resin plate described later is transmitted in the thickness direction, Released from the heat sink. That is, in the first semiconductor switching element, even if it is joined to the lead terminal disposed in the second lead terminal layer, heat is radiated through the two paths, so that a sufficient heat dissipation path is provided. It will be secured.
  • the detection element can be a passive element sealed in a sealing resin layer.
  • a detection element such as a shunt resistor element or a thermistor element
  • the semiconductor module can be enhanced in function.
  • the thermistor element is sealed with a sealing resin, abnormal heat generation of the semiconductor switching element can be detected with high accuracy.
  • a ceramic plate may be provided, and the lead terminal may be attached to the ceramic substrate through an alloy containing at least an active metal that reacts with the ceramic constituents, Ag, and Cu.
  • the lead terminal can be firmly attached to the ceramic plate having high strength.
  • thermosetting resin plate may be provided, and the lead terminal may be directly attached to the resin plate without using an adhesive.
  • the lead terminal can be attached to the resin plate by thermocompression-bonding the lead terminal to the uncured resin plate and further heating to cure the resin plate.
  • a heat sink exposed from the surface of the sealing resin may be provided, and the outer peripheral edge of the heat sink may be embedded in the sealing resin.
  • the heat generated by the semiconductor switching element can be efficiently dissipated by the heat radiating plate.
  • the outer peripheral edge of the heat sink is embedded in the sealing resin, peeling between the heat sink and the sealing resin is unlikely to occur, and mixing of moisture into the inside from this portion is suppressed, although the heat radiating plate is exposed on the surface of the sealing resin, high moisture resistance and high reliability can be maintained.
  • the thickness of the lead terminals arranged in the second lead terminal layer is larger than the thickness of the lead terminals arranged in the first lead terminal layer and the third lead terminal layer. In this case, the maximum junction temperature of the semiconductor switching element can be kept low. In addition, temperature variations between the semiconductor switching elements can be reduced.
  • a snubber circuit in parallel with the semiconductor switching element. In this case, it is possible to reduce the parasitic inductance and resistance generated in wiring, wire bonding, and the like during switching, thereby reducing noise.
  • the semiconductor module of the present invention can constitute various equivalent circuits.
  • a P-side terminal, an N-side terminal, an intermediate terminal, two semiconductor switching elements, and a shunt resistance element as a passive element
  • drain or collector of one semiconductor switching element hereinafter referred to as “drain” together, the “drain” can be read as “collector”.
  • source Connected to the source or emitter of the semiconductor switching element (hereinafter referred to as “source” together, but the “source” can be read as “emitter”).
  • the drain of one semiconductor switching element is connected, and a shunt resistor is connected to the source of the semiconductor switching element.
  • An equivalent circuit in which one end of the element is connected, the N-side terminal is connected to the other end of the shunt resistor element, and an intermediate terminal is connected to the connection point of the two semiconductor switching elements can be configured.
  • a P-side terminal, an N-side terminal, an intermediate terminal, three semiconductor switching elements, and a shunt resistance element as a passive element
  • the drain of one semiconductor switching element is connected to the P-side terminal
  • the drain of another semiconductor switching element is connected to the source of the semiconductor switching element
  • the source of the semiconductor switching element is One end of the shunt resistor element is connected
  • the N-side terminal is connected to the other end of the shunt resistor element
  • the source of the remaining one semiconductor switching element is connected to the connection point of the two semiconductor switching elements.
  • a plurality of semiconductor modules of the present invention may be connected in parallel to constitute a semiconductor module having a large-scale equivalent circuit.
  • the semiconductor module of the present invention can be used, for example, as a power conversion unit of an inverter.
  • a plurality of (for example, six) semiconductor modules of the present invention can be concentrically attached to the case to constitute a power control unit.
  • the power control unit can be configured by mounting two semiconductor modules of the present invention facing each other in a case. Since the semiconductor module of the present invention is small, the power control unit can be downsized.
  • the power control unit has a heat sink attached to the upper surface of the attached semiconductor module.
  • the heat generated by the semiconductor module can be efficiently dissipated.
  • an individual heat sink may be attached to each semiconductor module, or one common heat sink may be attached to a plurality of semiconductor modules.
  • the power control unit can be further downsized.
  • a passive element is sealed in a sealing resin, and has high functionality.
  • the power control unit of the present invention is miniaturized because it uses a miniaturized semiconductor module.
  • FIG. 1A is a cross-sectional view showing a semiconductor module 100 according to the first embodiment.
  • FIG. 1B is a main part cross-sectional view showing the semiconductor module 100.
  • FIG. 2 is a cross-sectional view showing a semiconductor module 200 according to the second embodiment.
  • FIG. 3 is a cross-sectional view showing a semiconductor module 300 according to the third embodiment.
  • FIG. 4A is a plan view showing a semiconductor module 400 according to the fourth embodiment.
  • FIG. 4B is a cross-sectional view showing the semiconductor module 400 and shows a portion XX in FIG.
  • FIG. 5 is an equivalent circuit diagram showing a semiconductor module 500 according to the fifth embodiment.
  • FIG. 6 is an equivalent circuit diagram showing a semiconductor module 600 according to the sixth embodiment.
  • FIG. 7 is an equivalent circuit diagram showing a semiconductor module 700 according to the seventh embodiment.
  • FIG. 8 is an equivalent circuit diagram showing a semiconductor module 800 according to the eighth embodiment.
  • FIG. 9 is an equivalent circuit diagram showing a semiconductor module 900 according to the ninth embodiment.
  • FIG. 10 is an equivalent circuit diagram showing a semiconductor module 1000 according to the tenth embodiment.
  • FIG. 11A is a cross-sectional view showing a semiconductor module 1300 according to the thirteenth embodiment.
  • FIG. 11B is a cross-sectional view illustrating the method for manufacturing the semiconductor module 1300. It is an equivalent circuit diagram which shows the semiconductor module 1500 concerning 15th Embodiment.
  • FIG. 13A is an exploded plan view showing a semiconductor module 1600 according to the sixteenth embodiment.
  • FIG. 13B is a plan view showing the semiconductor module 1600.
  • FIG. 13A is an exploded plan view showing a semiconductor module 1600 according to the sixteenth embodiment.
  • FIG. 14A is an exploded plan view showing a semiconductor module 1700 according to the seventeenth embodiment.
  • FIG. 14B is a plan view showing the semiconductor module 1700.
  • FIG. 15A is an exploded plan view showing a semiconductor module 1800 according to the eighteenth embodiment.
  • FIG. 15B is a plan view showing the semiconductor module 1800.
  • FIG. 16A is an exploded plan view showing a semiconductor module 1900 according to the nineteenth embodiment.
  • FIG. 16B is a plan view showing the semiconductor module 1900.
  • First Embodiment 1A and 1B show a semiconductor module 100 according to a first embodiment of the present invention.
  • FIG. 1A is a cross-sectional view of the semiconductor module 100.
  • FIG. 1B is a cross-sectional view of a main part of the semiconductor module 100. However, illustration of the sealing resin 11 is omitted in FIG.
  • the semiconductor module 100 includes a plurality of plate-like lead terminals 51a, 51b, 51c, 52a, 52b, 53a, 53b made of copper-based metal, aluminum-based metal, iron-based metal, or the like.
  • the lead terminals 51a to 53b are arranged in three layers of a first lead terminal layer 1L, a second lead terminal layer 2L, and a third lead terminal layer 3L.
  • the lead terminals 51a, 51b, 51c arranged on the first lead terminal layer 1L are in contact with the resin plate 6a in advance. Further, the lead terminals 53a and 53b arranged on the third lead terminal layer 3L are in contact with the resin plate 6b in advance.
  • the resin plates 6a and 6b are made of, for example, an epoxy resin, a polyimide resin, a bismaleimide resin, a silicone resin, or the like.
  • the resin plates 6 a and 6 b are located in a heat transfer path for dissipating heat generated in the semiconductor switching element from both surfaces of the semiconductor module 100.
  • a resin plate having a low thermal resistance filled with a filler having a high thermal conductivity such as alumina, aluminum nitride, silicon nitride, or silicon carbide for the resin plates 6a and 6b.
  • the heat sink 7a is also in contact with the resin plate 6a. Further, the heat sink 7b is also in contact with the resin plate 6b.
  • the heat sinks 7a and 7b are made of a metal plate having a high thermal conductivity such as a copper-based metal, an aluminum-based metal, and an iron-based metal.
  • the semiconductor module 100 includes a first semiconductor switching element 1 and a second semiconductor switching element 2.
  • the first semiconductor switching element 1 has both main surfaces, the signal electrode pad 1a and one power electrode pad 1b are formed on one main surface, and the other main surface.
  • the other power electrode pad 1c is formed on the surface.
  • the second semiconductor switching element 2 has both main surfaces, and a signal electrode pad 2a and one power electrode pad 2b are formed on one main surface, and the other The other power electrode pad 2c is formed on the main surface.
  • the other power electrode pad 1c of the first semiconductor switching element 1 is connected to one of the lead terminals 52a arranged on the second lead terminal layer 2L by a bonding material 4 made of solder, nano-sintered metal, conductive resin, or the like. It is joined to the main surface.
  • a metal block 8 a is bonded to one power supply electrode pad 1 a of the first semiconductor switching element 1 by a bonding material 4.
  • the main surface of the metal block 8a that is not bonded to the power supply electrode pad 1a is bonded to the lead terminal 51c disposed on the first lead terminal layer 1L by the bonding material 4.
  • the signal electrode pad 1a of the first semiconductor switching element 1 is electrically connected to a lead terminal 52b disposed on the second lead terminal layer 2L by a connecting conductor 9a made of a metal wire.
  • the other power supply electrode pad 2c of the second semiconductor switching element 2 is bonded to one main surface of the lead terminal 53a disposed on the third lead terminal layer 3L by the bonding material 4.
  • a metal block 8 b is bonded to one power supply electrode pad 2 b of the second semiconductor switching element 2 by a bonding material 4.
  • the main surface of the metal block 8b that is not bonded to the power supply electrode pad 2a is bonded to the other main surface of the lead terminal 52a disposed in the second lead terminal layer 2L by the bonding material 4.
  • the signal electrode pad 2a of the second semiconductor switching element 2 is electrically connected to a lead terminal 53b arranged on the third lead terminal layer 3L by a connecting conductor 9b made of a metal wire.
  • the bonding material 4 As described above, for example, solder, nano-sintered metal, conductive resin, or the like is used for the bonding material 4, but the heat generated in the power supply path or the semiconductor switching element that increases the amount of electrical loss is used.
  • a nano-sintered metal made of silver, copper, gold or the like having a low specific resistance and a high thermal conductivity is used. It is preferable.
  • the bonding material 4 does not need to be the same bonding material in all the portions where the bonding material 4 is located, and is suitable from various bonding materials in consideration of the characteristics of the bonding material required in each portion. You can choose the right one.
  • connection between the signal electrode pad 1a and the lead terminal 52b and the connection between the signal electrode pad 2a and the lead terminal 53b are not limited as long as they are electrically connected.
  • metal wires are used as the connecting conductors 9a and 9b.
  • the connecting conductors 9a and 9b are not limited to metal wires, and metal clips or the like may be used instead. good.
  • the semiconductor module 100 includes a passive element 10.
  • the passive element 10 includes, for example, a resistance element, a thermistor element, a capacitor element, an inductance element, and the like.
  • the passive element 10 may be a detection element that detects abnormal current or abnormal heat generation.
  • a pair of electrode pads (not shown) is formed on one main surface, and one electrode pad is bonded to the lead terminal 51 a disposed on the first lead terminal layer 1 ⁇ / b> L by the bonding material 4.
  • the other electrode pad is bonded to the lead terminal 51b disposed on the first lead terminal layer 1L by the bonding material 4.
  • the first semiconductor switching element 1, the second semiconductor switching element 2, the metal blocks 8a and 8b, and the passive element 10 are encapsulated resin together with lead terminals 51a to 53b, resin plates 6a and 6b, and connection conductors 9a and 9b. 11 is sealed. Lead ends of the lead terminals 51a, 51c, 52a, 52b, 53a, 53b are led out from the sealing resin 11. Further, the heat radiating plates 7 a and 7 b are exposed from both main surfaces of the sealing resin 11.
  • the sealing resin 11 is made of, for example, an epoxy resin, a polyimide resin, a bismaleimide resin, a silicone resin, or the like.
  • the sealing resin 11 includes a first sealing resin layer 1M between the first lead terminal layer 1L and the second lead terminal layer 2L, and a second one between the second lead terminal layer 2L and the third lead terminal layer 3L. 2 sealing resin layers 2M.
  • the passive element 10 is sealed.
  • the height of the passive element 10 is designed to be smaller than the sum of the height of the semiconductor switching element 1 and the height of the metal block 8a.
  • the passive element 10 supports the lead terminal 52a disposed on the second lead terminal layer 2L. This is because there is a fear.
  • the passive element 10 is supported by the lead terminals 52a arranged on the second lead terminal layer 2L, the main surface of the semiconductor module 100 partially swells or tilts, causing a defective appearance or a semiconductor. This is because problems may occur when the module 100 is incorporated in a device or apparatus.
  • the bonding material 4 for bonding the first semiconductor switching element 1 and the metal block 8a to each other the bonding material 4 for bonding the first semiconductor switching element 1 to the lead terminal 52a, and the metal block 8a to the lead terminal 51c. This is because there is a possibility that the bonding material 4 to be bonded to the detachment causes disconnection.
  • the passive element 10 Even if the height of the passive element 10 is the same as the sum of the height of the semiconductor switching element 1 and the height of the metal block 8a, if the height of the passive element 10 is larger than the design due to manufacturing errors, This is because, when the height of the semiconductor switching element 1 or the metal block 8a is smaller than the design, the passive element 10 may be supported on the lead terminal 52a disposed on the second lead terminal layer 2L. When the passive element 10 is supported by the lead terminals 52a arranged on the second lead terminal layer 2L, the main surface of the semiconductor module 100 partially swells or tilts, causing a defective appearance or a semiconductor. This is because problems may occur when the module 100 is incorporated in a device or apparatus.
  • the bonding material 4 for bonding the first semiconductor switching element 1 and the metal block 8a to each other the bonding material 4 for bonding the first semiconductor switching element 1 to the lead terminal 52a, and the metal block 8a to the lead terminal 51c. This is because there is a possibility that the bonding material 4 to be bonded to the detachment causes disconnection.
  • the thickness of the bonding material 4 for bonding the first semiconductor switching element 1 to the lead terminal 52b, the metal block 8a to the lead terminal 51c, and the passive element 10 to the lead terminals 51a and 51b, respectively It is necessary to consider the thickness of the bonding material 4 for bonding the semiconductor switching element 1 and the metal block 8a.
  • the thickness of the bonding material 4 is very small compared to the height of the passive element 10, the semiconductor switching element 1, and the metal block 8 a, and at least the height of the passive element 10 is equal to the height of the semiconductor switching element 1.
  • the main surface of the semiconductor module 100 partially swells or tilts, causing a problem when the semiconductor module 100 is incorporated in an apparatus or device. In addition, it is possible to prevent the bonding material 4 from being detached and causing poor conduction inside.
  • the semiconductor module 100 In the semiconductor module 100 according to the first embodiment, only one passive element 10 is sealed in the first sealing resin layer 1M between the first lead terminal layer 1L and the second lead terminal layer 2L. However, a plurality of passive elements 10 may be sealed in the first sealing resin layer 1M. In this case, the height of the passive element 10 having the largest height among the passive elements 10 sealed in the first sealing resin layer 1M is set to be higher than the sum of the height of the semiconductor switching element 1 and the height of the metal block 8a. What is necessary is just to design so that it may become small.
  • the passive element 10 may be sealed not in the first sealing resin layer 1M but in the second sealing resin layer 2M.
  • another passive element 10 may be sealed in the second sealing resin layer 2M.
  • the thermal expansion coefficient of the sealing resin 11 is that of the semiconductor switching elements 1 and 2 (linear expansion coefficient: 4 ppm / K) and the passive element 10 (linear expansion coefficient: 19 ppm / K), lead terminals 51a, 51b, 51c, 52a, 52b, 53a, 53b (linear expansion coefficient: 17 ppm / K), metal blocks 8a, 8b (linear expansion coefficient: 17 ppm / K), connection conductor 9a, Among 9b (linear expansion coefficient: 24 ppm / K), the one having the intermediate value between the largest linear expansion coefficient and the smallest linear expansion coefficient was used.
  • the linear expansion coefficient of the constituent member varies depending on the material of the applied constituent member. That is, depending on the material of the applied structural member, the member having the largest linear expansion coefficient, the member having the smallest linear expansion coefficient, and the values of these linear expansion coefficients change. The selection range of the linear expansion coefficient is changed as appropriate.
  • the members constituting the semiconductor module 100 include a member having a large linear expansion coefficient and a member having a small linear expansion coefficient. Therefore, thermal stress due to a difference in linear expansion coefficient between these members is generated inside the semiconductor module 100.
  • the following problems may occur due to thermal fatigue caused by this thermal stress.
  • the junction between 9a, the junction between the semiconductor switching element 2 and the connecting conductor 9b, the junction between the semiconductor switching element 1 and the metal block 8a, and the junction between the semiconductor switching element 2 and the metal block 8b may be broken. there were.
  • mounting elements such as the semiconductor switching elements 1 and 2 and the passive element 10 are destroyed.
  • a sealing resin 11 having a linear expansion coefficient intermediate between the largest linear expansion coefficient and the smallest linear expansion coefficient among the linear expansion coefficients of the respective members constituting the semiconductor module 100 is provided in the space of the semiconductor module 100.
  • the passive element is bonded to the lead terminal arranged in the first lead terminal layer or the third lead terminal layer.
  • the passive element is a resistance element, as well as a capacitor element and an inductor element, the passive element has a minute resistance component, so when the semiconductor module operates, not only the semiconductor switching element, Passive elements can also generate heat.
  • the passive element that self-heats as described above it is necessary to take a heat dissipation measure like the semiconductor switching element.
  • the passive element 10 is joined to the lead terminals 51a and 51b arranged in the first lead terminal layer. Thereby, the heat generated from the passive element is transmitted to the lead terminal 51a disposed in the first lead terminal layer in the plane direction and released to the outside, and at the same time, the lead terminal disposed in the first lead terminal layer. From 51a and 51b, the resin plate 6a is transmitted in the respective thickness directions, and is discharged from the heat radiating plate to the outside. By securing the two heat dissipation paths, the passive element can continue to operate normally within the function guarantee temperature range without excessively increasing the temperature.
  • the semiconductor module 100 according to the first embodiment having the above structure can be manufactured, for example, by the following method.
  • the lead terminals 51a, 51b, 51c arranged on the first lead terminal layer 1L and the heat radiating plate 7a are attached to the resin plate 6a.
  • lead terminals 51a, 51b, 51c previously connected by a lead frame (not shown) are bonded to one main surface of the resin plate 6a with an adhesive, and the heat radiating plate 7a is bonded to the other main surface. Glue with the agent.
  • the lead terminals 51a, 51b, 51c are arranged on one main surface of the uncured resin body, and the heat radiating plate 7a is disposed on the other main surface and hot-pressed to thermally cure the uncured resin sheet. 6a, lead terminals 51a, 51b, 51c previously connected to one main surface of the resin plate 6a by a lead frame (not shown), the heat sink 7a on the other main surface, and an adhesive. It is also possible to bond without.
  • the lead terminals 53a and 53b and the heat radiating plate 7b disposed on the third lead terminal layer 3L previously connected by the lead frame (not shown) are attached to the resin plate 6b.
  • the lead terminals 53a and 53b are bonded to one main surface of the resin plate 6b with an adhesive
  • the heat radiating plate 7b is bonded to the other main surface with an adhesive.
  • the lead terminals 53a and 53b are disposed on one main surface of the uncured resin body, and the heat sink 7b is disposed on the other main surface and hot-pressed, and the uncured resin sheet is thermally cured to form the resin plate 6b.
  • lead terminals 53a, 53b, 53c previously connected to one main surface of the resin plate 6b by a lead frame (not shown), and the heat radiating plate 7b on the other main surface without an adhesive. It can also be glued.
  • the lead terminal 52a and the lead terminal 52b arranged in the second lead terminal layer 2L are not in contact with the resin plate in the present embodiment. However, the lead terminal 52a and the lead terminal 52b may be in contact with the resin plate. In the present embodiment, the lead terminal 52a and the lead terminal 52b are not in contact with the resin plate, but at the initial stage of manufacture, the lead terminal 52a and the lead terminal 52b are formed by a lead frame (not shown). It is connected.
  • the first semiconductor switching element 1 is bonded to the lead terminal 52 a by the bonding material 4.
  • the second semiconductor switching element 2 is bonded to the lead terminal 53 a by the bonding material 4.
  • nano-sintered metal, solder, conductive resin or the like is used for the bonding material 4.
  • the signal electrode pad 1a of the first semiconductor switching element 1 and the lead terminal 52b are connected by the connecting conductor 9a.
  • the signal electrode pad 2a of the second semiconductor switching element 2 and the lead terminal 53b are connected by the connection conductor 9b.
  • they are connected by wire bonding.
  • the signal electrode pads 1a and 2a and the lead terminals 52b and 53b are connected with nano-sintered metal, solder, conductive resin, or the like.
  • the metal block 8 a is bonded to the power electrode pad 1 b of the first semiconductor switching element 1 by the bonding material 4.
  • the metal block 8 b is bonded to the power supply electrode pad 2 a of the second semiconductor switching element 2 by the bonding material 4.
  • nano-sintered metal, solder, conductive resin or the like is used for the bonding material 4.
  • a pair of electrode pads (not shown) of the passive element 10 are bonded to the lead terminals 51a and 51b attached to the resin plate 6a by the bonding material 4.
  • the bonding material 4 nano-sintered metal, solder, conductive resin or the like is used for the bonding material 4.
  • the metal block 8 a (the surface opposite to the bonding surface) bonded to the power supply electrode pad 1 b of the first semiconductor switching element 1 is connected to the lead terminal 51 c by the bonding material 4. Furthermore, the metal block 8 b (the surface opposite to the bonding surface) bonded to the power supply electrode pad 2 a of the second semiconductor switching element 2 is bonded to the lead terminal 52 a with the bonding material 4. In this case, nano-sintered metal, solder, conductive resin or the like is used for the bonding material 4.
  • the integrated first semiconductor switching element 1, second semiconductor switching element 2, metal blocks 8a and 8b, passive element 10, lead terminals 51a to 53b, resin plates 6a and 6b, heat sink 7a, 7b and connecting conductors 9a and 9b are accommodated in a mold (not shown).
  • a resin is injected into the mold and cured, and the first semiconductor switching element 1, the second semiconductor switching element 2, the metal blocks 8a and 8b, the passive element 10, the lead terminals 51a to 53b, the resin plate 6a, 6b and connecting conductors 9a, 9b are sealed in the sealing resin 11.
  • the tips of the lead terminals 51a, 51c, 52a, 52b, 53a, 53b are derived from the sealing resin 11.
  • the heat radiating plates 7 a and 7 b are exposed from both main surfaces of the sealing resin 11.
  • the semiconductor module 100 according to the first embodiment is completed by leaving only the necessary portions of the lead terminals 51a to 53b derived from the sealing resin 11 and cutting off unnecessary lead frames.
  • FIG. 2 shows a semiconductor module 200 according to the second embodiment of the present invention.
  • FIG. 2 is a cross-sectional view of the semiconductor module 200.
  • the semiconductor module 200 according to the second embodiment includes a lead terminal 52a disposed on the second lead terminal layer 2L of the semiconductor module 100 according to the first embodiment shown in FIGS.
  • the passive element 10 is changed to another one.
  • Other configurations of the semiconductor module 200 are the same as those of the semiconductor module 100. This will be described below.
  • the semiconductor module 200 includes a lead terminal 52c in the second lead terminal layer 2L.
  • the lead terminal 52c is made of a wide plate-like metal, and penetrates between both main surfaces to form through holes 52c-h.
  • the other power electrode pad (not shown) of the first semiconductor switching element 1 is bonded to one main surface of the lead terminal 52c by the bonding material 4. Further, a metal block 8 b bonded to one power supply electrode pad (not shown) of the second semiconductor switching element 2 is bonded to the other main surface of the lead terminal 52 c by a bonding material 4.
  • the semiconductor module 200 includes the passive element 20 having a large height.
  • the passive element 20 includes, for example, a resistance element, a thermistor element, a capacitor element, an inductance element, and the like.
  • a pair of electrode pads (not shown) is formed on one main surface, and one electrode pad is bonded to the lead terminal 51a disposed on the first lead terminal layer 1L by the bonding material 4.
  • the other electrode pad is bonded to the lead terminal 51b disposed on the first lead terminal layer 1L by the bonding material 4.
  • the passive element 20 is disposed through the through hole 52c-h formed in the lead terminal 52c.
  • the first semiconductor switching element 1, the second semiconductor switching element 2, the metal blocks 8a and 8b, and the passive element 20 are lead terminals 51a, 51b, 51c, 52b, 52c, 53a and 53b, resin plates 6a and 6b, connection Along with the conductors 9a and 9b, the resin is sealed in the sealing resin 11. Further, the heat radiating plates 7 a and 7 b are exposed from both main surfaces of the sealing resin 11.
  • the height of the passive element 20 is the height of the first semiconductor switching element 1, the height of the metal block 8 a bonded to one power supply electrode pad of the first semiconductor switching element 1, and the second lead terminal layer.
  • the height of the lead terminal 52c thus formed, the height of the second semiconductor switching element 2, and the height of the metal block 8b joined to one power electrode pad of the second semiconductor switching element 2 are made smaller. Designed to.
  • the passive element 20 is supported by the lead terminals 53a arranged on the third lead terminal layer 3L, and the main surface of the semiconductor module 200 partially swells or tilts, whereby the semiconductor module 200 is incorporated in a device or apparatus. This is to prevent the occurrence of problems or the occurrence of poor conduction due to the bonding material 4 coming off inside.
  • the linear expansion coefficient of the sealing resin 11 is set so that the semiconductor switching elements 1, 2, the passive element 20, the lead terminals 51a, 51b, 51c, 52b, 52c, 53a, 53b, and the metal blocks 8a, 8b.
  • the connection conductors 9a and 9b the intermediate coefficient between the largest linear expansion coefficient and the smallest linear expansion coefficient was used. This is to prevent breakage of the joint between the members and destruction of the mounting elements (semiconductor switching elements 1 and 2 and passive element 20) even when the semiconductor module 200 is exposed to high and low temperatures.
  • FIG. 3 shows a semiconductor module 300 according to the third embodiment of the present invention.
  • FIG. 3 is a cross-sectional view of the semiconductor module 300.
  • the semiconductor module 300 according to the third embodiment is similar to the semiconductor module 100 according to the first embodiment shown in FIGS. 1A and 1B, except for the third semiconductor switching element 3, the metal block 8c, and the connection conductor. 9c was added. And with the addition of the third semiconductor switching element 3, the metal block 8c, and the connection conductor 9c, the configuration of the lead terminals arranged in the third lead terminal layer 3L was changed. Other configurations of the semiconductor module 300 are the same as those of the semiconductor module 100. This will be described below.
  • the semiconductor module 300 includes lead terminals 53b, 53c, 53d, and 53e on the third lead terminal layer 3L. Since the lead terminals 53c, 53d, and 53e are provided, the lead terminal 53a provided in the semiconductor module 100 is not provided.
  • the lead terminals 53b, 53c, 53d, and 53e are in contact with the resin plate 6b.
  • the other power electrode pad (not shown) of the second semiconductor switching element 2 is bonded to the lead terminal 53e by the bonding material 4.
  • the third semiconductor switching element 3 As described above, in the semiconductor module 300, the third semiconductor switching element 3, the metal block 8c, and the connection conductor 9c are added.
  • the third semiconductor switching element 3 has both main surfaces, a signal electrode pad (not shown) and one power electrode pad (not shown) are formed on one main surface, and the other main surface is formed.
  • the other power electrode pad (not shown) is formed.
  • the other power supply electrode pad of the third semiconductor switching element 3 is bonded to the lead terminal 53c by the bonding material 4.
  • a metal block 8 c is bonded to one power supply electrode pad of the third semiconductor switching element 3 by a bonding material 4.
  • the main surface on the opposite side of the metal block 8c is bonded to the lead terminal 52a disposed on the second lead terminal layer 2L by the bonding material 4.
  • the signal electrode pad of the third semiconductor switching element 3 is electrically connected to the lead terminal 53d by the connecting conductor 9c.
  • the linear expansion coefficient of the sealing resin 11 is set so that the semiconductor switching elements 1, 2, 3, the passive element 10, the lead terminals 51a, 51b, 51c, 52a, 52b, 53b, 53c, 53d, 53e.
  • the metal blocks 8a, 8b, and 8c and the connecting conductors 9a, 9b, and 9c an intermediate value between the largest linear expansion coefficient and the smallest linear expansion coefficient was used. This is to prevent breakage of the joint between the members and destruction of the mounting elements (semiconductor switching elements 1, 2, 3 and the passive element 10) even when the semiconductor module 300 is exposed to high and low temperatures.
  • the passive element 10 is joined to the lead terminals 51a and 51b arranged in the first lead terminal layer. This is because a sufficient heat dissipation path from the passive element 10 is secured and an excessive temperature rise of the passive element 10 is prevented.
  • FIG. 4A and 4B show a semiconductor module 400 according to the fourth embodiment of the present invention.
  • FIG. 4A is a plan view of the semiconductor module 400.
  • FIG. 4B is a cross-sectional view of the semiconductor module 400 and shows a portion XX in FIG.
  • the semiconductor module 400 concerning 4th Embodiment shifted the sealing position of the 2nd semiconductor switching element 2 of the semiconductor module 100 concerning 1st Embodiment shown to FIG. 1 (A), (B).
  • the sealing position of the second semiconductor switching element 2 is shifted, the configuration of the lead terminals arranged in the third lead terminal layer 3L is changed.
  • Other configurations of the semiconductor module 400 are the same as those of the semiconductor module 100. This will be described below.
  • the semiconductor module 400 includes lead terminals 53f and 53g in the third lead terminal layer 3L.
  • the lead terminal 53f replaces the lead terminal 53a of the semiconductor module 100 according to the first embodiment, and is shorter than the lead terminal 53a.
  • the lead terminal 53g replaces the lead terminal 53b of the semiconductor module 100 according to the first embodiment and is longer than the lead terminal 53b.
  • the other power electrode pad (not shown) of the second semiconductor switching element 2 is bonded to the lead terminal 53f by the bonding material 4. Further, the signal electrode pad of the second semiconductor switching element 2 is electrically connected to the lead terminal 53g by the connection conductor 9b.
  • the first semiconductor switching element 1 and the second semiconductor switching element 2 are arranged so as not to completely overlap when the sealing resin layers 1M and 2M are seen through in the vertical direction. Yes.
  • the first semiconductor switching element 1 and the second semiconductor switching element 2 slightly overlap, but they may not overlap at all.
  • heat generated by the first semiconductor switching element 1 and the second semiconductor switching element 2 is generated by the first semiconductor switching element 1 and the second semiconductor switching element 2. May accumulate in the vicinity of the metal block 8b and the lead terminal 52a in the middle of the region, and the temperature in the vicinity may rise excessively.
  • the semiconductor module 400 is arranged so that the first semiconductor switching element 1 and the second semiconductor switching element 2 do not completely overlap with each other.
  • the heat generated by the first semiconductor switching element 1 and the second semiconductor switching element 2 can be efficiently dissipated.
  • the linear expansion coefficient of the sealing resin 11 is set so that the semiconductor switching elements 1, 2, the passive element 10, the lead terminals 51a, 51b, 51c, 52a, 52b, 53f, 53g, and the metal blocks 8a, 8b.
  • the connection conductors 9a and 9b the intermediate coefficient between the largest linear expansion coefficient and the smallest linear expansion coefficient was used. This is to prevent breakage of the joint between the members and destruction of the mounting elements (semiconductor switching elements 1 and 2 and the passive element 10) even when the semiconductor module 400 is exposed to high and low temperatures.
  • FIG. 5 shows an equivalent circuit of a semiconductor module 500 according to the fifth embodiment of the present invention.
  • the semiconductor module 500 includes a P-side terminal P, an N-side terminal N, an intermediate terminal U1, two semiconductor switching elements S1 and S2, and a shunt resistor element RS as a passive element.
  • the drain of the semiconductor switching element S1 is connected to the P-side terminal P
  • the drain of the semiconductor switching element S2 is connected to the source of the semiconductor switching element S1
  • the shunt resistance element is connected to the source of the semiconductor switching element S2.
  • One end of RS is connected, and the N-side terminal N is connected to the other end of the shunt resistor element RS .
  • an intermediate terminal U1 is connected to a connection point between the semiconductor switching element S1 and the semiconductor switching element S2.
  • the semiconductor module 500 can be realized by the structure of the semiconductor module 100 according to the first embodiment shown in FIGS. That is, the semiconductor switching element S1 is the first semiconductor switching element 1 of the semiconductor module 100, the semiconductor switching element S2 is the second semiconductor switching element 2 of the semiconductor module 100, and the shunt resistance element RS is the passive element 10 of the semiconductor module 100.
  • the semiconductor switching element S1 is the first semiconductor switching element 1 of the semiconductor module 100
  • the semiconductor switching element S2 is the second semiconductor switching element 2 of the semiconductor module 100
  • the shunt resistance element RS is the passive element 10 of the semiconductor module 100.
  • FIG. 6 shows an equivalent circuit of a semiconductor module 600 according to the sixth embodiment of the present invention.
  • the semiconductor module 600 includes a P-side terminal P, an N-side terminal N, an intermediate terminal U1, three semiconductor switching elements S1, S2, and S3, and a shunt resistor element RS as a passive element.
  • the drain of the semiconductor switching element S1 is connected to the P-side terminal P
  • the drain of the semiconductor switching element S2 is connected to the source of the semiconductor switching element S1
  • the shunt resistance element is connected to the source of the semiconductor switching element S2.
  • One end of RS is connected, and the N-side terminal N is connected to the other end of the shunt resistor element RS .
  • the source of the semiconductor switching element S3 is connected to the connection point between the semiconductor switching element S1 and the semiconductor switching element S2, and the intermediate terminal U1 is connected to the drain of the semiconductor switching element S3.
  • the semiconductor module 600 can be realized by the structure of the semiconductor module 300 according to the third embodiment shown in FIG. That is, the semiconductor switching element S1 is the first semiconductor switching element 1 of the semiconductor module 300, the semiconductor switching element S2 is the second semiconductor switching element 2 of the semiconductor module 300, and the semiconductor switching element S3 is the third semiconductor switching element of the semiconductor module 300.
  • the element 3 and the shunt resistor element RS are configured by the passive element 10 of the semiconductor module 300, and by connecting predetermined lead terminals, an equivalent circuit of the semiconductor module 600 can be obtained from the semiconductor module 300 according to the third embodiment. It can be realized by the structure.
  • FIG. 7 shows an equivalent circuit of a semiconductor module 700 according to the seventh embodiment of the present invention.
  • the semiconductor module 700 constitutes a power conversion unit of the inverter.
  • the semiconductor module 700 includes a P-side terminal P, an N-side terminal N, and three intermediate terminals U1 to U3.
  • the semiconductor module 700 has a configuration in which three semiconductor modules 500 according to the fifth embodiment shown in FIG. 5 are connected in parallel between a P-side terminal P and an N-side terminal N. Therefore, as can be seen from the description of the fifth embodiment, the semiconductor module 700 is a composite of three semiconductor modules 100 according to the first embodiment shown in FIGS. This can be realized by connecting the parts.
  • FIG. 8 shows an equivalent circuit of a semiconductor module 800 according to the eighth embodiment of the present invention.
  • the semiconductor module 800 constitutes a power conversion unit of the inverter.
  • the semiconductor module 800 includes a P-side terminal P, an N-side terminal N, and three intermediate terminals U1 to U3.
  • the semiconductor module 800 has a configuration in which three semiconductor modules 600 according to the sixth embodiment shown in FIG. 6 are connected in parallel between a P-side terminal P and an N-side terminal N.
  • the semiconductor module 800 combines the three semiconductor modules 300 according to the third embodiment shown in FIG. 3 and connects between predetermined portions. Can be realized.
  • FIG. 9 shows an equivalent circuit of a semiconductor module 900 according to the ninth embodiment of the present invention.
  • the semiconductor module 900 constitutes an inverter power converter.
  • the semiconductor module 900 includes a P-side terminal P, an N-side terminal N, three intermediate terminals U1 to U3, six signal terminals V1 to V6, six semiconductor switching elements S1 to S6, and a snubber capacitor. It comprises a C S, and the thermistor Thm, 3 pieces of the shunt resistor R S, and six gate resistance R G.
  • the drain of the semiconductor switching element S1 is connected to the P-side terminal P
  • the drain of the semiconductor switching element S2 is connected to the source of the semiconductor switching element S1
  • the shunt resistor is connected to the source of the semiconductor switching element S2.
  • One end of the element RS is connected, and the N-side terminal N is connected to the other end of the shunt resistor RS .
  • a connection point between the source of the semiconductor switching element S1 and the drain of the semiconductor switching element S2 is connected to the intermediate terminal U1.
  • the gate of the semiconductor switching element S1 is connected to the signal terminal V1 via the gate resistance RG
  • the gate of the semiconductor switching element S2 is connected to the signal terminal V2 via the gate resistance RG .
  • the drain of the semiconductor switching element S3 is connected to the P-side terminal P
  • the drain of the semiconductor switching element S4 is connected to the source of the semiconductor switching element S3
  • the shunt resistance element R S is connected to the source of the semiconductor switching element S4. Is connected to the other end of the shunt resistor RS .
  • a connection point between the source of the semiconductor switching element S3 and the drain of the semiconductor switching element S4 is connected to the intermediate terminal U2.
  • the gate of the semiconductor switching element S3 is connected to the signal terminal V3 via the gate resistance RG
  • the gate of the semiconductor switching element S4 is connected to the signal terminal V4 via the gate resistance RG .
  • the drain of the semiconductor switching element S5 is connected to the P-side terminal P
  • the drain of the semiconductor switching element S6 is connected to the source of the semiconductor switching element S5
  • the shunt resistance element R S is connected to the source of the semiconductor switching element S6. Is connected to the other end of the shunt resistor RS .
  • a connection point between the source of the semiconductor switching element S5 and the drain of the semiconductor switching element S6 is connected to the intermediate terminal U3.
  • the gate of the semiconductor switching element S5 is connected to the signal terminal V5 via the gate resistance RG
  • the gate of the semiconductor switching element S6 is connected to the signal terminal V6 via the gate resistance RG .
  • the thermistor Thm is disposed in the vicinity of the semiconductor switching elements S1 to S6 by an independent circuit system.
  • an abnormal current can be detected by monitoring the voltage across the shunt resistor RS . Further, the thermistor Thm can detect abnormal heat generation of the semiconductor switching elements S1 to S6.
  • the semiconductor module 900 in addition to the six semiconductor switching elements S1 to S6, at least one of the snubber capacitor C S , the thermistor Thm, the shunt resistance R S , and the gate resistance RG is used as a passive element in the sealing resin. Is sealed.
  • FIG. 10 shows an equivalent circuit of the semiconductor module 1000 according to the tenth embodiment of the present invention.
  • the semiconductor module 1000 constitutes an inverter power converter.
  • the semiconductor module 1000 includes a P-side terminal P, an N-side terminal N, three intermediate terminals U1 to U3, nine signal terminals V1 to V9, nine semiconductor switching elements S1 to S9, and a snubber capacitor. It comprises a C S, and the thermistor Thm, 3 pieces of the shunt resistor R S, 9 pieces of the gate resistor R G.
  • the drain of the semiconductor switching element S1 is connected to the P-side terminal P
  • the drain of the semiconductor switching element S2 is connected to the source of the semiconductor switching element S1
  • the shunt resistor is connected to the source of the semiconductor switching element S2.
  • One end of the element RS is connected, and the N-side terminal N is connected to the other end of the shunt resistor RS .
  • the source of the semiconductor switching element S7 is connected to the connection point between the source of the semiconductor switching element S1 and the drain of the semiconductor switching element S2, and the intermediate terminal U1 is connected to the drain of the semiconductor switching element S7.
  • the gate of the semiconductor switching element S1 is connected to the signal terminal V1 via the gate resistance RG
  • the gate of the semiconductor switching element S2 is connected to the signal terminal V2 via the gate resistance RG
  • the gate of the element S7 is connected to the signal terminal V7 via the gate resistance RG .
  • the drain of the semiconductor switching element S3 is connected to the P-side terminal P
  • the drain of the semiconductor switching element S4 is connected to the source of the semiconductor switching element S3
  • the shunt resistance element R S is connected to the source of the semiconductor switching element S4. Is connected to the other end of the shunt resistor RS .
  • the source of the semiconductor switching element S8 is connected to the connection point between the source of the semiconductor switching element S3 and the drain of the semiconductor switching element S4, and the intermediate terminal U2 is connected to the drain of the semiconductor switching element S8.
  • the gate of the semiconductor switching element S3 is connected to the signal terminal V3 via the gate resistance RG
  • the gate of the semiconductor switching element S4 is connected to the signal terminal V4 via the gate resistance RG.
  • the gate of the element S8 is connected to the signal terminal V8 via the gate resistance RG .
  • the drain of the semiconductor switching element S5 is connected to the P-side terminal P
  • the drain of the semiconductor switching element S6 is connected to the source of the semiconductor switching element S5
  • the shunt resistance element R S is connected to the source of the semiconductor switching element S6. Is connected to the other end of the shunt resistor RS .
  • the source of the semiconductor switching element S9 is connected to the connection point between the source of the semiconductor switching element S5 and the drain of the semiconductor switching element S6, and the intermediate terminal U3 is connected to the drain of the semiconductor switching element S9.
  • the gate of the semiconductor switching element S5 is connected to the signal terminal V5 via the gate resistance RG
  • the gate of the semiconductor switching element S6 is connected to the signal terminal V6 via the gate resistance RG.
  • the gate of the element S9 is connected to the signal terminal V9 via the gate resistance RG .
  • the thermistor Thm is disposed in the vicinity of the semiconductor switching elements S1 to S9 by an independent circuit system.
  • an abnormal current can be detected by monitoring the voltage across the shunt resistor RS .
  • the thermistor Thm can detect abnormal heat generation of the semiconductor switching elements S1 to S9.
  • At least one of the snubber capacitor C S , the thermistor Thm, the shunt resistance R S , and the gate resistance RG is used as a passive element in the sealing resin. Is sealed.
  • the material of the constituent elements of the semiconductor module 100 according to the first embodiment and the mounting method between the constituent elements are partly changed. Since there is no change in the structure itself, the semiconductor module 1100 will be described with reference to FIGS. 1A and 1B illustrating the semiconductor module 100.
  • resin plates 6a and 6b in which an epoxy resin, a polyimide resin, a bismaleimide resin, a silicone resin, and the like are filled with a filler having high thermal conductivity such as alumina, aluminum nitride, silicon nitride, and silicon carbide are provided.
  • a filler having high thermal conductivity such as alumina, aluminum nitride, silicon nitride, and silicon carbide.
  • ceramic plates made of ceramics mainly composed of silicon nitride, aluminum nitride, alumina, or the like were used.
  • an adhesive was used for attaching the lead terminals 51a to 51c and the heat radiating plate 7a to the resin plate 6a, and attaching the lead terminals 53a and 53b and the heat radiating plate 7b to the resin plate 6b.
  • an alloy (not shown) containing at least an active metal that reacts with the components of the ceramic, Ag, and Cu is used to attach this portion.
  • Ti is contained in the alloy as an active metal that reacts with the constituent components of the ceramic.
  • the active metal that reacts with the components contained in the ceramic is not limited to Ti, and may be other metals such as Zr.
  • the active metal which reacts with the structural component of ceramics, the alloy containing Ag and Cu may be called an active metal brazing material.
  • Ti, Zn, Sn, In, Ni, Mn, Cd, etc. are used to adjust the melting point as necessary.
  • One or more selected metals may be added.
  • Ti added as an active component that reacts with components contained in the ceramic also plays a role of adjusting the melting point.
  • the addition amount of Ti is 3 weight% or less with respect to the total weight of an alloy. This is because if the Ti content exceeds 3% by weight, the alloy itself may become brittle.
  • the compounding ratio of the alloy 6 is set to Ag 60 to 80% by weight, Cu 20 to 40% by weight, and Ti 1 to 3% by weight.
  • the other configuration of the semiconductor module 1100 is the same as that of the semiconductor module 100.
  • the lead terminals 51a to 51c, 53a and 53b, and the heat sinks 7a and 7b are attached to the ceramic plates 6a and 6b in advance by using an active metal brazing material for the lead terminals 51a to 51c, 53a and 53b and the heat sinks 7a and 7b.
  • the paste can be applied in advance, and the coated surface can be brought into contact with the ceramic plates 6a and 6b and heat treated at a temperature equal to or higher than the melting point of the active metal brazing material.
  • An alloy containing an active metal that reacts with a ceramic component, Ag, and Cu firmly bonds the lead terminals 51a to 51c, 53a, 53b, and the heat sinks 7a, 7b to the ceramic plates 6a, 6b.
  • silicon nitride is used for the ceramic plates 6a and 6b
  • Cu is used for the lead terminals 51a to 51c, 53a and 53b
  • the heat radiating plates 7a and 7b and both are joined by an alloy containing Ag and Cu to which Ti is added.
  • TiN and MN are formed in the vicinity of the alloy ceramic plates (silicon nitride substrates) 6a and 6b (where M is an alloy of Si, Cu and Ti).
  • the Ti concentration in the vicinity of the alloy ceramic plates 6a and 6b is higher than the Ti concentration in the other portions of the alloy.
  • the lead terminals 51a to 51c, 53a, 53b, the heat radiating plates 7a, 7b and the ceramic plates 6a, 6b are bonded with high strength.
  • an alloy containing an active metal that reacts with a constituent component of ceramic, Ag, and Cu generally has a higher thermal conductivity than an adhesive. Therefore, the semiconductor module 1100 causes the heat generated by the semiconductor switching elements 1 and 2 to pass through the metal block 8a, the lead terminals 51c and 53a, and the ceramic plates 6a and 6b and the heat sinks 7a and 7b. Can be dissipated more efficiently.
  • the semiconductor module 1100 according to the eleventh embodiment includes an active metal in which lead terminals 51a to 51c, 53a, 53b, and heat radiating plates 7a, 7b react with ceramic constituents on ceramic plates 6a, 6b having high strength.
  • lead terminals 51a to 51c, 53a, 53b, and heat radiating plates 7a, 7b react with ceramic constituents on ceramic plates 6a, 6b having high strength.
  • it since it is firmly bonded via an alloy containing Ag and Cu, it has high strength. Moreover, it is excellent also in heat dissipation.
  • the lead terminals 51a to 51c and the heat radiating plate 7a are attached to the molded resin plate 6a with an adhesive, and the lead terminals 53a, 53b and the heat radiating plate 7b are also bonded to the molded resin plate 6b with an adhesive. Installed. In the semiconductor module 100, this is changed, and the lead terminals 51a to 51c, 53a, 53b, and the heat radiating plates 7a, 7b are thermocompression bonded to the uncured resin plates 6a, 6b, and further heated to form the resin plates 6a, 6b, 6b was cured, and lead terminals 51a to 51c, 53a, 53b, and heat sinks 7a, 7b were attached to resin plates 6a, 6b.
  • the semiconductor module 1200 does not use an adhesive for attaching the lead terminals 51a to 51c, 53a, 53b, and the heat sinks 7a, 7b to the resin plates 6a, 6b.
  • Other structures and manufacturing processes of the semiconductor module 1200 are the same as those of the semiconductor module 100. Hereinafter, the semiconductor module 1200 will be described in detail.
  • the lead terminals 51a to 53b serve as signal paths and power supply paths. Therefore, in order to reduce electrical loss, it is necessary to be formed of a metal having a low specific resistance. Further, the lead terminals 51a to 53b serve as a heat dissipation path for discharging heat generated in the mounted semiconductor switching element to the outside of the module. Therefore, the lead terminals 51a to 53b need to be a metal having high thermal conductivity in order to reduce the thermal resistance. In order to satisfy these requirements, high-purity copper such as oxygen-free copper or tough pitch copper is selected as the material of the lead terminals 51a to 53b. However, the lead terminal portion that protrudes to the outside from the sealing resin 11 becomes an external connection terminal, and a certain degree of strength may be required.
  • the lead terminal 51a is made of copper that has been strengthened by adding some impurities within a range in which specific resistance and thermal conductivity do not change greatly.
  • a typical example of such a copper material is "KFC (registered trademark)" manufactured by Kobe Steel, Ltd.
  • thermosetting resin made of epoxy resin, polyimide resin, bismaleimide resin or the like is used.
  • the resin plates 6a and 6b serve as a heat dissipation path for discharging heat generated in the semiconductor switching elements 1 and 2 mounted on the lead terminals 51c, 52a and 53a from the heat dissipation plates 7a and 7b. Therefore, in order to reduce the thermal resistance of the resin plates 6a and 6b, a material having high thermal conductivity is selected.
  • a resin having a thermal conductivity of 3 W / m ⁇ K or more which is filled with a ceramic filler having a high thermal conductivity such as alumina, aluminum nitride, or silicon nitride.
  • a resin of 5 W / m ⁇ K or higher that is more highly filled by graining the ceramic filler.
  • the resin plate thickness is preferably 0.2 mm or less, and more preferably 0.15 mm or less.
  • the indentation depth from the surface of the resin plates 6a and 6b is 0.01 mm (10 ⁇ m) or less at the joint surface between the resin plates 6a and 6b and the lead terminals 51a to 51c, 53a and 53b. More preferably, it is 0.005 mm (5 ⁇ m) or less.
  • the pushed-in resin has a raised shape with a lot of bubbles between the lead terminals. This is because the encapsulated bubbles remain even after being sealed with the sealing resin, which causes a problem that the insulation reliability between the lead terminals deteriorates.
  • the heat radiating plates 7a and 7b are insulated from the lead terminals 51a to 51c, 53a and 53b through the resin plates 7a and 7b, and have no electrical role, and exclusively generate heat generated inside the module. Has a role to release. Therefore, a material made of high purity copper such as oxygen-free copper or tough pitch copper is selected. Moreover, since high heat dissipation is obtained when heat is diffused in the horizontal direction of the heat sinks 7a and 7b when releasing heat to the outside, the thickness of the heat sinks 7a and 7b is preferably set to 0.3 mm or more. Furthermore, it is more preferable to set it as 0.5 mm or more.
  • the heat radiating plates 7a and 7b, the resin plates 6a and 6b serving as insulating layers, and the lead terminals 51a to 51c, 53a and 53b are integrally formed.
  • Conventional insulation wiring boards include a heat sink, a resin board as an insulation layer, and wiring.To attach external connection terminals to this, prepare a lead frame for the external connection terminals separately, It is necessary to wire-bond the lead frame and the wiring or to join them with solder.
  • the external connection terminal and the wiring terminal are configured by one lead frame, and thus the joint portion does not exist.
  • heat sinks 7a and 7b made of oxygen-free copper (C1020) having a thickness of 0.8 mm are prepared.
  • thermosetting resin sheet having a thickness of 0.1 mm is placed on the heat sinks 7a and 7b and thermocompression bonded at 70 to 100 ° C.
  • the thermosetting resin is an epoxy resin filled with an alumina filler.
  • a resin having a thermal conductivity of 5.5 W / m ⁇ K is used.
  • a lead frame (connected with lead terminals) made of KFC (Registered Trademark) is placed on the surface opposite to the heat radiating plate 7a, 7b crimping surface of thermosetting resin, and thermocompression bonding is performed at 170 ° C to 190 ° C. To do. This is cured at 170 ° C. to 190 ° C. and insulated wiring board composed of lead terminals 51a to 51c, resin plate 6a and heat radiating plate 7a, and insulated wiring composed of lead terminals 53a and 53b, resin plate 6b and radiating plate 7b. Manufacture a board.
  • thermosetting resin sheet has a pressing depth into the sheet of 0.01 mm (10 ⁇ m) or less, more preferably 0.005 mm (5 ⁇ m) or less, when the lead frame is placed and thermocompression bonded. You must choose one that is less fluid at times.
  • the heat sinks 7a and 7b and the lead terminals 51a to 51c, 53a and 53b are connected via the uncured thermosetting resin sheet, the height of each lead frame is increased by the elasticity of the resin. Variations are suppressed and aesthetics are not impaired. Moreover, there is an effect that it is suppressed that the connection portion absorbs moisture and the insulating property is deteriorated.
  • a semiconductor module 1200 according to the twelfth embodiment is configured by arranging two insulating wiring boards of the above-described form on the upper and lower sides.
  • the insulated wiring board of the said form is not limited to application to the semiconductor module of this invention.
  • FIG. 11A shows a semiconductor module 1300 according to the thirteenth embodiment. Note that FIG. 11A is a cross-sectional view of the semiconductor module 1300.
  • the semiconductor module 1300 is partially changed in the structure of the semiconductor module 100 of the first embodiment.
  • the outer peripheral edge of the heat sink 7 a exposed from the upper main surface of the sealing resin 11 is exposed to the upper main surface of the sealing resin 11.
  • the heat sink 7 b exposed from the lower main surface of the sealing resin 11 has an outer peripheral edge exposed to the lower main surface of the sealing resin 11.
  • the lead terminals 51a, 51c, 52a, 52b, and 53a are formed by bending some lead terminals or connecting auxiliary lead terminals. 53b are led out of the sealing resin 11 from the same height position of the semiconductor module 1300. Note that the method of deriving the lead terminals 51a to 53b from the same height position of the semiconductor module 1300 is not an important part of the present embodiment, and thus detailed description thereof is omitted.
  • the reason why the semiconductor module 1300 embedded the outer peripheral edges of the heat radiating plate 7a and the heat radiating plate 7b in the sealing resin 11 is as follows. That is, the temperature change accompanying switching ON / OFF is intense around the heat sinks 7a and 7b, and peeling due to a difference in thermal expansion coefficient tends to occur at the interface between the heat sinks 7a and 7b made of copper and the sealing resin 11, for example. When peeling occurs at this portion, there is a risk of electrical short-circuiting due to moisture mixed into the inside from the peeling portion. In the semiconductor module 1300, the outer peripheral edges of the heat radiating plates 7a and 7b are embedded in the sealing resin 11 to improve the adhesion, thereby suppressing peeling of this portion and improving the moisture resistance and reliability. .
  • the semiconductor switching elements 1 and 2 In order to embed the outer periphery of the heat sinks 7a and 7b in the sealing resin 11, as shown in FIG. 11B, the semiconductor switching elements 1 and 2, the metal blocks 8a and 8b, the passive element 10, and the lead terminals
  • Spacers 81a and 81b that are slightly smaller than the heat sinks 7a and 7b are arranged on the surfaces of the heat sinks 7a and 7b in the structure serving as the base of the semiconductor module in which 51a to 53b and the heat sinks 7a and 7b are integrated. What is necessary is just to set to the metal mold
  • the spacers 81a and 81b may be removed from the surfaces of the heat sinks 7a and 7b after the completed semiconductor module 1300 is taken out from the molds 82a and 82b.
  • the semiconductor module 1300 according to the thirteenth embodiment is excellent in heat dissipation because it includes the heat sinks 7a and 7b.
  • the semiconductor module 1300 maintains high moisture resistance and high reliability because the outer peripheral edges of the heat sinks 7a and 7b are embedded in the sealing resin 11.
  • the lead terminals 53a and 53b arranged on the layer 3L have the same thickness. In the semiconductor module 1400, this is changed, and the thickness of the lead terminals 52a and 52b arranged in the second lead terminal layer 2L is changed to the lead terminals 51a to 51c and the third lead terminals arranged in the first lead terminal layer 1L.
  • the thickness of the lead terminals 53a and 53b arranged in the layer 3L is larger than the thickness.
  • the thickness of the lead terminals 51a to 53c arranged in the first lead terminal layer 1L is set to 0.3 mm
  • the thickness of the lead terminals 52a and 52b arranged in the second lead terminal layer 2L is set to 0.8 mm
  • the third The thickness of the lead terminals 53a and 53b arranged in the lead terminal layer 3L was set to 0.3 mm.
  • the thicknesses of the lead terminals 51a to 53c arranged in the first lead terminal layer 1L, the thicknesses of the lead terminals 52a and 52b arranged in the second lead terminal layer 2L, and the lead terminals arranged in the third lead terminal layer 3L affect the junction temperatures of the semiconductor switching elements 1, 2, and 3. The degree of influence differs between the first lead terminal layer 1L, the second lead terminal layer 2L, and the third lead terminal layer 3L.
  • the lead terminal 52a disposed in the second lead terminal layer 2L includes a portion where the first semiconductor switching element 1 and the second semiconductor switching element 2 are joined to both the upper and lower sides, From the portion where the first semiconductor switching device 1 and the second semiconductor switching device 2 having the highest temperature are joined to the upper and lower sides, the shape is connected to the portion where the semiconductor switching device 3 is joined to the lower side.
  • the third semiconductor switching element 3 having a lower temperature than that is a main transmission path for transferring heat to a portion where the third semiconductor switching element 3 is bonded to the lower side. Therefore, if the thickness of the lead terminal 52a arranged in the second lead terminal layer 2L is increased, the heat generated by the first semiconductor switching element 1 and the second semiconductor switching element 2 that are likely to become high temperature is reduced.
  • the effect of transmission to the third semiconductor switching element 3 having a low temperature is increased. That is, temperature variations of the first semiconductor switching element 1, the second semiconductor switching element 2, and the third semiconductor switching element 3 are reduced, and the first semiconductor switching element 1 and the second semiconductor switching element are reduced. The effect of lowering the temperature of 2 is increased.
  • the following experiment was conducted. First, three types of lead terminals having a thickness of 0.3 mm, a thickness of 0.8 mm, and a thickness of 0.467 mm were prepared. By using these lead terminals in combination, the thickness of the lead terminals 51a to 51c of the first lead terminal layer 1L, the thickness of the lead terminals 52a and 52b of the second lead terminal layer 2L, and the lead of the third lead terminal layer 3L Four types of semiconductor modules according to Sample 1 to Sample 4 in which the total thickness of the terminals 53a and 53b was 1.4 mm were manufactured. The structure of each semiconductor module other than the lead terminals is the same as that of the semiconductor module 300 according to the third embodiment. Then, the semiconductor module applied to each sample was operated, and the variation of the maximum junction temperature and the junction temperature of the first semiconductor switching element 1 to the third semiconductor switching element 3 was examined. Table 1 shows the results of the investigation.
  • the thickness of the lead terminals 52a and 52b of the second lead terminal layer 2L is set to the lead of the first lead terminal layer 1L.
  • the thickness may be made larger than the thickness of the terminals 51a to 51c and the lead terminals 53a and 53b of the third lead terminal layer 3L.
  • the thickness of the lead terminals 52a and 52b arranged in the second lead terminal layer 2L is set to the lead terminals 51a to 51c arranged in the first lead terminal layer 1L.
  • the thickness of the lead terminals 53a and 53b arranged in the third lead terminal layer 3L is larger than the thickness.
  • the maximum junction temperature is suppressed low.
  • the temperature variation between the semiconductor switch elements 1, 2, and 3 is suppressed to be small.
  • FIG. 12 shows a semiconductor module 1500 according to the fifteenth embodiment.
  • FIG. 12 is an equivalent circuit diagram of the semiconductor module 1500.
  • the semiconductor module 1500 is partly modified in the circuit of the semiconductor module 700 in the seventh embodiment.
  • the semiconductor module 1500 includes a resistor and a capacitor in parallel with each of the two semiconductor switching elements S1 and S2 of each of the three semiconductor modules 500 connected in parallel. Are connected to a snubber circuit 83 connected in series.
  • the semiconductor module 1500 is connected to the snubber circuit 83 in parallel with each of the semiconductor switching elements S1 and S2, thereby reducing parasitic inductance and parasitic resistance generated in wiring, wire bonding, and the like, thereby reducing noise.
  • the semiconductor module 1500 according to the fifteenth embodiment is designed to reduce noise during switching.
  • the semiconductor module 1500 can reduce the required withstand voltage specification by reducing noise, high-speed switching, miniaturization, and high efficiency can be achieved.
  • FIGS. 13A and 13B show a power control unit 1600 according to the sixteenth embodiment.
  • FIG. 13A is an exploded plan view showing a state in which the individual heat sink 85 is omitted from the power control unit 1600.
  • FIG. 13B is a plan view of the power control unit 1600.
  • the power control unit 1600 has a cylindrical shape and a case 84 with a bottom.
  • a hole 84 a is formed at the center of the case 84.
  • the hole 84a is provided, for example, for passing a motor shaft.
  • the case 84 has six semiconductor modules 1000 according to the tenth embodiment attached concentrically. Although not shown in the drawing, a rectifying capacitor may be attached between the semiconductor modules 1000.
  • An individual heat sink 85 is attached to the upper surface of each semiconductor module 1000.
  • the power control unit 1600 since the attached semiconductor module 1000 is small, six semiconductor modules 1000 can be arranged in the existing case.
  • the power control unit 1600 can support two systems without increasing the size of the case 84.
  • FIGS. 14A and 14B show a power control unit 1700 according to the seventeenth embodiment.
  • 14A is an exploded plan view showing a state in which the individual heat sink 86 is omitted from the power control unit 1700.
  • FIG. 14B is a plan view of the power control unit 1700.
  • the power control unit 1700 according to the seventeenth embodiment is modified from the power control unit 1600 according to the sixteenth embodiment. That is, in the power control unit 1600, six semiconductor modules 1000 according to the tenth embodiment are concentrically attached to the case 84. Instead of this, the power control unit 1700 is attached to the case 84 with two semiconductor modules 1100 according to the eleventh embodiment facing each other. Then, individual heat sinks 86 are attached to the upper surface of each semiconductor module 1100. The other configuration of the power control unit 1700 is the same as that of the power control unit 1600.
  • the power control unit 1700 can also support two systems without increasing the size of the case 84.
  • FIGS. 15A and 15B show a power control unit 1800 according to the eighteenth embodiment.
  • 15A is an exploded plan view showing a state in which the individual heat sink 86 is omitted from the power control unit 1800.
  • FIG. 15B is a plan view of the power control unit 1800.
  • the power control unit 1800 according to the eighteenth embodiment is further modified from the power control unit 1700 according to the seventeenth embodiment. Specifically, notches C were provided at two corners of each attached semiconductor module 1100. Similarly, notches C were provided at two corners of each individual heat sink 86 attached.
  • the diameter of the case 84 is reduced by the amount of room provided by providing the notch C.
  • the diameter of the case 84 of the power control unit 1800 is smaller than the diameter of the case 84 of the power control unit 1700.
  • the other configuration of the power control unit 1800 is the same as that of the power control unit 1700.
  • the case 84 and the power control unit 1800 itself are further downsized.
  • FIGS. 16A and 16B show a power control unit 1900 according to the nineteenth embodiment.
  • 16A is an exploded plan view showing a state in which the common heat sink 87 is omitted from the power control unit 1900.
  • FIG. 19B is a plan view of the power control unit 1900.
  • the power control unit 1900 according to the nineteenth embodiment is further modified from the power control unit 1600 according to the sixteenth embodiment. That is, in the power control unit 1600, the individual heat sink 85 is attached to the upper surface of each semiconductor module 1000, respectively. Instead of this, the power control unit 1900 has one donut-shaped heat sink 87 attached to the upper surface of the six semiconductor modules 1000. Specifically, a plurality of heat sink mounting holes 84 b are formed in the case 84, and the common heat sink 87 is mounted using screws 88. In the common heat sink 87, a plurality of openings 87a for heat dissipation are formed in advance. The other configuration of the power control unit 1900 is the same as that of the power control unit 1600.
  • the power control unit 1900 can support two systems without increasing the size of the case 84. Furthermore, the power control unit 1900 has improved heat dissipation efficiency and reduced thermal variations between the semiconductor modules 1000.
  • each embodiment shows an embodiment of the present invention by way of example, and the present invention is not limited to the content of the embodiment, and various modifications are made in accordance with the spirit of the invention. Can do. Moreover, it is also possible to implement combining the content described in different embodiment, and the implementation content in that case is also included in this invention.
  • Mold 83 Snubber circuit 84 ... Case 85, 86 ... Individual heat sink 87 ... Common heat sink 88 ... ⁇ Screw 100, 200, 300, 400, 00,600,700,800,900,1000,1100,1200,1300,1400,1500 ... semiconductor module 1600,1700,1800,1900 ... power control unit

Abstract

The purpose of the present invention is to seal a passive element of a peripheral circuit in a sealing resin to achieve high functionality in a semiconductor module. The present invention comprises a structure in which semiconductor switching elements (1, 2) and a passive element (10) are joined to lead terminals (51a-53b) separately disposed in three layers, namely a first lead terminal layer (1L), a second lead terminal layer (2L), and a third lead terminal layer (3L), and subsequently sealed in a sealing resin (11). The height of the passive element (10) sealed in a first sealing resin layer (1M) between the first lead terminal layer (1L) and the second lead terminal layer (2L) is set so as to be lower than the sum total of the height of the semiconductor switching element (1), and the height of a metal block (8a).

Description

半導体モジュールおよびパワーコントロールユニットSemiconductor module and power control unit
　本発明は半導体モジュールに関し、さらに詳しくは、周辺回路の受動素子を封止樹脂内に封止し、高機能化をはかった半導体モジュールに関する。 The present invention relates to a semiconductor module, and more particularly, to a semiconductor module in which a passive element of a peripheral circuit is sealed in a sealing resin to achieve high functionality.
　また、本発明は、本発明の半導体モジュールを使用したパワーコントロールユニットに関する。 The present invention also relates to a power control unit using the semiconductor module of the present invention.
　インバータ等に対応する電力変換用の半導体モジュールが、車載機器、産業用機器等の電源に使用されている。 Semiconductor modules for power conversion corresponding to inverters and the like are used as power sources for in-vehicle devices and industrial devices.
　半導体モジュールは、特許文献１（特開２０１４－１８３０７８号公報）や特許文献２（特許第４２３９５８０号公報）に開示されるように、複数の半導体スイッチング素子の組合せ、あるいは、複数のスイッチング素子と複数の還流ダイオードとの組合せで回路を構成することができる。 As disclosed in Patent Document 1 (Japanese Patent Laid-Open No. 2014-183078) and Patent Document 2 (Japanese Patent No. 4239580), the semiconductor module is a combination of a plurality of semiconductor switching elements or a plurality of switching elements and a plurality of switching elements. A circuit can be configured in combination with the freewheeling diode.
　たとえば、特許文献１には、３つの層に分けて配置されたリード端子（電極）の間に、半導体スイッチング素子として２個のＩＧＢＴ（Insulated Gate Bipolar Transistor；
絶縁ゲートバイポーラトランジスタ）と、２個の還流ダイオードとを接続し、全体を封止樹脂で封止した半導体モジュールが開示されている。 For example, Patent Document 1 discloses two IGBTs (Insulated Gate Bipolar Transistors) as semiconductor switching elements between lead terminals (electrodes) arranged in three layers.
A semiconductor module is disclosed in which an insulated gate bipolar transistor) is connected to two free-wheeling diodes and the whole is sealed with a sealing resin.
　また、特許文献２には、３つの層に分けて配置されたリード端子の間に、それぞれ上面に金属ブロック（導体ブロック）が取付けられた２個のＩＧＢＴと、同じくそれぞれ上面に金属ブロックが取付けられた２個の還流ダイオードとを接続し、全体を封止樹脂で封止した半導体モジュールが開示されている。 Further, in Patent Document 2, two IGBTs each having a metal block (conductor block) attached to the upper surface between lead terminals arranged in three layers, and a metal block attached to each upper surface are also attached. A semiconductor module is disclosed in which two freewheeling diodes are connected and the whole is sealed with a sealing resin.
特開２０１４－１８３０７８号公報JP 2014-183078 A 特許第４２３９５８０号公報Japanese Patent No. 4239580
　車載機器や産業用機器等の電源に使用される半導体モジュールは、安全性の確保のためにも、誤作動は許されない。そのため、半導体モジュールの周辺に、異常電流を検知するための検知素子としてシャント抵抗素子や、異常発熱を検知するための検知素子としてサーミスタ素子等を配置して、半導体モジュールが正常に作動していることを常時監視する場合がある。 半導体 Semiconductor modules used as power sources for in-vehicle equipment and industrial equipment are not allowed to malfunction in order to ensure safety. Therefore, a semiconductor module is operating normally by arranging a shunt resistor element as a detection element for detecting an abnormal current and a thermistor element as a detection element for detecting abnormal heat generation around the semiconductor module. There is a case where it is constantly monitored.
　また、半導体モジュールの周辺回路として、抵抗素子、コンデンサ素子、インダクタ素子等の受動素子により、電源の効率を向上させるため等の回路を構成する場合がある。 Also, as a peripheral circuit of the semiconductor module, a circuit such as a resistor element, a capacitor element, an inductor element or the like may be used to improve the power supply efficiency.
　これらの受動素子（検知素子を含む）を半導体モジュールの封止樹脂内に封止することができれば、半導体モジュールの高機能化をはかることができる。また、車載機器や産業用機器においては、使用する部品点数を削減することができ、生産性が向上する。しかしながら、これまで、これらの受動素子は、半導体モジュールの周辺回路部品として用意され、半導体モジュールには組込まれてこなかった。 If these passive elements (including the sensing element) can be sealed in the sealing resin of the semiconductor module, the functionality of the semiconductor module can be enhanced. Moreover, in vehicle equipment and industrial equipment, the number of parts used can be reduced, and productivity is improved. However, until now, these passive elements have been prepared as peripheral circuit components of the semiconductor module and have not been incorporated into the semiconductor module.
　また、異常発熱を検知するための検知素子を、半導体モジュールの封止樹脂内に組込むことができれば、半導体モジュールに組込まれた半導体スイッチング素子の異常発熱を高い精度で検知することができる。しかしながら、これまで、当該検出素子は、半導体モジュールには組込まれてこなかった。 Further, if a detection element for detecting abnormal heat generation can be incorporated in the sealing resin of the semiconductor module, abnormal heat generation of the semiconductor switching element incorporated in the semiconductor module can be detected with high accuracy. However, until now, the detection element has not been incorporated into a semiconductor module.
　本発明は、上述した従来の問題を解決するためになされたものであり、受動素子（検知素子を含む）を、封止樹脂内に、機能的、合理的に組込んだ半導体モジュールを提供することを目的とする。 The present invention has been made to solve the above-described conventional problems, and provides a semiconductor module in which passive elements (including detection elements) are functionally and reasonably incorporated in a sealing resin. For the purpose.
　その手段として、本発明の半導体モジュール（請求項１に記載された半導体モジュール）は、複数の半導体スイッチング素子と、少なくとも１つの受動素子とが、それぞれリード端子に接合されたうえで、封止樹脂に封止され、リード端子は、封止樹脂内において、少なくとも、第１リード端子層と、第２リード端子層と、第３リード端子層との３層に分けて配置され、封止樹脂は、少なくとも、第１リード端子層と第２リード端子層とに挟まれた第１封止樹脂層と、第２リード端子層と第３リード端子層とに挟まれた第２封止樹脂層とを有し、半導体スイッチング素子は、両主面を有し、一方の主面に信号電極パッドと一方の電源電極パッドとが形成され、他方の主面に他方の電源電極パッドが形成され、第２リード端子層に配置された１つのリード端子は、両主面を有し、一方の主面に、第１の半導体スイッチング素子の他方の電源電極パッドが接合され、他方の主面に、金属ブロックを介して第２の半導体スイッチング素子の一方の電源電極パッドが接合され、第１の半導体スイッチング素子の一方の電源電極パッドは、金属ブロックを介して第１リード端子層に配置されたリード端子に接合され、第１の半導体スイッチング素子の信号電極パッドは、接続用導体を介して第２リード端子層に配置されたリード端子に接続され、第２の半導体スイッチング素子の他方の電源電極パッドは、第３リード端子層に配置されたリード端子に接合され、第２の半導体スイッチング素子の信号電極パッドは、接続用導体を介して第３リード端子層に配置されたリード端子に接続され、少なくとも１つの受動素子が第１封止樹脂層に封止され、かつ／または、少なくとも１つの受動素子が第２封止樹脂層に封止され、第１封止樹脂層に封止された受動素子のうち最も大きな高さを有するものの高さが、第１の半導体スイッチング素子の高さと、第１の半導体スイッチング素子の一方の電源電極パッドに接合された金属ブロックの高さの合計よりも小さく、かつ／または、第２封止樹脂層に封止された受動素子のうち最も大きな高さを有するものの高さが、第２の半導体スイッチング素子の高さと、第２の半導体スイッチング素子の一方の電源電極パッドに接合された金属ブロックの高さの合計よりも小さくなるようにした。 As its means, the semiconductor module of the present invention (semiconductor module described in claim 1) includes a plurality of semiconductor switching elements and at least one passive element bonded to the lead terminals, respectively, and sealing resin The lead terminals are arranged in at least three layers of a first lead terminal layer, a second lead terminal layer, and a third lead terminal layer in the sealing resin. At least a first sealing resin layer sandwiched between the first lead terminal layer and the second lead terminal layer; and a second sealing resin layer sandwiched between the second lead terminal layer and the third lead terminal layer; The semiconductor switching element has both main surfaces, the signal electrode pad and one power electrode pad are formed on one main surface, the other power electrode pad is formed on the other main surface, Arranged in two lead terminal layers One lead terminal has both main surfaces, the other power electrode pad of the first semiconductor switching element is joined to one main surface, and the second semiconductor switching is connected to the other main surface via a metal block. One power electrode pad of the element is bonded, and one power electrode pad of the first semiconductor switching element is bonded to a lead terminal disposed in the first lead terminal layer via a metal block, and the first semiconductor switching The signal electrode pad of the element is connected to the lead terminal arranged in the second lead terminal layer via the connecting conductor, and the other power electrode pad of the second semiconductor switching element is arranged in the third lead terminal layer. The signal electrode pad of the second semiconductor switching element is connected to the lead terminal disposed in the third lead terminal layer via the connection conductor, At least one passive element is sealed in the first sealing resin layer and / or at least one passive element is sealed in the second sealing resin layer and sealed in the first sealing resin layer The height of the passive element having the largest height is higher than the sum of the height of the first semiconductor switching element and the height of the metal block bonded to one power electrode pad of the first semiconductor switching element. Among the passive elements encapsulated in the second encapsulating resin layer that is small and / or has the largest height, the height of the second semiconductor switching element and one of the second semiconductor switching elements The total height of the metal blocks bonded to the power supply electrode pads was made smaller.
　この半導体モジュール（請求項１に記載された半導体モジュール）は、第３の半導体スイッチング素子をさらに備え、受動素子は、第１封止樹脂層に封止されるか、または、第２封止樹脂層に封止されており、第３の半導体スイッチング素子は、受動素子が第１封止樹脂層に封止された場合には第２封止樹脂層に封止され、受動素子が第２封止樹脂層に封止された場合には第１封止樹脂層に封止されたものとしても良い。この場合には、さらに第３の半導体スイッチング素子を、封止樹脂内に封止することができる。 The semiconductor module (semiconductor module described in claim 1) further includes a third semiconductor switching element, and the passive element is sealed in the first sealing resin layer or the second sealing resin. The third semiconductor switching element is sealed with the second sealing resin layer when the passive element is sealed with the first sealing resin layer, and the passive element is sealed with the second sealing resin layer. When encapsulated in the stop resin layer, it may be encapsulated in the first encapsulating resin layer. In this case, the third semiconductor switching element can be further sealed in the sealing resin.
　また、この半導体モジュール（請求項１に記載された半導体モジュール）は、封止樹脂層を垂直方向に透視したとき、第１の半導体スイッチング素子と第２の半導体スイッチング素子とが完全には重なっていないものとすることができる。すなわち、第１の半導体スイッチング素子と第２の半導体スイッチング素子とが全く重なっていないか、重なっているとしても部分的に重なったものとすることができる。この場合には、第１および第２の半導体スイッチング素子が発生させる熱を、効率よく放散させることができる。 Further, in this semiconductor module (the semiconductor module described in claim 1), when the sealing resin layer is seen through in the vertical direction, the first semiconductor switching element and the second semiconductor switching element are completely overlapped. It can not be. That is, the first semiconductor switching element and the second semiconductor switching element may not overlap at all or may partially overlap even if they overlap. In this case, the heat generated by the first and second semiconductor switching elements can be efficiently dissipated.
　また、本発明のもう１つの半導体モジュール（請求項２に記載された半導体モジュール）は、複数の半導体スイッチング素子と、少なくとも１つの受動素子とが、それぞれリード端子に接合されたうえで、封止樹脂に封止され、リード端子は、封止樹脂内において、少なくとも、第１リード端子層と、第２リード端子層と、第３リード端子層との３層に分けて配置され、封止樹脂は、少なくとも、第１リード端子層と第２リード端子層とに挟まれた第１封止樹脂層と、第２リード端子層と第３リード端子層とに挟まれた第２封止樹脂層とを有し、半導体スイッチング素子は、両主面を有し、一方の主面に信号電極パッドと一方の電源電極パッドとが形成され、他方の主面に他方の電源電極パッドが形成され、第２リード端子層に配置された１つのリード端子は、両主面を有し、一方の主面に、第１の半導体スイッチング素子の他方の電源電極パッドが接合され、他方の主面に、金属ブロックを介して第２の半導体スイッチング素子の一方の電源電極パッドが接合され、第１の半導体スイッチング素子の一方の電源電極パッドは、金属ブロックを介して第１リード端子層に配置されたリード端子に接合され、第１の半導体スイッチング素子の信号電極パッドは、接続用導体を介して第２リード端子層に配置されたリード端子に接続され、第２の半導体スイッチング素子の他方の電源電極パッドは、第３リード端子層に配置されたリード端子に接合され、第２の半導体スイッチング素子の信号電極パッドは、接続用導体を介して第３リード端子層に配置されたリード端子に接続され、少なくとも１つの受動素子が、第１リード端子層または第３リード端子層に配置されたリード端子に接合されたうえ、第２リード端子層を貫いて、第１封止樹脂層および第２封止樹脂層に亘って封止され、封止された受動素子のうち最も大きな高さを有するものの高さが、第１の半導体スイッチング素子の高さと、第１の半導体スイッチング素子の一方の電源電極パッドに接合された金属ブロックの高さと、第２リード端子層に配置されたリード端子の厚さと、第２の半導体スイッチング素子の高さと、第２の半導体スイッチング素子の一方の電源電極パッドに接合された金属ブロックの高さの合計よりも小さくなるようにした。 According to another semiconductor module of the present invention (semiconductor module described in claim 2), a plurality of semiconductor switching elements and at least one passive element are bonded to lead terminals, respectively, and then sealed. The lead terminal sealed with resin is arranged in at least three layers of a first lead terminal layer, a second lead terminal layer, and a third lead terminal layer in the sealing resin. Are at least a first sealing resin layer sandwiched between the first lead terminal layer and the second lead terminal layer, and a second sealing resin layer sandwiched between the second lead terminal layer and the third lead terminal layer. The semiconductor switching element has both main surfaces, a signal electrode pad and one power electrode pad are formed on one main surface, and the other power electrode pad is formed on the other main surface, Arranged in the second lead terminal layer One lead terminal has both main surfaces, the other power electrode pad of the first semiconductor switching element is joined to one main surface, and the second semiconductor switching is connected to the other main surface via a metal block. One power electrode pad of the element is bonded, and one power electrode pad of the first semiconductor switching element is bonded to a lead terminal disposed in the first lead terminal layer via a metal block, and the first semiconductor switching The signal electrode pad of the element is connected to the lead terminal arranged in the second lead terminal layer via the connecting conductor, and the other power electrode pad of the second semiconductor switching element is arranged in the third lead terminal layer. The signal electrode pad of the second semiconductor switching element is connected to the lead terminal disposed in the third lead terminal layer via the connection conductor, At least one passive element is bonded to the lead terminal disposed in the first lead terminal layer or the third lead terminal layer, and penetrates the second lead terminal layer to pass through the first sealing resin layer and the second sealing layer. The height of the sealed passive element having the greatest height among the sealed passive elements is the height of the first semiconductor switching element and one power supply electrode of the first semiconductor switching element. Bonded to the height of the metal block bonded to the pad, the thickness of the lead terminal disposed in the second lead terminal layer, the height of the second semiconductor switching element, and one power electrode pad of the second semiconductor switching element It was made to become smaller than the sum total of the height of the made metal block.
　本発明の半導体モジュール（請求項１や２に記載された半導体モジュール）は、封止樹脂の線膨張率が、半導体モジュールを構成する半導体スイッチング素子、受動素子、リード端子、金属ブロック、接続用導体のそれぞれの線熱膨張率のうち、最も大きい線膨張率と、最も小さい線膨張率の中間の値であることが好ましい。以下にその理由を説明する。半導体モジュールを構成する部材には、線膨張率の大きい部材や小さい部材が混在している。そのため、半導体モジュールの内部には、これら部材間の線膨張率差による熱応力が発生する。この熱応力に起因する熱疲労により、半導体スイッチング素子や受動素子とリード端子との接合部、半導体スイッチング素子と接続用導体の接合部、半導体スイッチング素子と金属ブロックの接合部が破断したり、半導体スイッチング素子や受動素子等の実装素子が破壊してしまったりする虞があった。 The semiconductor module of the present invention (the semiconductor module described in claims 1 and 2) has a linear expansion coefficient of the sealing resin, the semiconductor switching element, the passive element, the lead terminal, the metal block, and the connection conductor constituting the semiconductor module. It is preferable that it is an intermediate value between the largest linear expansion coefficient and the smallest linear expansion coefficient among the respective linear thermal expansion coefficients. The reason will be described below. In the members constituting the semiconductor module, members having a large linear expansion coefficient and small members are mixed. Therefore, thermal stress due to the difference in linear expansion coefficient between these members is generated inside the semiconductor module. Due to thermal fatigue caused by this thermal stress, the junction between the semiconductor switching element and the passive element and the lead terminal, the junction between the semiconductor switching element and the connecting conductor, the junction between the semiconductor switching element and the metal block, or the semiconductor There is a risk that mounting elements such as switching elements and passive elements may be destroyed.
　そこで、半導体モジュールの空間に、半導体モジュールを構成する各部材の線膨張率のうち、最も大きい線膨張率と最も小さい線膨張率の中間の値の線膨張率を有する封止樹脂を充填することが好ましく、そのようにすれば、前記接合部の破断や、実装素子の破壊を抑制することができるのである。 Therefore, the space of the semiconductor module is filled with a sealing resin having a linear expansion coefficient which is an intermediate value between the largest linear expansion coefficient and the smallest linear expansion coefficient among the linear expansion coefficients of the respective members constituting the semiconductor module. In this case, it is possible to suppress breakage of the joint portion and breakage of the mounting element.
　なお、半導体スイッチング素子や受動素子を階層化した構造である場合、半導体モジュールの空間を封止樹脂で充填することで、半導体モジュールの機械的構造強度を維持することが可能となる。すなわち、封止樹脂が弾性体であると該機械的構造強度を維持できなくなるため、封止樹脂は、その弾性率が１ＧＰａ以上であることが好ましい。 In the case of a structure in which semiconductor switching elements and passive elements are hierarchized, the mechanical structure strength of the semiconductor module can be maintained by filling the space of the semiconductor module with a sealing resin. That is, when the sealing resin is an elastic body, the mechanical structure strength cannot be maintained. Therefore, the sealing resin preferably has an elastic modulus of 1 GPa or more.
　さらに、本発明の半導体モジュール（請求項１に記載された半導体モジュール）は、半導体スイッチング素子を含む電源回路（半導体スイッチング素子のゲートの開閉を制御する回路を「制御回路」、半導体スイッチング素子により電力の流れが制御される回路を「電源回路」とする）の構成要素である受動素子が、第１リード端子層または第３リード端子層に配置されたリード端子に接合されていることが好ましい。以下に、その理由を説明する。 Furthermore, the semiconductor module of the present invention (the semiconductor module described in claim 1) includes a power supply circuit including a semiconductor switching element (a circuit for controlling opening and closing of the gate of the semiconductor switching element is a “control circuit”) It is preferable that a passive element, which is a component of “a power supply circuit” is a circuit whose flow is controlled, is joined to a lead terminal arranged in the first lead terminal layer or the third lead terminal layer. The reason will be described below.
　半導体スイッチング素子を含む電源回路の構成要素である受動素子は、該受動素子が抵抗素子である場合はもとより、コンデンサ素子、インダクタ素子であっても、微小の抵抗成分を有するため、該電源回路を含む半導体モジュールが作動する際には、半導体スイッチング素子のみならず、該受動素子も自己発熱する。本発明の半導体モジュールは、インバータ等に対応する電力変換用の半導体モジュールであり、電源回路に大電力が掛かる用途に用いられる場合がある。その場合、電源回路の構成要素である受動素子は、その抵抗成分が微小であっても大きく自己発熱し、機能保証温度を超える状況に至ることもある。よって、電源回路の構成要素である受動素子に対しては、半導体スイッチング素子と同様に放熱対策が必要となる。 A passive element, which is a component of a power supply circuit including a semiconductor switching element, has a very small resistance component, not only when the passive element is a resistance element, but also a capacitor element and an inductor element. When the included semiconductor module operates, not only the semiconductor switching element but also the passive element self-heats. The semiconductor module of the present invention is a semiconductor module for power conversion corresponding to an inverter or the like, and may be used for applications where a large amount of power is applied to a power supply circuit. In that case, the passive element which is a component of the power supply circuit may generate a large amount of heat even if its resistance component is very small, resulting in a situation where the function guarantee temperature is exceeded. Therefore, measures against heat dissipation are required for the passive elements, which are the components of the power supply circuit, as in the semiconductor switching elements.
　本発明の半導体モジュールにおいて、該モジュールの内部で発せられる熱は、リード端子を伝わって放熱させると同時に、該モジュールの両主面に配置された後述の放熱板から放熱させる構造を採っている。よって、電源回路の構成要素である受動素子は、第１リード端子層または第３リード端子層に配置されたリード端子に接合されていることが好ましいのである。これにより、電源回路の構成要素である受動素子から発せられた熱は、接合された第１リード端子層または第３リード端子層に配置されたリード端子を伝わって平面方向に放熱されると同時に、該受動素子が接合された第１のリード端子層または第３のリード端子層に配置されたリード端子から、後述の樹脂板を、それぞれの厚み方向に伝わり、放熱板から外部に放出される。電源回路の構成要素である受動素子は、前記二つの経路を伝わって放熱され、十分な放熱経路が確保されることで、過度な温度上昇が防止されることになる。これにより、受動素子の機能保証温度の範囲内で、正常に作動し続けることが可能となる。 In the semiconductor module of the present invention, the heat generated inside the module is dissipated through the lead terminals, and at the same time, the heat is dissipated from the heat sinks described later disposed on both main surfaces of the module. Therefore, it is preferable that the passive element that is a component of the power supply circuit is bonded to the lead terminal arranged in the first lead terminal layer or the third lead terminal layer. As a result, heat generated from the passive element that is a constituent element of the power supply circuit is transferred to the lead terminals arranged in the joined first lead terminal layer or the third lead terminal layer and is radiated in the planar direction. From the lead terminals arranged in the first lead terminal layer or the third lead terminal layer to which the passive element is joined, the resin plates described later are transmitted in the respective thickness directions, and are discharged to the outside from the heat radiating plates. . The passive element, which is a component of the power supply circuit, is dissipated through the two paths, and a sufficient heat dissipation path is secured, thereby preventing an excessive temperature rise. As a result, it is possible to continue to operate normally within the range of the guaranteed functional temperature of the passive element.
　これに対し、電源回路の構成要素である受動素子が、第２のリード端子層に配置されたリード端子に接合されると、該受動素子から発せられた熱は、第２のリード端子層に配置されたリード端子のみを伝わった平面方向のみの放熱となり、十分な放熱経路が確保できない。そのため、電源回路を構成する受動素子が、過度に温度上昇し、該受動素子の機能保証温度を超え、半導体モジュールの動作不良が発生する状況に至る場合がある。 In contrast, when a passive element, which is a component of the power supply circuit, is joined to a lead terminal arranged in the second lead terminal layer, heat generated from the passive element is transferred to the second lead terminal layer. Only in the plane direction, which is transmitted only through the arranged lead terminals, heat is dissipated, and a sufficient heat dissipation path cannot be secured. For this reason, the temperature of the passive elements constituting the power supply circuit may rise excessively, exceed the function-guaranteed temperature of the passive elements, and the semiconductor module may malfunction.
　以上説明したように、電源回路の構成要素である受動素子が抵抗素子である場合は、該抵抗成分による電力損失に起因した発熱量が大きくなるため、該受動素子は、第１のリード端子層または第３のリード端子層に配置されたリード端子に接合することが特に好ましい。 As described above, when the passive element that is a component of the power supply circuit is a resistance element, the amount of heat generated due to the power loss due to the resistance component increases, so the passive element includes the first lead terminal layer. Or it is especially preferable to join to the lead terminal arrange | positioned at the 3rd lead terminal layer.
　なお、第２のリード端子層に配置されたリード端子には、第１の半導体スイッチング素子が接合されているが、第１の半導体スイッチング素子から発せられた熱は、第２のリード端子層に配置されたリード端子を伝わって平面方向に放熱されると同時に、金属ブロックを介して、第1のリード端子層に配置されたリード端子から、後述の樹脂板を、それぞれの厚み方向に伝わり、放熱板から外部に放出される。すなわち、第１の半導体スイッチング素子においては、第２のリード端子層に配置されたリード端子に接合された状態であっても、前記二つの経路を伝わって放熱されるため、十分な放熱経路が確保されていることになる。 The first semiconductor switching element is bonded to the lead terminal arranged in the second lead terminal layer, but the heat generated from the first semiconductor switching element is applied to the second lead terminal layer. At the same time as radiated in the plane direction through the arranged lead terminals, through the metal block, from the lead terminals arranged in the first lead terminal layer, the resin plate described later is transmitted in the thickness direction, Released from the heat sink. That is, in the first semiconductor switching element, even if it is joined to the lead terminal disposed in the second lead terminal layer, heat is radiated through the two paths, so that a sufficient heat dissipation path is provided. It will be secured.
　本発明の半導体モジュールにおいては、検出素子を、封止樹脂層に封止される受動素子とすることができる。たとえば、シャント抵抗素子やサーミスタ素子等の検出素子を封止樹脂層に封止すれば、半導体モジュールの高機能化をはかることができる。また、サーミスタ素子を封止樹脂に封止した場合には、半導体スイッチング素子の異常発熱を高い精度で検知することができる。 In the semiconductor module of the present invention, the detection element can be a passive element sealed in a sealing resin layer. For example, if a detection element such as a shunt resistor element or a thermistor element is sealed in a sealing resin layer, the semiconductor module can be enhanced in function. Further, when the thermistor element is sealed with a sealing resin, abnormal heat generation of the semiconductor switching element can be detected with high accuracy.
　また、セラミックス板を備え、リード端子が、少なくとも、セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金を介して、セラミックス基板に取付けられたものとしても良い。この場合には、高い強度を備えたセラミックス板に、リード端子を強固に取付けることができる。 Also, a ceramic plate may be provided, and the lead terminal may be attached to the ceramic substrate through an alloy containing at least an active metal that reacts with the ceramic constituents, Ag, and Cu. In this case, the lead terminal can be firmly attached to the ceramic plate having high strength.
　あるいは、熱硬化性の樹脂板を備え、リード端子が、接着剤を介することなく直接に樹脂板に取付けられたものとしても良い。この場合には、未硬化状態の樹脂板に、リード端子を熱圧着し、更に加熱して樹脂板を硬化させて、リード端子を樹脂板に取付けることができる。 Alternatively, a thermosetting resin plate may be provided, and the lead terminal may be directly attached to the resin plate without using an adhesive. In this case, the lead terminal can be attached to the resin plate by thermocompression-bonding the lead terminal to the uncured resin plate and further heating to cure the resin plate.
　更に、封止樹脂の表面から露出した放熱板を備え、放熱板の外周縁が、封止樹脂の内部に埋め込まれたものとしても良い。この場合には、放熱板により、半導体スイッチング素子により発生した熱を効率的に放散させることができる。また、放熱板の外周縁が封止樹脂の内部に埋め込まれているため、放熱板と封止樹脂との剥離が起こりにくく、この部分からの水分の内部への混入が抑制されているため、放熱板を封止樹脂の表面に露出させているにも関わらず、高い耐湿性、高い信頼性を維持することができる。 Furthermore, a heat sink exposed from the surface of the sealing resin may be provided, and the outer peripheral edge of the heat sink may be embedded in the sealing resin. In this case, the heat generated by the semiconductor switching element can be efficiently dissipated by the heat radiating plate. In addition, since the outer peripheral edge of the heat sink is embedded in the sealing resin, peeling between the heat sink and the sealing resin is unlikely to occur, and mixing of moisture into the inside from this portion is suppressed, Although the heat radiating plate is exposed on the surface of the sealing resin, high moisture resistance and high reliability can be maintained.
　また、第２リード端子層に配置されたリード端子の厚みを、第１リード端子層に配置されたリード端子および第３リード端子層に配置されたリード端子の厚みよりも大きくすることが好ましい。この場合には、半導体スイッチング素子の最高ジャンクション温度を低く抑えることができる。また、半導体スイッチング素子の間の温度ばらつきを小さく抑えることができる。 Further, it is preferable that the thickness of the lead terminals arranged in the second lead terminal layer is larger than the thickness of the lead terminals arranged in the first lead terminal layer and the third lead terminal layer. In this case, the maximum junction temperature of the semiconductor switching element can be kept low. In addition, temperature variations between the semiconductor switching elements can be reduced.
　また、半導体スイッチング素子と並列にスナバ回路を接続することが好ましい。この場合には、スイッチング時に配線やワイヤーボンディング等におい発生する寄生インダクタンスや寄生抵抗を低減させ、低ノイズ化をはかることができる。 Also, it is preferable to connect a snubber circuit in parallel with the semiconductor switching element. In this case, it is possible to reduce the parasitic inductance and resistance generated in wiring, wire bonding, and the like during switching, thereby reducing noise.
　本発明の半導体モジュールにより、種々の等価回路を構成することができる。 The semiconductor module of the present invention can constitute various equivalent circuits.
　たとえば、本発明の1つの半導体モジュール（請求項１に記載された半導体モジュール）では、Ｐ側端子と、Ｎ側端子と、中間端子と、２個の半導体スイッチング素子と、受動素子としてシャント抵抗素子とを備え、Ｐ側端子に、１個の半導体スイッチング素子のドレインまたはコレクタ（以下においては両者を合わせて「ドレイン」と表記するが、当該「ドレイン」は「コレクタ」と読み替えることができるものとする）が接続され、その半導体スイッチング素子のソースまたはエミッタ（以下においては両者を合わせて「ソース」と表記するが、当該「ソース」は「エミッタ」と読み替えることができるものとする）に、もう１個の半導体スイッチング素子のドレインが接続され、その半導体スイッチング素子のソースに、シャント抵抗素子の一端が接続され、そのシャント抵抗素子の他端にＮ側端子が接続されるとともに、２個の半導体スイッチング素子の接続点に、中間端子が接続された等価回路を構成することができる。 For example, in one semiconductor module of the present invention (the semiconductor module described in claim 1), a P-side terminal, an N-side terminal, an intermediate terminal, two semiconductor switching elements, and a shunt resistance element as a passive element And the drain or collector of one semiconductor switching element (hereinafter referred to as “drain” together, the “drain” can be read as “collector”). Connected to the source or emitter of the semiconductor switching element (hereinafter referred to as “source” together, but the “source” can be read as “emitter”). The drain of one semiconductor switching element is connected, and a shunt resistor is connected to the source of the semiconductor switching element. An equivalent circuit in which one end of the element is connected, the N-side terminal is connected to the other end of the shunt resistor element, and an intermediate terminal is connected to the connection point of the two semiconductor switching elements can be configured.
　また、本発明の他の半導体モジュール（請求項３に記載された半導体モジュール）では、Ｐ側端子と、Ｎ側端子と、中間端子と、３個の半導体スイッチング素子と、受動素子としてシャント抵抗素子とを備え、Ｐ側端子に、１個の半導体スイッチング素子のドレインが接続され、その半導体スイッチング素子のソースに、もう１個の半導体スイッチング素子のドレインが接続され、その半導体スイッチング素子のソースに、シャント抵抗素子の一端が接続され、そのシャント抵抗素子の他端にＮ側端子が接続されるとともに、２個の半導体スイッチング素子の接続点に、残りの１個の半導体スイッチング素子のソースが接続され、その半導体スイッチング素子のドレインに中間端子が接続された等価回路を構成することができる。 In another semiconductor module of the present invention (the semiconductor module described in claim 3), a P-side terminal, an N-side terminal, an intermediate terminal, three semiconductor switching elements, and a shunt resistance element as a passive element The drain of one semiconductor switching element is connected to the P-side terminal, the drain of another semiconductor switching element is connected to the source of the semiconductor switching element, and the source of the semiconductor switching element is One end of the shunt resistor element is connected, the N-side terminal is connected to the other end of the shunt resistor element, and the source of the remaining one semiconductor switching element is connected to the connection point of the two semiconductor switching elements. Thus, an equivalent circuit in which the intermediate terminal is connected to the drain of the semiconductor switching element can be configured.
　本発明の半導体モジュールを、複数個、並列に接続し、大規模化された等価回路を備えた半導体モジュールを構成しても良い。 A plurality of semiconductor modules of the present invention may be connected in parallel to constitute a semiconductor module having a large-scale equivalent circuit.
　本発明の半導体モジュールは、たとえば、インバータの電力変換部として用いることができる。 The semiconductor module of the present invention can be used, for example, as a power conversion unit of an inverter.
　また、複数個（たとえば６個）の本発明の半導体モジュールを、ケースに同心円状に取付け、パワーコントロールユニットを構成することができる。あるいは、２個の本発明の半導体モジュールを対向させてケースに取付け、パワーコントロールユニットを構成することができる。本発明の半導体モジュールは小型であるので、パワーコントロールユニットの小型化をはかることができる。 Also, a plurality of (for example, six) semiconductor modules of the present invention can be concentrically attached to the case to constitute a power control unit. Alternatively, the power control unit can be configured by mounting two semiconductor modules of the present invention facing each other in a case. Since the semiconductor module of the present invention is small, the power control unit can be downsized.
　また、パワーコントロールユニットは、取付けられた半導体モジュールの上面に、ヒートシンクを取付けることが好ましい。この場合には、半導体モジュールが発生させた熱を効率的に放散させることができる。なお、ヒートシンクは、半導体モジュールごとに個別ヒートシンクを取付けても良いし、あるいは、複数の半導体モジュールに１つの共通ヒートシンクを取付けても良い。 In addition, it is preferable that the power control unit has a heat sink attached to the upper surface of the attached semiconductor module. In this case, the heat generated by the semiconductor module can be efficiently dissipated. As the heat sink, an individual heat sink may be attached to each semiconductor module, or one common heat sink may be attached to a plurality of semiconductor modules.
　なお、必要に応じて、取付けられた半導体モジュールのコーナー部に切欠きを設けても良い。この場合には、パワーコントロールユニットを更に小型化することができる。 In addition, you may provide a notch in the corner part of the attached semiconductor module as needed. In this case, the power control unit can be further downsized.
　本発明の半導体モジュールは、半導体スイッチング素子に加えて、受動素子が封止樹脂内に封止されており、高機能化されている。 In the semiconductor module of the present invention, in addition to the semiconductor switching element, a passive element is sealed in a sealing resin, and has high functionality.
本発明のパワーコントロールユニットは、小型化された半導体モジュールを使用しているので、小型化されている。 The power control unit of the present invention is miniaturized because it uses a miniaturized semiconductor module.
図１（Ａ）は、第１実施形態にかかる半導体モジュール１００を示す断面図である。図１（Ｂ）は、半導体モジュール１００を示す要部断面図である。FIG. 1A is a cross-sectional view showing a semiconductor module 100 according to the first embodiment. FIG. 1B is a main part cross-sectional view showing the semiconductor module 100. 図２は、第２実施形態にかかる半導体モジュール２００を示す断面図である。FIG. 2 is a cross-sectional view showing a semiconductor module 200 according to the second embodiment. 図３は、第３実施形態にかかる半導体モジュール３００を示す断面図である。FIG. 3 is a cross-sectional view showing a semiconductor module 300 according to the third embodiment. 図４（Ａ）は、第４実施形態にかかる半導体モジュール４００を示す平面図である。図４（Ｂ）は、半導体モジュール４００を示す断面図であり、図４（Ａ）のＸ-Ｘ部分を示している。FIG. 4A is a plan view showing a semiconductor module 400 according to the fourth embodiment. FIG. 4B is a cross-sectional view showing the semiconductor module 400 and shows a portion XX in FIG. 図５は、第５実施形態にかかる半導体モジュール５００を示す等価回路図である。FIG. 5 is an equivalent circuit diagram showing a semiconductor module 500 according to the fifth embodiment. 図６は、第６実施形態にかかる半導体モジュール６００を示す等価回路図である。FIG. 6 is an equivalent circuit diagram showing a semiconductor module 600 according to the sixth embodiment. 図７は、第７実施形態にかかる半導体モジュール７００を示す等価回路図である。FIG. 7 is an equivalent circuit diagram showing a semiconductor module 700 according to the seventh embodiment. 図８は、第８実施形態にかかる半導体モジュール８００を示す等価回路図である。FIG. 8 is an equivalent circuit diagram showing a semiconductor module 800 according to the eighth embodiment. 図９は、第９実施形態にかかる半導体モジュール９００を示す等価回路図である。FIG. 9 is an equivalent circuit diagram showing a semiconductor module 900 according to the ninth embodiment. 図１０は、第１０実施形態にかかる半導体モジュール１０００を示す等価回路図である。FIG. 10 is an equivalent circuit diagram showing a semiconductor module 1000 according to the tenth embodiment. 図１１（Ａ）は、第１３実施形態にかかる半導体モジュール１３００を示す断面図である。図１１（Ｂ）は、半導体モジュール１３００の製造方法を示す断面図である。FIG. 11A is a cross-sectional view showing a semiconductor module 1300 according to the thirteenth embodiment. FIG. 11B is a cross-sectional view illustrating the method for manufacturing the semiconductor module 1300. 第１５実施形態にかかる半導体モジュール１５００を示す等価回路図である。It is an equivalent circuit diagram which shows the semiconductor module 1500 concerning 15th Embodiment. 図１３（Ａ）は、第１６実施形態にかかる半導体モジュール１６００を示す分解平面図である。図１３（Ｂ）は、半導体モジュール１６００を示す平面図である。FIG. 13A is an exploded plan view showing a semiconductor module 1600 according to the sixteenth embodiment. FIG. 13B is a plan view showing the semiconductor module 1600. 図１４（Ａ）は、第１７実施形態にかかる半導体モジュール１７００を示す分解平面図である。図１４（Ｂ）は、半導体モジュール１７００を示す平面図である。FIG. 14A is an exploded plan view showing a semiconductor module 1700 according to the seventeenth embodiment. FIG. 14B is a plan view showing the semiconductor module 1700. 図１５（Ａ）は、第１８実施形態にかかる半導体モジュール１８００を示す分解平面図である。図１５（Ｂ）は、半導体モジュール１８００を示す平面図である。FIG. 15A is an exploded plan view showing a semiconductor module 1800 according to the eighteenth embodiment. FIG. 15B is a plan view showing the semiconductor module 1800. 図１６（Ａ）は、第１９実施形態にかかる半導体モジュール１９００を示す分解平面図である。図１６（Ｂ）は、半導体モジュール１９００を示す平面図である。FIG. 16A is an exploded plan view showing a semiconductor module 1900 according to the nineteenth embodiment. FIG. 16B is a plan view showing the semiconductor module 1900.
　以下、図面とともに、本発明を実施するための形態を説明する。 Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.
　［第１実施形態］
　図１（Ａ）、（Ｂ）に、本発明の第１実施形態にかかる半導体モジュール１００を示す。 [First Embodiment]
1A and 1B show a semiconductor module 100 according to a first embodiment of the present invention.
　図１（Ａ）は、半導体モジュール１００の断面図である。図１（Ｂ）は、半導体モジュール１００の要部断面図である。ただし、図１（Ｂ）では、封止樹脂１１の図示を省略している。 FIG. 1A is a cross-sectional view of the semiconductor module 100. FIG. 1B is a cross-sectional view of a main part of the semiconductor module 100. However, illustration of the sealing resin 11 is omitted in FIG.
　半導体モジュール１００は、銅系金属、アルミニウム系金属、鉄系金属等からなる板状の複数のリード端子５１ａ、５１ｂ、５１ｃ、５２ａ、５２ｂ、５３ａ、５３ｂを備える。 The semiconductor module 100 includes a plurality of plate- like lead terminals 51a, 51b, 51c, 52a, 52b, 53a, 53b made of copper-based metal, aluminum-based metal, iron-based metal, or the like.
　リード端子５１ａ～５３ｂは、第１リード端子層１Ｌ、第２リード端子層２Ｌ、第３リード端子層３Ｌの３層に分けて配置されている。 The lead terminals 51a to 53b are arranged in three layers of a first lead terminal layer 1L, a second lead terminal layer 2L, and a third lead terminal layer 3L.
　第１リード端子層１Ｌに配置されたリード端子５１ａ、５１ｂ、５１ｃは、予め樹脂板６ａと接している。また、第３リード端子層３Ｌに配置されたリード端子５３ａ、５３ｂは、予め樹脂板６ｂと接している。樹脂板６ａ、６ｂは、たとえば、エポキシ系樹脂、ポリイミド系樹脂、ビスマレイミド系樹脂、シリコーン系樹脂等からなる。なお、樹脂板６ａ、６ｂは、半導体スイッチング素子で発生する熱を半導体モジュール１００の両表面から放熱させるための熱伝達経路に位置する。よって、樹脂板６ａ、６ｂには、アルミナ、窒化アルミニウム、窒化珪素、炭化珪素等の高熱伝導率のフィラーを充填した熱抵抗の低い樹脂板を用いることが好ましい。 The lead terminals 51a, 51b, 51c arranged on the first lead terminal layer 1L are in contact with the resin plate 6a in advance. Further, the lead terminals 53a and 53b arranged on the third lead terminal layer 3L are in contact with the resin plate 6b in advance. The resin plates 6a and 6b are made of, for example, an epoxy resin, a polyimide resin, a bismaleimide resin, a silicone resin, or the like. The resin plates 6 a and 6 b are located in a heat transfer path for dissipating heat generated in the semiconductor switching element from both surfaces of the semiconductor module 100. Therefore, it is preferable to use a resin plate having a low thermal resistance filled with a filler having a high thermal conductivity such as alumina, aluminum nitride, silicon nitride, or silicon carbide for the resin plates 6a and 6b.
　なお、樹脂板６ａには、放熱板７ａも接している。また、樹脂板６ｂには、放熱板７ｂも接している。放熱板７ａ、７ｂは、たとえば、銅系金属、アルミニウム系金属、鉄系金属等の熱伝導率の高い金属板からなる。 The heat sink 7a is also in contact with the resin plate 6a. Further, the heat sink 7b is also in contact with the resin plate 6b. The heat sinks 7a and 7b are made of a metal plate having a high thermal conductivity such as a copper-based metal, an aluminum-based metal, and an iron-based metal.
　半導体モジュール１００は、第１の半導体スイッチング素子１と、第２の半導体スイッチング素子２とを備える。 The semiconductor module 100 includes a first semiconductor switching element 1 and a second semiconductor switching element 2.
　図１（Ｂ）に示すように、第１の半導体スイッチング素子１は、両主面を有し、一方の主面に信号電極パッド１ａと一方の電源電極パッド１ｂとが形成され、他方の主面に他方の電源電極パッド１ｃが形成されている。同じく、図１（Ｂ）に示すように、第２の半導体スイッチング素子２は、両主面を有し、一方の主面に信号電極パッド２ａと一方の電源電極パッド２ｂとが形成され、他方の主面に他方の電源電極パッド２ｃが形成されている。 As shown in FIG. 1B, the first semiconductor switching element 1 has both main surfaces, the signal electrode pad 1a and one power electrode pad 1b are formed on one main surface, and the other main surface. The other power electrode pad 1c is formed on the surface. Similarly, as shown in FIG. 1B, the second semiconductor switching element 2 has both main surfaces, and a signal electrode pad 2a and one power electrode pad 2b are formed on one main surface, and the other The other power electrode pad 2c is formed on the main surface.
　第１の半導体スイッチング素子１の他方の電源電極パッド１ｃは、はんだ、ナノ焼結金属、導電性樹脂等からなる接合材４により、第２リード端子層２Ｌに配置されたリード端子５２ａの一方の主面に接合されている。第１の半導体スイッチング素子１の一方の電源電極パッド１ａには、接合材４により、金属ブロック８ａが接合されている。金属ブロック８ａの電源電極パッド１ａに接合されていない側の主面は、接合材４により、第１リード端子層１Ｌに配置されたリード端子５１ｃに接合されている。第１の半導体スイッチング素子１の信号電極パッド１ａは、金属ワイヤーからなる接続用導体９ａにより、第２リード端子層２Ｌに配置されたリード端子５２ｂに電気的に接続されている。 The other power electrode pad 1c of the first semiconductor switching element 1 is connected to one of the lead terminals 52a arranged on the second lead terminal layer 2L by a bonding material 4 made of solder, nano-sintered metal, conductive resin, or the like. It is joined to the main surface. A metal block 8 a is bonded to one power supply electrode pad 1 a of the first semiconductor switching element 1 by a bonding material 4. The main surface of the metal block 8a that is not bonded to the power supply electrode pad 1a is bonded to the lead terminal 51c disposed on the first lead terminal layer 1L by the bonding material 4. The signal electrode pad 1a of the first semiconductor switching element 1 is electrically connected to a lead terminal 52b disposed on the second lead terminal layer 2L by a connecting conductor 9a made of a metal wire.
　第２の半導体スイッチング素子２の他方の電源電極パッド２ｃは、接合材４により、第３リード端子層３Ｌに配置されたリード端子５３ａの一方の主面に接合されている。第２の半導体スイッチング素子２の一方の電源電極パッド２ｂには、接合材４により、金属ブロック８ｂが接合されている。金属ブロック８ｂの電源電極パッド２ａに接合されていない側の主面は、接合材４により、第２リード端子層２Ｌに配置されたリード端子５２ａの他方の主面に接合されている。第２の半導体スイッチング素子２の信号電極パッド２ａは、金属ワイヤーからなる接続用導体９ｂにより、第３リード端子層３Ｌに配置されたリード端子５３ｂに電気的に接続されている。 The other power supply electrode pad 2c of the second semiconductor switching element 2 is bonded to one main surface of the lead terminal 53a disposed on the third lead terminal layer 3L by the bonding material 4. A metal block 8 b is bonded to one power supply electrode pad 2 b of the second semiconductor switching element 2 by a bonding material 4. The main surface of the metal block 8b that is not bonded to the power supply electrode pad 2a is bonded to the other main surface of the lead terminal 52a disposed in the second lead terminal layer 2L by the bonding material 4. The signal electrode pad 2a of the second semiconductor switching element 2 is electrically connected to a lead terminal 53b arranged on the third lead terminal layer 3L by a connecting conductor 9b made of a metal wire.
　なお、上述したように、接合材４には、たとえば、はんだ、ナノ焼結金属、導電性樹脂等が使用されるが、電気損失量が大きくなる電源経路や、半導体スイッチング素子で発生する熱を半導体モジュール１００の両表面から放熱させるための熱伝達経路に位置する接合部にあっては、比抵抗が低く、熱伝導率の高い、銀、銅、金等からなるナノ焼結金属を使用することが好ましい。ただし、接合材４は、接合材４が位置する全部位で、同一の接合材とする必要はなく、各部位で要求される接合材の特性を考慮して、種々ある接合材の中から好適なものを選択すれば良い。 As described above, for example, solder, nano-sintered metal, conductive resin, or the like is used for the bonding material 4, but the heat generated in the power supply path or the semiconductor switching element that increases the amount of electrical loss is used. In the joint located in the heat transfer path for radiating heat from both surfaces of the semiconductor module 100, a nano-sintered metal made of silver, copper, gold or the like having a low specific resistance and a high thermal conductivity is used. It is preferable. However, the bonding material 4 does not need to be the same bonding material in all the portions where the bonding material 4 is located, and is suitable from various bonding materials in consideration of the characteristics of the bonding material required in each portion. You can choose the right one.
　また、信号電極パッド１ａとリード端子５２ｂの接続、および信号電極パッド２ａとリード端子５３ｂの接続は、電気的導通をもって接続されるならば、形態の如何を問わない。本実施形態においては、接続用導体９ａ、９ｂとして金属ワイヤーを使用しているが、接続用導体９ａ、９ｂは金属ワイヤーには限られず、これに代えて金属クリップ等を使用するようにしても良い。 Further, the connection between the signal electrode pad 1a and the lead terminal 52b and the connection between the signal electrode pad 2a and the lead terminal 53b are not limited as long as they are electrically connected. In this embodiment, metal wires are used as the connecting conductors 9a and 9b. However, the connecting conductors 9a and 9b are not limited to metal wires, and metal clips or the like may be used instead. good.
　図１（Ａ）に示すように、半導体モジュール１００は、受動素子１０を備える。受動素子１０は、たとえば、抵抗素子、サーミスタ素子、コンデンサ素子、インダクタンス素子等からなる。受動素子１０は、異常電流や異常発熱を検出する検出素子であっても良い。受動素子１０は、一方の主面に１対の電極パッド（図示せず）が形成され、一方の電極パッドが、接合材４により、第１リード端子層１Ｌに配置されたリード端子５１ａに接合され、他方の電極パッドが、接合材４により、第１リード端子層１Ｌに配置されたリード端子５１ｂに接合されている。 As shown in FIG. 1A, the semiconductor module 100 includes a passive element 10. The passive element 10 includes, for example, a resistance element, a thermistor element, a capacitor element, an inductance element, and the like. The passive element 10 may be a detection element that detects abnormal current or abnormal heat generation. In the passive element 10, a pair of electrode pads (not shown) is formed on one main surface, and one electrode pad is bonded to the lead terminal 51 a disposed on the first lead terminal layer 1 </ b> L by the bonding material 4. The other electrode pad is bonded to the lead terminal 51b disposed on the first lead terminal layer 1L by the bonding material 4.
　第１の半導体スイッチング素子１、第２の半導体スイッチング素子２、金属ブロック８ａ、８ｂ、受動素子１０は、リード端子５１ａ～５３ｂ、樹脂板６ａ、６ｂ、接続用導体９ａ、９ｂとともに、封止樹脂１１に封止されている。リード端子５１ａ、５１ｃ、５２ａ、５２ｂ、５３ａ、５３ｂは、その先端が封止樹脂１１から導出されている。また、放熱板７ａ、７ｂが、封止樹脂１１の両主面から露出されている。 The first semiconductor switching element 1, the second semiconductor switching element 2, the metal blocks 8a and 8b, and the passive element 10 are encapsulated resin together with lead terminals 51a to 53b, resin plates 6a and 6b, and connection conductors 9a and 9b. 11 is sealed. Lead ends of the lead terminals 51a, 51c, 52a, 52b, 53a, 53b are led out from the sealing resin 11. Further, the heat radiating plates 7 a and 7 b are exposed from both main surfaces of the sealing resin 11.
　封止樹脂１１は、たとえば、エポキシ系樹脂、ポリイミド系樹脂、ビスマレイミド系樹脂、シリコーン系樹脂等からなる。封止樹脂１１は、第１リード端子層１Ｌと第２リード端子層２Ｌとの間の第１封止樹脂層１Ｍと、第２リード端子層２Ｌと第３リード端子層３Ｌとの間の第２封止樹脂層２Ｍとを有する。 The sealing resin 11 is made of, for example, an epoxy resin, a polyimide resin, a bismaleimide resin, a silicone resin, or the like. The sealing resin 11 includes a first sealing resin layer 1M between the first lead terminal layer 1L and the second lead terminal layer 2L, and a second one between the second lead terminal layer 2L and the third lead terminal layer 3L. 2 sealing resin layers 2M.
　第１リード端子層１Ｌと第２リード端子層２Ｌとの間の第１封止樹脂層１Ｍには、接合材４により一方の主面に金属ブロック８ａが取付けられた第１の半導体スイッチング素子１と、受動素子１０とが封止されている。 A first semiconductor switching element 1 in which a metal block 8a is attached to one main surface by a bonding material 4 in the first sealing resin layer 1M between the first lead terminal layer 1L and the second lead terminal layer 2L. The passive element 10 is sealed.
　受動素子１０の高さは、半導体スイッチング素子１の高さと金属ブロック８ａの高さとの合計よりも小さくなるように設計されている。  The height of the passive element 10 is designed to be smaller than the sum of the height of the semiconductor switching element 1 and the height of the metal block 8a.
　受動素子１０の高さが、１の半導体スイッチング素子１の高さと金属ブロック８ａの高さとの合計よりも大きいと、受動素子１０が、第２リード端子層２Ｌに配置されたリード端子５２ａに支える虞があるからである。そして、受動素子１０が、第２リード端子層２Ｌに配置されたリード端子５２ａに支えると、半導体モジュール１００の主面が部分的に膨れたり、傾いたりすることで、外観不良を起こしたり、半導体モジュール１００を機器、装置内に組み込む際に不具合が生じる虞があるからである。また、第１の半導体スイッチング素子１と金属ブロック８ａとを相互に接合する接合材４や、第１の半導体スイッチング素子１をリード端子５２ａに接合する接合材４や、金属ブロック８ａをリード端子５１ｃに接合する接合材４が外れて導通不良を起こす虞があるからである。 When the height of the passive element 10 is larger than the sum of the height of the one semiconductor switching element 1 and the height of the metal block 8a, the passive element 10 supports the lead terminal 52a disposed on the second lead terminal layer 2L. This is because there is a fear. When the passive element 10 is supported by the lead terminals 52a arranged on the second lead terminal layer 2L, the main surface of the semiconductor module 100 partially swells or tilts, causing a defective appearance or a semiconductor. This is because problems may occur when the module 100 is incorporated in a device or apparatus. Further, the bonding material 4 for bonding the first semiconductor switching element 1 and the metal block 8a to each other, the bonding material 4 for bonding the first semiconductor switching element 1 to the lead terminal 52a, and the metal block 8a to the lead terminal 51c. This is because there is a possibility that the bonding material 4 to be bonded to the detachment causes disconnection.
　また、受動素子１０の高さが、半導体スイッチング素子１の高さと金属ブロック８ａの高さとの合計と同じであっても、製造誤差により、受動素子１０の高さが設計よりも大きい場合や、半導体スイッチング素子１や金属ブロック８ａの高さが設計よりも小さい場合に、受動素子１０が、第２リード端子層２Ｌに配置されたリード端子５２ａに支える虞があるからである。そして、受動素子１０が、第２リード端子層２Ｌに配置されたリード端子５２ａに支えると、半導体モジュール１００の主面が部分的に膨れたり、傾いたりすることで、外観不良を起こしたり、半導体モジュール１００を機器、装置内に組み込む際に不具合が生じる虞があるからである。また、第１の半導体スイッチング素子１と金属ブロック８ａとを相互に接合する接合材４や、第１の半導体スイッチング素子１をリード端子５２ａに接合する接合材４や、金属ブロック８ａをリード端子５１ｃに接合する接合材４が外れて導通不良を起こす虞があるからである。 Even if the height of the passive element 10 is the same as the sum of the height of the semiconductor switching element 1 and the height of the metal block 8a, if the height of the passive element 10 is larger than the design due to manufacturing errors, This is because, when the height of the semiconductor switching element 1 or the metal block 8a is smaller than the design, the passive element 10 may be supported on the lead terminal 52a disposed on the second lead terminal layer 2L. When the passive element 10 is supported by the lead terminals 52a arranged on the second lead terminal layer 2L, the main surface of the semiconductor module 100 partially swells or tilts, causing a defective appearance or a semiconductor. This is because problems may occur when the module 100 is incorporated in a device or apparatus. Further, the bonding material 4 for bonding the first semiconductor switching element 1 and the metal block 8a to each other, the bonding material 4 for bonding the first semiconductor switching element 1 to the lead terminal 52a, and the metal block 8a to the lead terminal 51c. This is because there is a possibility that the bonding material 4 to be bonded to the detachment causes disconnection.
　なお、厳密には、第１の半導体スイッチング素子１をリード端子５２ｂに、金属ブロック８ａをリード端子５１ｃに、受動素子１０をリード端子５１ａ、５１ｂにそれぞれ接合する接合材４の厚みや、第１の半導体スイッチング素子１と金属ブロック８ａとを接合する接合材４の厚みを考慮する必要がある。しかしながら、これらの接合材４の厚みは、受動素子１０や半導体スイッチング素子１や金属ブロック８ａの高さに比べて非常に小さく、少なくとも、受動素子１０の高さを、半導体スイッチング素子１の高さと金属ブロック８ａの高さとの合計よりも小さくしておけば、半導体モジュール１００の主面が部分的に膨れたり、傾いたりすることで、半導体モジュール１００を機器、装置内に組み込む際に不具合が生じることや、内部で接合材４が外れて導通不良を起こすことを防止することができる。 Strictly speaking, the thickness of the bonding material 4 for bonding the first semiconductor switching element 1 to the lead terminal 52b, the metal block 8a to the lead terminal 51c, and the passive element 10 to the lead terminals 51a and 51b, respectively, It is necessary to consider the thickness of the bonding material 4 for bonding the semiconductor switching element 1 and the metal block 8a. However, the thickness of the bonding material 4 is very small compared to the height of the passive element 10, the semiconductor switching element 1, and the metal block 8 a, and at least the height of the passive element 10 is equal to the height of the semiconductor switching element 1. If the height is smaller than the total height of the metal block 8a, the main surface of the semiconductor module 100 partially swells or tilts, causing a problem when the semiconductor module 100 is incorporated in an apparatus or device. In addition, it is possible to prevent the bonding material 4 from being detached and causing poor conduction inside.
　なお、第１実施形態にかかる半導体モジュール１００においては、第１リード端子層１Ｌと第２リード端子層２Ｌとの間の第１封止樹脂層１Ｍに、１個の受動素子１０のみを封止しているが、第１封止樹脂層１Ｍに複数個の受動素子１０を封止するようにしても良い。この場合には、第１封止樹脂層１Ｍに封止された受動素子１０のうち最も大きな高さを有するものの高さを、半導体スイッチング素子１の高さと金属ブロック８ａの高さとの合計よりも小さくなるように設計すれば良い。 In the semiconductor module 100 according to the first embodiment, only one passive element 10 is sealed in the first sealing resin layer 1M between the first lead terminal layer 1L and the second lead terminal layer 2L. However, a plurality of passive elements 10 may be sealed in the first sealing resin layer 1M. In this case, the height of the passive element 10 having the largest height among the passive elements 10 sealed in the first sealing resin layer 1M is set to be higher than the sum of the height of the semiconductor switching element 1 and the height of the metal block 8a. What is necessary is just to design so that it may become small.
　また、受動素子１０を、第１封止樹脂層１Ｍに封止するのではなく、第２封止樹脂層２Ｍに封止するようにしても良い。あるいは、第１封止樹脂層１Ｍだけに封止した受動素子１０に加えて、別の受動素子１０を、第２封止樹脂層２Ｍにも封止するようにしても良い。 Further, the passive element 10 may be sealed not in the first sealing resin layer 1M but in the second sealing resin layer 2M. Alternatively, in addition to the passive element 10 sealed only in the first sealing resin layer 1M, another passive element 10 may be sealed in the second sealing resin layer 2M.
　また、第１実施形態にかかる半導体モジュール１００においては、封止樹脂１１として、その熱膨張率が、半導体スイッチング素子１、２（線膨張率：４ｐｐｍ／Ｋ）、受動素子１０（線膨張率：１９ｐｐｍ／Ｋ）、リード端子５１ａ、５１ｂ、５１ｃ、５２ａ、５２ｂ、５３ａ、５３ｂ（線膨張率：１７ｐｐｍ／Ｋ）、金属ブロック８ａ、８ｂ（線膨張率：１７ｐｐｍ／Ｋ）、接続用導体９ａ、９ｂ（線膨張率：２４ｐｐｍ／Ｋ）のうち、最も大きい線膨張率と、最も小さい線膨張率の中間の値を有するものを用いた。具体的には、前記構成部材のうち、線膨張率の最も大きい接続用導体９ａ、９ｂ（線膨張率：２４ｐｐｍ／Ｋ）と、線膨張率の最も小さい半導体スイッチング素子１、２（線膨張率：４ｐｐｍ／Ｋ）の中間の値である、線膨張率が８～２０ｐｐｍ/Ｋの封止樹脂を用いた。なお、
前記構成部材の線膨張率は、適用した構成部材の材質により変わるものである。すなわち、適用した構成部材の材質によっては、最も大きい線膨張率を有する部材、最も小さい線膨張率を有する部材、およびそれら線膨張率の値が変わるものであり、これに従い、封止樹脂１１の線膨張率の選択範囲は適宜変更されるものである。 In the semiconductor module 100 according to the first embodiment, the thermal expansion coefficient of the sealing resin 11 is that of the semiconductor switching elements 1 and 2 (linear expansion coefficient: 4 ppm / K) and the passive element 10 (linear expansion coefficient: 19 ppm / K), lead terminals 51a, 51b, 51c, 52a, 52b, 53a, 53b (linear expansion coefficient: 17 ppm / K), metal blocks 8a, 8b (linear expansion coefficient: 17 ppm / K), connection conductor 9a, Among 9b (linear expansion coefficient: 24 ppm / K), the one having the intermediate value between the largest linear expansion coefficient and the smallest linear expansion coefficient was used. Specifically, among the constituent members, the connecting conductors 9a and 9b having the largest linear expansion coefficient (linear expansion coefficient: 24 ppm / K) and the semiconductor switching elements 1 and 2 having the smallest linear expansion coefficient (linear expansion coefficient). : A sealing resin having a linear expansion coefficient of 8 to 20 ppm / K, which is an intermediate value of 4 ppm / K). In addition,
The linear expansion coefficient of the constituent member varies depending on the material of the applied constituent member. That is, depending on the material of the applied structural member, the member having the largest linear expansion coefficient, the member having the smallest linear expansion coefficient, and the values of these linear expansion coefficients change. The selection range of the linear expansion coefficient is changed as appropriate.
　上述のとおり、半導体モジュール１００を構成する部材には、線膨張率の大きい部材や小さい部材が混在している。そのため、半導体モジュール１００の内部には、これら部材間の線膨張率差による熱応力が発生する。 As described above, the members constituting the semiconductor module 100 include a member having a large linear expansion coefficient and a member having a small linear expansion coefficient. Therefore, thermal stress due to a difference in linear expansion coefficient between these members is generated inside the semiconductor module 100.
　この熱応力に起因する熱疲労により、次の問題が発生する虞があった。まず、半導体スイッチング素子１とリード端子５２ｂとの接合部、半導体スイッチング素子２とリード端子５３ｂとの接合部、受動素子１０とリード端子５１ａ、５１ｂとの接合部、半導体スイッチング素子１と接続用導体９ａとの接合部、半導体スイッチング素子２と接続用導体９ｂとの接合部、半導体スイッチング素子１と金属ブロック８ａとの接合部、半導体スイッチング素子２と金属ブロック８ｂとの接合部が破断する虞があった。また、半導体スイッチング素子１、２や受動素子１０等の実装素子が破壊する虞があった。 The following problems may occur due to thermal fatigue caused by this thermal stress. First, the junction between the semiconductor switching element 1 and the lead terminal 52b, the junction between the semiconductor switching element 2 and the lead terminal 53b, the junction between the passive element 10 and the lead terminals 51a and 51b, the semiconductor switching element 1 and the connection conductor. There is a possibility that the junction between 9a, the junction between the semiconductor switching element 2 and the connecting conductor 9b, the junction between the semiconductor switching element 1 and the metal block 8a, and the junction between the semiconductor switching element 2 and the metal block 8b may be broken. there were. Further, there is a possibility that mounting elements such as the semiconductor switching elements 1 and 2 and the passive element 10 are destroyed.
　そこで、半導体モジュール１００の空間に、半導体モジュール１００を構成する各部材の線膨張率のうち、最も大きい線膨張率と最も小さい線膨張率の中間の値の線膨張率を有する封止樹脂１１を充填することで、前記接合部の破断や、実装素子（半導体スイッチング素子１，２や受動素子１０）の破壊を抑制することができる。 Therefore, a sealing resin 11 having a linear expansion coefficient intermediate between the largest linear expansion coefficient and the smallest linear expansion coefficient among the linear expansion coefficients of the respective members constituting the semiconductor module 100 is provided in the space of the semiconductor module 100. By filling, it is possible to suppress breakage of the joint portion and breakage of the mounting elements ( semiconductor switching elements 1 and 2 and passive element 10).
　さらに、実施形態１にかかる半導体モジュール１００においては、受動素子を第１リード端子層または第３リード端子層に配置されたリード端子に接合した。 Furthermore, in the semiconductor module 100 according to the first embodiment, the passive element is bonded to the lead terminal arranged in the first lead terminal layer or the third lead terminal layer.
　受動素子は、該受動素子が抵抗素子である場合はもとより、コンデンサ素子、インダクタ素子であっても、微小の抵抗成分を有するため、半導体モジュールが作動する際には、半導体スイッチング素子のみならず、受動素子も自己発熱する場合がある。このように自己発熱する受動素子に対しては、半導体スイッチング素子と同様に放熱対策が必要となる。 Even if the passive element is a resistance element, as well as a capacitor element and an inductor element, the passive element has a minute resistance component, so when the semiconductor module operates, not only the semiconductor switching element, Passive elements can also generate heat. For the passive element that self-heats as described above, it is necessary to take a heat dissipation measure like the semiconductor switching element.
　第１の実施形態にかかる半導体モジュール１００においては、受動素子１０を、第１のリード端子層に配置されたリード端子５１ａ、５１ｂに接合する。これにより、受動素子から発せられた熱は、第１リード端子層に配置されたリード端子５１ａを平面方向に伝わって外部に放出されると同時に、第１のリード端子層に配置されたリード端子５１ａ、５１ｂから、樹脂板６ａを、それぞれの厚み方向に伝わり、放熱板から外部に放出される。前記二つの放熱経路が確保されることで、受動素子は、過度に温度上昇することなく、機能保証温度の範囲内で、正常に作動し続けることが可能となる。 In the semiconductor module 100 according to the first embodiment, the passive element 10 is joined to the lead terminals 51a and 51b arranged in the first lead terminal layer. Thereby, the heat generated from the passive element is transmitted to the lead terminal 51a disposed in the first lead terminal layer in the plane direction and released to the outside, and at the same time, the lead terminal disposed in the first lead terminal layer. From 51a and 51b, the resin plate 6a is transmitted in the respective thickness directions, and is discharged from the heat radiating plate to the outside. By securing the two heat dissipation paths, the passive element can continue to operate normally within the function guarantee temperature range without excessively increasing the temperature.
　以上の構造からなる、第１実施形態にかかる半導体モジュール１００は、たとえば、次の方法で製造することができる。 The semiconductor module 100 according to the first embodiment having the above structure can be manufactured, for example, by the following method.
　まず、樹脂板６ａに、第１リード端子層１Ｌに配置されるリード端子５１ａ、５１ｂ、５１ｃと、放熱板７ａを取付ける。具体的には、樹脂板６ａの一方の主面に、予めリードフレーム（図示せず）で繋がったリード端子５１ａ、５１ｂ、５１ｃを接着剤により接着し、他方の主面に放熱板７ａを接着剤により接着する。あるいは、未硬化樹脂体の一方の主面にリード端子５１ａ、５１ｂ、５１ｃを、他方の主面に放熱板７ａを配置して熱間プレスし、前記未硬化樹脂シートを熱硬化させて樹脂板６ａとすることで、樹脂板６ａの一方の主面に、予めリードフレーム（図示せず）で繋がったリード端子５１ａ、５１ｂ、５１ｃを、他方の主面に放熱板７ａを、接着剤を介さずに接着することもできる。 First, the lead terminals 51a, 51b, 51c arranged on the first lead terminal layer 1L and the heat radiating plate 7a are attached to the resin plate 6a. Specifically, lead terminals 51a, 51b, 51c previously connected by a lead frame (not shown) are bonded to one main surface of the resin plate 6a with an adhesive, and the heat radiating plate 7a is bonded to the other main surface. Glue with the agent. Alternatively, the lead terminals 51a, 51b, 51c are arranged on one main surface of the uncured resin body, and the heat radiating plate 7a is disposed on the other main surface and hot-pressed to thermally cure the uncured resin sheet. 6a, lead terminals 51a, 51b, 51c previously connected to one main surface of the resin plate 6a by a lead frame (not shown), the heat sink 7a on the other main surface, and an adhesive. It is also possible to bond without.
　同様に、樹脂板６ｂに、予めリードフレーム（図示せず）で繋がった第３リード端子層３Ｌに配置されるリード端子５３ａ、５３ｂと、放熱板７ｂを取付ける。具体的には、樹脂板６ｂの一方の主面にリード端子５３ａ、５３ｂを接着剤により接着し、他方の主面に放熱板７ｂを接着剤により接着する。あるいは、未硬化樹脂体の一方の主面にリード端子５３ａ、５３ｂを、他方の主面に放熱板７ｂを配置して熱間プレスし、前記未硬化樹脂シートを熱硬化させて樹脂板６ｂとすることで、樹脂板６ｂの一方の主面に、予めリードフレーム（図示せず）で繋がったリード端子５３ａ、５３ｂ、５３ｃを、他方の主面に放熱板７ｂを、接着剤を介さずに接着することもできる。 Similarly, the lead terminals 53a and 53b and the heat radiating plate 7b disposed on the third lead terminal layer 3L previously connected by the lead frame (not shown) are attached to the resin plate 6b. Specifically, the lead terminals 53a and 53b are bonded to one main surface of the resin plate 6b with an adhesive, and the heat radiating plate 7b is bonded to the other main surface with an adhesive. Alternatively, the lead terminals 53a and 53b are disposed on one main surface of the uncured resin body, and the heat sink 7b is disposed on the other main surface and hot-pressed, and the uncured resin sheet is thermally cured to form the resin plate 6b. By doing so, lead terminals 53a, 53b, 53c previously connected to one main surface of the resin plate 6b by a lead frame (not shown), and the heat radiating plate 7b on the other main surface without an adhesive. It can also be glued.
　第２リード端子層２Ｌに配置されるリード端子５２ａとリード端子５２ｂは、本実施形態においては樹脂板と接していない。しかしながら、リード端子５２ａとリード端子５２ｂが、樹脂板と接するようにしても良い。なお、本実施形態においては、リード端子５２ａとリード端子５２ｂとは樹脂板には接していないが、製造初期の段階においては、リード端子５２ａとリード端子５２ｂとはリードフレーム（図示せず）により繋がっている。 The lead terminal 52a and the lead terminal 52b arranged in the second lead terminal layer 2L are not in contact with the resin plate in the present embodiment. However, the lead terminal 52a and the lead terminal 52b may be in contact with the resin plate. In the present embodiment, the lead terminal 52a and the lead terminal 52b are not in contact with the resin plate, but at the initial stage of manufacture, the lead terminal 52a and the lead terminal 52b are formed by a lead frame (not shown). It is connected.
　次に、第１の半導体スイッチング素子１を、接合材４により、リード端子５２ａに接合する。同様に、第２の半導体スイッチング素子２を、接合材４により、リード端子５３ａに接合する。この場合の接合材４には、ナノ焼結金属、はんだ、導電性樹脂等を用いる。 Next, the first semiconductor switching element 1 is bonded to the lead terminal 52 a by the bonding material 4. Similarly, the second semiconductor switching element 2 is bonded to the lead terminal 53 a by the bonding material 4. In this case, nano-sintered metal, solder, conductive resin or the like is used for the bonding material 4.
　次に、第１の半導体スイッチング素子１の信号電極パッド１ａと、リード端子５２ｂとを、接続用導体９ａにより接続する。同様に、第２の半導体スイッチング素子２の信号電極パッド２ａと、リード端子５３ｂとを、接続用導体９ｂにより接続する。接続用導体９ａ、９ｂに金属ワイヤーを用いる場合は、ワイヤーボンディングで接続する。また、接続用導体９ａ、９ｂに金属クリップを用いる場合は、信号電極パッド１ａ、２ａ、リード端子５２ｂ、５３ｂと、ナノ焼結金属、はんだ、導電性樹脂等で接続する。 Next, the signal electrode pad 1a of the first semiconductor switching element 1 and the lead terminal 52b are connected by the connecting conductor 9a. Similarly, the signal electrode pad 2a of the second semiconductor switching element 2 and the lead terminal 53b are connected by the connection conductor 9b. When using metal wires for the connecting conductors 9a and 9b, they are connected by wire bonding. Further, when a metal clip is used for the connection conductors 9a and 9b, the signal electrode pads 1a and 2a and the lead terminals 52b and 53b are connected with nano-sintered metal, solder, conductive resin, or the like.
　次に、第１の半導体スイッチング素子１の電源電極パッド１ｂに、接合材４により、金属ブロック８ａを接合する。同様に、第２の半導体スイッチング素子２の電源電極パッド２ａに、接合材４により、金属ブロック８ｂを接合する。この場合の接合材４には、ナノ焼結金属、はんだ、導電性樹脂等を用いる。 Next, the metal block 8 a is bonded to the power electrode pad 1 b of the first semiconductor switching element 1 by the bonding material 4. Similarly, the metal block 8 b is bonded to the power supply electrode pad 2 a of the second semiconductor switching element 2 by the bonding material 4. In this case, nano-sintered metal, solder, conductive resin or the like is used for the bonding material 4.
　次に、受動素子１０の１対の電極パッド（図示せず）を、接合材４により、樹脂板６ａに取付けられたリード端子５１ａ、５１ｂに接合する。この場合の接合材４には、ナノ焼結金属、はんだ、導電性樹脂等を用いる。 Next, a pair of electrode pads (not shown) of the passive element 10 are bonded to the lead terminals 51a and 51b attached to the resin plate 6a by the bonding material 4. In this case, nano-sintered metal, solder, conductive resin or the like is used for the bonding material 4.
　次に、第１の半導体スイッチング素子１の電源電極パッド１ｂに接合された金属ブロック８ａ（の該接合面とは反対の面）を、接合材４により、リード端子５１ｃに接続する。さらに、第２の半導体スイッチング素子２の電源電極パッド２ａに接合された金属ブロック８ｂ（の該接合面とは反対の面）を、接合材４により、リード端子５２ａに接合する。この場合の接合材４には、ナノ焼結金属、はんだ、導電性樹脂等を用いる。 Next, the metal block 8 a (the surface opposite to the bonding surface) bonded to the power supply electrode pad 1 b of the first semiconductor switching element 1 is connected to the lead terminal 51 c by the bonding material 4. Furthermore, the metal block 8 b (the surface opposite to the bonding surface) bonded to the power supply electrode pad 2 a of the second semiconductor switching element 2 is bonded to the lead terminal 52 a with the bonding material 4. In this case, nano-sintered metal, solder, conductive resin or the like is used for the bonding material 4.
　次に、一体化された、第１の半導体スイッチング素子１、第２の半導体スイッチング素子２、金属ブロック８ａ、８ｂ、受動素子１０、リード端子５１ａ～５３ｂ、樹脂板６ａ、６ｂ、放熱板７ａ、７ｂ、接続用導体９ａ、９ｂを金型（図示せず）内に収容する。続いて、金型内に樹脂を注入し、硬化させて、第１の半導体スイッチング素子１、第２の半導体スイッチング素子２、金属ブロック８ａ、８ｂ、受動素子１０、リード端子５１ａ～５３ｂ、樹脂板６ａ、６ｂ、接続用導体９ａ、９ｂを、封止樹脂１１内に封止する。なお、リード端子５１ａ、５１ｃ、５２ａ、５２ｂ、５３ａ、５３ｂの先端は、封止樹脂１１から導出されている。また、放熱板７ａ、７ｂが、封止樹脂１１の両主面から露出されている。 Next, the integrated first semiconductor switching element 1, second semiconductor switching element 2, metal blocks 8a and 8b, passive element 10, lead terminals 51a to 53b, resin plates 6a and 6b, heat sink 7a, 7b and connecting conductors 9a and 9b are accommodated in a mold (not shown). Subsequently, a resin is injected into the mold and cured, and the first semiconductor switching element 1, the second semiconductor switching element 2, the metal blocks 8a and 8b, the passive element 10, the lead terminals 51a to 53b, the resin plate 6a, 6b and connecting conductors 9a, 9b are sealed in the sealing resin 11. Note that the tips of the lead terminals 51a, 51c, 52a, 52b, 53a, 53b are derived from the sealing resin 11. Further, the heat radiating plates 7 a and 7 b are exposed from both main surfaces of the sealing resin 11.
　最後に、封止樹脂１１から導出されたリード端子５１ａ～５３ｂの必要な部分だけを残し、不要なリードフレームを切り落として、第１実施形態にかかる半導体モジュール１００を完成させる。 Finally, the semiconductor module 100 according to the first embodiment is completed by leaving only the necessary portions of the lead terminals 51a to 53b derived from the sealing resin 11 and cutting off unnecessary lead frames.
　［第２実施形態］
　図２に、本発明の第２実施形態にかかる半導体モジュール２００を示す。ただし、図２は、半導体モジュール２００の断面図である。 [Second Embodiment]
FIG. 2 shows a semiconductor module 200 according to the second embodiment of the present invention. However, FIG. 2 is a cross-sectional view of the semiconductor module 200.
　第２実施形態にかかる半導体モジュール２００は、図１（Ａ）、（Ｂ）に示した、第１実施形態にかかる半導体モジュール１００の、第２リード端子層２Ｌに配置されたリード端子５２ａと、受動素子１０とを別のものに変更した。半導体モジュール２００の他の構成は、半導体モジュール１００と同じにした。以下に説明する。 The semiconductor module 200 according to the second embodiment includes a lead terminal 52a disposed on the second lead terminal layer 2L of the semiconductor module 100 according to the first embodiment shown in FIGS. The passive element 10 is changed to another one. Other configurations of the semiconductor module 200 are the same as those of the semiconductor module 100. This will be described below.
　半導体モジュール２００は、第２リード端子層２Ｌに、リード端子５２ｃを備える。リード端子５２ｃは、幅広の板状の金属からなり、両主面間を貫通して、貫通孔５２ｃ-ｈが形成されている。  The semiconductor module 200 includes a lead terminal 52c in the second lead terminal layer 2L. The lead terminal 52c is made of a wide plate-like metal, and penetrates between both main surfaces to form through holes 52c-h.
　リード端子５２ｃの一方の主面には、接合材４により、第１の半導体スイッチング素子１の他方の電源電極パッド（図示せず）が接合されている。また、リード端子５２ｃの他方の主面には、第２の半導体スイッチング素子２の一方の電源電極パッド（図示せず）に接合された金属ブロック８ｂが、接合材４により、接合されている。 The other power electrode pad (not shown) of the first semiconductor switching element 1 is bonded to one main surface of the lead terminal 52c by the bonding material 4. Further, a metal block 8 b bonded to one power supply electrode pad (not shown) of the second semiconductor switching element 2 is bonded to the other main surface of the lead terminal 52 c by a bonding material 4.
　また、半導体モジュール２００は、高さの大きい受動素子２０を備える。受動素子２０は、たとえば、抵抗素子、サーミスタ素子、コンデンサ素子、インダクタンス素子等からなる。 In addition, the semiconductor module 200 includes the passive element 20 having a large height. The passive element 20 includes, for example, a resistance element, a thermistor element, a capacitor element, an inductance element, and the like.
　受動素子２０は、一方の主面に１対の電極パッド（図示せず）が形成され、一方の電極パッドが、接合材４により、第１リード端子層１Ｌに配置されたリード端子５１ａに接合され、他方の電極パッドが、接合材４により、第１リード端子層１Ｌに配置されたリード端子５１ｂに接合されている。 In the passive element 20, a pair of electrode pads (not shown) is formed on one main surface, and one electrode pad is bonded to the lead terminal 51a disposed on the first lead terminal layer 1L by the bonding material 4. The other electrode pad is bonded to the lead terminal 51b disposed on the first lead terminal layer 1L by the bonding material 4.
　また、受動素子２０は、リード端子５２ｃに形成された貫通孔５２ｃ-ｈを貫通して配置されている。 Further, the passive element 20 is disposed through the through hole 52c-h formed in the lead terminal 52c.
　第１の半導体スイッチング素子１、第２の半導体スイッチング素子２、金属ブロック８ａ、８ｂ、受動素子２０は、リード端子５１ａ、５１ｂ、５１ｃ、５２ｂ、５２ｃ、５３ａ、５３ｂ、樹脂板６ａ、６ｂ、接続用導体９ａ、９ｂとともに、封止樹脂１１に封止されている。また、放熱板７ａ、７ｂが、封止樹脂１１の両主面から露出されている。 The first semiconductor switching element 1, the second semiconductor switching element 2, the metal blocks 8a and 8b, and the passive element 20 are lead terminals 51a, 51b, 51c, 52b, 52c, 53a and 53b, resin plates 6a and 6b, connection Along with the conductors 9a and 9b, the resin is sealed in the sealing resin 11. Further, the heat radiating plates 7 a and 7 b are exposed from both main surfaces of the sealing resin 11.
　受動素子２０の高さは、第１の半導体スイッチング素子１の高さと、第１の半導体スイッチング素子１の一方の電源電極パッドに接合された金属ブロック８ａの高さと、第２リード端子層に配置されたリード端子５２ｃの高さと、第２の半導体スイッチング素子２の高さと、第２の半導体スイッチング素子２の一方の電源電極パッドに接合された金属ブロック８ｂの高さの合計よりも小さくなるように設計されている。受動素子２０が、第３リード端子層３Ｌに配置されたリード端子５３ａに支え、半導体モジュール２００の主面が部分的に膨れたり、傾いたりすることで、半導体モジュール２００を機器、装置内に組み込む際に不具合が生じたり、内部で接合材４が外れて導通不良を起こしたりすることを防止するためである。 The height of the passive element 20 is the height of the first semiconductor switching element 1, the height of the metal block 8 a bonded to one power supply electrode pad of the first semiconductor switching element 1, and the second lead terminal layer. The height of the lead terminal 52c thus formed, the height of the second semiconductor switching element 2, and the height of the metal block 8b joined to one power electrode pad of the second semiconductor switching element 2 are made smaller. Designed to. The passive element 20 is supported by the lead terminals 53a arranged on the third lead terminal layer 3L, and the main surface of the semiconductor module 200 partially swells or tilts, whereby the semiconductor module 200 is incorporated in a device or apparatus. This is to prevent the occurrence of problems or the occurrence of poor conduction due to the bonding material 4 coming off inside.
　また、半導体モジュール２００においては、封止樹脂１１の線膨張率を、半導体スイッチング素子１、２、受動素子２０、リード端子５１ａ、５１ｂ、５１ｃ、５２ｂ、５２ｃ、５３ａ、５３ｂ、金属ブロック８ａ、８ｂ、接続用導体９ａ、９ｂのうち、最も大きい線膨張率と、最も小さい線膨張率の中間の値とした。半導体モジュール２００が高温、低温に曝された場合においても、前記部材間の接合部の破断や、実装素子（半導体スイッチング素子１、２や受動素子２０）の破壊を防止するためである。 Further, in the semiconductor module 200, the linear expansion coefficient of the sealing resin 11 is set so that the semiconductor switching elements 1, 2, the passive element 20, the lead terminals 51a, 51b, 51c, 52b, 52c, 53a, 53b, and the metal blocks 8a, 8b. Among the connection conductors 9a and 9b, the intermediate coefficient between the largest linear expansion coefficient and the smallest linear expansion coefficient was used. This is to prevent breakage of the joint between the members and destruction of the mounting elements ( semiconductor switching elements 1 and 2 and passive element 20) even when the semiconductor module 200 is exposed to high and low temperatures.
　［第３実施形態］
　図３に、本発明の第３実施形態にかかる半導体モジュール３００を示す。ただし、図３は、半導体モジュール３００の断面図である。 [Third Embodiment]
FIG. 3 shows a semiconductor module 300 according to the third embodiment of the present invention. However, FIG. 3 is a cross-sectional view of the semiconductor module 300.
　第３実施形態にかかる半導体モジュール３００は、図１（Ａ）、（Ｂ）に示した、第１実施形態にかかる半導体モジュール１００に、第３の半導体スイッチング素子３、金属ブロック８ｃ、接続用導体９ｃを追加した。そして、第３の半導体スイッチング素子３、金属ブロック８ｃ、接続用導体９ｃを追加したことにともない、第３リード端子層３Ｌに配置されたリード端子の構成を変更した。半導体モジュール３００の他の構成は、半導体モジュール１００と同じにした。以下に説明する。 The semiconductor module 300 according to the third embodiment is similar to the semiconductor module 100 according to the first embodiment shown in FIGS. 1A and 1B, except for the third semiconductor switching element 3, the metal block 8c, and the connection conductor. 9c was added. And with the addition of the third semiconductor switching element 3, the metal block 8c, and the connection conductor 9c, the configuration of the lead terminals arranged in the third lead terminal layer 3L was changed. Other configurations of the semiconductor module 300 are the same as those of the semiconductor module 100. This will be described below.
　半導体モジュール３００は、第３リード端子層３Ｌに、リード端子５３ｂ、５３ｃ、５３ｄ、５３ｅを備える。なお、リード端子５３ｃ、５３ｄ、５３ｅを備えたことにより、半導体モジュール１００が備えていたリード端子５３ａは備えていない。 The semiconductor module 300 includes lead terminals 53b, 53c, 53d, and 53e on the third lead terminal layer 3L. Since the lead terminals 53c, 53d, and 53e are provided, the lead terminal 53a provided in the semiconductor module 100 is not provided.
　リード端子５３ｂ、５３ｃ、５３ｄ、５３ｅは、樹脂板６ｂと接している。 The lead terminals 53b, 53c, 53d, and 53e are in contact with the resin plate 6b.
　リード端子５３ｅには、接合材４により、第２の半導体スイッチング素子２の他方の電源電極パッド（図示せず）が接合されている。 The other power electrode pad (not shown) of the second semiconductor switching element 2 is bonded to the lead terminal 53e by the bonding material 4.
　上述したように、半導体モジュール３００は、第３の半導体スイッチング素子３と、金属ブロック８ｃと、接続用導体９ｃとが追加されている。 As described above, in the semiconductor module 300, the third semiconductor switching element 3, the metal block 8c, and the connection conductor 9c are added.
　第３の半導体スイッチング素子３は、両主面を有し、一方の主面に信号電極パッド（図示せず）と一方の電源電極パッド（図示せず）とが形成され、他方の主面に他方の電源電極パッド（図示せず）が形成されている。 The third semiconductor switching element 3 has both main surfaces, a signal electrode pad (not shown) and one power electrode pad (not shown) are formed on one main surface, and the other main surface is formed. The other power electrode pad (not shown) is formed.
　第３の半導体スイッチング素子３の他方の電源電極パッドは、接合材４により、リード端子５３ｃに接合されている。第３の半導体スイッチング素子３の一方の電源電極パッドには、接合材４により、金属ブロック８ｃが接合されている。金属ブロック８ｃの反対側の主面は、接合材４により、第２リード端子層２Ｌに配置されたリード端子５２ａに接合されている。第３の半導体スイッチング素子３の信号電極パッドは、接続用導体９ｃにより、リード端子５３ｄと電気的に接続されている。 The other power supply electrode pad of the third semiconductor switching element 3 is bonded to the lead terminal 53c by the bonding material 4. A metal block 8 c is bonded to one power supply electrode pad of the third semiconductor switching element 3 by a bonding material 4. The main surface on the opposite side of the metal block 8c is bonded to the lead terminal 52a disposed on the second lead terminal layer 2L by the bonding material 4. The signal electrode pad of the third semiconductor switching element 3 is electrically connected to the lead terminal 53d by the connecting conductor 9c.
　また、半導体モジュール３００においては、封止樹脂１１の線膨張率を、半導体スイッチング素子１、２、３、受動素子１０、リード端子５１ａ、５１ｂ、５１ｃ、５２ａ、５２ｂ、５３ｂ、５３ｃ、５３ｄ、５３ｅ、金属ブロック８ａ、８ｂ、８ｃ、接続用導体９ａ、９ｂ、９ｃのうち、最も大きい線膨張率と、最も小さい線膨張率の中間の値とした。半導体モジュール３００が高温、低温に曝された場合においても、前記部材間の接合部の破断や、実装素子（半導体スイッチング素子１、２、３や受動素子１０）の破壊を防止するためである。 Further, in the semiconductor module 300, the linear expansion coefficient of the sealing resin 11 is set so that the semiconductor switching elements 1, 2, 3, the passive element 10, the lead terminals 51a, 51b, 51c, 52a, 52b, 53b, 53c, 53d, 53e. Among the metal blocks 8a, 8b, and 8c and the connecting conductors 9a, 9b, and 9c, an intermediate value between the largest linear expansion coefficient and the smallest linear expansion coefficient was used. This is to prevent breakage of the joint between the members and destruction of the mounting elements ( semiconductor switching elements 1, 2, 3 and the passive element 10) even when the semiconductor module 300 is exposed to high and low temperatures.
　また、半導体モジュール３００においては、受動素子１０を第１リード端子層に配置されたリード端子５１ａ、５１ｂに接合した。受動素子１０からの放熱経路を十分に確保し、受動素子１０の過度な温度上昇を防止するためである。 Further, in the semiconductor module 300, the passive element 10 is joined to the lead terminals 51a and 51b arranged in the first lead terminal layer. This is because a sufficient heat dissipation path from the passive element 10 is secured and an excessive temperature rise of the passive element 10 is prevented.
　［第４実施形態］
　図４（Ａ）、（Ｂ）に、本発明の第４実施形態にかかる半導体モジュール４００を示す。ただし、図４（Ａ）は、半導体モジュール４００の平面図である。また、図４（Ｂ）は、半導体モジュール４００の断面図であり、図４（Ａ）のＸ-Ｘ部分を示している。 [Fourth Embodiment]
4A and 4B show a semiconductor module 400 according to the fourth embodiment of the present invention. However, FIG. 4A is a plan view of the semiconductor module 400. FIG. 4B is a cross-sectional view of the semiconductor module 400 and shows a portion XX in FIG.
　第４実施形態にかかる半導体モジュール４００は、図１（Ａ）、（Ｂ）に示した、第１実施形態にかかる半導体モジュール１００の、第２の半導体スイッチング素子２の封止位置をずらした。そして、第２の半導体スイッチング素子２の封止位置をずらしたことにともない、第３リード端子層３Ｌに配置されたリード端子の構成を変更した。半導体モジュール４００の他の構成は、半導体モジュール１００と同じにした。以下に説明する。 The semiconductor module 400 concerning 4th Embodiment shifted the sealing position of the 2nd semiconductor switching element 2 of the semiconductor module 100 concerning 1st Embodiment shown to FIG. 1 (A), (B). As the sealing position of the second semiconductor switching element 2 is shifted, the configuration of the lead terminals arranged in the third lead terminal layer 3L is changed. Other configurations of the semiconductor module 400 are the same as those of the semiconductor module 100. This will be described below.
　半導体モジュール４００は、第３リード端子層３Ｌに、リード端子５３ｆ、５３ｇを備える。リード端子５３ｆは、第１実施形態にかかる半導体モジュール１００のリード端子５３ａに代わるものであり、リード端子５３ａよりも短い。リード端子５３ｇは、第１実施形態にかかる半導体モジュール１００のリード端子５３ｂに代わるものであり、リード端子５３ｂよりも長い。 The semiconductor module 400 includes lead terminals 53f and 53g in the third lead terminal layer 3L. The lead terminal 53f replaces the lead terminal 53a of the semiconductor module 100 according to the first embodiment, and is shorter than the lead terminal 53a. The lead terminal 53g replaces the lead terminal 53b of the semiconductor module 100 according to the first embodiment and is longer than the lead terminal 53b.
　半導体モジュール４００においては、第２の半導体スイッチング素子２の他方の電源電極パッド（図示せず）が、接合材４により、リード端子５３ｆに接合されている。また、第２の半導体スイッチング素子２の信号電極パッドが、接続用導体９ｂにより、リード端子５３ｇにと電気的に接続されている。 In the semiconductor module 400, the other power electrode pad (not shown) of the second semiconductor switching element 2 is bonded to the lead terminal 53f by the bonding material 4. Further, the signal electrode pad of the second semiconductor switching element 2 is electrically connected to the lead terminal 53g by the connection conductor 9b.
　半導体モジュール４００においては、封止樹脂層１Ｍ、２Ｍを垂直方向に透視した場合に、第１の半導体スイッチング素子１と第２の半導体スイッチング素子２とが、完全には重ならないように配置されている。本実施形態では、第１の半導体スイッチング素子１と第２の半導体スイッチング素子２とは僅かに重なっているが、全く重ならないようにしても良い。 In the semiconductor module 400, the first semiconductor switching element 1 and the second semiconductor switching element 2 are arranged so as not to completely overlap when the sealing resin layers 1M and 2M are seen through in the vertical direction. Yes. In the present embodiment, the first semiconductor switching element 1 and the second semiconductor switching element 2 slightly overlap, but they may not overlap at all.
　第１の実施形態にかかる半導体モジュール１００は、第１の半導体スイッチング素子１と、第２の半導体スイッチング素子２が発生させる熱が、第１の半導体スイッチング素子１と第２の半導体スイッチング素子２との中間部にある金属ブロック８ｂ、リード端子５２ａ近傍で蓄積され、該近辺の温度が過度に上昇する場合がある。 In the semiconductor module 100 according to the first embodiment, heat generated by the first semiconductor switching element 1 and the second semiconductor switching element 2 is generated by the first semiconductor switching element 1 and the second semiconductor switching element 2. May accumulate in the vicinity of the metal block 8b and the lead terminal 52a in the middle of the region, and the temperature in the vicinity may rise excessively.
　これに対し、半導体モジュール４００は、第１の半導体スイッチング素子１と第２の半導体スイッチング素子２とが、完全には重ならないように配置されているため、半導体モジュール１００よりも、使用時に、第１の半導体スイッチング素子１および第２の半導体スイッチング素子２が発生させる熱を、効率よく放散させることができる。また、半導体モジュール４００においては、封止樹脂１１の線膨張率を、半導体スイッチング素子１、２、受動素子１０、リード端子５１ａ、５１ｂ、５１ｃ、５２ａ、５２ｂ、５３ｆ、５３ｇ、金属ブロック８ａ、８ｂ、接続用導体９ａ、９ｂのうち、最も大きい線膨張率と、最も小さい線膨張率の中間の値とした。半導体モジュール４００が高温、低温に曝された場合においても、前記部材間の接合部の破断や、実装素子（半導体スイッチング素子１、２や受動素子１０）の破壊を防止するためである。 On the other hand, the semiconductor module 400 is arranged so that the first semiconductor switching element 1 and the second semiconductor switching element 2 do not completely overlap with each other. The heat generated by the first semiconductor switching element 1 and the second semiconductor switching element 2 can be efficiently dissipated. Further, in the semiconductor module 400, the linear expansion coefficient of the sealing resin 11 is set so that the semiconductor switching elements 1, 2, the passive element 10, the lead terminals 51a, 51b, 51c, 52a, 52b, 53f, 53g, and the metal blocks 8a, 8b. Among the connection conductors 9a and 9b, the intermediate coefficient between the largest linear expansion coefficient and the smallest linear expansion coefficient was used. This is to prevent breakage of the joint between the members and destruction of the mounting elements ( semiconductor switching elements 1 and 2 and the passive element 10) even when the semiconductor module 400 is exposed to high and low temperatures.
　［第５実施形態］
　図５に、本発明の第５実施形態にかかる半導体モジュール５００の等価回路を示す。
半導体モジュール５００は、Ｐ側端子Ｐと、Ｎ側端子Ｎと、中間端子Ｕ１と、２個の半導体スイッチング素子Ｓ１、Ｓ２と、受動素子としてシャント抵抗素子ＲＳとを備える。 [Fifth Embodiment]
FIG. 5 shows an equivalent circuit of a semiconductor module 500 according to the fifth embodiment of the present invention.
The semiconductor module 500 includes a P-side terminal P, an N-side terminal N, an intermediate terminal U1, two semiconductor switching elements S1 and S2, and a shunt resistor element RS as a passive element.
　半導体モジュール５００は、Ｐ側端子Ｐに、半導体スイッチング素子Ｓ１のドレインが接続され、半導体スイッチング素子Ｓ１のソースに、半導体スイッチング素子Ｓ２のドレインが接続され、半導体スイッチング素子Ｓ２のソースに、シャント抵抗素子ＲＳの一端が接続され、シャント抵抗素子ＲＳの他端にＮ側端子Ｎが接続されている。 In the semiconductor module 500, the drain of the semiconductor switching element S1 is connected to the P-side terminal P, the drain of the semiconductor switching element S2 is connected to the source of the semiconductor switching element S1, and the shunt resistance element is connected to the source of the semiconductor switching element S2. One end of RS is connected, and the N-side terminal N is connected to the other end of the shunt resistor element RS .
　また、半導体モジュール５００は、半導体スイッチング素子Ｓ１と半導体スイッチング素子Ｓ２との接続点に、中間端子Ｕ１が接続されている。 In the semiconductor module 500, an intermediate terminal U1 is connected to a connection point between the semiconductor switching element S1 and the semiconductor switching element S2.
　半導体モジュール５００は、図１（Ａ）、（Ｂ）に示した、第１実施形態にかかる半導体モジュール１００の構造により実現することができる。すなわち、半導体スイッチング素子Ｓ１を半導体モジュール１００の第１の半導体スイッチング素子１、半導体スイッチング素子Ｓ２を半導体モジュール１００の第２の半導体スイッチング素子２、シャント抵抗素子ＲＳを半導体モジュール１００の受動素子１０で構成するとともに、所定のリード端子間を接続することにより、半導体モジュール５００の等価回路を、第１実施形態にかかる半導体モジュール１００の構造により実現することができる。 The semiconductor module 500 can be realized by the structure of the semiconductor module 100 according to the first embodiment shown in FIGS. That is, the semiconductor switching element S1 is the first semiconductor switching element 1 of the semiconductor module 100, the semiconductor switching element S2 is the second semiconductor switching element 2 of the semiconductor module 100, and the shunt resistance element RS is the passive element 10 of the semiconductor module 100. By configuring and connecting predetermined lead terminals, an equivalent circuit of the semiconductor module 500 can be realized by the structure of the semiconductor module 100 according to the first embodiment.
　［第６実施形態］
　図６に、本発明の第６実施形態にかかる半導体モジュール６００の等価回路を示す。半導体モジュール６００は、Ｐ側端子Ｐと、Ｎ側端子Ｎと、中間端子Ｕ１と、３個の半導体スイッチング素子Ｓ１、Ｓ２、Ｓ３と、受動素子としてシャント抵抗素子ＲＳとを備える。 [Sixth Embodiment]
FIG. 6 shows an equivalent circuit of a semiconductor module 600 according to the sixth embodiment of the present invention. The semiconductor module 600 includes a P-side terminal P, an N-side terminal N, an intermediate terminal U1, three semiconductor switching elements S1, S2, and S3, and a shunt resistor element RS as a passive element.
　半導体モジュール６００は、Ｐ側端子Ｐに、半導体スイッチング素子Ｓ１のドレインが接続され、半導体スイッチング素子Ｓ１のソースに、半導体スイッチング素子Ｓ２のドレインが接続され、半導体スイッチング素子Ｓ２のソースに、シャント抵抗素子ＲＳの一端が接続され、シャント抵抗素子ＲＳの他端にＮ側端子Ｎが接続されている。 In the semiconductor module 600, the drain of the semiconductor switching element S1 is connected to the P-side terminal P, the drain of the semiconductor switching element S2 is connected to the source of the semiconductor switching element S1, and the shunt resistance element is connected to the source of the semiconductor switching element S2. One end of RS is connected, and the N-side terminal N is connected to the other end of the shunt resistor element RS .
　また、半導体モジュール６００は、半導体スイッチング素子Ｓ１と半導体スイッチング素子Ｓ２との接続点に、半導体スイッチング素子Ｓ３のソースが接続され、半導体スイッチング素子Ｓ３のドレインに中間端子Ｕ１が接続されている。 In the semiconductor module 600, the source of the semiconductor switching element S3 is connected to the connection point between the semiconductor switching element S1 and the semiconductor switching element S2, and the intermediate terminal U1 is connected to the drain of the semiconductor switching element S3.
　半導体モジュール６００は、図３に示した、第３実施形態にかかる半導体モジュール３００の構造により実現することができる。すなわち、半導体スイッチング素子Ｓ１を半導体モジュール３００の第１の半導体スイッチング素子１、半導体スイッチング素子Ｓ２を半導体モジュール３００の第２の半導体スイッチング素子２、半導体スイッチング素子Ｓ３を半導体モジュール３００の第３の半導体スイッチング素子３、シャント抵抗素子ＲＳを半導体モジュール３００の受動素子１０で構成するとともに、所定のリード端子間を接続することにより、半導体モジュール６００の等価回路を、第３実施形態にかかる半導体モジュール３００の構造により実現することができる。 The semiconductor module 600 can be realized by the structure of the semiconductor module 300 according to the third embodiment shown in FIG. That is, the semiconductor switching element S1 is the first semiconductor switching element 1 of the semiconductor module 300, the semiconductor switching element S2 is the second semiconductor switching element 2 of the semiconductor module 300, and the semiconductor switching element S3 is the third semiconductor switching element of the semiconductor module 300. The element 3 and the shunt resistor element RS are configured by the passive element 10 of the semiconductor module 300, and by connecting predetermined lead terminals, an equivalent circuit of the semiconductor module 600 can be obtained from the semiconductor module 300 according to the third embodiment. It can be realized by the structure.
　［第７実施形態］
　図７に、本発明の第７実施形態にかかる半導体モジュール７００の等価回路を示す。 [Seventh Embodiment]
FIG. 7 shows an equivalent circuit of a semiconductor module 700 according to the seventh embodiment of the present invention.
　半導体モジュール７００は、インバータの電力変換部を構成している。 The semiconductor module 700 constitutes a power conversion unit of the inverter.
　半導体モジュール７００は、Ｐ側端子Ｐと、Ｎ側端子Ｎと、３個の中間端子Ｕ１～Ｕ３とを備える。 The semiconductor module 700 includes a P-side terminal P, an N-side terminal N, and three intermediate terminals U1 to U3.
　半導体モジュール７００は、Ｐ側端子Ｐと、Ｎ側端子Ｎとの間に、図５に示した第５実施形態にかかる半導体モジュール５００を、３個、並列に接続した構成からなる。したがって、半導体モジュール７００は、第５実施形態の説明からも分かるように、図１（Ａ）、（Ｂ）に示した、第１実施形態にかかる半導体モジュール１００を３個複合化し、かつ、所定の個所の間を接続することにより実現することができる。 The semiconductor module 700 has a configuration in which three semiconductor modules 500 according to the fifth embodiment shown in FIG. 5 are connected in parallel between a P-side terminal P and an N-side terminal N. Therefore, as can be seen from the description of the fifth embodiment, the semiconductor module 700 is a composite of three semiconductor modules 100 according to the first embodiment shown in FIGS. This can be realized by connecting the parts.
　［第８実施形態］
　図８に、本発明の第８実施形態にかかる半導体モジュール８００の等価回路を示す。 [Eighth Embodiment]
FIG. 8 shows an equivalent circuit of a semiconductor module 800 according to the eighth embodiment of the present invention.
　半導体モジュール８００は、インバータの電力変換部を構成している。 The semiconductor module 800 constitutes a power conversion unit of the inverter.
　半導体モジュール８００は、Ｐ側端子Ｐと、Ｎ側端子Ｎと、３個の中間端子Ｕ１～Ｕ３とを備える。 The semiconductor module 800 includes a P-side terminal P, an N-side terminal N, and three intermediate terminals U1 to U3.
　半導体モジュール８００は、Ｐ側端子Ｐと、Ｎ側端子Ｎとの間に、図６に示した第６実施形態にかかる半導体モジュール６００を、３個、並列に接続した構成からなる。 The semiconductor module 800 has a configuration in which three semiconductor modules 600 according to the sixth embodiment shown in FIG. 6 are connected in parallel between a P-side terminal P and an N-side terminal N.
　したがって、半導体モジュール８００は、第６実施形態の説明からも分かるように、図３に示した、第３実施形態にかかる半導体モジュール３００を３個複合化し、かつ、所定の個所の間を接続することにより実現することができる。 Therefore, as can be seen from the description of the sixth embodiment, the semiconductor module 800 combines the three semiconductor modules 300 according to the third embodiment shown in FIG. 3 and connects between predetermined portions. Can be realized.
　［第９実施形態］
　図９に、本発明の第９実施形態にかかる半導体モジュール９００の等価回路を示す。 [Ninth Embodiment]
FIG. 9 shows an equivalent circuit of a semiconductor module 900 according to the ninth embodiment of the present invention.
　半導体モジュール９００は、インバータの電力変換部を構成している。 The semiconductor module 900 constitutes an inverter power converter.
　半導体モジュール９００は、Ｐ側端子Ｐと、Ｎ側端子Ｎと、３個の中間端子Ｕ１～Ｕ３と、６個の信号端子Ｖ１～Ｖ６と、６個の半導体スイッチング素子Ｓ１～Ｓ６と、スナバーコンデンサＣＳと、サーミスタＴｈｍと、３個のシャント抵抗ＲＳと、６個のゲート抵抗ＲＧとを備える。 The semiconductor module 900 includes a P-side terminal P, an N-side terminal N, three intermediate terminals U1 to U3, six signal terminals V1 to V6, six semiconductor switching elements S1 to S6, and a snubber capacitor. It comprises a C S, and the thermistor Thm, 3 pieces of the shunt resistor R S, and six gate resistance R G.
　半導体モジュール９００においては、Ｐ側端子Ｐに、半導体スイッチング素子Ｓ１のドレインが接続され、半導体スイッチング素子Ｓ１のソースに、半導体スイッチング素子Ｓ２のドレインが接続され、半導体スイッチング素子Ｓ２のソースに、シャント抵抗素子ＲＳの一端が接続され、シャント抵抗ＲＳの他端にＮ側端子Ｎが接続されている。そして、半導体スイッチング素子Ｓ１のソースと半導体スイッチング素子Ｓ２のドレインとの接続点が、中間端子Ｕ１に接続されている。また、半導体スイッチング素子Ｓ１のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ１に接続され、半導体スイッチング素子Ｓ２のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ２に接続されている。 In the semiconductor module 900, the drain of the semiconductor switching element S1 is connected to the P-side terminal P, the drain of the semiconductor switching element S2 is connected to the source of the semiconductor switching element S1, and the shunt resistor is connected to the source of the semiconductor switching element S2. One end of the element RS is connected, and the N-side terminal N is connected to the other end of the shunt resistor RS . A connection point between the source of the semiconductor switching element S1 and the drain of the semiconductor switching element S2 is connected to the intermediate terminal U1. The gate of the semiconductor switching element S1 is connected to the signal terminal V1 via the gate resistance RG , and the gate of the semiconductor switching element S2 is connected to the signal terminal V2 via the gate resistance RG .
　同様に、Ｐ側端子Ｐに、半導体スイッチング素子Ｓ３のドレインが接続され、半導体スイッチング素子Ｓ３のソースに、半導体スイッチング素子Ｓ４のドレインが接続され、半導体スイッチング素子Ｓ４のソースに、シャント抵抗素子ＲＳの一端が接続され、シャント抵抗ＲＳの他端にＮ側端子Ｎが接続されている。そして、半導体スイッチング素子Ｓ３のソースと半導体スイッチング素子Ｓ４ドレインとの接続点が、中間端子Ｕ２に接続されている。また、半導体スイッチング素子Ｓ３のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ３に接続され、半導体スイッチング素子Ｓ４のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ４に接続されている。 Similarly, the drain of the semiconductor switching element S3 is connected to the P-side terminal P, the drain of the semiconductor switching element S4 is connected to the source of the semiconductor switching element S3, and the shunt resistance element R S is connected to the source of the semiconductor switching element S4. Is connected to the other end of the shunt resistor RS . A connection point between the source of the semiconductor switching element S3 and the drain of the semiconductor switching element S4 is connected to the intermediate terminal U2. The gate of the semiconductor switching element S3 is connected to the signal terminal V3 via the gate resistance RG , and the gate of the semiconductor switching element S4 is connected to the signal terminal V4 via the gate resistance RG .
　同様に、Ｐ側端子Ｐに、半導体スイッチング素子Ｓ５のドレインが接続され、半導体スイッチング素子Ｓ５のソースに、半導体スイッチング素子Ｓ６のドレインが接続され、半導体スイッチング素子Ｓ６のソースに、シャント抵抗素子ＲＳの一端が接続され、シャント抵抗ＲＳの他端にＮ側端子Ｎが接続されている。そして、半導体スイッチング素子Ｓ５のソースと半導体スイッチング素子Ｓ６ドレインとの接続点が、中間端子Ｕ３に接続されている。また、半導体スイッチング素子Ｓ５のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ５に接続され、半導体スイッチング素子Ｓ６のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ６に接続されている。 Similarly, the drain of the semiconductor switching element S5 is connected to the P-side terminal P, the drain of the semiconductor switching element S6 is connected to the source of the semiconductor switching element S5, and the shunt resistance element R S is connected to the source of the semiconductor switching element S6. Is connected to the other end of the shunt resistor RS . A connection point between the source of the semiconductor switching element S5 and the drain of the semiconductor switching element S6 is connected to the intermediate terminal U3. The gate of the semiconductor switching element S5 is connected to the signal terminal V5 via the gate resistance RG , and the gate of the semiconductor switching element S6 is connected to the signal terminal V6 via the gate resistance RG .
　そして、Ｐ側端子ＰとＮ側端子Ｎとの間には、スナバーコンデンサＣＳも接続されている。 Further, between the P-side terminals P and N terminals N, and is also connected snubber capacitor C S.
　また、半導体モジュール９００においては、独立した回路系統により、半導体スイッチング素子Ｓ１～Ｓ６の近傍に、サーミスタＴｈｍが配置されている。 In the semiconductor module 900, the thermistor Thm is disposed in the vicinity of the semiconductor switching elements S1 to S6 by an independent circuit system.
　半導体モジュール９００においては、シャント抵抗ＲＳの両端間の電圧を監視することにより、異常電流を検知することができる。また、サーミスタＴｈｍにより、半導体スイッチング素子Ｓ１～Ｓ６の異常発熱を検知することができる。 In the semiconductor module 900, an abnormal current can be detected by monitoring the voltage across the shunt resistor RS . Further, the thermistor Thm can detect abnormal heat generation of the semiconductor switching elements S1 to S6.
　半導体モジュール９００においては、６個の半導体スイッチング素子Ｓ１～Ｓ６とともに、スナバーコンデンサＣＳ、サーミスタＴｈｍ、シャント抵抗ＲＳ、ゲート抵抗ＲＧのうちの少なくとも１種類が、受動素子として、封止樹脂内に封止されている。 In the semiconductor module 900, in addition to the six semiconductor switching elements S1 to S6, at least one of the snubber capacitor C S , the thermistor Thm, the shunt resistance R S , and the gate resistance RG is used as a passive element in the sealing resin. Is sealed.
　［第１０実施形態］
　図１０に、本発明の第１０実施形態にかかる半導体モジュール１０００の等価回路を示す。 [Tenth embodiment]
FIG. 10 shows an equivalent circuit of the semiconductor module 1000 according to the tenth embodiment of the present invention.
　半導体モジュール１０００は、インバータの電力変換部を構成している。 The semiconductor module 1000 constitutes an inverter power converter.
　半導体モジュール１０００は、Ｐ側端子Ｐと、Ｎ側端子Ｎと、３個の中間端子Ｕ１～Ｕ３と、９個の信号端子Ｖ１～Ｖ９と、９個の半導体スイッチング素子Ｓ１～Ｓ９と、スナバーコンデンサＣＳと、サーミスタＴｈｍと、３個のシャント抵抗ＲＳと、９個のゲート抵抗ＲＧとを備える。 The semiconductor module 1000 includes a P-side terminal P, an N-side terminal N, three intermediate terminals U1 to U3, nine signal terminals V1 to V9, nine semiconductor switching elements S1 to S9, and a snubber capacitor. It comprises a C S, and the thermistor Thm, 3 pieces of the shunt resistor R S, 9 pieces of the gate resistor R G.
　半導体モジュール１０００においては、Ｐ側端子Ｐに、半導体スイッチング素子Ｓ１のドレインが接続され、半導体スイッチング素子Ｓ１のソースに、半導体スイッチング素子Ｓ２のドレインが接続され、半導体スイッチング素子Ｓ２のソースに、シャント抵抗素子ＲＳの一端が接続され、シャント抵抗ＲＳの他端にＮ側端子Ｎが接続されている。そして、半導体スイッチング素子Ｓ１のソースと半導体スイッチング素子Ｓ２のドレインとの接続点に、半導体スイッチング素子Ｓ７のソースが接続され、半導体スイッチング素子Ｓ７のドレインに中間端子Ｕ１が接続されている。また、半導体スイッチング素子Ｓ１のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ１に接続され、半導体スイッチング素子Ｓ２のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ２に接続され、半導体スイッチング素子Ｓ７のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ７に接続されている。 In the semiconductor module 1000, the drain of the semiconductor switching element S1 is connected to the P-side terminal P, the drain of the semiconductor switching element S2 is connected to the source of the semiconductor switching element S1, and the shunt resistor is connected to the source of the semiconductor switching element S2. One end of the element RS is connected, and the N-side terminal N is connected to the other end of the shunt resistor RS . The source of the semiconductor switching element S7 is connected to the connection point between the source of the semiconductor switching element S1 and the drain of the semiconductor switching element S2, and the intermediate terminal U1 is connected to the drain of the semiconductor switching element S7. Further, the gate of the semiconductor switching element S1 is connected to the signal terminal V1 via the gate resistance RG , and the gate of the semiconductor switching element S2 is connected to the signal terminal V2 via the gate resistance RG. The gate of the element S7 is connected to the signal terminal V7 via the gate resistance RG .
　同様に、Ｐ側端子Ｐに、半導体スイッチング素子Ｓ３のドレインが接続され、半導体スイッチング素子Ｓ３のソースに、半導体スイッチング素子Ｓ４のドレインが接続され、半導体スイッチング素子Ｓ４のソースに、シャント抵抗素子ＲＳの一端が接続され、シャント抵抗ＲＳの他端にＮ側端子Ｎが接続されている。そして、半導体スイッチング素子Ｓ３のソースと半導体スイッチング素子Ｓ４ドレインとの接続点に、半導体スイッチング素子Ｓ８のソースが接続され、半導体スイッチング素子Ｓ８のドレインに中間端子Ｕ２が接続されている。また、半導体スイッチング素子Ｓ３のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ３に接続され、半導体スイッチング素子Ｓ４のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ４に接続され、半導体スイッチング素子Ｓ８のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ８に接続されている。 Similarly, the drain of the semiconductor switching element S3 is connected to the P-side terminal P, the drain of the semiconductor switching element S4 is connected to the source of the semiconductor switching element S3, and the shunt resistance element R S is connected to the source of the semiconductor switching element S4. Is connected to the other end of the shunt resistor RS . The source of the semiconductor switching element S8 is connected to the connection point between the source of the semiconductor switching element S3 and the drain of the semiconductor switching element S4, and the intermediate terminal U2 is connected to the drain of the semiconductor switching element S8. The gate of the semiconductor switching element S3 is connected to the signal terminal V3 via the gate resistance RG , and the gate of the semiconductor switching element S4 is connected to the signal terminal V4 via the gate resistance RG. The gate of the element S8 is connected to the signal terminal V8 via the gate resistance RG .
　同様に、Ｐ側端子Ｐに、半導体スイッチング素子Ｓ５のドレインが接続され、半導体スイッチング素子Ｓ５のソースに、半導体スイッチング素子Ｓ６のドレインが接続され、半導体スイッチング素子Ｓ６のソースに、シャント抵抗素子ＲＳの一端が接続され、シャント抵抗ＲＳの他端にＮ側端子Ｎが接続されている。そして、半導体スイッチング素子Ｓ５のソースと半導体スイッチング素子Ｓ６ドレインとの接続点に、半導体スイッチング素子Ｓ９のソースが接続され、半導体スイッチング素子Ｓ９のドレインに中間端子Ｕ３が接続されている。また、半導体スイッチング素子Ｓ５のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ５に接続され、半導体スイッチング素子Ｓ６のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ６に接続され、半導体スイッチング素子Ｓ９のゲートが、ゲート抵抗ＲＧを介して、信号端子Ｖ９に接続されている。 Similarly, the drain of the semiconductor switching element S5 is connected to the P-side terminal P, the drain of the semiconductor switching element S6 is connected to the source of the semiconductor switching element S5, and the shunt resistance element R S is connected to the source of the semiconductor switching element S6. Is connected to the other end of the shunt resistor RS . The source of the semiconductor switching element S9 is connected to the connection point between the source of the semiconductor switching element S5 and the drain of the semiconductor switching element S6, and the intermediate terminal U3 is connected to the drain of the semiconductor switching element S9. Further, the gate of the semiconductor switching element S5 is connected to the signal terminal V5 via the gate resistance RG , and the gate of the semiconductor switching element S6 is connected to the signal terminal V6 via the gate resistance RG. The gate of the element S9 is connected to the signal terminal V9 via the gate resistance RG .
　そして、Ｐ側端子ＰとＮ側端子Ｎとの間には、スナバーコンデンサＣＳも接続されている。 Further, between the P-side terminals P and N terminals N, and is also connected snubber capacitor C S.
　また、半導体モジュール１０００においては、独立した回路系統により、半導体スイッチング素子Ｓ１～Ｓ９の近傍に、サーミスタＴｈｍが配置されている。 In the semiconductor module 1000, the thermistor Thm is disposed in the vicinity of the semiconductor switching elements S1 to S9 by an independent circuit system.
　半導体モジュール１０００においては、シャント抵抗ＲＳの両端間の電圧を監視することにより、異常電流を検知することができる。また、サーミスタＴｈｍにより、半導体スイッチング素子Ｓ１～Ｓ９の異常発熱を検知することができる。 In the semiconductor module 1000, an abnormal current can be detected by monitoring the voltage across the shunt resistor RS . The thermistor Thm can detect abnormal heat generation of the semiconductor switching elements S1 to S9.
　半導体モジュール１０００においては、９個の半導体スイッチング素子Ｓ１～Ｓ９とともに、スナバーコンデンサＣＳ、サーミスタＴｈｍ、シャント抵抗ＲＳ、ゲート抵抗ＲＧのうちの少なくとも１種類が、受動素子として、封止樹脂内に封止されている。 In the semiconductor module 1000, in addition to the nine semiconductor switching elements S1 to S9, at least one of the snubber capacitor C S , the thermistor Thm, the shunt resistance R S , and the gate resistance RG is used as a passive element in the sealing resin. Is sealed.
　［第１１実施形態］
　第１１実施形態にかかる半導体モジュール１１００は、第１実施形態にかかる半導体モジュール１００の構成要素の材質、および構成要素間の取付け方法に一部変更を加えた。構造そのものには変更がないので、半導体モジュール１００を説明した図１（Ａ）、（Ｂ）を援用して半導体モジュール１１００を説明する。 [Eleventh embodiment]
In the semiconductor module 1100 according to the eleventh embodiment, the material of the constituent elements of the semiconductor module 100 according to the first embodiment and the mounting method between the constituent elements are partly changed. Since there is no change in the structure itself, the semiconductor module 1100 will be described with reference to FIGS. 1A and 1B illustrating the semiconductor module 100.
　半導体モジュール１００では、エポキシ系樹脂、ポリイミド系樹脂、ビスマレイミド系樹脂、シリコーン系樹脂等に、アルミナ、窒化アルミニウム、窒化珪素、炭化珪素等の高熱伝導率のフィラーを充填した樹脂板６ａ、６ｂを使用した。半導体モジュール１１００では、これに代えて、窒化珪素、窒化アルミニウム、アルミナなどを主成分とするセラミックス製のセラミックス板（便宜上、符号を６ａ、６ｂとして援用する）を使用した。 In the semiconductor module 100, resin plates 6a and 6b in which an epoxy resin, a polyimide resin, a bismaleimide resin, a silicone resin, and the like are filled with a filler having high thermal conductivity such as alumina, aluminum nitride, silicon nitride, and silicon carbide are provided. used. In the semiconductor module 1100, instead of this, ceramic plates made of ceramics mainly composed of silicon nitride, aluminum nitride, alumina, or the like (for convenience, reference numerals are used as 6a and 6b) were used.
　また、半導体モジュール１００では、リード端子５１ａ～５１ｃ、放熱板７ａの樹脂板６ａへの取付け、および、リード端子５３ａ、５３ｂ、放熱板７ｂの樹脂板６ｂへの取付けに接着剤を用いた。半導体モジュール１１００では、これに代えて、この部分の取付けに、少なくとも、セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金（図示せず）を用いた。本実施形態においては、具体的には、セラミックスの構成成分と反応する活性な金属として、合金にＴｉを含有させた。ただし、セラミックに含まれる成分と反応する活性な金属はＴｉには限定されず、Ｚｒなど、他の金属であっても良い。なお、セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金は、活性金属ロウ材と呼ばれる場合がある。 Further, in the semiconductor module 100, an adhesive was used for attaching the lead terminals 51a to 51c and the heat radiating plate 7a to the resin plate 6a, and attaching the lead terminals 53a and 53b and the heat radiating plate 7b to the resin plate 6b. In the semiconductor module 1100, instead of this, an alloy (not shown) containing at least an active metal that reacts with the components of the ceramic, Ag, and Cu is used to attach this portion. In the present embodiment, specifically, Ti is contained in the alloy as an active metal that reacts with the constituent components of the ceramic. However, the active metal that reacts with the components contained in the ceramic is not limited to Ti, and may be other metals such as Zr. In addition, the active metal which reacts with the structural component of ceramics, the alloy containing Ag and Cu may be called an active metal brazing material.
　セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金には、必要に応じて、融点を調整するために、Ｔｉ、Ｚｎ、Ｓｎ、Ｉｎ、Ｎｉ、Ｍｎ、Ｃｄなどから選ばれる金属が、１種または複数種、添加される場合がある。なお、本実施形態においては、セラミックに含まれる成分と反応する活性成分として添加されたＴｉは、融点を調整する役割も果たしている。 For alloys containing active metals that react with ceramic constituents, Ag, and Cu, Ti, Zn, Sn, In, Ni, Mn, Cd, etc. are used to adjust the melting point as necessary. One or more selected metals may be added. In the present embodiment, Ti added as an active component that reacts with components contained in the ceramic also plays a role of adjusting the melting point.
　なお、合金にＴｉを添加する場合には、Ｔｉの添加量は、合金の全重量に対して３重量％以下であることが好ましい。Ｔｉの含有量が３重量％を超えると、合金自体が脆化する虞があるからである。本実施形態においては、合金６の配合比率を、Ａｇ６０～８０重量％、Ｃｕ２０～４０重量％、Ｔｉ１～３重量％とした。 In addition, when adding Ti to an alloy, it is preferable that the addition amount of Ti is 3 weight% or less with respect to the total weight of an alloy. This is because if the Ti content exceeds 3% by weight, the alloy itself may become brittle. In this embodiment, the compounding ratio of the alloy 6 is set to Ag 60 to 80% by weight, Cu 20 to 40% by weight, and Ti 1 to 3% by weight.
　半導体モジュール１１００の他の構成は、半導体モジュール１００と同じにした。 The other configuration of the semiconductor module 1100 is the same as that of the semiconductor module 100.
　リード端子５１ａ～５１ｃ、５３ａ、５３ｂ、放熱板７ａ、７ｂのセラミックス板６ａ、６ｂへの取付けは、予め、リード端子５１ａ～５１ｃ、５３ａ、５３ｂ、放熱板７ａ、７ｂに活性金属ロウ材からなるペーストを塗布しておき、その塗布面をセラミックス板６ａ、６ｂへ当接させて、その活性金属ロウ材の融点以上の温度で熱処理することによりおこなうことができる。 The lead terminals 51a to 51c, 53a and 53b, and the heat sinks 7a and 7b are attached to the ceramic plates 6a and 6b in advance by using an active metal brazing material for the lead terminals 51a to 51c, 53a and 53b and the heat sinks 7a and 7b. The paste can be applied in advance, and the coated surface can be brought into contact with the ceramic plates 6a and 6b and heat treated at a temperature equal to or higher than the melting point of the active metal brazing material.
　セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金は、リード端子５１ａ～５１ｃ、５３ａ、５３ｂ、放熱板７ａ、７ｂをセラミックス板６ａ、６ｂへ強固に接合する。たとえば、セラミックス板６ａ、６ｂに窒化珪素を用い、リード端子５１ａ～５１ｃ、５３ａ、５３ｂ、放熱板７ａ、７ｂにＣｕを用い、両者を、Ｔｉが添加されたＡｇとＣｕとを含む合金によって接合した場合、合金のセラミックス板（窒化珪素基板）６ａ、６ｂの近傍には、ＴｉＮや、ＭＮが形成される（ただしＭはＳｉ、Ｃｕ、Ｔｉの合金）。すなわち、合金のセラミックス板６ａ、６ｂ近傍のＴｉの濃度が、合金のその他の部分のＴｉの濃度よりも高くなっている。この結果、リード端子５１ａ～５１ｃ、５３ａ、５３ｂ、放熱板７ａ、７ｂとセラミックス板６ａ、６ｂとは、高い強度で接合されている。 An alloy containing an active metal that reacts with a ceramic component, Ag, and Cu firmly bonds the lead terminals 51a to 51c, 53a, 53b, and the heat sinks 7a, 7b to the ceramic plates 6a, 6b. For example, silicon nitride is used for the ceramic plates 6a and 6b, Cu is used for the lead terminals 51a to 51c, 53a and 53b, and the heat radiating plates 7a and 7b, and both are joined by an alloy containing Ag and Cu to which Ti is added. In this case, TiN and MN are formed in the vicinity of the alloy ceramic plates (silicon nitride substrates) 6a and 6b (where M is an alloy of Si, Cu and Ti). In other words, the Ti concentration in the vicinity of the alloy ceramic plates 6a and 6b is higher than the Ti concentration in the other portions of the alloy. As a result, the lead terminals 51a to 51c, 53a, 53b, the heat radiating plates 7a, 7b and the ceramic plates 6a, 6b are bonded with high strength.
　また、セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金は、一般に、接着剤よりも熱伝導率が高い。そのため、半導体モジュール１１００は、半導体スイッチング素子1、２が発生させた熱を、金属ブロック８ａ、リード端子５１ｃ、５３ａ等を経由し、更にセラミックス板６ａ、６ｂ、放熱板７ａ、７ｂを経由して、より効率的に放散させることがきる。 Further, an alloy containing an active metal that reacts with a constituent component of ceramic, Ag, and Cu generally has a higher thermal conductivity than an adhesive. Therefore, the semiconductor module 1100 causes the heat generated by the semiconductor switching elements 1 and 2 to pass through the metal block 8a, the lead terminals 51c and 53a, and the ceramic plates 6a and 6b and the heat sinks 7a and 7b. Can be dissipated more efficiently.
　第１１実施形態にかかる半導体モジュール１１００は、高い強度を備えたセラミックス板６ａ、６ｂに、リード端子５１ａ～５１ｃ、５３ａ、５３ｂ、放熱板７ａ、７ｂが、セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金を介して強固に接合されているため、高い強度を備えている。また、放熱性においても優れている。 The semiconductor module 1100 according to the eleventh embodiment includes an active metal in which lead terminals 51a to 51c, 53a, 53b, and heat radiating plates 7a, 7b react with ceramic constituents on ceramic plates 6a, 6b having high strength. In addition, since it is firmly bonded via an alloy containing Ag and Cu, it has high strength. Moreover, it is excellent also in heat dissipation.
　［第１２実施形態］
　第１２実施形態にかかる半導体モジュール１２００は、第１実施形態にかかる半導体モジュール１００の構成要素間の取付け方法に一部変更を加えた。構造そのものには変更がないので、半導体モジュール１００を説明した図１（Ａ）、（Ｂ）を援用して半導体モジュール１２００を説明する。 [Twelfth embodiment]
In the semiconductor module 1200 according to the twelfth embodiment, a part of the mounting method between components of the semiconductor module 100 according to the first embodiment is changed. Since there is no change in the structure itself, the semiconductor module 1200 will be described with reference to FIGS. 1A and 1B illustrating the semiconductor module 100.
　半導体モジュール１００では、成型体の樹脂板６ａに、リード端子５１ａ～５１ｃ、放熱板７ａを接着剤によって取付け、同じく成形体の樹脂板６ｂに、リード端子５３ａ、５３ｂ、放熱板７ｂを接着剤により取付けた。半導体モジュール１００では、これに変更を加え、未硬化状態の樹脂板６ａ、６ｂに、リード端子５１ａ～５１ｃ、５３ａ、５３ｂ、放熱板７ａ、７ｂを熱圧着し、更に加熱して樹脂板６ａ、６ｂを硬化させて、リード端子５１ａ～５１ｃ、５３ａ、５３ｂ、放熱板７ａ、７ｂを、樹脂板６ａ、６ｂに取付けた。すなわち、半導体モジュール１２００は、リード端子５１ａ～５１ｃ、５３ａ、５３ｂ、放熱板７ａ、７ｂの樹脂板６ａ、６ｂへの取付けに、接着剤を使用しなかった。半導体モジュール１２００の他の構造および製造工程は、半導体モジュール１００と同じにした。以下に、半導体モジュール１２００について、詳細に説明する。 In the semiconductor module 100, the lead terminals 51a to 51c and the heat radiating plate 7a are attached to the molded resin plate 6a with an adhesive, and the lead terminals 53a, 53b and the heat radiating plate 7b are also bonded to the molded resin plate 6b with an adhesive. Installed. In the semiconductor module 100, this is changed, and the lead terminals 51a to 51c, 53a, 53b, and the heat radiating plates 7a, 7b are thermocompression bonded to the uncured resin plates 6a, 6b, and further heated to form the resin plates 6a, 6b, 6b was cured, and lead terminals 51a to 51c, 53a, 53b, and heat sinks 7a, 7b were attached to resin plates 6a, 6b. That is, the semiconductor module 1200 does not use an adhesive for attaching the lead terminals 51a to 51c, 53a, 53b, and the heat sinks 7a, 7b to the resin plates 6a, 6b. Other structures and manufacturing processes of the semiconductor module 1200 are the same as those of the semiconductor module 100. Hereinafter, the semiconductor module 1200 will be described in detail.
　リード端子５１ａ～５３ｂは、信号経路や電源経路となる。よって、電気的損失を低減するために、比抵抗が低い金属により形成されたものである必要がある。また、リード端子５１ａ～５３ｂは、実装される半導体スイッチング素子で発生する熱をモジュール外部に排出する放熱経路となる。よって、リード端子５１ａ～５３ｂは、熱抵抗を小さくするために、熱伝導率が高い金属である必要がある。これら要求を満たすためには、無酸素銅やタフピッチ銅など、高純度の銅が、リード端子５１ａ～５３ｂの材質として選択される。ただし、封止樹脂１１から外部に出たリード端子部は、外部接続端子となり、ある程度の強度が要求される場合がある。その場合、強度の低い高純度の銅を適用するのは不適であるため、比抵抗や熱伝導率が大きく変化しない範囲で若干の不純物を添加することで高強度化した銅が、リード端子５１ａ～５３ｂの材質として選択される。このような銅材の代表的なものとして、株式会社神戸製鋼所製の「ＫＦＣ（登録商標）」をあげることができる。 The lead terminals 51a to 53b serve as signal paths and power supply paths. Therefore, in order to reduce electrical loss, it is necessary to be formed of a metal having a low specific resistance. Further, the lead terminals 51a to 53b serve as a heat dissipation path for discharging heat generated in the mounted semiconductor switching element to the outside of the module. Therefore, the lead terminals 51a to 53b need to be a metal having high thermal conductivity in order to reduce the thermal resistance. In order to satisfy these requirements, high-purity copper such as oxygen-free copper or tough pitch copper is selected as the material of the lead terminals 51a to 53b. However, the lead terminal portion that protrudes to the outside from the sealing resin 11 becomes an external connection terminal, and a certain degree of strength may be required. In that case, it is unsuitable to apply high-purity copper having low strength. Therefore, the lead terminal 51a is made of copper that has been strengthened by adding some impurities within a range in which specific resistance and thermal conductivity do not change greatly. To 53b. A typical example of such a copper material is "KFC (registered trademark)" manufactured by Kobe Steel, Ltd.
　樹脂板６ａ、６ｂには、エポキシ系樹脂、ポリイミド系樹脂、ビスマレイミド系樹脂などからなる熱硬化性樹脂が使用される。樹脂板６ａ、６ｂは、リード端子５１ｃ、５２ａ、５３ａに実装された半導体スイッチング素子１、２で発生する熱を、放熱板７ａ、７ｂから排出するための放熱経路となる。よって、樹脂板６ａ、６ｂの熱抵抗を小さくするため、熱伝導率が高い材質が選択される。具体的には、樹脂中に、アルミナ、窒化アルミニウム、窒化ケイ素などの熱伝導率の高いセラミックフィラーが充填された、熱伝導率が３Ｗ／ｍ・Ｋ以上の樹脂を選択するのが好ましい。更には、前記セラミックフィラーを粒配することで、より高充填化した５Ｗ／ｍ・Ｋ以上の樹脂を選択するのがより好ましい。また、樹脂板６ａ、６ｂの熱抵抗の小さくするためには、樹脂板厚を小さく必要があり、厚みは０．２ｍｍ以下であるのが好ましく、更には０．１５ｍｍ以下であることがより好ましい。 For the resin plates 6a and 6b, a thermosetting resin made of epoxy resin, polyimide resin, bismaleimide resin or the like is used. The resin plates 6a and 6b serve as a heat dissipation path for discharging heat generated in the semiconductor switching elements 1 and 2 mounted on the lead terminals 51c, 52a and 53a from the heat dissipation plates 7a and 7b. Therefore, in order to reduce the thermal resistance of the resin plates 6a and 6b, a material having high thermal conductivity is selected. Specifically, it is preferable to select a resin having a thermal conductivity of 3 W / m · K or more, which is filled with a ceramic filler having a high thermal conductivity such as alumina, aluminum nitride, or silicon nitride. Furthermore, it is more preferable to select a resin of 5 W / m · K or higher that is more highly filled by graining the ceramic filler. Further, in order to reduce the thermal resistance of the resin plates 6a and 6b, it is necessary to reduce the resin plate thickness, and the thickness is preferably 0.2 mm or less, and more preferably 0.15 mm or less. .
　なお、樹脂板６ａ、６ｂとリード端子５１ａ～５１ｃ、５３ａ、５３ｂとの接合面は、樹脂板６ａ、６ｂ表面からの押込み深さが０．０１ｍｍ（１０μｍ）以下であることが好ましく、更には０．００５ｍｍ（５μｍ）以下であることがより好ましい。０．０１ｍｍを超えて押込まれると、押込まれた樹脂がリード端子間に気泡を多く内包した状態で盛り上がった形状となる。この内包された気泡は封止樹脂で封止されても残るため、リード端子間の絶縁信頼性が劣化するという問題が生じるからである。 In addition, it is preferable that the indentation depth from the surface of the resin plates 6a and 6b is 0.01 mm (10 μm) or less at the joint surface between the resin plates 6a and 6b and the lead terminals 51a to 51c, 53a and 53b. More preferably, it is 0.005 mm (5 μm) or less. When it is pushed over 0.01 mm, the pushed-in resin has a raised shape with a lot of bubbles between the lead terminals. This is because the encapsulated bubbles remain even after being sealed with the sealing resin, which causes a problem that the insulation reliability between the lead terminals deteriorates.
　放熱板７ａ、７ｂは、リード端子５１ａ～５１ｃ、５３ａ、５３ｂとは樹脂板７ａ、７ｂを介して絶縁されており、電気的な役割を有するものではなく、専らモジュール内部で発生した熱を外部に放出するための役割を有する。よって、無酸素銅やタフピッチ銅など、高純度の銅からなる材質が選択される。また、熱を外部に放出する際に放熱板７ａ、７ｂの水平方向に熱を拡散させると高い放熱性が得られるため、放熱板７ａ、７ｂの厚みは０．３ｍｍ以上とすることが好ましく、更には０．５ｍｍ以上とすることがより好ましい。 The heat radiating plates 7a and 7b are insulated from the lead terminals 51a to 51c, 53a and 53b through the resin plates 7a and 7b, and have no electrical role, and exclusively generate heat generated inside the module. Has a role to release. Therefore, a material made of high purity copper such as oxygen-free copper or tough pitch copper is selected. Moreover, since high heat dissipation is obtained when heat is diffused in the horizontal direction of the heat sinks 7a and 7b when releasing heat to the outside, the thickness of the heat sinks 7a and 7b is preferably set to 0.3 mm or more. Furthermore, it is more preferable to set it as 0.5 mm or more.
　上記構成の絶縁配線板は、放熱板７ａ、７ｂと、絶縁層となる樹脂板６ａ、６ｂと、リード端子５１ａ～５１ｃ、５３ａ、５３ｂとが一体形成されている。従来の絶縁配線板として、放熱板と絶縁層となる樹脂板と、配線からなるものがあるが、これに外部接続端子を取付けようとすると、外部接続端子用のリードフレームを別途用意し、該リードフレームと前記配線とをワイヤーボンディングするか、はんだで接合する必要がある。上記構成の絶縁配線板は、外部接続端子と配線端子が一つのリードフレームで構成されるため、前記接合箇所が存在しない。 In the insulated wiring board having the above-described configuration, the heat radiating plates 7a and 7b, the resin plates 6a and 6b serving as insulating layers, and the lead terminals 51a to 51c, 53a and 53b are integrally formed. Conventional insulation wiring boards include a heat sink, a resin board as an insulation layer, and wiring.To attach external connection terminals to this, prepare a lead frame for the external connection terminals separately, It is necessary to wire-bond the lead frame and the wiring or to join them with solder. In the insulated wiring board having the above-described configuration, the external connection terminal and the wiring terminal are configured by one lead frame, and thus the joint portion does not exist.
　具体的な半導体モジュール１２００の製造方法の一例につき、以下に詳細に説明する。 An example of a specific method for manufacturing the semiconductor module 1200 will be described in detail below.
　まず、厚み０．８ｍｍの無酸素銅（Ｃ１０２０）からなる放熱板７ａ、７ｂを用意する。 First, heat sinks 7a and 7b made of oxygen-free copper (C1020) having a thickness of 0.8 mm are prepared.
　次に、放熱板７ａ、７ｂに、厚み０．１ｍｍの未硬化の熱硬化性樹脂シートを載せ、７０℃～１００℃で熱圧着する。熱硬化性樹脂は、アルミナフィラーを充填したエポキシ系樹脂であり、たとえば熱伝導率が５．５Ｗ／ｍ・Ｋのものを用いる。 Next, an uncured thermosetting resin sheet having a thickness of 0.1 mm is placed on the heat sinks 7a and 7b and thermocompression bonded at 70 to 100 ° C. The thermosetting resin is an epoxy resin filled with an alumina filler. For example, a resin having a thermal conductivity of 5.5 W / m · K is used.
　次に、熱硬化性樹脂の放熱板７ａ、７ｂ圧着面とは反対の面に、ＫＦＣ（登録商標）からなるリードフレーム（リード端子が繋がったもの）を載せ、１７０℃～１９０℃で熱圧着する。これを１７０℃～１９０℃で硬化させ、リード端子５１ａ～５１ｃ、樹脂板６ａ、および放熱板７ａからなる絶縁配線板、およびリード端子５３ａ、５３ｂ、樹脂板６ｂ、および放熱板７ｂからなる絶縁配線板を製造する。 Next, a lead frame (connected with lead terminals) made of KFC (Registered Trademark) is placed on the surface opposite to the heat radiating plate 7a, 7b crimping surface of thermosetting resin, and thermocompression bonding is performed at 170 ° C to 190 ° C. To do. This is cured at 170 ° C. to 190 ° C. and insulated wiring board composed of lead terminals 51a to 51c, resin plate 6a and heat radiating plate 7a, and insulated wiring composed of lead terminals 53a and 53b, resin plate 6b and radiating plate 7b. Manufacture a board.
　なお、熱硬化性樹脂シートは、リードフレームを載せて熱圧着する際に、シートへの押込み深さが０．０１ｍｍ（１０μｍ）以下、更に好ましくは０．００５ｍｍ（５μｍ）以下である、熱圧着時での流動性の低いものを選択しなければならない。 The thermosetting resin sheet has a pressing depth into the sheet of 0.01 mm (10 μm) or less, more preferably 0.005 mm (5 μm) or less, when the lead frame is placed and thermocompression bonded. You must choose one that is less fluid at times.
　このように未硬化の熱硬化性樹脂シートを介して放熱板７ａ、７ｂとリード端子５１ａ～５１ｃ、５３ａ、５３ｂとを接続しているので、樹脂の弾性によって複数のリードフレームごとの高さのばらつきが抑制され、美観を損ねることがない。また、接続箇所が水分を吸ってしまい絶縁性が悪くなることも抑制されるという効果がある。 Thus, since the heat sinks 7a and 7b and the lead terminals 51a to 51c, 53a and 53b are connected via the uncured thermosetting resin sheet, the height of each lead frame is increased by the elasticity of the resin. Variations are suppressed and aesthetics are not impaired. Moreover, there is an effect that it is suppressed that the connection portion absorbs moisture and the insulating property is deteriorated.
　第１２実施形態にかかる半導体モジュール１２００は、上記形態の絶縁配線板を上下２枚配置して構成されるものである。しかし、上記形態の絶縁配線板は、本願発明の半導体モジュールへの適用に限定されるものではない。例えば、上記形態の絶縁配線板を１枚のみ用いた半導体モジュールを構成することも可能である。 A semiconductor module 1200 according to the twelfth embodiment is configured by arranging two insulating wiring boards of the above-described form on the upper and lower sides. However, the insulated wiring board of the said form is not limited to application to the semiconductor module of this invention. For example, it is also possible to configure a semiconductor module using only one insulating wiring board of the above form.
　［第１３実施形態］
　図１１（Ａ）に、第１３実施形態にかかる半導体モジュール１３００を示す。ただし、図１１（Ａ）は、半導体モジュール１３００の断面図である。 [Thirteenth embodiment]
FIG. 11A shows a semiconductor module 1300 according to the thirteenth embodiment. Note that FIG. 11A is a cross-sectional view of the semiconductor module 1300.
　半導体モジュール１３００は、第１実施形態の半導体モジュール１００の構造に、一部、変更を加えた。 The semiconductor module 1300 is partially changed in the structure of the semiconductor module 100 of the first embodiment.
　具体的には、半導体モジュール１００では、封止樹脂１１の上側の主面から露出した放熱板７ａは、その外周縁が封止樹脂１１の上側の主面に露出していた。同様に、半導体モジュール１００では、封止樹脂１１の下側の主面から露出した放熱板７ｂは、その外周縁が封止樹脂１１の下側の主面に露出していた。 Specifically, in the semiconductor module 100, the outer peripheral edge of the heat sink 7 a exposed from the upper main surface of the sealing resin 11 is exposed to the upper main surface of the sealing resin 11. Similarly, in the semiconductor module 100, the heat sink 7 b exposed from the lower main surface of the sealing resin 11 has an outer peripheral edge exposed to the lower main surface of the sealing resin 11.
　半導体モジュール１３００では、これに変更を加え、図１１（Ａ）に符号１１Ｘで示すように、放熱板７ａおよび放熱板７ｂの外周縁を封止樹脂１１の内部に埋め込んだ。また、この構造を容易に実現するために、半導体モジュール１３００では、一部のリード端子を屈曲させる、あるいは、補助リード端子を接続するなどの方法により、リード端子５１ａ、５１ｃ、５２ａ、５２ｂ、５３ａ、５３ｂを、半導体モジュール１３００の同じ高さ位置から、封止樹脂１１の外部に導出させた。なお、リード端子５１ａ～５３ｂを半導体モジュール１３００の同じ高さ位置から導出させる方法は、本実施形態の重要部分ではないので、詳しい説明は省略する。 In the semiconductor module 1300, this was changed and the outer peripheral edges of the heat radiating plate 7a and the heat radiating plate 7b were embedded in the sealing resin 11 as indicated by reference numeral 11X in FIG. In order to easily realize this structure, in the semiconductor module 1300, the lead terminals 51a, 51c, 52a, 52b, and 53a are formed by bending some lead terminals or connecting auxiliary lead terminals. 53b are led out of the sealing resin 11 from the same height position of the semiconductor module 1300. Note that the method of deriving the lead terminals 51a to 53b from the same height position of the semiconductor module 1300 is not an important part of the present embodiment, and thus detailed description thereof is omitted.
　半導体モジュール１３００が、放熱板７ａおよび放熱板７ｂの外周縁を封止樹脂１１の内部に埋め込んだ理由は、以下のとおりである。すなわち、放熱板７ａ、７ｂ周辺は、スイッチングオン・オフに伴う温度変化が激しく、たとえば銅である放熱板７ａ、７ｂと、封止樹脂１１の界面に、熱膨張係数差による剥離が起きやすい。そして、この部分に剥離が生じると、剥離部分から内部に水分が混入するなどして、電気的にショートする虞がある。半導体モジュール１３００は、放熱板７ａ、７ｂの外周縁を封止樹脂１１の内部に埋め込み、密着性を向上させることにより、この部分の剥離を抑制し、耐湿性、信頼性を向上させたのである。 The reason why the semiconductor module 1300 embedded the outer peripheral edges of the heat radiating plate 7a and the heat radiating plate 7b in the sealing resin 11 is as follows. That is, the temperature change accompanying switching ON / OFF is intense around the heat sinks 7a and 7b, and peeling due to a difference in thermal expansion coefficient tends to occur at the interface between the heat sinks 7a and 7b made of copper and the sealing resin 11, for example. When peeling occurs at this portion, there is a risk of electrical short-circuiting due to moisture mixed into the inside from the peeling portion. In the semiconductor module 1300, the outer peripheral edges of the heat radiating plates 7a and 7b are embedded in the sealing resin 11 to improve the adhesion, thereby suppressing peeling of this portion and improving the moisture resistance and reliability. .
　放熱板７ａ、７ｂの外周縁を封止樹脂１１の内部に埋め込むためには、図１１（Ｂ）に示すように、半導体スイッチング素子１、２、金属ブロック８ａ、８ｂ、受動素子１０、リード端子５１ａ～５３ｂ、放熱板７ａ、７ｂなどが一体化された半導体モジュールのベースとなる構造物を、放熱板７ａ、７ｂの表面に、放熱板７ａ、７ｂより一回り小さなスペーサ８１ａ、８１ｂを配置した状態で金型８２ａ、８２ｂにセットし、トランスファーモールド成型すれば良い。なお、スペーサ８１ａ、８１ｂは、完成した半導体モジュール１３００を金型８２ａ、８２ｂから取出した後に、放熱板７ａ、７ｂの表面から取外せば良い。 In order to embed the outer periphery of the heat sinks 7a and 7b in the sealing resin 11, as shown in FIG. 11B, the semiconductor switching elements 1 and 2, the metal blocks 8a and 8b, the passive element 10, and the lead terminals Spacers 81a and 81b that are slightly smaller than the heat sinks 7a and 7b are arranged on the surfaces of the heat sinks 7a and 7b in the structure serving as the base of the semiconductor module in which 51a to 53b and the heat sinks 7a and 7b are integrated. What is necessary is just to set to the metal mold | die 82a and 82b in a state, and to perform transfer molding. The spacers 81a and 81b may be removed from the surfaces of the heat sinks 7a and 7b after the completed semiconductor module 1300 is taken out from the molds 82a and 82b.
　第１３実施形態にかかる半導体モジュール１３００は、放熱板７ａ、７ｂを備えているため放熱性に優れている。しかも、半導体モジュール１３００は、放熱板７ａ、７ｂの外周縁が封止樹脂１１の内部に埋め込まれているため、高い耐湿性、高い信頼性を維持している。 The semiconductor module 1300 according to the thirteenth embodiment is excellent in heat dissipation because it includes the heat sinks 7a and 7b. In addition, the semiconductor module 1300 maintains high moisture resistance and high reliability because the outer peripheral edges of the heat sinks 7a and 7b are embedded in the sealing resin 11.
　［第１４実施形態］
　第１４実施形態にかかる半導体モジュール１４００は、第３実施形態にかかる半導体モジュール３００の構成要素の寸法に一部変更を加えた。構造そのものには変更がないので、半導体モジュール３００を説明した図３を援用して半導体モジュール１４００を説明する。 [Fourteenth embodiment]
In the semiconductor module 1400 according to the fourteenth embodiment, a part of the dimensions of the components of the semiconductor module 300 according to the third embodiment is changed. Since there is no change in the structure itself, the semiconductor module 1400 will be described with reference to FIG.
　半導体モジュール３００では、特に言及しなかったが、第１リード端子層１Ｌに配置されたリード端子５１ａ～５３ｃと、第２リード端子層２Ｌに配置されたリード端子５２ａ、５２ｂと、第３リード端子層３Ｌに配置されたリード端子５３ａ、５３ｂとを、相互に同一の厚みにしていた。半導体モジュール１４００では、これに変更を加え、第２リード端子層２Ｌに配置されたリード端子５２ａ、５２ｂの厚みを、第１リード端子層１Ｌに配置されたリード端子５１ａ～５１ｃおよび第３リード端子層３Ｌに配置されたリード端子５３ａ、５３ｂの厚みよりも大きくした。たとえば、第１リード端子層１Ｌに配置されたリード端子５１ａ～５３ｃの厚みを０．３ｍｍにし、第２リード端子層２Ｌに配置されたリード端子５２ａ、５２ｂの厚みを０．８ｍｍにし、第３リード端子層３Ｌに配置されたリード端子５３ａ、５３ｂの厚みを０．３ｍｍにした。 Although not particularly mentioned in the semiconductor module 300, the lead terminals 51a to 53c arranged in the first lead terminal layer 1L, the lead terminals 52a and 52b arranged in the second lead terminal layer 2L, and the third lead terminal The lead terminals 53a and 53b arranged on the layer 3L have the same thickness. In the semiconductor module 1400, this is changed, and the thickness of the lead terminals 52a and 52b arranged in the second lead terminal layer 2L is changed to the lead terminals 51a to 51c and the third lead terminals arranged in the first lead terminal layer 1L. The thickness of the lead terminals 53a and 53b arranged in the layer 3L is larger than the thickness. For example, the thickness of the lead terminals 51a to 53c arranged in the first lead terminal layer 1L is set to 0.3 mm, the thickness of the lead terminals 52a and 52b arranged in the second lead terminal layer 2L is set to 0.8 mm, and the third The thickness of the lead terminals 53a and 53b arranged in the lead terminal layer 3L was set to 0.3 mm.
　以下に、図３を参照しながら、上記の厚みにした理由について説明する。 Hereinafter, the reason for the above thickness will be described with reference to FIG.
　第１リード端子層１Ｌに配置されたリード端子５１ａ～５３ｃの厚みと、第２リード端子層２Ｌに配置されたリード端子５２ａ、５２ｂの厚みと、第３リード端子層３Ｌに配置されたリード端子５３ａ、５３ｂの厚みは、半導体スイッチング素子１、２、３の、それぞれのジャンクション温度に影響を与える。その影響度合いは、第１リード端子層１Ｌと、２リード端子層２Ｌと、第３リード端子層３Ｌとで異なる。具体的には、第２リード端子層２Ｌに配置されたリード端子５２ａは、第１の半導体スイッチン素子１と第２の半導体スイッチング素子２とが上下両側に接合された部分と、第３の半導体スイッチング素子３が下側に接合された部分とを繋ぐ形状であり、最も温度が高くなる第１の半導体スイッチン素子１と第２の半導体スイッチング素子２とが上下両側に接合された部分から、それに比べて温度が低い第３の半導体スイッチング素子３が下側に接合された部分へ、熱を伝達する主要な伝達経路となっている。そのため、第２リード端子層２Ｌに配置されたリード端子５２ａの厚みを大きくすれば、高温になりやすい第１の半導体スイッチン素子１と第２の半導体スイッチング素子２とが発生させる熱を、それに比べて温度の低い第３の半導体スイッチング素子３へ伝達する効果が大きくなる。すなわち、第１の半導体スイッチン素子１、第２の半導体スイッチング素子２、第３の半導体スイッチング素子３の温度ばらつきを小さくし、かつ、第１の半導体スイッチン素子１および第２の半導体スイッチング素子２の温度を下げる効果が大きくなる。 The thicknesses of the lead terminals 51a to 53c arranged in the first lead terminal layer 1L, the thicknesses of the lead terminals 52a and 52b arranged in the second lead terminal layer 2L, and the lead terminals arranged in the third lead terminal layer 3L The thicknesses of 53a and 53b affect the junction temperatures of the semiconductor switching elements 1, 2, and 3. The degree of influence differs between the first lead terminal layer 1L, the second lead terminal layer 2L, and the third lead terminal layer 3L. Specifically, the lead terminal 52a disposed in the second lead terminal layer 2L includes a portion where the first semiconductor switching element 1 and the second semiconductor switching element 2 are joined to both the upper and lower sides, From the portion where the first semiconductor switching device 1 and the second semiconductor switching device 2 having the highest temperature are joined to the upper and lower sides, the shape is connected to the portion where the semiconductor switching device 3 is joined to the lower side. The third semiconductor switching element 3 having a lower temperature than that is a main transmission path for transferring heat to a portion where the third semiconductor switching element 3 is bonded to the lower side. Therefore, if the thickness of the lead terminal 52a arranged in the second lead terminal layer 2L is increased, the heat generated by the first semiconductor switching element 1 and the second semiconductor switching element 2 that are likely to become high temperature is reduced. In comparison, the effect of transmission to the third semiconductor switching element 3 having a low temperature is increased. That is, temperature variations of the first semiconductor switching element 1, the second semiconductor switching element 2, and the third semiconductor switching element 3 are reduced, and the first semiconductor switching element 1 and the second semiconductor switching element are reduced. The effect of lowering the temperature of 2 is increased.
　以下の実験をおこなった。まず、厚み０．３ｍｍと、厚み０．８ｍｍと、厚み０．４６７ｍｍの３種類のリード端子を用意した。これらのリード端子を組み合わせて使用して、第１リード端子層１Ｌのリード端子５１ａ～５１ｃの厚みと、２リード端子層２Ｌのリード端子５２ａ、５２ｂの厚みと、第３リード端子層３Ｌのリード端子５３ａ、５３ｂの厚みの合計厚みが１．４ｍｍとなる、試料１～試料４にかかる４種類の半導体モジュールを作製した。各半導体モジュールのリード端子以外の構造は、第３実施形態にかかる半導体モジュール３００と同じにした。そして、各試料にかかる半導体モジュールを作動させ、最高ジャンクション温度と、第１の半導体スイッチン素子１～第３の半導体スイッチング素子３のジャンクション温度のばらつきを調べた。表１に、調べた結果を示す。 The following experiment was conducted. First, three types of lead terminals having a thickness of 0.3 mm, a thickness of 0.8 mm, and a thickness of 0.467 mm were prepared. By using these lead terminals in combination, the thickness of the lead terminals 51a to 51c of the first lead terminal layer 1L, the thickness of the lead terminals 52a and 52b of the second lead terminal layer 2L, and the lead of the third lead terminal layer 3L Four types of semiconductor modules according to Sample 1 to Sample 4 in which the total thickness of the terminals 53a and 53b was 1.4 mm were manufactured. The structure of each semiconductor module other than the lead terminals is the same as that of the semiconductor module 300 according to the third embodiment. Then, the semiconductor module applied to each sample was operated, and the variation of the maximum junction temperature and the junction temperature of the first semiconductor switching element 1 to the third semiconductor switching element 3 was examined. Table 1 shows the results of the investigation.
Figure JPOXMLDOC01-appb-T000001
 　表１から分かるように、最高ジャンクション温度を低く抑えるには、あるいは、温度ばらつきを小さくするには、第２リード端子層２Ｌのリード端子５２ａ、５２ｂの厚みを、第１リード端子層１Ｌのリード端子５１ａ～５１ｃおよび第３リード端子層３Ｌのリード端子５３ａ、５３ｂの厚みよりも大きくすれば良い。
Figure JPOXMLDOC01-appb-T000001
 As can be seen from Table 1, in order to keep the maximum junction temperature low or to reduce the temperature variation, the thickness of the lead terminals 52a and 52b of the second lead terminal layer 2L is set to the lead of the first lead terminal layer 1L. The thickness may be made larger than the thickness of the terminals 51a to 51c and the lead terminals 53a and 53b of the third lead terminal layer 3L.
　以上の理由より、第１４実施形態にかかる半導体モジュール１４００は、第２リード端子層２Ｌに配置されたリード端子５２ａ、５２ｂの厚みを、第１リード端子層１Ｌに配置されたリード端子５１ａ～５１ｃおよび第３リード端子層３Ｌに配置されたリード端子５３ａ、５３ｂの厚みよりも大きくした。 For the above reasons, in the semiconductor module 1400 according to the fourteenth embodiment, the thickness of the lead terminals 52a and 52b arranged in the second lead terminal layer 2L is set to the lead terminals 51a to 51c arranged in the first lead terminal layer 1L. The thickness of the lead terminals 53a and 53b arranged in the third lead terminal layer 3L is larger than the thickness.
　第１４実施形態にかかる半導体モジュール１４００は、最高ジャンクション温度が低く抑制されている。また、半導体モジュール１４００は、半導体スイッチン素子１、２、３の間の温度ばらつきが小さく抑制されている。 In the semiconductor module 1400 according to the fourteenth embodiment, the maximum junction temperature is suppressed low. In the semiconductor module 1400, the temperature variation between the semiconductor switch elements 1, 2, and 3 is suppressed to be small.
　［第１５実施形態］
　図１２に、第１５実施形態にかかる半導体モジュール１５００を示す。ただし、図１２は、半導体モジュール１５００の等価回路図である。 [Fifteenth embodiment]
FIG. 12 shows a semiconductor module 1500 according to the fifteenth embodiment. FIG. 12 is an equivalent circuit diagram of the semiconductor module 1500.
　半導体モジュール１５００は、第７実施形態に半導体モジュール７００の回路に、一部、変更を加えた。 The semiconductor module 1500 is partly modified in the circuit of the semiconductor module 700 in the seventh embodiment.
　具体的には、半導体モジュール１５００は、図１２に示すように、３個が並列に接続された各半導体モジュール５００の各２つの半導体スイッチング素子Ｓ１、Ｓ２に対して、並列に、抵抗とコンデンサとが直列に接続されたスナバ回路８３を接続した。 Specifically, as shown in FIG. 12, the semiconductor module 1500 includes a resistor and a capacitor in parallel with each of the two semiconductor switching elements S1 and S2 of each of the three semiconductor modules 500 connected in parallel. Are connected to a snubber circuit 83 connected in series.
　以下に、半導体モジュール１５００が、半導体スイッチング素子Ｓ１、Ｓ２に対して、並列に、スナバ回路８３を接続した理由を説明する。 Hereinafter, the reason why the semiconductor module 1500 connects the snubber circuit 83 in parallel to the semiconductor switching elements S1 and S2 will be described.
　半導体モジュールにおいては、配線やワイヤーボンディング等において、回路には現れない、寄生インダクタンスや寄生抵抗が発生する。そして、この寄生インダクタンスや寄生抵抗は、スイッチィング時のノイズ発生源になってしまう。そこで、半導体モジュール１５００は、各半導体スイッチング素子Ｓ１、Ｓ２と並列にスナバ回路８３を接続することにより、配線やワイヤーボンディング等で発生する寄生インダクタンスや寄生抵抗を低減させ、低ノイズ化をはかった。 In semiconductor modules, parasitic inductance and parasitic resistance, which do not appear in the circuit, occur in wiring and wire bonding. And this parasitic inductance and parasitic resistance will become a noise generation source at the time of switching. In view of this, the semiconductor module 1500 is connected to the snubber circuit 83 in parallel with each of the semiconductor switching elements S1 and S2, thereby reducing parasitic inductance and parasitic resistance generated in wiring, wire bonding, and the like, thereby reducing noise.
　第１５実施形態にかかる半導体モジュール１５００は、スイッチング時の低ノイズ化がはかられている。また、半導体モジュール１５００は、低ノイズ化により、必要となる耐電圧スペックを下げることができるため、高速スイッチング化、小型化、高効率化も可能になっている。 The semiconductor module 1500 according to the fifteenth embodiment is designed to reduce noise during switching. In addition, since the semiconductor module 1500 can reduce the required withstand voltage specification by reducing noise, high-speed switching, miniaturization, and high efficiency can be achieved.
　［第１６実施形態］
　図１３（Ａ）、（Ｂ）に、第１６実施形態にかかるパワーコントロールユニット１６００を示す。ただし、図１３（Ａ）は、パワーコントロールユニット１６００から個別ヒートシンク８５を省略した状態を示す分解平面図である。図１３（Ｂ）は、パワーコントロールユニット１６００の平面図である。 [Sixteenth Embodiment]
FIGS. 13A and 13B show a power control unit 1600 according to the sixteenth embodiment. However, FIG. 13A is an exploded plan view showing a state in which the individual heat sink 85 is omitted from the power control unit 1600. FIG. 13B is a plan view of the power control unit 1600.
　パワーコントロールユニット１６００は、円筒状で、有底のケース８４を備えている。ケース８４の中心には、孔８４ａが形成されている。孔８４ａは、たとえば、モーターの軸を通すために設けられている。 The power control unit 1600 has a cylindrical shape and a case 84 with a bottom. A hole 84 a is formed at the center of the case 84. The hole 84a is provided, for example, for passing a motor shaft.
　ケース８４には、第１０実施形態にかかる半導体モジュール１０００が、６個、同心円状に取付けられている。図面には現れていないが、半導体モジュール１０００どうしの間に、整流コンデンサが取付けられる場合がある。 The case 84 has six semiconductor modules 1000 according to the tenth embodiment attached concentrically. Although not shown in the drawing, a rectifying capacitor may be attached between the semiconductor modules 1000.
　各半導体モジュール１０００の上面には、それぞれ、個別ヒートシンク８５が取付けられている。 An individual heat sink 85 is attached to the upper surface of each semiconductor module 1000.
　近年、車載電装機器市場においては、パワーコントロールユニット冗長化のために、２系統の半導体モジュールを備えることが要求されている。すなわち、半導体モジュールを６個配列することが求められている。しかしながら、従来においては、既存のケースに６個の半導体モジュールを配列するスペースを確保することが難しかった。そのため、ケースの大型化をはからねばならず、機器の小型化の流れに逆行してしまうことになっていた。 In recent years, in the in-vehicle electrical equipment market, it is required to have two systems of semiconductor modules for power control unit redundancy. That is, it is required to arrange six semiconductor modules. However, conventionally, it has been difficult to secure a space for arranging six semiconductor modules in an existing case. For this reason, the case must be increased in size, and this is going against the trend of downsizing the equipment.
　パワーコントロールユニット１６００は、取付けた半導体モジュール１０００が小型であるため、既存のケースに６個の半導体モジュール１０００を配置することができた。パワーコントロールユニット１６００は、ケース８４を大型化させることなく、２系統化に対応することができる。 In the power control unit 1600, since the attached semiconductor module 1000 is small, six semiconductor modules 1000 can be arranged in the existing case. The power control unit 1600 can support two systems without increasing the size of the case 84.
　［第１７実施形態］
　図１４（Ａ）、（Ｂ）に、第１７実施形態にかかるパワーコントロールユニット１７００を示す。ただし、図１４（Ａ）は、パワーコントロールユニット１７００から個別ヒートシンク８６を省略した状態を示す分解平面図である。図１４（Ｂ）は、パワーコントロールユニット１７００の平面図である。 [Seventeenth embodiment]
FIGS. 14A and 14B show a power control unit 1700 according to the seventeenth embodiment. 14A is an exploded plan view showing a state in which the individual heat sink 86 is omitted from the power control unit 1700. FIG. FIG. 14B is a plan view of the power control unit 1700.
　第１７実施形態にかかるパワーコントロールユニット１７００は、第１６実施形態にかかるパワーコントロールユニット１６００に変更を加えた。すなわち、パワーコントロールユニット１６００では、ケース８４に６個の第１０実施形態にかかる半導体モジュール１０００が同心円状に取り付けられていた。パワーコントロールユニット１７００は、これに代えて、ケース８４に、第１１実施形態にかかる半導体モジュール１１００を対向させて２個取り付けた。そして、各半導体モジュール１１００上面に、それぞれ、個別ヒートシンク８６を取付けた。パワーコントロールユニット１７００の他の構成は、パワーコントロールユニット１６００と同じにした。 The power control unit 1700 according to the seventeenth embodiment is modified from the power control unit 1600 according to the sixteenth embodiment. That is, in the power control unit 1600, six semiconductor modules 1000 according to the tenth embodiment are concentrically attached to the case 84. Instead of this, the power control unit 1700 is attached to the case 84 with two semiconductor modules 1100 according to the eleventh embodiment facing each other. Then, individual heat sinks 86 are attached to the upper surface of each semiconductor module 1100. The other configuration of the power control unit 1700 is the same as that of the power control unit 1600.
　パワーコントロールユニット１７００も、ケース８４を大型化させることなく、２系統化に対応することができる。 The power control unit 1700 can also support two systems without increasing the size of the case 84.
　［第１８実施形態］
　図１５（Ａ）、（Ｂ）に、第１８実施形態にかかるパワーコントロールユニット１８００を示す。ただし、図１５（Ａ）は、パワーコントロールユニット１８００から個別ヒートシンク８６を省略した状態を示す分解平面図である。図１５（Ｂ）は、パワーコントロールユニット１８００の平面図である。 [Eighteenth embodiment]
FIGS. 15A and 15B show a power control unit 1800 according to the eighteenth embodiment. 15A is an exploded plan view showing a state in which the individual heat sink 86 is omitted from the power control unit 1800. FIG. FIG. 15B is a plan view of the power control unit 1800.
　第１８実施形態にかかるパワーコントロールユニット１８００は、第１７実施形態にかかるパワーコントロールユニット１７００に、更に変更を加えた。具体的には、取付けられた各半導体モジュール１１００の２カ所のコーナー部に切欠きＣを設けた。同様に、取付けられた各個別ヒートシンク８６の２カ所のコーナー部に切欠きＣを設けた。そして、パワーコントロールユニット１８００は、切欠きＣを設けたことにより余裕がでた分だけ、ケース８４の直径を小さくした。パワーコントロールユニット１８００のケース８４の直径は、パワーコントロールユニット１７００のケース８４の直径よりも小さい。パワーコントロールユニット１８００の他の構成は、パワーコントロールユニット１７００と同じにした。 The power control unit 1800 according to the eighteenth embodiment is further modified from the power control unit 1700 according to the seventeenth embodiment. Specifically, notches C were provided at two corners of each attached semiconductor module 1100. Similarly, notches C were provided at two corners of each individual heat sink 86 attached. In the power control unit 1800, the diameter of the case 84 is reduced by the amount of room provided by providing the notch C. The diameter of the case 84 of the power control unit 1800 is smaller than the diameter of the case 84 of the power control unit 1700. The other configuration of the power control unit 1800 is the same as that of the power control unit 1700.
　パワーコントロールユニット１８００は、半導体モジュール１１００および個別ヒートシンク８６に、それぞれ、切欠きＣを設けたため、更にケース８４の小型化、更にはパワーコントロールユニット１８００自体の小型化がはかられている。 In the power control unit 1800, since the notch C is provided in the semiconductor module 1100 and the individual heat sink 86, respectively, the case 84 and the power control unit 1800 itself are further downsized.
　［第１９実施形態］
　図１６（Ａ）、（Ｂ）に、第１９実施形態にかかるパワーコントロールユニット１９００を示す。ただし、図１６（Ａ）は、パワーコントロールユニット１９００から共通ヒートシンク８７を省略した状態を示す分解平面図である。図１９（Ｂ）は、パワーコントロールユニット１９００の平面図である。 [Nineteenth Embodiment]
FIGS. 16A and 16B show a power control unit 1900 according to the nineteenth embodiment. 16A is an exploded plan view showing a state in which the common heat sink 87 is omitted from the power control unit 1900. FIG. FIG. 19B is a plan view of the power control unit 1900.
　第１９実施形態にかかるパワーコントロールユニット１９００は、第１６実施形態にかかるパワーコントロールユニット１６００に、更に変更を加えた。すなわち、パワーコントロールユニット１６００では、各半導体モジュール１０００の上面に、それぞれ、個別ヒートシンク８５が取付けられていた。パワーコントロールユニット１９００は、これに代えて、６個の半導体モジュール１０００の上面に、ドーナツ形状の１つの共通ヒートシンク８７を取付けた。具体的には、ケース８４に複数のヒートシンク取付け孔８４ｂを形成しておき、ネジ８８を使って共通ヒートシンク８７を取付けた。なお、共通ヒートシンク８７には、予め、放熱用の複数の開口８７ａが形成されている。パワーコントロールユニット１９００の他の構成は、パワーコントロールユニット１６００と同じにした。 The power control unit 1900 according to the nineteenth embodiment is further modified from the power control unit 1600 according to the sixteenth embodiment. That is, in the power control unit 1600, the individual heat sink 85 is attached to the upper surface of each semiconductor module 1000, respectively. Instead of this, the power control unit 1900 has one donut-shaped heat sink 87 attached to the upper surface of the six semiconductor modules 1000. Specifically, a plurality of heat sink mounting holes 84 b are formed in the case 84, and the common heat sink 87 is mounted using screws 88. In the common heat sink 87, a plurality of openings 87a for heat dissipation are formed in advance. The other configuration of the power control unit 1900 is the same as that of the power control unit 1600.
　パワーコントロールユニット１９００は、ケース８４を大型化させることなく、２系統化に対応することができる。更に、パワーコントロールユニット１９００は、放熱効率が向上するとともに、半導体モジュール１０００間の熱ばらつきが低減されている。 The power control unit 1900 can support two systems without increasing the size of the case 84. Furthermore, the power control unit 1900 has improved heat dissipation efficiency and reduced thermal variations between the semiconductor modules 1000.
　以上、第１実施形態～第１５実施形態にかかる半導体モジュール１００～１５００および第１６実施形態～第１９実施形態にかかるパワーコントロールユニット１６００～１９００について説明した。しかしながら、各実施形態は、本発明の実施の形態を例示的に示したものであり、本発明が実施形態の内容に限定されることはなく、発明の趣旨に沿って種々の変更を成すことができる。また、異なる実施形態に記載された内容を組合せて実施することも可能であり、その場合の実施内容も本発明に含まれる。 The semiconductor modules 100 to 1500 according to the first to fifteenth embodiments and the power control units 1600 to 1900 according to the sixteenth to nineteenth embodiments have been described above. However, each embodiment shows an embodiment of the present invention by way of example, and the present invention is not limited to the content of the embodiment, and various modifications are made in accordance with the spirit of the invention. Can do. Moreover, it is also possible to implement combining the content described in different embodiment, and the implementation content in that case is also included in this invention.
１・・・第１の半導体スイッチング素子
２・・・第２の半導体スイッチング素子
３・・・第３の半導体スイッチング素子
４・・・接合材
１Ｌ・・・第１リード端子層
２Ｌ・・・第２リード端子層
３Ｌ・・・第３リード端子層
５１ａ、５１ｂ、５１ｃ・・・リード端子（第１リード端子層１Ｌに配置されたもの）
５２ａ、５２ｂ、５２ｃ・・・リード端子（第２リード端子層２Ｌに配置されたもの）
５３ａ、５３ｂ、５３ｃ、５３ｄ、５３ｅ、５３ｆ、５３ｇ・・・リード端子（第３リード端子層３Ｌに配置されたもの）
５２ｃ-ｈ・・・貫通孔（リード端子５２ｃに形成されたもの）
６ａ、６ｂ・・・樹脂板
７ａ、７ｂ・・・放熱板
８ａ、８ｂ・・・金属ブロック
９ａ、９ｂ・・・接続用導体
１０、２０・・・受動素子
１Ｍ・・・第１封止樹脂層
２Ｍ・・・第２封止樹脂層
１１・・・封止樹脂
Ｐ・・・Ｐ側端子
Ｎ・・・Ｎ側端子
Ｕ１、Ｕ２、Ｕ３・・・中間端子
Ｖ１、Ｖ２、Ｖ３、Ｖ４、Ｖ５、Ｖ６・・・ゲート端子
Ｓ１、Ｓ２、Ｓ３、Ｓ４、Ｓ５、Ｓ６、Ｓ７、Ｓ８、Ｓ９・・・半導体スイッチング素子ＲＳ・・・シャント抵抗
ＣＳ・・・スナバーコンデンサ
Ｔｈｍ・・・サーミスタ
ＲＧ・・・ゲート抵抗
８１ａ、８１ｂ・・・スペーサ
８２ａ、８２ｂ・・・金型
８３・・・スナバ回路
８４・・・ケース
８５、８６・・・個別ヒートシンク
８７・・・共通ヒートシンク
８８・・・ネジ
１００、２００、３００、４００、５００、６００、７００、８００、９００、１０００、１１００、１２００、１３００、１４００、１５００・・・半導体モジュール
１６００、１７００、１８００、１９００・・・パワーコントロールユニット DESCRIPTION OF SYMBOLS 1 ... 1st semiconductor switching element 2 ... 2nd semiconductor switching element 3 ... 3rd semiconductor switching element 4 ... Bonding material 1L ... 1st lead terminal layer 2L ... 1st 2 lead terminal layer 3L ... 3rd lead terminal layer 51a, 51b, 51c ... lead terminal (arranged in the 1st lead terminal layer 1L)
52a, 52b, 52c ... Lead terminals (disposed on the second lead terminal layer 2L)
53a, 53b, 53c, 53d, 53e, 53f, 53g ... Lead terminals (disposed on the third lead terminal layer 3L)
52c-h ... through hole (formed on lead terminal 52c)
6a, 6b ... Resin plates 7a, 7b ... Radiating plates 8a, 8b ... Metal blocks 9a, 9b ... Connecting conductors 10, 20 ... Passive element 1M ... First sealing resin Layer 2M ... Second sealing resin layer 11 ... Sealing resin P ... P-side terminal N ... N-side terminals U1, U2, U3 ... Intermediate terminals V1, V2, V3, V4, V5, V6 · · · gate terminals S1, S2, S3, S4, S5, S6, S7, S8, S9 ··· semiconductor switching element R S · · · shunt resistor C S · · · snubber capacitor Thm · · · thermistor RG: Gate resistors 81a, 81b ... Spacers 82a, 82b ... Mold 83 ... Snubber circuit 84 ... Case 85, 86 ... Individual heat sink 87 ... Common heat sink 88 ...・ Screw 100, 200, 300, 400, 00,600,700,800,900,1000,1100,1200,1300,1400,1500 ... semiconductor module 1600,1700,1800,1900 ... power control unit

Claims (20)

  1. 　複数の半導体スイッチング素子と、少なくとも１つの受動素子とが、それぞれリード端子に接合されたうえで、封止樹脂に封止された半導体モジュールであって、
    　前記リード端子は、前記封止樹脂内において、少なくとも、第１リード端子層と、第２リード端子層と、第３リード端子層との３層に分けて配置され、
    　前記封止樹脂は、少なくとも、前記第１リード端子層と前記第２リード端子層とに挟まれた第１封止樹脂層と、前記第２リード端子層と前記第３リード端子層とに挟まれた第２封止樹脂層とを有し、
    　前記半導体スイッチング素子は、両主面を有し、一方の主面に信号電極パッドと一方の電源電極パッドとが形成され、他方の主面に他方の電源電極パッドが形成され、
    　前記第２リード端子層に配置された１つの前記リード端子は、両主面を有し、一方の主面に、第１の前記半導体スイッチング素子の他方の前記電源電極パッドが接合され、他方の主面に、金属ブロックを介して第２の前記半導体スイッチング素子の一方の前記電源電極パッドが接合され、
    　第１の前記半導体スイッチング素子の一方の前記電源電極パッドは、金属ブロックを介して前記第１リード端子層に配置された前記リード端子に接合され、第１の前記半導体スイッチング素子の前記信号電極パッドは、接続用導体を介して前記第２リード端子層に配置された前記リード端子に接続され、
    　第２の前記半導体スイッチング素子の他方の前記電源電極パッドは、前記第３リード端子層に配置された前記リード端子に接合され、第２の前記半導体スイッチング素子の前記信号電極パッドは、接続用導体を介して前記第３リード端子層に配置された前記リード端子に接続され、
    　少なくとも１つの前記受動素子が前記第１封止樹脂層に封止され、かつ／または、少なくとも１つの前記受動素子が前記第２封止樹脂層に封止され、
    　前記第１封止樹脂層に封止された前記受動素子のうち最も大きな高さを有するものの高さが、第１の前記半導体スイッチング素子の高さと、第１の前記半導体スイッチング素子の一方の前記電源電極パッドに接合された前記金属ブロックの高さの合計よりも小さく、かつ／または、前記第２封止樹脂層に封止された前記受動素子のうち最も大きな高さを有するものの高さが、第２の前記半導体スイッチング素子の高さと、第２の前記半導体スイッチング素子の一方の前記電源電極パッドに接合された前記金属ブロックの高さの合計よりも小さい半導体モジュール。     A plurality of semiconductor switching elements and at least one passive element are each bonded to a lead terminal and then sealed with a sealing resin,
    The lead terminal is arranged in at least three layers of the first lead terminal layer, the second lead terminal layer, and the third lead terminal layer in the sealing resin,
    The sealing resin is sandwiched between at least a first sealing resin layer sandwiched between the first lead terminal layer and the second lead terminal layer, and the second lead terminal layer and the third lead terminal layer. A second sealing resin layer,
    The semiconductor switching element has both main surfaces, a signal electrode pad and one power electrode pad are formed on one main surface, and the other power electrode pad is formed on the other main surface,
    One lead terminal arranged in the second lead terminal layer has both main surfaces, and the other power source electrode pad of the first semiconductor switching element is joined to one main surface, The power electrode pad of one of the second semiconductor switching elements is bonded to the main surface via a metal block,
    One power supply electrode pad of the first semiconductor switching element is joined to the lead terminal disposed in the first lead terminal layer via a metal block, and the signal electrode pad of the first semiconductor switching element Is connected to the lead terminal disposed in the second lead terminal layer via a connecting conductor,
    The other power supply electrode pad of the second semiconductor switching element is joined to the lead terminal disposed in the third lead terminal layer, and the signal electrode pad of the second semiconductor switching element is a connection conductor. Connected to the lead terminal disposed in the third lead terminal layer via,
    At least one of the passive elements is sealed in the first sealing resin layer and / or at least one of the passive elements is sealed in the second sealing resin layer;
    Among the passive elements sealed in the first sealing resin layer, the height of the passive element having the largest height is the height of the first semiconductor switching element and one of the first semiconductor switching elements. The height of the passive element sealed in the second sealing resin layer is smaller than the total height of the metal blocks bonded to the power electrode pad and / or has the largest height. A semiconductor module smaller than the sum of the height of the second semiconductor switching element and the height of the metal block joined to one of the power electrode pads of the second semiconductor switching element.
  2. 　複数の半導体スイッチング素子と、少なくとも１つの受動素子とが、それぞれリード端子に接合されたうえで、封止樹脂に封止された半導体モジュールであって、
    　前記リード端子は、前記封止樹脂内において、少なくとも、第１リード端子層と、第２　リード端子層と、第３リード端子層との３層に分けて配置され、
    　前記封止樹脂は、少なくとも、前記第１リード端子層と前記第２リード端子層とに挟まれた第１封止樹脂層と、前記第２リード端子層と前記第３リード端子層とに挟まれた第２封止樹脂層とを有し、
    　前記半導体スイッチング素子は、両主面を有し、一方の主面に信号電極パッドと一方の電源電極パッドとが形成され、他方の主面に他方の電源電極パッドが形成され、
    　前記第２リード端子層に配置された１つの前記リード端子は、両主面を有し、一方の主面に、第１の前記半導体スイッチング素子の他方の前記電源電極パッドが接合され、他方の主面に、金属ブロックを介して第２の前記半導体スイッチング素子の一方の前記電源電極パッドが接合され、
    　第１の前記半導体スイッチング素子の一方の前記電源電極パッドは、金属ブロックを介して前記第１リード端子層に配置された前記リード端子に接合され、第１の前記半導体スイッチング素子の前記信号電極パッドは、接続用導体を介して前記第２リード端子層に配置された前記リード端子に接続され、第２の前記半導体スイッチング素子の他方の前記電源電極パッドは、前記第３リード端子層に配置された前記リード端子に接合され、第２の前記半導体スイッチング素子の前記信号電極パッドは、接続用導体を介して前記第３リード端子層に配置された前記リード端子に接続され、
    　少なくとも１つの前記受動素子が、前記第１リード端子層または前記第３リード端子層に配置された前記リード端子に接合されたうえ、前記第２リード端子層を貫いて、前記第１封止樹脂層および前記第２封止樹脂層に亘って封止され、
    　封止された前記受動素子のうち最も大きな高さを有するものの高さが、第１の前記半導体スイッチング素子の高さと、第１の前記半導体スイッチング素子の一方の前記電源電極パッドに接合された前記金属ブロックの高さと、前記第２リード端子層に配置された前記リード端子の厚さと、第２の前記半導体スイッチング素子の高さと、第２の前記半導体スイッチング素子の一方の前記電源電極パッドに接合された前記金属ブロックの高さの合計よりも小さい半導体モジュール。     A plurality of semiconductor switching elements and at least one passive element are each bonded to a lead terminal and then sealed with a sealing resin,
    The lead terminal is arranged in three layers of at least a first lead terminal layer, a second lead terminal layer, and a third lead terminal layer in the sealing resin,
    The sealing resin is sandwiched between at least a first sealing resin layer sandwiched between the first lead terminal layer and the second lead terminal layer, and the second lead terminal layer and the third lead terminal layer. A second sealing resin layer,
    The semiconductor switching element has both main surfaces, a signal electrode pad and one power electrode pad are formed on one main surface, and the other power electrode pad is formed on the other main surface,
    One lead terminal arranged in the second lead terminal layer has both main surfaces, and the other power source electrode pad of the first semiconductor switching element is joined to one main surface, The power electrode pad of one of the second semiconductor switching elements is bonded to the main surface via a metal block,
    One power supply electrode pad of the first semiconductor switching element is joined to the lead terminal disposed in the first lead terminal layer via a metal block, and the signal electrode pad of the first semiconductor switching element Is connected to the lead terminal arranged in the second lead terminal layer via a connecting conductor, and the other power electrode pad of the second semiconductor switching element is arranged in the third lead terminal layer. The signal electrode pad of the second semiconductor switching element is connected to the lead terminal disposed in the third lead terminal layer via a connection conductor;
    At least one of the passive elements is bonded to the lead terminal disposed on the first lead terminal layer or the third lead terminal layer, and passes through the second lead terminal layer, so that the first sealing resin Sealing over the layer and the second sealing resin layer,
    The height of the encapsulated passive element having the largest height is the height of the first semiconductor switching element and the power electrode pad of one of the first semiconductor switching elements. Bonded to the height of the metal block, the thickness of the lead terminal disposed in the second lead terminal layer, the height of the second semiconductor switching element, and one of the power electrode pads of the second semiconductor switching element A semiconductor module smaller than the total height of the metal blocks.
  3. 　第３の半導体スイッチング素子をさらに備え、
    　前記受動素子は、前記第１封止樹脂層に封止されるか、または、前記第２封止樹脂層に封止されており、
    　第３の前記半導体スイッチング素子は、前記受動素子が前記第１封止樹脂層に封止された場合には前記第２封止樹脂層に封止され、前記受動素子が前記第２封止樹脂層に封止された場合には前記第１封止樹脂層に封止されている、請求項１に記載された半導体モジュール。     A third semiconductor switching element;
    The passive element is sealed in the first sealing resin layer or sealed in the second sealing resin layer,
    When the passive element is sealed in the first sealing resin layer, the third semiconductor switching element is sealed in the second sealing resin layer, and the passive element is the second sealing resin. The semiconductor module according to claim 1, wherein when sealed in a layer, the semiconductor module is sealed in the first sealing resin layer.
  4. 　前記封止樹脂層を垂直方向に透視したとき、
    　第１の前記半導体スイッチング素子と第２の前記半導体スイッチング素子とが完全には重なっていない、請求項１に記載された半導体モジュール。     When the sealing resin layer is seen through in the vertical direction,
    The semiconductor module according to claim 1, wherein the first semiconductor switching element and the second semiconductor switching element do not completely overlap.
  5. 　前記半導体スイッチング素子を含む電源回路の構成要素である前記受動素子が、前記第１リード端子層または前記第３リード端子層に配置された前記リード端子に接合されている、請求項１、３、４のいずれか１項に記載された半導体モジュール。 The said passive element which is a component of the power supply circuit containing the said semiconductor switching element is joined to the said lead terminal arrange | positioned at the said 1st lead terminal layer or the said 3rd lead terminal layer, 5. The semiconductor module described in any one of 4.
  6. 　前記封止樹脂の線膨張率が、前記半導体モジュールを構成する前記半導体スイッチング素子、前記受動素子、前記リード端子、前記金属ブロック、前記接続用導体のそれぞれの線熱膨張率のうち、最も大きい線膨張率と、最も小さい線膨張率の中間の値である、請求項１ないし５のいずれか１項に記載された半導体モジュール。 The linear expansion coefficient of the sealing resin is the largest line among the linear thermal expansion coefficients of the semiconductor switching element, the passive element, the lead terminal, the metal block, and the connecting conductor constituting the semiconductor module. 6. The semiconductor module according to claim 1, wherein the semiconductor module has an intermediate value between an expansion coefficient and a smallest linear expansion coefficient.
  7. 　前記受動素子が検出素子である、請求項１ないし６のいずれか１項に記載された半導体モジュール。 The semiconductor module according to claim 1, wherein the passive element is a detection element.
  8. 　前記検出素子が、シャント抵抗素子、および／または、サーミスタ素子である、請求項７に記載された半導体モジュール。 The semiconductor module according to claim 7, wherein the detection element is a shunt resistance element and / or a thermistor element.
  9. 　更に、セラミックス板を備え、前記リード端子が、少なくとも、セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金を介して、前記セラミックス基板に取付けられた、請求項１ないし８のいずれか１項に記載された半導体モジュール。 Furthermore, it provided with the ceramic board, and the said lead terminal was attached to the said ceramic substrate through the alloy containing the active metal which reacts with the structural component of ceramics, Ag, and Cu at least. 9. The semiconductor module described in any one of 8 above.
  10. 　更に、熱硬化性の樹脂板を備え、前記リード端子が、接着剤を介することなく直接に前記樹脂板に取付けられた、請求項１ないし８のいずれか１項に記載された半導体モジュール。 The semiconductor module according to claim 1, further comprising a thermosetting resin plate, wherein the lead terminal is directly attached to the resin plate without using an adhesive.
  11. 　更に、前記封止樹脂の表面から露出した放熱板を備え、前記放熱板の外周縁が、前記封止樹脂の内部に埋め込まれた、請求項１ないし１０のいずれか１項に記載された半導体モジュール。 11. The semiconductor according to claim 1, further comprising a heat dissipation plate exposed from the surface of the sealing resin, wherein an outer peripheral edge of the heat dissipation plate is embedded in the sealing resin. module.
  12. 　前記第２リード端子層に配置された前記リード端子の厚みが、前記第１リード端子層に配置された前記リード端子および前記第３リード端子層に配置された前記リード端子の厚みよりも大きい、請求項１ないし１１のいずれか１項に記載された半導体モジュール。 The thickness of the lead terminal arranged in the second lead terminal layer is larger than the thickness of the lead terminal arranged in the first lead terminal layer and the lead terminal arranged in the third lead terminal layer, The semiconductor module according to claim 1.
  13. 　前記半導体スイッチング素子と並列にスナバ回路が接続された、請求項１ないし１２のいずれか１項に記載された半導体モジュール。 The semiconductor module according to claim 1, wherein a snubber circuit is connected in parallel with the semiconductor switching element.
  14. 　Ｐ側端子と、Ｎ側端子と、中間端子と、２個の前記半導体スイッチング素子と、前記受動素子としてシャント抵抗素子とを備え、
    　前記Ｐ側端子に、１個の前記半導体スイッチング素子のドレインが接続され、当該半導体スイッチング素子のソースに、もう１個の前記半導体スイッチング素子のドレインが接続され、当該半導体スイッチング素子のソースに、前記シャント抵抗素子の一端が接続され、当該シャント抵抗素子の他端に前記Ｎ側端子が接続されるとともに、
    　２個の前記半導体スイッチング素子の接続点に、中間端子が接続された等価回路を備えた、請求項１、２、４、５、６、７、８、９、１０、１１、１２、１３のいずれか１項に記載された半導体モジュール。     A P-side terminal, an N-side terminal, an intermediate terminal, two semiconductor switching elements, and a shunt resistor element as the passive element,
    The drain of one of the semiconductor switching elements is connected to the P-side terminal, the drain of the other semiconductor switching element is connected to the source of the semiconductor switching element, and the source of the semiconductor switching element is connected to the source of the semiconductor switching element. One end of the shunt resistor element is connected, and the N-side terminal is connected to the other end of the shunt resistor element,
    An equivalent circuit in which an intermediate terminal is connected to a connection point of the two semiconductor switching elements is provided, according to claim 1, 2, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13. The semiconductor module described in any one item | term.
  15. 　Ｐ側端子と、Ｎ側端子と、中間端子と、３個の前記半導体スイッチング素子と、前記受動素子としてシャント抵抗素子とを備え、
    　前記Ｐ側端子に、１個の前記半導体スイッチング素子のドレインが接続され、当該半導体スイッチング素子のソースに、もう１個の前記半導体スイッチング素子のドレインが接続され、当該半導体スイッチング素子のソースに、前記シャント抵抗素子の一端が接続され、当該シャント抵抗素子の他端に前記Ｎ側端子が接続されるとともに、
    　２個の前記半導体スイッチング素子の接続点に、残りの１個の前記半導体スイッチング素子のソースが接続され、当該半導体スイッチング素子のドレインに中間端子が接続された等価回路を備えた、請求項３、５、６、７、８、９、１０、１１、１２、１３のいずれか１項に記載された半導体モジュール。     A P-side terminal, an N-side terminal, an intermediate terminal, three semiconductor switching elements, and a shunt resistor element as the passive element,
    The drain of one of the semiconductor switching elements is connected to the P-side terminal, the drain of the other semiconductor switching element is connected to the source of the semiconductor switching element, and the source of the semiconductor switching element is connected to the source of the semiconductor switching element. One end of the shunt resistor element is connected, and the N-side terminal is connected to the other end of the shunt resistor element,
    4. An equivalent circuit in which a source of the remaining one semiconductor switching element is connected to a connection point of the two semiconductor switching elements, and an intermediate terminal is connected to a drain of the semiconductor switching element. The semiconductor module described in any one of 5, 6, 7, 8, 9, 10, 11, 12, and 13.
  16. 　Ｐ側端子と、Ｎ側端子と、３個の中間端子とを備え、
    　前記Ｐ側端子と前記Ｎ側端子との間に、請求項１４に記載された半導体モジュール、または、請求項１５に記載された半導体モジュールが、３個、並列に接続された半導体モジュール。     A P-side terminal, an N-side terminal, and three intermediate terminals;
    A semiconductor module in which three semiconductor modules according to claim 14 or three semiconductor modules according to claim 15 are connected in parallel between the P-side terminal and the N-side terminal.
  17. 　前記半導体モジュールがインバータの電力変換部を構成している、請求項１ないし１６のいずれか１項に記載された半導体モジュール。 The semiconductor module according to any one of claims 1 to 16, wherein the semiconductor module constitutes a power conversion unit of an inverter.
  18. 　ケースに、請求項１ないし１７のいずれか１項に記載された前記半導体モジュールが、複数個、同心円状に取付けられたパワーコントロールユニット。 A power control unit in which a plurality of the semiconductor modules according to any one of claims 1 to 17 are concentrically attached to a case.
  19. 　ケースに、請求項１ないし１７のいずれか１項に記載された前記半導体モジュールが、２個、対向して取付けられたパワーコントロールユニット。 A power control unit in which two semiconductor modules according to any one of claims 1 to 17 are attached to a case so as to face each other.
  20. 　複数の前記半導体モジュールの上側主面に、それぞれ個別ヒートシンクが取付けられた、または、１つの共通ヒートシンクが取付けられた、請求項１８または１９に記載されたパワーコントロールユニット。
          The power control unit according to claim 18 or 19, wherein an individual heat sink is attached to each of the upper main surfaces of the plurality of semiconductor modules, or one common heat sink is attached.
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