WO2016110000A1 - 单板掉电重启的调整方法、装置及*** - Google Patents

单板掉电重启的调整方法、装置及*** Download PDF

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Publication number
WO2016110000A1
WO2016110000A1 PCT/CN2015/073279 CN2015073279W WO2016110000A1 WO 2016110000 A1 WO2016110000 A1 WO 2016110000A1 CN 2015073279 W CN2015073279 W CN 2015073279W WO 2016110000 A1 WO2016110000 A1 WO 2016110000A1
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power
board
level
signal
state
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PCT/CN2015/073279
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English (en)
French (fr)
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田海东
吴清政
朱宝旺
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中兴通讯股份有限公司
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Publication of WO2016110000A1 publication Critical patent/WO2016110000A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means

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  • the present invention relates to the field of communications, and in particular, to a method, an apparatus, and a system for adjusting a power failure of a board.
  • the communication device boards are often integrated with chips such as network cards or Serial Attached SCSI (SAS) controllers. These chips have an external memory for storing firmware.
  • the chip loads firmware every time it is powered on. In order to work properly.
  • EPLD electrically programmable logic device
  • the firmware needs to be loaded once at power-on to enable related functions.
  • these firmwares have a certain probability of exposing potential defects, which needs to be solved by updating the firmware version online. After the firmware update is complete, as mentioned above, the board needs to be powered off and restarted. After the chip is powered on again and the firmware is loaded again, the board related functions can be restored.
  • Watchdog reset trigger The software is out of control and triggers the hardware watchdog reset. After reaching a certain number of resets, the board is powered down and restarted by controlling the power input switch.
  • the convenience and speed of the subsequent maintenance of the board is a problem that every board designer must consider. When repairing, try to avoid manual on-site operation, not affect other boards, and solve problems as needed.
  • the point maintenance feature is a single board design that conforms to the trend of technology development.
  • the current implementation of several methods for powering off the board has the following disadvantages:
  • Watchdog reset trigger The device needs to provide a separate hardware watchdog circuit, and it depends on the software to lose control and cause the hardware watchdog to reset multiple times to trigger the power-down restart. The device cannot actively trigger according to the need.
  • Remotely operate the power supply board Remotely operate the power supply board to remotely power off the main power supply.
  • the main power supply of the power supply board will supply power to multiple boards in the chassis, so that the main power supply is powered off. It will affect other boards that are running normally.
  • the present invention provides a method, an apparatus and a system for adjusting a power failure restart of a single board to solve at least one of the above problems in the related art.
  • a method for adjusting a power-down restart of a board includes: detecting level change information of a power-down indication signal of the board, wherein the power-down indication signal is used to enable the The power-off operation of the board, and the power-down indication signal is inactive at a low level, and the high level is valid; when the power-down indication signal is detected to be switched from a low level to a high level, the board is triggered. After the power-down process is performed, when the power-down indication signal is detected to be switched from a high level to a low level, the restart operation of the board is triggered.
  • triggering the power-off operation on the board includes: triggering a power control signal of the board to be switched from a high-on state to a low-level shutdown state, wherein the high-level state is used for The power supply that triggers the board is powered on, and the low-level shutdown state is used to trigger the power supply to perform power-down processing on the board; triggering a restart operation on the board
  • the method includes: triggering the power control signal to be switched from the low level off state to the high level on state.
  • the method before triggering the restarting operation on the board, the method includes: delaying a signal for indicating the high level on state.
  • an apparatus for adjusting a power-down restart of a board includes: a detecting module configured to detect level change information of a power-down indication signal of the board, wherein the power-down indication signal The power-off operation of the board is enabled, and the power-down indication signal is inactive at a low level and is active at a high level; the first triggering module is configured to detect that the power-down indication signal is low-powered When the switch is switched to a high level, the power-off operation of the board is triggered; and the second trigger module is configured to perform a power-down process, and when detecting that the power-down indication signal is switched from a high level to a low level, Triggering a restart operation on the board.
  • the first triggering module is further configured to trigger a power control signal of the single board to be switched from a high level on state to a low level off state, wherein the high level on state is used to trigger the The power supply of the board is powered on, and the low-level shutdown state is used to trigger the power supply to power down the board.
  • the second trigger module is further configured to trigger the power control signal to be switched from the low level off state to the high level on state.
  • the apparatus further comprises: a delay module configured to delay processing the signal for indicating the high level on state.
  • a board power-down restart adjustment system includes: a control unit configured to detect level change information of a power-down indication signal state of the board, where the When the power-down indication signal is switched from the low level to the high level, generating a first signal for triggering a power-down operation on the board, and after performing the power-down processing, detecting the power-down indication signal by When the high level is switched to a low level, generating a second signal for triggering a restart operation on the board; wherein the power down indication signal is used to enable a power down operation of the board, and the The power-down indication signal is inactive at a low level and is active at a high level; the switch module is configured to receive the first signal and the second signal, and perform a pairing according to the first signal and the second signal respectively The power-down operation of the board or the restart operation of the board.
  • the system further comprises: an inverter connected to the control unit, configured to receive the level change information of the control unit; the inverter further configured to receive the level When the change information is changed from a low level to a high level, generating a third signal for switching a high level on state of the power supply control signal of the board to a low level off state; and for performing After the electrical processing, when it is determined that the level change information is switched from a high level to a low level, the low level off state is switched to the high level on state fourth signal.
  • an inverter connected to the control unit, configured to receive the level change information of the control unit
  • the inverter further configured to receive the level When the change information is changed from a low level to a high level, generating a third signal for switching a high level on state of the power supply control signal of the board to a low level off state; and for performing After the electrical processing, when it is determined that the level change information is switched from a high level to a low level, the low level off state is switched to the high
  • system further comprises: a timing adjuster coupled to said inverter, configured to receive said third signal and said fourth signal transmitted by said inverter, and said third The signal and the fourth information after the delay processing are sent to the switch module.
  • a timing adjuster coupled to said inverter, configured to receive said third signal and said fourth signal transmitted by said inverter, and said third The signal and the fourth information after the delay processing are sent to the switch module.
  • the time of the delay processing is the time when the capacitor connected to the timing regulator is fully charged.
  • the level change information of the power-down indication signal of the board is detected, wherein the power-down indication signal is used to enable the power-down operation of the board, and the power-down indication signal is low-level, high level.
  • the power-down indication signal is used to enable the power-down operation of the board, and the power-down indication signal is low-level, high level.
  • the power-down indication signal is detected to be switched from low level to high level, the power-off operation of the board is triggered; after the power-down processing is executed, when the power-down indication signal is detected to be switched from the high level to the low level , triggers the restart of the board.
  • FIG. 1 is a flowchart of a method for adjusting a power failure restart of a board according to an embodiment of the present invention
  • FIG. 2 is a structural block diagram of an apparatus for adjusting a power failure of a board according to an embodiment of the present invention
  • FIG. 3 is a structural block diagram (1) of an adjusting device for powering down and restarting a board according to an embodiment of the present invention
  • FIG. 4 is a structural block diagram of an adjustment system for a power failure restart of a board according to an embodiment of the present invention
  • FIG. 5 is a structural block diagram (1) of an adjustment system for a power failure restart of a board according to an embodiment of the present invention
  • FIG. 6 is a structural block diagram (2) of an adjustment system for a power failure restart of a board according to an embodiment of the present invention
  • FIG. 7 is a flow chart of an automatic power down restart method according to an embodiment of the present invention.
  • FIG. 8 is a timing diagram of control and power supply in accordance with an embodiment of the present invention.
  • FIG. 9 is a schematic diagram showing the composition of an automatic power-off reset device according to an embodiment of the present invention.
  • FIG. 1 is a flowchart of a method for adjusting a power-off restart of a board according to an embodiment of the present invention. As shown in FIG. 1 , the process includes the following steps. :
  • Step S102 detecting level change information of the power-down indication signal of the board, wherein the power-down indication signal is used to enable the power-down operation of the board, and the power-down indication signal is low level and the high level is valid;
  • Step S104 triggering a power-down operation on the board when detecting that the power-down indication signal is switched from a low level to a high level;
  • Step S106 after performing the power-down processing, triggering a restart operation on the board when detecting that the power-down indication signal is switched from a high level to a low level.
  • the power-down or restart of the board is adjusted according to the level change information of the power-down indication signal, and when the power-down indication signal is detected to be switched from the low level to the high level, the power-off operation of the board is triggered and executed.
  • the restart operation of the board is triggered.
  • step S104 the power-off operation of the triggering of the board is triggered.
  • the power control signal of the triggering board is switched from the high-on state to the low-level shutdown state, wherein the high level The power-on state is used to trigger the power supply of the board to perform power-on processing on the board.
  • the low-level power-off state is used to trigger the power supply to perform power-down processing on the board.
  • the step S104 also involves triggering the board.
  • the restart operation in an alternative embodiment, the trigger power control signal is switched from the low level off state to the high level on state.
  • the signal for indicating the high-on state is delayed until the restart operation of the board is triggered.
  • an apparatus for adjusting the power failure of the board is also provided.
  • the apparatus is used to implement the foregoing embodiments and the preferred embodiments, and details are not described herein.
  • the term "module” may implement a combination of software and/or hardware of a predetermined function.
  • the apparatus described in the following embodiments is preferably implemented in software, hardware, or a combination of software and hardware, is also possible and contemplated.
  • the apparatus includes: a detecting module 22 configured to detect level change information of a power-down indication signal of a board.
  • the power-off indication signal is used to enable the power-down operation of the board, and the power-down indication signal is low-level invalid, and the high level is valid;
  • the first triggering module 24 is configured to detect that the power-down indication signal is When the low level is switched to the high level, the power-off operation of the board is triggered;
  • the second trigger module 26 is set to perform the power-down processing, and is triggered when the power-down indication signal is detected to be switched from the high level to the low level. Restart the board.
  • the first triggering module 24 is further configured to trigger the power control signal of the board to be switched from a high-on state to a low-level shutdown state, wherein the high-level state is used to trigger the power of the board. Powering on the board, the low-level shutdown state is used to trigger the power supply to perform power-down processing on the board; and the second trigger module 26 is further configured to trigger the power control signal to be turned off by the low level. Switch to this high level on state.
  • FIG. 3 is a structural block diagram (1) of an apparatus for adjusting a power failure of a board according to an embodiment of the present invention. As shown in FIG. 3, the apparatus further includes: a delay module 32, configured to indicate the high power The signal in the flat open state is delayed.
  • FIG. 4 is a structural block diagram of an adjustment system for power-down restart of a board according to an embodiment of the present invention. As shown in FIG. 4, the system includes: a control unit 42 configured to detect a level change of a power-down indication signal state of the board.
  • the information when detecting that the power-down indication signal is switched from a low level to a high level, generating a first signal for triggering a power-down operation on the board, and detecting the falling after performing the power-down processing
  • the second signal is generated to trigger the restart operation on the board; wherein the power down indication signal is used to enable the power down operation of the board, and the The power-down indication signal is inactive at a low level, and is active at a high level;
  • the switch module 44 is configured to receive the first signal and the second signal, and perform performing on the single board according to the first signal and the second signal respectively. Power-off operation or restart operation of the board.
  • FIG. 5 is a structural block diagram (1) of an adjustment system for power-down restart of a board according to an embodiment of the present invention.
  • the system further includes an inverter 52 connected to the control unit 42 and configured to receive control.
  • the level change information of the unit; the inverter 52 is further configured to generate a high power for the power control signal of the board when the received level change information is changed from a low level to a high level a third signal in which the flat open state is switched to the low-level off state; and is used to turn off the low level after determining that the level change information is switched from the high level to the low level after performing the power-down processing
  • the state is switched to a high level on state fourth signal.
  • FIG. 6 is a structural block diagram (2) of an adjustment system for a power failure restart of a single board according to an embodiment of the present invention.
  • the system further includes a timing adjuster 62 connected to the inverter 52 and configured to receive The third signal and the fourth signal sent by the inverter 52 are sent to the switch module by the third signal and the fourth information subjected to the delay processing.
  • the time of the delay processing is the time when the capacitor connected to the timing regulator is fully charged.
  • each of the above modules may be implemented by software or hardware.
  • the foregoing may be implemented by, but not limited to, the foregoing modules are all located in the same processor; or, the above modules are respectively located.
  • the first processor, the second processor, and the third processor In the first processor, the second processor, and the third processor.
  • a switch is connected in the power input path, and the switch is used to control the presence or absence of the power input of the single board, and the two circuit characteristics are utilized to implement the specific power-down restart function:
  • the high-level signal outputted by the chip automatically changes to low level with the power-off of the chip power supply, thereby defining an active-high power-down indication signal to control the automatic switching between power-down and restart states.
  • the delay characteristic of the timing regulator is used to control the time when the switch is turned off to provide sufficient power-down time to ensure that all power supplies of the board are fully powered down.
  • the management unit first initiates a power-down restart operation, and switches the low-level power-down indication signal that is inactive during normal operation to an active high level; the inverter detects that the power-down indication signal becomes valid, and then sends the timing adjustment.
  • the power control signal of the device is switched from the high-on state to the low-level shutdown state, and the timing regulator immediately turns off the switch to power down the board; after the power is turned off, the power-down indication signal is discharged with the power supply. Automatically changes from the active high state to the low active state; when the inverter detects that the power down indication signal is low, the power control signal is sent to the timing regulator, and is turned off by the low state. Switching to the high level on state, the timing regulator completes the delay processing and then turns on the switch to restart the board.
  • the switch string is used in the power input path of the board to control the presence or absence of the power used by the single-board function circuit.
  • the power output after the switch is output through the power conversion circuit to generate various power supplies for the single-board function circuit, including the management unit. power supply.
  • the inverter is set to detect the state of the power down indication signal, and then generate a power control signal to the timing controller.
  • the timing regulator actually turns off or turns on the switch based on the state of the power control signal sent from the inverter. Once the power control signal goes low, the timing regulator immediately turns off the switch, and the board is powered down.
  • the timing regulator does not delay processing during the turn-off of the switch; but when the inverter sends the power control signal After the high level is turned on, the timing regulator does not immediately turn on the switch, but first performs delay processing, that is, first charges the externally connected charging capacitor. After the capacitor is charged, the control switch is turned on to allow the board to restart.
  • the delay regulator Before the delay regulator performs the delay processing, it must ensure that the externally connected charging capacitor has been completely discharged. Otherwise, if the capacitor has residual power, the recharging time will be shortened, thus reducing the required delay time. Since the charging capacitor has a larger capacitance value and a longer charging time when the charging current is constant, the delay time can be set by adjusting the capacitance of the external charging capacitor.
  • the device further needs to cooperate with the management unit, and the management unit is responsible for confirming that the firmware update has been completed, and then initiates a power-down restart operation, and switches the low-level power-down indication signal during normal operation to an active high level.
  • the post-management unit should keep the power-down indication signal high until the board is powered down. After the power is turned off, the power-down indication signal automatically goes low because there is no drive source.
  • FIG. 7 is a flowchart of an automatic power-down restart method according to an embodiment of the present invention. As shown in FIG. 7, the method includes the following steps:
  • Step S702 When the board needs to update the firmware, the management unit is responsible for monitoring the update status of the firmware. Once the firmware update is completed, the board needs to be powered on again to enable the related function, and the low level during normal operation is invalid. The power down indication signal is switched to active high, and FIG. 8 is a timing diagram of control and power supply in accordance with an embodiment of the present invention.
  • Step S704 after the inverter detects that the power-down indication signal becomes valid, the power control signal that is sent to the SETF pin of the timing regulator is switched from the high-on state to the low-level shutdown state. Once the SETV pin signal goes low, the timing regulator will directly drive the GATE pin signal level to low, the switch is immediately turned off, the power input is turned off, and the board is powered down.
  • Step S706 After the board is powered off, the power-down indication signal sent by the management unit automatically changes from the high-level active state to the low-level invalid state, and the automatic change process of the power-down indication signal state is referenced. 8.
  • Step S708 when the inverter detects that the power-down indication signal has become invalid, the power control signal that is sent to the timing regulator SETV pin is switched from the low-level off state to the high-level on state.
  • the SETV pin signal goes high, the timing regulator does not immediately drive the GATE pin signal to go high. Instead, it performs delay processing first, that is, charging the external charging capacitor. After the capacitor charging is completed, The GATE pin signal is turned high to turn on the switch, and the board is restarted. After the board is powered on again, the related firmware is reloaded.
  • FIG. 9 is a schematic diagram of the composition of an automatic power-down restart device according to an embodiment of the present invention.
  • the switch mainly includes a switch, an inverter, and a timing adjuster.
  • the switch uses an N-type MOS tube, which is set to control the presence or absence of the power supply used by the functional power supply.
  • the MOS transistor When the MOS transistor is selected, the overcurrent and overvoltage capability of the MOS transistor needs to meet the power supply requirement.
  • the control terminal of the MOS transistor is connected to the GATE pin of the timing regulator, and it is necessary to ensure that the turn-on level of the MOS transistor is within the support range of the GATE pin.
  • the inverter can select a dedicated non-gate device to realize the function of logic fetching, and is set to turn off the power-down control signal of the high-level power-down indication signal to a low level; The signal is converted to a high level to turn on the power control signal.
  • the timing regulator uses a timing regulator from Analog Devices, Inc., model ADM6820, which is set to delay processing and generate control signals for the switches.
  • the SETV pin of the timing regulator will immediately after receiving the power-off indication signal.
  • the GATE pin is driven low to turn off the switch. At this time, no delay processing is performed.
  • the timing regulator first performs delay processing, first charging the external capacitor through the SETD, and charging the capacitor. After the completion, the GATE pin is driven high to turn on the switch.
  • the length of the delay processing is directly related to the capacitance of the charging capacitor connected to the SETD pin of the timing regulator. The delay length is adjusted by selecting capacitors of different capacities.
  • the related management unit is the functional unit responsible for board management on the board.
  • the management unit monitors the update status of the firmware. When it is confirmed that the firmware update has been completed, it is responsible for issuing a high-level power-down indication signal. After that, the management unit must keep the power-down indication signal high until the board is powered off, and the power is powered off. After that, since there is no drive source, the power-down indication signal automatically goes low.
  • the automatic power-off and restart method and device of the present invention eliminates the need for manual field operation and does not affect other boards of the shared power supply, and the management unit can actively trigger the power-down restart as needed, completely avoiding the existing
  • the shortcomings of the technology provide a convenient power-down restart solution for the board to update the firmware online, which reduces the operation time and cost of the board maintenance.
  • a storage medium is further provided, wherein the software includes the above-mentioned software, including but not limited to: an optical disk, a floppy disk, a hard disk, an erasable memory, and the like.
  • modules or steps of the present invention described above can be implemented by a general-purpose computing device that can be centralized on a single computing device or distributed across a network of multiple computing devices. Alternatively, they may be implemented by program code executable by the computing device such that they may be stored in the storage device by the computing device and, in some cases, may be different from the order herein.
  • the steps shown or described are performed, or they are separately fabricated into individual integrated circuit modules, or a plurality of modules or steps thereof are fabricated as a single integrated circuit module.
  • the invention is not limited to any specific combination of hardware and software.
  • the above embodiments and the preferred embodiments solve the problems in the related art when the plug-in board is used, the remote operation power board, and the watchdog reset trigger power-off restart, thereby achieving flexible adjustment of the single according to requirements.

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Abstract

本发明公开了一种单板掉电重启的调整方法、装置及***，其中，该方法包括：检测单板的掉电指示信号的电平变化信息，其中，掉电指示信号用于使能单板的掉电操作，且掉电指示信号为低电平无效，高电平有效；在检测到掉电指示信号由低电平切换为高电平时，触发对单板的掉电操作；执行掉电处理后，在检测到掉电指示信号由高电平切换为低电平时，触发对单板的重启操作。通过本发明解决了相关技术中使用拔插单板、远程操作电源板和看门狗复位触发掉电重启时存在的问题，进而达到了根据需要灵活调整单板的掉电重启的效果。

Description

单板掉电重启的调整方法、装置及*** 技术领域
本发明涉及通信领域，具体而言，涉及单板掉电重启的调整方法、装置及***。
背景技术
通讯设备单板往往集成有网卡或串行SCSI技术(Serial Attached SCSI，简称为SAS)控制器等芯片，这些芯片都有一个外挂的存储器用于存放固件，芯片在每次上电时加载一次固件才能正常工作。另外，为了方便实现一些单板杂散的或者是定制化的功能，单板电路中也通常会有电可编程逻辑器件(Electrically Programmable Logic Device，简称为EPLD)，EPLD跟前面的芯片类似，也需要在上电时加载一次固件来启用相关功能。但由于应用环境多样且多变，这些固件都有一定概率暴露潜在的缺陷，这时候就需要通过在线更新固件版本来解决。一旦固件更新完成后，如前面所说，就需要让单板掉电重启，等芯片重新上电再次加载固件后，单板相关功能才能恢复正常。
目前实现让单板掉电重启的方法有如下：
1、拔插单板：通过人工现场拔插单板，来实现单板的重新上电。
2、看门狗复位触发：软件失控触发硬件看门狗复位，达到一定复位次数后，通过控制电源输入的开关来让单板掉电重启。
3、远程操作电源板：通过远程给设备中的电源板发送掉电命令，电源板收到掉电命令后让主供电掉电，并在预定时间后重启主供电。
设备单板后期维护的方便性以及快捷性是每个单板设计者都必须要考虑的问题，维护时尽量避免人工现场操作、不会影响其它单板、且根据需要随时解决问题，具备以上几点维护特性才是符合技术发展趋势的单板设计。目前实现的几个让单板掉电重启的方法存在以下缺点：
1、拔插单板：需要人工现场操作，无便捷性可言，实施难度大成本高，解决问题的周期长。
2、看门狗复位触发：需要设备提供单独的硬件看门狗电路，且依赖于软件失控后导致硬件看门狗多次复位才能触发掉电重启，设备无法根据需要主动触发。
3、远程操作电源板：通过命令远程操作电源板让设备主供电掉电重启，对于机框设备，电源板的主供电同时会给机框内多块单板供电，让主供电掉电，势必会影响到其他正常运行的单板。
针对相关技术中，让单板掉电重启的方法存在的上述问题，还未提出有效的解决的方案。
发明内容
本发明提供了一种单板掉电重启的调整方法、装置及***，以至少解决相关技术中存在的上述之一的问题。
根据本发明的一个方面，提供了一种单板掉电重启的调整方法，包括：检测单板的掉电指示信号的电平变化信息，其中，所述掉电指示信号用于使能所述单板的掉电操作，且所述掉电指示信号为低电平无效，高电平有效；在检测到所述掉电指示信号由低电平切换为高电平时，触发对所述单板的掉电操作；执行掉电处理后，在检测到所述掉电指示信号由高电平切换为低电平时，触发对所述单板的重启操作。
优选地，触发对所述单板的掉电操作包括：触发所述单板的电源控制信号由高电平开启状态切换为低电平关断状态，其中，所述高电平开启状态用于触发所述单板的电源对所述单板进行上电处理，所述低电平关断状态用于触发所述电源对所述单板进行掉电处理；触发对所述单板的重启操作包括：触发所述电源控制信号由所述低电平关断状态切换为所述高电平开启状态。
优选地，触发对所述单板的重启操作之前包括：对用于指示所述高电平开启状态的信号进行延时处理。
根据本发明的另一个方面，提供了一种单板掉电重启的调整装置，包括：检测模块，设置为检测单板的掉电指示信号的电平变化信息，其中，所述掉电指示信号用于使能所述单板的掉电操作，且所述掉电指示信号为低电平无效，高电平有效；第一触发模块，设置为在检测到所述掉电指示信号由低电平切换为高电平时，触发对所述单板的掉电操作；第二触发模块，设置为执行掉电处理后，在检测到所述掉电指示信号由高电平切换为低电平时，触发对所述单板的重启操作。
优选地，所述第一触发模块还设置为触发所述单板的电源控制信号由高电平开启状态切换为低电平关断状态，其中，所述高电平开启状态用于触发所述单板的电源对所述单板进行上电处理，所述低电平关断状态用于触发所述电源对所述单板进行掉电 处理；所述第二触发模块还设置为触发所述电源控制信号由所述低电平关断状态切换为所述高电平开启状态。
优选地，所述装置还包括：延时模块，设置为对用于指示所述高电平开启状态的信号进行延时处理。
根据本发明的另一个方面，提供了一种单板掉电重启调整***，所述***包括：控制单元，设置为检测单板的掉电指示信号状态的电平变化信息，在检测到所述掉电指示信号由低电平切换为高电平时，产生用于触发对所述单板进行掉电操作的第一信号，以及在执行掉电处理后，在检测到所述掉电指示信号由高电平切换为低电平时，产生用于触发对所述单板执行重启操作的第二信号；其中，所述掉电指示信号用于使能所述单板的掉电操作，且所述掉电指示信号为低电平无效，高电平有效；开关模块，设置为接收所述第一信号和所述第二信号，并根据所述第一信号和所述第二信号分别执行对所述单板的掉电操作或者对所述单板的重启操作。
优选地，所述***还包括：反相器，连接至所述控制单元，设置为接收控制单元的所述电平变化信息；所述反相器，还设置为在接收到的所述电平变化信息为由低电平变为高电平时，产生用于将所述单板的电源控制信号的高电平开启状态切换为低电平关断状态的第三信号；以及用于在执行掉电处理后，在确定所述电平变化信息为由高电平切换为低电平时，将低电平关断状态切换为高电平开启状态第四信号。
优选地，所述***还包括：时序调节器，连接至所述反相器，设置为接收所述反相器发送的将所述第三信号和所述第四信号，并将所述第三信号和进行延时处理后的所述第四信息发送至所述开关模块。
优选地，延时处理的时间为与所述时序调节器连接的电容完成充电的时间。
通过本发明，采用检测单板的掉电指示信号的电平变化信息，其中，掉电指示信号用于使能单板的掉电操作，且掉电指示信号为低电平无效，高电平有效；在检测到掉电指示信号由低电平切换为高电平时，触发对单板的掉电操作；执行掉电处理后，在检测到掉电指示信号由高电平切换为低电平时，触发对单板的重启操作。解决了相关技术中使用拔插单板、远程操作电源板和看门狗复位触发掉电重启时存在的问题，进而达到了根据需要灵活调整单板的掉电重启的效果。
附图说明
此处所说明的附图用来提供对本发明的进一步理解，构成本申请的一部分，本发明的示意性实施例及其说明用于解释本发明，并不构成对本发明的不当限定。在附图中：
图1是根据本发明实施例的单板掉电重启的调整方法的流程图；
图2是根据本发明实施例的单板掉电重启的调整装置的结构框图；
图3是根据本发明实施例的单板掉电重启的调整装置的结构框图(一)；
图4是根据本发明实施例的单板掉电重启的调整***的结构框图；
图5是根据本发明实施例的单板掉电重启的调整***的结构框图(一)；
图6是根据本发明实施例的单板掉电重启的调整***的结构框图(二)；
图7是根据本发明实施例的自动掉电重启方法流程图；
图8是根据本发明实施例的控制和供电的时序图；
图9是根据本发明实施例的自动掉电重启装置组成示意图。
具体实施方式
下文中将参考附图并结合实施例来详细说明本发明。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互组合。
在本实施例中提供了一种单板掉电重启的调整方法，图1是根据本发明实施例的单板掉电重启的调整方法的流程图，如图1所示，该流程包括如下步骤：
步骤S102，检测单板的掉电指示信号的电平变化信息，其中，掉电指示信号用于使能单板的掉电操作，且掉电指示信号为低电平无效，高电平有效；
步骤S104，在检测到掉电指示信号由低电平切换为高电平时，触发对单板的掉电操作；
步骤S106，执行掉电处理后，在检测到掉电指示信号由高电平切换为低电平时，触发对单板的重启操作。
通过上述步骤，根据掉电指示信号的电平变化信息调整单板的掉电或者重启，在检测到掉电指示信号由低电平切换为高电平时，触发对单板的掉电操作，执行掉电处理后，在检测到掉电指示信号由高电平切换为低电平时，触发对单板的重启操作。解决了相关技术中使用拔插单板、远程操作电源板和看门狗复位触发掉电重启时存在的问题，进而达到了根据需要灵活调整单板的掉电重启的效果。
上述步骤S104中涉及到触发对单板的掉电操作，在一个可选实施例中，触发单板的电源控制信号由高电平开启状态切换为低电平关断状态，其中，高电平开启状态用于触发该单板的电源对该单板进行上电处理，低电平关断状态用于触发该电源对该单板进行掉电处理；上述步骤S104中还涉及到触发对单板的重启操作，在一个可选实施例中，触发电源控制信号由该低电平关断状态切换为高电平开启状态。
在一个可选实施例中，触发对单板的重启操作之前，对用于指示高电平开启状态的信号进行延时处理。
在本实施例中还提供了一种单板掉电重启的调整装置，该装置用于实现上述实施例及优选实施方式，已经进行过说明的不再赘述。如以下所使用的，术语“模块”可以实现预定功能的软件和/或硬件的组合。尽管以下实施例所描述的装置较佳地以软件来实现，但是硬件，或者软件和硬件的组合的实现也是可能并被构想的。
图2是根据本发明实施例的单板掉电重启的调整装置的结构框图，如图2所示，该装置包括：检测模块22，设置为检测单板的掉电指示信号的电平变化信息，其中，掉电指示信号用于使能单板的掉电操作，且掉电指示信号为低电平无效，高电平有效；第一触发模块24，设置为在检测到掉电指示信号由低电平切换为高电平时，触发对单板的掉电操作；第二触发模块26，设置为执行掉电处理后，在检测到掉电指示信号由高电平切换为低电平时，触发对单板的重启操作。
优选地，第一触发模块24还设置为触发该单板的电源控制信号由高电平开启状态切换为低电平关断状态，其中，该高电平开启状态用于触发该单板的电源对该单板进行上电处理，该低电平关断状态用于触发该电源对该单板进行掉电处理；第二触发模块26还设置为触发电源控制信号由该低电平关断状态切换为该高电平开启状态。
图3是根据本发明实施例的单板掉电重启的调整装置的结构框图(一)，如图3所示，该装置还包括：延时模块32，设置为对用于指示所述高电平开启状态的信号进行延时处理。
图4是根据本发明实施例的单板掉电重启的调整***的结构框图，如图4所示，该***包括：控制单元42，设置为检测单板的掉电指示信号状态的电平变化信息，在检测到该掉电指示信号由低电平切换为高电平时，产生用于触发对该单板进行掉电操作的第一信号，以及在执行掉电处理后，在检测到该掉电指示信号由高电平切换为低电平时，产生用于触发对该单板执行重启操作的第二信号；其中，该掉电指示信号用于使能该单板的掉电操作，且该掉电指示信号为低电平无效，高电平有效；开关模块44，设置为接收该第一信号和该第二信号，并根据该第一信号和该第二信号分别执行对该单板的掉电操作或者对该单板的重启操作。
图5是根据本发明实施例的单板掉电重启的调整***的结构框图(一)，如图5所示，该***还包括：反相器52，连接至控制单元42，设置为接收控制单元的该电平变化信息；反相器52，还设置为在接收到的该电平变化信息为由低电平变为高电平时，产生用于将该单板的电源控制信号的高电平开启状态切换为低电平关断状态的第三信号；以及用于在执行掉电处理后，在确定该电平变化信息为由高电平切换为低电平时，将低电平关断状态切换为高电平开启状态第四信号。
图6是根据本发明实施例的单板掉电重启的调整***的结构框图(二)，如图6所示，该***还包括：时序调节器62，连接至反相器52，设置为接收反相器52发送的将第三信号和该第四信号，并将第三信号和进行延时处理后的该第四信息发送至该开关模块。
优选地，延时处理的时间为与该时序调节器连接的电容完成充电的时间。
需要说明的是，上述各个模块是可以通过软件或硬件来实现的，对于后者，可以通过以下方式实现，但不限于此：上述各个模块均位于同一处理器中；或者，上述各个模块分别位于第一处理器、第二处理器和第三处理器…中。
针对相关技术中存在的上述问题，下面结合可选实施例进行说明，本可选实施例结合了上述可选实施例及其可选实施方式。
本可选实施例中在电源输入路径中串入一个开关，通过这个开关来控制单板电源输入的有无，同时再利用两个电路特性来实现具体的掉电重启功能：
1、芯片输出的高电平信号随芯片电源的掉电自动变为低电平的特性，借此定义一个高电平有效的掉电指示信号，来控制掉电和重启两种状态的自动切换；
2、时序调节器的延时特性，通过它来控制开关关断的时间，以提供足够的掉电时间，来保证单板所有电源充分下电。
本可选实施例的掉电重启的方法，具体说明如下：
管理单元首先发起掉电重启操作，将正常工作时的低电平无效的掉电指示信号切换为高电平有效；反相器检测到掉电指示信号变为有效后，随即将送给时序调节器的电源控制信号，由高电平开启状态切换为低电平关断状态，时序调节器立刻关闭开关让单板掉电；单板掉电后，随着电源的下电，掉电指示信号自动从高电平有效状态变为低电平无效状态；反相器检测到掉电指示信号变为低电平后，随即将送给时序调节器的电源控制信号，由低电平关断状态切换为高电平开启状态，时序调节器完成延时处理后再开启开关重启单板。
本可选实施例的自动掉电重启的装置，具体说明如下：
主要包括开关、反相器和时序调节器，都使用过开关前的电源供电，在单板掉电过程中这些器件需要保持不掉电。
开关串在单板的电源输入路径中，用于控制单板功能电路所用电源的有无，过开关后的电源输出经过电源转换电路产生单板功能电路所用的各种电源，也包括管理单元的电源。
反相器设置为检测掉电指示信号的状态，然后生成电源控制信号，送给时序控制器。
时序调节器根据反相器送过来的电源控制信号状态，来实际关断或开启开关。一旦电源控制信号变为低电平，时序调节器立即关闭开关，单板随之掉电，在关闭开关的过程中时序调节器不进行延时处理；但当反相器送过来的电源控制信号变成高电平后，时序调节器并不立刻开启开关，而是先进行延时处理，即先对外部连接的充电电容充电，等电容充电完成后，再控制开关开启，让单板重启。
时序调节器在进行延时处理前，必须确保外部连接的充电电容已被完全放电，否则电容有残留电量的话，会导致再次充电的时间缩短，从而减少需要的延时时长。由于在充电电流不变的情况下，充电电容的容值越大，充电的时间越长，所以可以通过调节外部充电电容的容值来设定延时的时长。
此装置进一步还需要管理单元配合，管理单元负责确认固件更新已完成，然后发起掉电重启操作，将正常工作时的低电平无效的掉电指示信号切换为高电平有效，之 后管理单元要一直保持掉电指示信号为高电平，直到单板掉电，电源下电后，由于没有了驱动源，掉电指示信号自动变为低电平。
图7是根据本发明实施例的自动掉电重启方法流程图，如图7所示，包括如下步骤：
步骤S702、当单板需要更新固件时，管理单元负责监控固件的更新状态，一旦确认固件更新已经完成，需要让单板重新上电来启用相关功能时，就将正常工作时的低电平无效的掉电指示信号切换为高电平有效，图8是根据本发明实施例的控制和供电的时序图。
步骤S704、当反相器检测到掉电指示信号变为有效后，随即将送给时序调节器SETV脚的电源控制信号，由高电平开启状态切换为低电平关断状态。一旦SETV脚信号变为低电平，时序调节器就会直接驱动GATE脚信号电平变为低，开关立刻被关断，切断电源输入，让单板掉电。
步骤S706、单板掉电后，随着电源的下电，管理单元发出的掉电指示信号自动从高电平有效状态变为低电平无效状态，掉电指示信号状态的自动变化过程参照图8。
步骤S708、当反相器检测到掉电指示信号变为无效后，随即将送给时序调节器SETV脚的电源控制信号，由低电平关断状态切换为高电平开启状态。当SETV脚信号变成高电平后，时序调节器并不立刻驱动GATE脚信号变为高电平，而是先进行延时处理，即对外部的充电电容充电，等电容充电完成后，再驱动GATE脚信号变为高电平来开启开关，让单板重启，单板再次上电后相关固件重新被加载。
图9是根据本发明实施例的自动掉电重启装置组成示意图，如图9所示，主要包括开关、反相器和时序调节器。
开关选用N型MOS管，设置为控制功能电源所用电源的有无。选用MOS管时，MOS管的过流和过压能力需要满足电源需求，MOS管的控制端连接到时序调节器的GATE脚，需要确保MOS管的开启电平在GATE脚的支持范围内。
反相器可以选择专用的非门器件，实现逻辑取非的作用，设置为将高电平的掉电指示信号，转换为低电平的关掉电源控制信号；将低电平的掉电指示信号，转换为高电平的开启电源控制信号。
时序调节器采用ADI公司型号为ADM6820的时序调节器，设置为进行延时处理并产生开关的控制信号。时序调节器的SETV脚在收到关断电源指示信号后，会立刻 驱动GATE脚为低电平来关闭开关，此时不进行延时处理；但在SETV收到开启电源指示信号后，时序调节器先进行延时处理，先通过SETD给外部电容充电，当电容充电完成后再驱动GATE脚为高电平来开启开关。延时处理的时间长短跟时序调节器SETD脚连接的充电电容的容值直接相关，通过选择不同容量的电容来调节延时长度。延时处理一旦完成，时序调节器开启开关后，再通过SETD脚让充电电容完全放电，以避免充电电容留有电量，导致下一次延时处理的时间变短。
相关的管理单元，是对应单板上负责单板管理的功能单元。管理单元监控固件的更新状态，当确认固件更新已经完成，负责发出高电平的掉电指示信号，之后管理单元要一直保持掉电指示信号为高电平，直到单板掉电，电源下电后，由于没有了驱动源，掉电指示信号自动变为低电平。
综上所示，通过本发明的自动掉电重启的方法和装置，无需人工现场操作，无需影响到其他共用电源的单板，且管理单元可以根据需要主动触发掉电重启，完全避免了现有技术存在的缺陷，从而为单板在线更新固件提供了便捷的掉电重启方案，减少了单板维护的操作时间和成本。
在另外一个实施例中，还提供了一种软件，该软件用于执行上述实施例及优选实施方式中描述的技术方案。
在另外一个实施例中，还提供了一种存储介质，该存储介质中存储有上述软件，该存储介质包括但不限于：光盘、软盘、硬盘、可擦写存储器等。
显然，本领域的技术人员应该明白，上述的本发明的各模块或各步骤可以用通用的计算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上，可选地，它们可以用计算装置可执行的程序代码来实现，从而，可以将它们存储在存储装置中由计算装置来执行，并且在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤，或者将它们分别制作成各个集成电路模块，或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。这样，本发明不限制于任何特定的硬件和软件结合。
以上所述仅为本发明的优选实施例而已，并不用于限制本发明，对于本领域的技术人员来说，本发明可以有各种更改和变化。凡在本发明的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。
工业实用性
如上所述，通过上述实施例及优选实施方式，解决了相关技术中使用拔插单板、远程操作电源板和看门狗复位触发掉电重启时存在的问题，进而达到了根据需要灵活调整单板的掉电重启的效果。

Claims (10)

  1. 一种单板掉电重启的调整方法，包括：
    检测单板的掉电指示信号的电平变化信息，其中，所述掉电指示信号用于使能所述单板的掉电操作，且所述掉电指示信号为低电平无效，高电平有效；
    在检测到所述掉电指示信号由低电平切换为高电平时，触发对所述单板的掉电操作；
    执行掉电处理后，在检测到所述掉电指示信号由高电平切换为低电平时，触发对所述单板的重启操作。
  2. 根据权利要求1所述的方法，其中，
    触发对所述单板的掉电操作包括：触发所述单板的电源控制信号由高电平开启状态切换为低电平关断状态，其中，所述高电平开启状态用于触发所述单板的电源对所述单板进行上电处理，所述低电平关断状态用于触发所述电源对所述单板进行掉电处理；
    触发对所述单板的重启操作包括：触发所述电源控制信号由所述低电平关断状态切换为所述高电平开启状态。
  3. 根据权利要求2所述的方法，其中，触发对所述单板的重启操作之前包括：
    对用于指示所述高电平开启状态的信号进行延时处理。
  4. 一种单板掉电重启的调整装置，包括：
    检测模块，设置为检测单板的掉电指示信号的电平变化信息，其中，所述掉电指示信号用于使能所述单板的掉电操作，且所述掉电指示信号为低电平无效，高电平有效；
    第一触发模块，设置为在检测到所述掉电指示信号由低电平切换为高电平时，触发对所述单板的掉电操作；
    第二触发模块，设置为执行掉电处理后，在检测到所述掉电指示信号由高电平切换为低电平时，触发对所述单板的重启操作。
  5. 根据权利要求4所述的装置，其中，
    所述第一触发模块还设置为触发所述单板的电源控制信号由高电平开启状态切换为低电平关断状态，其中，所述高电平开启状态用于触发所述单板的电源对所述单板进行上电处理，所述低电平关断状态用于触发所述电源对所述单板进行掉电处理；
    所述第二触发模块还设置为触发所述电源控制信号由所述低电平关断状态切换为所述高电平开启状态。
  6. 根据权利要求4所述的装置，其中，所述装置还包括：
    延时模块，设置为对用于指示所述高电平开启状态的信号进行延时处理。
  7. 一种单板掉电重启调整***，所述***包括：
    控制单元，设置为检测单板的掉电指示信号状态的电平变化信息，在检测到所述掉电指示信号由低电平切换为高电平时，产生用于触发对所述单板进行掉电操作的第一信号，以及在执行掉电处理后，在检测到所述掉电指示信号由高电平切换为低电平时，产生用于触发对所述单板执行重启操作的第二信号；其中，所述掉电指示信号用于使能所述单板的掉电操作，且所述掉电指示信号为低电平无效，高电平有效；
    开关模块，设置为接收所述第一信号和所述第二信号，并根据所述第一信号和所述第二信号分别执行对所述单板的掉电操作或者对所述单板的重启操作。
  8. 根据权利要求7所述的***，其中，所述***还包括：
    反相器，连接至所述控制单元，设置为接收控制单元的所述电平变化信息；
    所述反相器，还设置为在接收到的所述电平变化信息为由低电平变为高电平时，产生用于将所述单板的电源控制信号的高电平开启状态切换为低电平关断状态的第三信号；以及用于在执行掉电处理后，在确定所述电平变化信息为由高电平切换为低电平时，将低电平关断状态切换为高电平开启状态第四信号。
  9. 根据权利要求8所述的***，其中，所述***还包括：
    时序调节器，连接至所述反相器，设置为接收所述反相器发送的将所述第三信号和所述第四信号，并将所述第三信号和进行延时处理后的所述第四信息发送至所述开关模块。
  10. 根据权利要求9所述的***，其中，延时处理的时间为与所述时序调节器连接的电容完成充电的时间。
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