WO2016056655A1 - Method for making semiconductor device - Google Patents
Method for making semiconductor device Download PDFInfo
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- WO2016056655A1 WO2016056655A1 PCT/JP2015/078802 JP2015078802W WO2016056655A1 WO 2016056655 A1 WO2016056655 A1 WO 2016056655A1 JP 2015078802 W JP2015078802 W JP 2015078802W WO 2016056655 A1 WO2016056655 A1 WO 2016056655A1
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- temperature
- semiconductor device
- filler composition
- interlayer filler
- semiconductor
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- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08G—MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
- C08G59/00—Polycondensates containing more than one epoxy group per molecule; Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups
- C08G59/18—Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups ; e.g. general methods of curing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/731—Location prior to the connecting process
- H01L2224/73101—Location prior to the connecting process on the same surface
- H01L2224/73103—Bump and layer connectors
- H01L2224/73104—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
Definitions
- the present invention relates to a method of manufacturing a semiconductor device by thermocompression bonding a semiconductor chip having solder bumps and a semiconductor substrate having electrode pads by means of a thermocompression bonding apparatus via an interlayer filler composition.
- a plurality of substrates such as a semiconductor substrate on which a semiconductor device layer is formed and an organic substrate are placed perpendicular to the substrate surface.
- Multilayer semiconductor devices are known in which a semiconductor substrate and an organic substrate are stacked. More specifically, semiconductor substrates are connected to each other with electrical signal terminals such as solder bumps between the substrates.
- a three-dimensional stacked semiconductor device having a structure in which an interlayer filler composition is filled between substrates and the substrates are bonded to each other by an interlayer filler composition layer is known.
- a layer made of an inter-layer filler composition (ICF: Inter Chip Fill) is formed on a wafer on which a semiconductor device layer is formed, and heated to be B-staged as necessary. Then, the chip is cut out by dicing, the obtained semiconductor substrates are stacked, a plurality of temporary bondings are repeated by pressure heating, and finally the pre-application method (Pre- A process based on applied process has been proposed (see, for example, Non-Patent Document 1).
- ICF Inter Chip Fill
- FIG. 2 is a perspective view showing a method of manufacturing a semiconductor device by the pre-applied method, and an interlayer filling is performed by a coating nozzle 4 on a semiconductor chip 2 on which a plurality of solder bumps 1 composed of land terminals 1A and solder 1B are formed.
- the agent composition 3 FIG. 2 (a)
- the interlayer filler composition layer 5 FIG. 2 (b)
- the B-stage is formed, and the interlayer filler composition
- the semiconductor chip 2 on which the physical layer 5 is formed is reversed, and the interlayer filler composition is placed on the semiconductor substrate 7 on which the electrode pad 6 is formed, which is placed on the stage (not shown) of the thermocompression bonding apparatus.
- the layer 5 side is made to oppose, and it presses with the head which is not illustrated (illustration 2 (c)).
- the interlayer filler composition is cured, and the semiconductor is interposed through the cured adhesive layer 8 of the interlayer filler composition.
- a semiconductor device 10 in which the chip 2 and the semiconductor substrate 7 are bonded can be obtained (FIG. 2D).
- the stacked semiconductor device repeats such a process, and an electrode pad is formed on the surface of the semiconductor chip 10 of the semiconductor device 10 shown in FIG. 2D (in this case, the surface opposite to the cured adhesive layer 8 of the semiconductor chip 2). 2) is further manufactured by repeating the step of bonding the semiconductor chip 2 on which the interlayer filler composition layer 5 shown in FIG. 2B is formed.
- Voids occur in the cured adhesive layer.
- the generation of voids is thought to be caused by the low-molecular components in the interlayer filler composition volatilizing under the heating conditions of the bonding process and curing process, but if voids exist in the cured adhesive layer, electrical bonding
- the shrinkage difference such as temperature change is increased, and the adhesion surface is peeled off or cracked, so that the performance as a semiconductor device is impaired.
- the interlayer filler composition layer is formed by supplying the interlayer filler composition 3 on the semiconductor chip 2 on which the solder bumps 1 are formed as shown in FIG. Even if the agent composition 3 does not reach the narrow gap between the solder bumps 1 and 1 sufficiently, a void portion that becomes a void is formed similarly to the above (1), and the same problem as described above occurs.
- the present invention is excellent in bondability and conductivity without producing voids (voids) in the cured adhesive layer when bonding between a semiconductor chip and a semiconductor chip or between a semiconductor chip and a semiconductor chip in the manufacture of a semiconductor device.
- Another object of the present invention is to provide a method for manufacturing a high-quality and highly reliable semiconductor device by forming a cured adhesive layer.
- the gist of the present invention is as follows.
- Formula 1 H + 0.526S 310
- Formula 2 H + 0.8S 580
- Formula 3 H + 1.25S 725
- Formula 4 (In formulas 1 to 4, H represents the head temperature (° C.) during bonding, and S represents the stage temperature (° C.) during bonding.)
- thermocompression bonding apparatus having a head and a stage capable of individually adjusting the temperature.
- Formula 1 H + 0.526S 310
- Formula 2 H + 0.8S 580
- Formula 3 H + 1.25S 725
- Formula 4 (In formulas 1 to 4, H represents the head temperature (° C.) during bonding, and S represents the stage temperature (° C.) during bonding.)
- thermocompression bonding apparatus In a method of manufacturing a semiconductor device, including a step of bonding a semiconductor chip having solder bumps and a semiconductor substrate having electrode pads using a thermocompression bonding apparatus via an interlayer filler composition, the thermocompression bonding apparatus The solder bump and electrode pad are brought into contact with each other when the temperature of only one of the head and the stage is 120 ° C. or higher. After the solder bump and the electrode pad are in contact, the contact between the solder bump and the electrode pad on the head or stage A method for manufacturing a semiconductor device, wherein the temperature on the side that is sometimes less than 120 ° C. is set to be equal to or higher than the melting point of solder.
- the interlayer filler composition is pre-applied to a semiconductor chip or a semiconductor substrate that is set on the side of the head or stage that is less than 120 ° C. at the time of contact between the solder bump and the electrode pad. 10].
- the present invention in the manufacture of a semiconductor device, when bonding between a semiconductor chip and a substrate, or between a semiconductor chip and a semiconductor chip, no bonding (void) occurs in the cured adhesive layer, and the bonding property and conductivity Therefore, a high-quality and highly reliable semiconductor device can be manufactured. According to the present invention, it is possible to further increase the speed and capacity of the stacked semiconductor device.
- FIG. 2A is a view showing an operation for applying an interlayer filler composition to a semiconductor chip.
- FIG. 2B is a view showing a semiconductor chip having an interlayer filler composition layer.
- FIG. 2 (c) is a diagram showing an operation of heat-pressure bonding a semiconductor chip having an interlayer filler composition layer onto a semiconductor substrate using a thermocompression bonding apparatus (not shown).
- FIG. 2D is a view of a semiconductor device in which a semiconductor chip and a semiconductor substrate are bonded via a cured adhesive layer of an interlayer filler composition.
- FIG. 3A is a photograph of the appearance of the semiconductor device manufactured in Example 25, and FIG. 3B is a photograph of the same cross section.
- an interlayer filler composition used for bonding a semiconductor chip having solder bumps and a semiconductor substrate having electrode pads may be referred to as an “interlayer filler composition”.
- the “semiconductor chip” and “semiconductor substrate” in the present invention may be collectively referred to as “substrate”.
- the semiconductor chip and the semiconductor substrate are made of any material that can be normally used as a semiconductor substrate in the manufacture of an integrated circuit.
- the substrate on which the solder bump is formed is connected to the “semiconductor chip” and the solder bump.
- a substrate on which an electrode pad is formed is called a “semiconductor substrate”.
- the semiconductor chip and the semiconductor substrate may be provided with a through electrode (hereinafter sometimes abbreviated as TSV), a semiconductor element circuit, and the like, and are connected between the substrates via solder bumps and electrode pads.
- TSV through electrode
- the substrate may be regarded as a semiconductor chip or a semiconductor substrate.
- a single substrate is not considered as a “semiconductor chip” and a “semiconductor substrate” at the same time.
- thermocompression bonding apparatus In the method for producing a semiconductor device of the present invention, a thermocompression bonding apparatus is used to heat and press-bond a semiconductor chip having solder bumps and a semiconductor substrate having electrode pads via an interlayer filler composition described later.
- the temperature of the head and the stage of the thermocompression bonding apparatus is bonded as a temperature condition in the range surrounded by the following four formulas in a graph in which the head temperature shown in FIG. 1 is the vertical axis and the stage temperature is the horizontal axis. It is characterized by that.
- the head temperature is the temperature of the heater of the head of the thermocompression bonding apparatus
- the stage temperature is the temperature of the heater of the stage of the thermocompression bonding apparatus.
- H + 1.9S 590 ...
- H represents the head temperature (° C.) during bonding
- S represents the stage temperature (° C.) during bonding.
- the temperatures of the head and the stage of the thermocompression bonding apparatus are individually adjusted, and bonding is performed as a temperature condition within the range surrounded by the above four equations. Therefore, it is distinguished from a bonding method in which the substrates to be bonded are put in a furnace or the like typified by a high-temperature bath and the whole is heated. However, it does not exclude that the temperature of the head and the stage becomes the same as a result of the individual temperature adjustment.
- a thermocompression bonding apparatus having a head and a stage capable of individually adjusting the temperature a thermocompression bonding apparatus “Flip Chip Bonder (FC3000S)” manufactured by Toray Engineering Co., Ltd. used in the examples described later can be used.
- the temperature of the head and stage that are individually temperature-controlled is either because the time required to raise their temperature can be shortened to increase production efficiency or to reduce the energy required for temperature increase.
- One is preferably lower than the other.
- the head temperature and the stage temperature are preferably different.
- the above temperature condition may be employed for bonding by the thermocompression bonding apparatus, but the stage temperature is preferably 70 to 500 ° C., and 100 to 450 in order to sufficiently exhibit the functions required for the interlayer material. ° C is more preferable, 120 to 430 ° C is more preferable, the head temperature is preferably 70 to 500 ° C, more preferably 100 to 450 ° C, and still more preferably 120 to 430 ° C. Further, the temperature of the head and the stage is preferably higher than a certain point in order to ensure electrical bonding, and at least one of them is preferably higher than 225 ° C., more preferably 230 ° C. or higher. More preferred is 235 ° C. or higher.
- the applied pressure in the bonding step under the above specific temperature condition is 0.1 to 50 kgf / cm 2 , particularly preferably 0.1 to 10 kgf / cm 2 .
- the heating and pressing time is 0.1 to 30 seconds, and preferably 0.5 to 10 seconds. Note that after the heat and pressure bonding by the thermocompression bonding apparatus, it may be once removed from the apparatus, cooled to room temperature, and then cured by heating to 100 to 200 ° C.
- the semiconductor device manufacturing method of the present invention includes a semiconductor chip and an electrode pad having solder bumps according to a conventional method, except that the temperature and temperature of the head and stage of the thermocompression bonding apparatus are individually adjusted and the above temperature conditions are adopted. It is possible to perform bonding with a semiconductor substrate having For example, as shown in FIG. 2A, the interlayer filling of the present invention is applied from a coating nozzle 4 onto a semiconductor substrate (semiconductor chip) 2 on which a plurality of solder bumps 1 composed of land terminals 1A and solder 1B are formed. By supplying the agent composition 3, as shown in FIG.2 (b), after forming the interlayer filler composition layer 5, B-stage is performed as needed.
- the semiconductor chip 2 on which the interlayer filler composition layer 5 was formed was turned upside down and placed on a stage (not shown) of a thermocompression bonding apparatus, as shown in FIG.
- the interlayer filler composition layer 5 side is opposed to the semiconductor substrate 7 on which the electrode pads 6 are formed, and pressed by a head (not shown).
- the interlayer filler composition is cured by heating and pressurizing the semiconductor substrate 7 and the semiconductor chip 2 between the head and the stage of the thermocompression bonding apparatus under the above temperature conditions, as shown in FIG.
- the semiconductor device 10 is obtained in which the semiconductor chip 2 and the semiconductor substrate 7 are bonded via the cured adhesive layer 8 of the interlayer filler composition.
- a stacked semiconductor device having a plurality of semiconductor chips 2 repeats such a process, and the semiconductor chip 2 of the semiconductor device 10 shown in FIG. 2D (in this case, opposite to the cured adhesive layer 8 of the semiconductor chip 2).
- the electrode pad is formed on the side surface.) Further, it is manufactured by repeating the step of bonding the semiconductor chip 2 formed with the interlayer filler composition layer 5 shown in FIG. Can do.
- the first semiconductor chip is regarded as the semiconductor substrate in the present invention
- the second semiconductor chip is in the present invention. It is regarded as a semiconductor chip.
- a substrate made of any material that can be used as a semiconductor substrate in the manufacture of an integrated circuit can be used.
- a silicon substrate is preferably used.
- the silicon substrate may be used as it is depending on the diameter of the substrate, or may be used after being thinned to 100 ⁇ m or less by backside polishing such as backside etching or backgrinding. good.
- Fine solder balls may be used to form solder bumps, and after forming openings by lithography, solder plating is performed directly on the base of the openings or after nickel or copper posts are formed, After removing the resist material, solder bumps may be formed by heat treatment.
- the solder composition is not particularly limited, but a solder containing tin as a main component is preferably used in consideration of electrical bondability and low-temperature bondability.
- the land terminal can be formed by forming a thin film on the substrate using PVD (Physical Vapor Deposition) or the like and then removing unnecessary portions by lithography resist film formation and dry or wet etching. .
- the material of the land terminal is not particularly limited as long as it can be bonded to the solder bump, but gold, copper, nickel and the like can be preferably used in consideration of the bonding property and reliability to the solder.
- the interlayer filler composition layer by the pre-apply method can be formed by a conventionally known forming method, for example, a dip method, a spin coat method, a spray coat method, a blade method, or any other method.
- the interlayer filler composition layer may be formed on the side of the semiconductor chip 2 having solder bumps as shown in FIG. 2, or may be formed on the side of the semiconductor substrate 7 having electrode pads as in the examples described later. Alternatively, they may be formed on both of them.
- this amount of supply The interlayer filler composition may be applied so as to be.
- a B-stage process may be performed by performing a baking process at an arbitrary temperature of 60 to 130 ° C.
- the baking treatment may be performed at a constant temperature, but in order to smoothly remove the volatile components in the composition, the baking treatment may be performed under reduced pressure conditions.
- a baking process by stepwise temperature rise may be performed within a range in which the curing of the resin does not proceed. For example, baking can be performed for 5 to 90 minutes each at 60 ° C., then at 80 ° C., and further at 120 ° C.
- thermocompression bonding apparatus Manufacturing of a semiconductor device having a step of joining a semiconductor chip having a solder bump and a semiconductor substrate having an electrode pad using a thermocompression bonding apparatus through an interlayer filler composition, as typified by the present invention
- the conditions of the various processes before the bonding are also independently important for manufacturing a high-quality semiconductor device.
- a high quality semiconductor device can be manufactured especially when the conditions of the process of joining using a thermocompression bonding apparatus and the conditions of various processes before the joining are preferable conditions.
- the solder bump and the electrode pad are in contact with each other before the heat and pressure bonding is performed, but at the time of the contact, the temperature of only one of the head or the stage of the thermocompression bonding apparatus is used.
- the solder bump and the electrode pad are brought into contact with each other at a temperature of 120 ° C. or higher.
- heating and pressurizing bonding may be performed by setting the temperature of the head or stage on the side that is lower than 120 ° C. when the solder bump and the electrode pad are in contact with each other as a temperature condition equal to or higher than the melting point of the solder. preferable.
- the interlayer filler composition is more preferably preliminarily applied to a chip or a substrate set on the side that is lower than 120 ° C. when the solder bump and the electrode pad are in contact with each other.
- the viscosity of the interlayer filler composition is too high, it may become an obstacle at the time of heat-pressure bonding. Therefore, when the solder bump and the electrode pad are in contact with each other, the temperature on the side of less than 120 ° C. is 40 It is preferable that the temperature is not lower than ° C.
- the semiconductor chip to be bonded may be temporarily bonded to the semiconductor chip and / or the semiconductor substrate.
- the temperature for temporary bonding is preferably 80 ° C. to 150 ° C.
- the temporary bonding may be repeated for the number of layers of the substrate, or the substrates may be stacked and then temporarily bonded together by heating. Provisional bonding, between the substrates as necessary, preferably 1gf / cm 2 ⁇ 50Kgf / cm 2, more preferably it is preferably carried out under a load of 10gf / cm 2 ⁇ 10Kgf / cm 2.
- the interlayer filler composition of the present invention preferably contains an epoxy resin (A), a curing agent (B), a filler (C) and a flux (D), and has a viscosity at 130 ° C. (hereinafter referred to as “ ⁇ 130 ”). Is preferably 100 Pa ⁇ s or less.
- the interlayer filler composition of the present invention preferably further contains a curing accelerator (E) and a dispersing agent (F).
- the interlayer filler composition of the present invention preferably has a low viscosity with a viscosity ⁇ 130 at 130 ° C. of 100 Pa ⁇ s or less. If the ⁇ 130 of the interlayer filler composition is higher than 100 Pa ⁇ s, the interlayer filler composition is difficult to flow during bonding, and bonding failure may occur.
- ⁇ 130 of the interlayer filler composition of the present invention is more preferably 50 Pa ⁇ s or less, and particularly preferably 10 Pa ⁇ s or less. However, if this viscosity is excessively low, fillet formation becomes difficult, so that the ⁇ 130 of the interlayer filler composition of the present invention is preferably 0.1 Pa ⁇ s or more.
- a low-viscosity epoxy resin (A) contained in the interlayer filler composition is used, or a curing agent (B) or other components are used. What is necessary is just to adjust a composition.
- the viscosity of the interlayer filler composition is a value measured by the method described in the Examples section below.
- Epoxy resin (A) The epoxy resin (A) used in the present invention is preferably a compound having two or more epoxy groups in order to improve the glass transition temperature of the interlayer filler composition of the present invention.
- the range of epoxy groups contained in one molecule is 1 or more and 8 or less. Is more preferable, and more preferably 2 or more and 3 or less.
- the epoxy resin (A) used in the present invention is an epoxy compound having an aromatic ring of a bisphenol A skeleton, a bisphenol F skeleton, or a biphenyl skeleton. It is preferable to use it.
- bisphenol A type epoxy resin bisphenol F type epoxy resin, bisphenol S type epoxy resin, biphenyl type epoxy resin, naphthalene ring-containing epoxy resin, epoxy resin having a dicyclopentadiene skeleton, phenol novolac type resin, cresol
- novolac type epoxy resins triphenylmethane type epoxy resins, aliphatic epoxy resins, aliphatic epoxy resin copolymer epoxy resins, and the like.
- bisphenol A type epoxy resins bisphenol F type epoxy resins, bisphenol S type epoxy resins, biphenyl type epoxy resins or naphthalene ring-containing epoxy resins are preferable, and bisphenol A type epoxy resins, bisphenol F type epoxy resins are more preferable.
- a naphthalene ring-containing epoxy resin or a biphenyl type epoxy resin is used.
- a polyfunctional epoxy resin is also used as the epoxy resin (A) used in the present invention.
- Polyfunctional epoxy resins include phenol novolac resin, cresol novolac resin, bisphenol A novolak resin, dicyclopentadiene phenol resin, phenol aralkyl resin, naphthol novolac resin, biphenyl novolac resin, terpene phenol resin, heavy oil modified phenol resin, etc.
- Glycidyls such as epoxy resins produced from phenols, various phenolic compounds such as polyhydric phenol resins obtained by condensation reaction of phenols with aldehydes such as hydroxybenzaldehyde, crotonaldehyde, and glyoxal, and epihalohydrins Ether type polyfunctional epoxy resins are preferred.
- epoxy resins (A) may be used alone or in a combination of two or more in any combination and ratio.
- the curing agent (B) used in the present invention refers to a substance that contributes to the crosslinking reaction between the crosslinking groups of the epoxy resin (A).
- curing agent (B) What is generally known as an epoxy resin hardening
- phenolic curing agents aliphatic amines, polyether amines, alicyclic amines, aromatic amines and other amine curing agents, acid anhydride curing agents, amide curing agents, tertiary amines, imidazoles or the like Derivatives, organic phosphines, phosphonium salts, tetraphenylboron salts, organic acid dihydrazides, boron halide amine complexes, polymercaptan curing agents, isocyanate curing agents, blocked isocyanate curing agents, and the like.
- phenolic curing agents include bisphenol A, bisphenol F, 4,4'-dihydroxydiphenylmethane, 4,4'-dihydroxydiphenyl ether, 1,4-bis (4-hydroxyphenoxy) benzene, 1,3-bis (4-hydroxyphenoxy) benzene, 4,4'-dihydroxydiphenyl sulfide, 4,4'-dihydroxydiphenyl ketone, 4,4'-dihydroxydiphenyl sulfone, 4,4'-dihydroxybiphenyl, 2,2'-dihydroxybiphenyl 10- (2,5-dihydroxyphenyl) -10H-9-oxa-10-phosphaphenanthrene-10-oxide, phenol novolak, bisphenol A novolak, o-cresol novolak, m-cresol novolak, p-ke Zole novolak, xylenol novolak, poly-p-hydroxystyrene, hydroquinone, re
- Examples of aliphatic amines that are amine curing agents include ethylenediamine, 1,3-diaminopropane, 1,4-diaminopropane, hexamethylenediamine, 2,5-dimethylhexamethylenediamine, trimethylhexamethylenediamine, diethylenetriamine, Examples include iminobispropylamine, bis (hexamethylene) triamine, triethylenetetramine, tetraethylenepentamine, pentaethylenehexamine, N-hydroxyethylethylenediamine, tetra (hydroxyethyl) ethylenediamine, and the like.
- polyether amines examples include triethylene glycol diamine, tetraethylene glycol diamine, diethylene glycol bis (propylamine), polyoxypropylene diamine, polyoxypropylene triamines, and the like.
- Cycloaliphatic amines include isophorone diamine, metacene diamine, N-aminoethylpiperazine, bis (4-amino-3-methyldicyclohexyl) methane, bis (aminomethyl) cyclohexane, 3,9-bis (3-amino). (Propyl) -2,4,8,10-tetraoxaspiro (5,5) undecane, norbornenediamine and the like.
- Aromatic amines include tetrachloro-p-xylenediamine, m-xylenediamine, p-xylenediamine, m-phenylenediamine, o-phenylenediamine, p-phenylenediamine, 2,4-diaminoanisole, 2,4 -Toluenediamine, 2,4-diaminodiphenylmethane, 4,4'-diaminodiphenylmethane, 4,4'-diamino-1,2-diphenylethane, 2,4-diaminodiphenylsulfone, 4,4'-diaminodiphenylsulfone, m-aminophenol, m-aminobenzylamine, benzyldimethylamine, 2-dimethylaminomethyl) phenol, triethanolamine, methylbenzylamine, ⁇ - (m-aminophenyl) ethylamine,
- acid anhydride curing agents include dodecenyl succinic anhydride, polyadipic acid anhydride, polyazeline acid anhydride, polysebacic acid anhydride, poly (ethyloctadecanedioic acid) anhydride, poly (phenylhexadecanedioic acid) Anhydride, Methyltetrahydrophthalic anhydride, Methylhexahydrophthalic anhydride, Hexahydrophthalic anhydride, Methylhymic anhydride, Tetrahydrophthalic anhydride, Trialkyltetrahydrophthalic anhydride, Methylcyclohexene dicarboxylic anhydride, Methylcyclohexene tetracarboxylic Acid anhydride, phthalic anhydride, trimellitic anhydride, pyromellitic anhydride, benzophenone tetracarboxylic anhydride, ethylene glycol
- amide type curing agents examples include dicyandiamide and polyamide resin.
- tertiary amines examples include 1,8-diazabicyclo (5,4,0) undecene-7, triethylenediamine, benzyldimethylamine, triethanolamine, dimethylaminoethanol, tris (dimethylaminomethyl) phenol, and the like. .
- imidazole or derivatives thereof examples include 1-cyanoethyl-2-phenylimidazole, 2-phenylimidazole, 2-ethyl-4 (5) -methylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole 1-benzyl-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazo Lithium trimellitate, 2,4-diamino-6- [2'-methylimidazolyl- (1 ')]-ethyl-s-triazine, 2,4-diamino-6- [2'-ethyl-4'-methyl Imidazolyl- (1 ′)]-ethyl-s-triazine, 2,4 Diamin
- organic phosphines include tributylphosphine, methyldiphenylphosphine, triphenylphosphine, diphenylphosphine, and phenylphosphine.
- examples of the phosphonium salt include tetraphenylphosphonium / tetraphenylborate, tetraphenylphosphonium / ethyltriphenylborate, and tetrabutylphosphonium / tetrabutylborate.
- examples of the tetraphenylboron salt include 2-ethyl-4-methylimidazole / tetraphenylborate, N-methylmorpholine / tetraphenylborate and the like.
- curing agents (B) may be used alone or in a combination of two or more in any combination and ratio.
- the content of the curing agent (B) in the interlayer filler composition is preferably 30 to 150 parts by weight, more preferably 50 to 120 parts by weight, per 100 parts by weight of the epoxy resin (A).
- the curing agent (B) is a phenol curing agent, an amine curing agent, or an acid anhydride curing agent
- the equivalent ratio of the functional group in the curing agent (B) to the epoxy group in the epoxy resin (A) Therefore, it is preferably used in a range of 0.8 to 1.5, and more preferably in a range of 0.8 to 1.2. Outside this range, unreacted epoxy groups and functional groups of the curing agent may remain, and desired physical properties may not be obtained.
- the curing agent (B) is an amide-based curing agent, a tertiary amine, imidazole or a derivative thereof, an organic phosphine, a phosphonium salt, a tetraphenylboron salt, an organic acid dihydrazide, a boron halide amine complex, a polymercaptan-based curing agent.
- an isocyanate curing agent, a blocked isocyanate curing agent, etc. it is preferably used in an amount of 0.1 to 20 parts by weight, preferably 0.5 to 10 parts by weight, based on 100 parts by weight of the epoxy resin (A). It is more preferable to use so that it may become this range.
- a dicyandiamine compound it is preferably used in the range of 0.1 to 10 parts by weight, and preferably in the range of 0.5 to 6 parts by weight with respect to 100 parts by weight of the epoxy resin (A). More preferably, it is used.
- the filler (C) is added for the purpose of improving thermal conductivity and controlling the linear expansion coefficient, and is mainly intended for controlling the linear expansion coefficient.
- Examples of the filler (C) include at least one particle selected from the group consisting of metal, carbon, metal carbide, metal oxide, and metal nitride.
- Examples of carbon include carbon black, carbon fiber, graphite, fullerene and diamond.
- Examples of metal carbides include silicon carbide, titanium carbide, tungsten carbide and the like.
- Examples of metal oxides include magnesium oxide, aluminum oxide, silicon oxide, calcium oxide, zinc oxide, yttrium oxide, zirconium oxide, cerium oxide, ytterbium oxide, sialon (ceramics made of silicon, aluminum, oxygen and nitrogen). Can be mentioned.
- Examples of metal nitrides include boron nitride, aluminum nitride, silicon nitride and the like.
- the shape of the filler (C) is not limited, and may be particulate, whisker, fiber, plate, or an aggregate thereof.
- oxide or nitride is preferable among the fillers (C). More specifically, as such filler (C), alumina (Al 2 O 3 ), aluminum nitride (AlN), boron nitride (BN), silicon nitride (Si 3 N 4 ), silica (SiO 2 ), etc. Among them, Al 2 O 3 , AlN, BN or SiO 2 is preferable, and Al 2 O 3 , BN or SiO 2 is particularly preferable. As the BN filler, those disclosed in Japanese Unexamined Patent Publication No. 2013-241321 are preferably used.
- fillers (C) may be used alone or in a combination of two or more in any combination and ratio.
- the maximum particle diameter of the filler to be formed is preferably about 1/3 or less of the thickness of the interlayer filling layer.
- the maximum particle size of the filler (C) is preferably 5 ⁇ m, more preferably 3 ⁇ m.
- the content of the filler (C) in the interlayer filler composition of the present invention is preferably 10 to 500 parts by weight, preferably 20 to 400 parts by weight per 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B). More preferred.
- the content of the filler (C) is less than 10 parts by weight per 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B)
- the effect of adding the filler (C) is reduced, and the intended linear expansion
- the coefficient and thermal conductivity may not be obtained.
- the amount exceeds 500 parts by weight the presence of the filler (C) may hinder the bondability.
- the flux (D) means that the metal electrical signal terminals such as solder bumps and the surface oxide film of the land (Land) are dissolved and removed when the metal terminals are soldered together, and the solder bumps are spread on the land surface. It is a compound having a function of improving the property and preventing reoxidation of the metal terminal surface of the solder bump.
- Examples of the flux (D) used in the present invention include fats such as succinic acid, malonic acid, succinic acid, glutaric acid, adipic acid, malic acid, tartaric acid, citric acid, lactic acid, acetic acid, propionic acid, butyric acid, oleic acid, and stearic acid.
- Aromatic carboxylic acids such as benzoic acid, salicylic acid, phthalic acid, trimellitic acid, trimellitic acid anhydride, trimesic acid, benzenetetracarboxylic acid, or acid anhydrides thereof; terpene carboxylic acids such as abietic acid and rosin, etc.
- An organic carboxylic acid which is a hemiacetal ester obtained by reacting an organic carboxylic acid with an alkyl vinyl ether; glutamic acid hydrochloride, aniline hydrochloride, hydrazine hydrochloride, cetylpyridine bromide, phenylhydrazine hydrochloride, Tetrachloronaphthalene, methyl hydrazine hydrochloride
- Organic halogen compounds such as methylamine hydrochloride, ethylamine hydrochloride, diethylamine hydrochloride and butylamine hydrochloride; amines such as urea and diethylenetriamine hydrazine; polyhydric alcohols such as ethylene glycol, diethylene glycol, triethylene glycol, tetraethylene glycol and glycerin
- Inorganic acids such as hydrochloric acid, hydrofluoric acid, phosphoric acid, borohydrofluoric acid; Fluorides such as potassium fluoride, sodium fluoride
- These compounds may be used as they are or may be microencapsulated using a coating agent made of an organic polymer or an inorganic compound. These compounds may be used individually by 1 type, and 2 or more types may be mixed and used for them in arbitrary combinations and ratios.
- the content of the flux (D) in the interlayer filler composition of the present invention is preferably 0.1 to 10 parts by weight, more preferably 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B). 0.5 to 5 parts by weight. If the content of the flux (D) is less than 0.1 parts by weight per 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B), there is a risk of poor solder connection due to a decrease in oxide film removal, and 10 weights. If it exceeds the part, there is a risk of poor connection due to an increase in the viscosity of the composition.
- the interlayer filler composition of the present invention may contain a curing accelerator (E) together with the curing agent (B) in order to lower the curing temperature and shorten the curing time.
- a curing accelerator (E) include microencapsulation of the above compound using a coating agent such as a compound containing a tertiary amino group, imidazole or a derivative thereof, an organic phosphine, dimethylurea, an organic polymer or an inorganic compound. And the like.
- Compounds containing tertiary amino groups include 1,8-diazabicyclo (5,4,0) undecene-7, triethylenediamine, benzyldimethylamine, triethanolamine, dimethylaminoethanol, tris (dimethylaminomethyl) phenol, etc. Is exemplified.
- imidazole and its derivatives examples include 1-cyanoethyl-2-phenylimidazole, 2-phenylimidazole, 2-ethyl-4 (5) -methylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium Trimellitate, 2,4-diamino-6- [2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine, 2,4-diamino-6- [2′-ethyl-4′-methylimidazolyl] -(1 ')]-ethyl-s-triazine, 2,
- organic phosphines include tributylphosphine, methyldiphenylphosphine, triphenylphosphine, diphenylphosphine, and phenylphosphine.
- examples of the phosphonium salt include tetraphenylphosphonium / tetraphenylborate, tetraphenylphosphonium / ethyltriphenylborate, and tetrabutylphosphonium / tetrabutylborate.
- examples of the tetraphenylboron salt include 2-ethyl-4-methylimidazole / tetraphenylborate, N-methylmorpholine / tetraphenylborate and the like.
- imidazole compounds (imidazole or its derivatives) and organic polymer or inorganic compound coatings are used because of their relatively long pot life, high curability in the middle temperature range, and high heat resistance of the cured resin. It is preferable to use a microencapsulated product of the above compound.
- curing accelerators (E) may be used alone or in a combination of two or more in any combination and ratio.
- the content of the curing accelerator (E) is based on 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B).
- the amount is preferably 0.001 to 15 parts by weight, more preferably 0.01 to 10 parts by weight. If the content of the curing accelerator (E) is less than 0.001 part by weight per 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B), the curing acceleration effect may be insufficient, If the amount exceeds part by weight, the catalyst curing reaction becomes dominant, and the reduction of voids may not be achieved.
- the interlayer filler composition of the present invention preferably contains a dispersant (F) in order to enhance the dispersibility of the filler (C).
- a dispersing agent (F) Any conventionally well-known thing can be used as a dispersing agent mix
- the content of the dispersant (F) may be any ratio as long as it can solve the problems of the present invention.
- the dispersant (F) is preferably 0.1 to 4 parts by weight, more preferably 0.1 to 2 parts by weight.
- the interlayer filler composition of the present invention may contain various additives other than those described above within a range not impairing the effects of the present invention for the purpose of further improving the functionality.
- additives include coupling agents for improving bondability and bondability between the epoxy resin (A) and the filler (C), UV inhibitors for improving storage stability, antioxidants, plasticizers, Examples include flame retardants, colorants, fluidity improvers, adhesion improvers with substrates (for example, thermoplastic oligomers), and the like.
- any of these other additives may be used alone, or two or more of them may be used in a combination and ratio.
- the amount of other additives used is that of an epoxy resin (to the extent that necessary functionality is obtained). It is preferably 10 parts by weight or less, more preferably 5 parts by weight or less, per 100 parts by weight of the total of A) and the curing agent (B).
- Examples of the coupling agent include silane coupling agents and titanate coupling agents.
- silane coupling agents include epoxy silanes such as ⁇ -glycidoxypropyltrimethoxysilane, ⁇ -glycidoxypropyltriethoxysilane, ⁇ - (3,4-epoxycyclohexyl) ethyltrimethoxysilane, and ⁇ -aminopropyl.
- Triethoxysilane N- ⁇ (aminoethyl) ⁇ -aminopropyltrimethoxysilane, N- ⁇ (aminoethyl) ⁇ -aminopropylmethyldimethoxysilane, ⁇ -aminopropyltrimethoxysilane, ⁇ -ureidopropyltriethoxysilane, etc.
- Aminosilanes such as 3-mercaptopropyltrimethoxysilane, p-styryltrimethoxysilane, vinyltrichlorosilane, vinyltris ( ⁇ -methoxyethoxy) silane, vinyltrimethoxysilane, vinyltriethoxysilane, ⁇ Methacryloxypropyl trimethoxysilane vinylsilane such, further, epoxy, amino-based, and a silane of the polymer type vinyl.
- mercaptosilanes such as 3-mercaptopropyltrimethoxysilane, p-styryltrimethoxysilane, vinyltrichlorosilane, vinyltris ( ⁇ -methoxyethoxy) silane, vinyltrimethoxysilane, vinyltriethoxysilane, ⁇ Methacryloxypropyl trimethoxysilane vinylsilane such, further, epoxy, amino-based, and a silane of the polymer type vinyl.
- Titanate coupling agents include isopropyl triisostearoyl titanate, isopropyl tri (N-aminoethyl / aminoethyl) titanate, diisopropyl bis (dioctyl phosphate) titanate, tetraisopropyl bis (dioctyl phosphite) titanate, tetraoctyl bis (ditridecyl) Examples thereof include phosphite) titanate, tetra (2,2-diallyloxymethyl-1-butyl) bis (ditridecyl) phosphite titanate, bis (dioctylpyrophosphate) oxyacetate titanate, and bis (dioctylpyrophosphate) ethylene titanate.
- These coupling agents may be used alone or in a combination of two or more in any combination and ratio.
- the content is preferably about 0.1 to 2.0% by weight with respect to the total solid content in the interlayer filler composition. If the amount of the coupling agent is small, the effect of improving the adhesion between the epoxy resin (A) and the filler (C), which is a matrix resin, by blending the coupling agent cannot be sufficiently obtained, and the amount is too large. There is a problem that the coupling agent bleeds out from the obtained cured product.
- the interlayer filler composition of the present invention may contain thermoplastic oligomers in order to improve the fluidity during molding and to improve the adhesion to the substrate.
- Thermoplastic oligomers include C5 or C9 petroleum resin, styrene resin, indene resin, indene / styrene copolymer resin, indene / styrene / phenol copolymer resin, indene / coumarone copolymer resin, indene / benzothiophene. Examples thereof include copolymer resins. These may be used alone or in combination of two or more.
- the content thereof is usually 2 to 30 parts by weight, preferably 5 to 20 parts by weight with respect to 100 parts by weight of the epoxy resin (A). Part.
- the interlayer filler composition of the present invention may further contain a surfactant, an emulsifier, a low elasticity agent, a diluent, an antifoaming agent, an ion trapping agent and the like.
- any of conventionally known anionic surfactants, nonionic surfactants, and cationic surfactants can be used.
- fluorine surfactants in which some or all of the C—H bonds are C—F bonds can also be preferably used.
- the content thereof is usually 0.001 to 0.00 with respect to 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B). 1 part by weight, preferably 0.003 to 0.05 part by weight.
- An organic solvent can also be added to the interlayer filler composition of the present invention.
- the organic solvent include acetone, methyl ethyl ketone (MEK), methyl isobutyl ketone, methyl amyl ketone, cyclohexanone and other ketones, ethyl acetate and other esters, ethylene glycol monomethyl ether and other ethers, N, N-dimethylformamide, and the like.
- Amides such as N, N-dimethylacetamide, alcohols such as methanol and ethanol, alkanes such as hexane and cyclohexane, and aromatics such as toluene and xylene.
- ketones such as methyl ethyl ketone and cyclohexanone, esters and ethers are preferable, and ketones such as methyl ethyl ketone and cyclohexanone are particularly preferable.
- These organic solvents may be used alone or in a combination of two or more in any combination and ratio.
- the interlayer filler composition of the present invention preferably does not contain an organic solvent.
- the interlayer filler composition of the present invention usually comprises an epoxy resin (A), a curing agent (B), a filler (C), a flux (D), a curing accelerator (E) used as necessary, a dispersing agent ( F) and other additive components are uniformly mixed by a mixer or the like and then kneaded by a heating roll, a kneader or the like.
- a dispersing agent F
- other additive components are uniformly mixed by a mixer or the like and then kneaded by a heating roll, a kneader or the like.
- composition ingredients In the following examples and comparative examples, the compounding components used for the preparation of the interlayer filler composition are as follows.
- ⁇ Curing agent (B)> Amine curing agent (B1): Wakayama Seika Kogyo Co., Ltd. Product name “Seika Cure S” (amine value 124 g / equivalent, melting point 177 ° C.)
- Acid anhydride curing agent (B3) manufactured by Mitsubishi Chemical Corporation “jER Cure YH306” (3,4-dimethyl-6- (2-methyl-1-propenyl) -4-cyclohexene-1,2-dicarboxylic acid anhydride Product, acid anhydride equivalent 117 g / equivalent, viscosity at 25 ° C. 0.1 Pa ⁇ s)
- Curing accelerator (E) Product name “Novacure HXA3792” (mixture of microencapsulated amine curing agent and bisphenol A liquid epoxy resin) manufactured by Asahi Kasei E-Materials
- Dispersant (F) Dispersant (F): Product name “BYK-2155” (block copolymer having pigment affinity group) manufactured by Big Chemie Japan
- Viscosity of interlayer filler composition Viscoelasticity measuring device (Physica MCR102) manufactured by Anton Paar Japan Co., Ltd., and viscosity of interlayer filler composition as follows (complex viscosity by dynamic viscoelasticity measurement) was measured. First, the interlayer filler composition to be measured was placed between a parallel plate dish (Parallel Plate Dish) and a parallel plate ( ⁇ 20 mm), and dynamic viscoelasticity measurement was performed. The measurement condition is that 0.5% sinusoidal distortion is applied to the sample, the frequency of the distortion is 1 (Hz), and the viscosity in the process of raising the temperature at a rate of 3 ° C. per minute is from 40 ° C. to 200 ° C. measured to determine the viscosity at 130 ° C. as eta 130.
- inorganic filler (C1) 18.0 g was added, and the mixture was stirred for 3 minutes at 2000 rpm and 1 kPa with a self-revolving stirrer, and further stirred for 5 minutes at 1600 rpm and 1 kPa.
- 0.5 part by weight (0.06 g) of flux (D1) was added to the total resin amount, and the mixture was stirred at 1600 rpm and 1 kPa for 5 minutes to prepare an interlayer filler composition.
- ⁇ 130 of this interlayer filler composition was 1 Pa ⁇ s or less.
- interposer IP80Model I, 10 mm square
- the interposer (IP80 Model I) coated with this interlayer filler composition is on the stage side
- the silicon solder bump chip CC80 Model I, 7.3 mm square
- the thermocompression bonding device “Flip Chip Bonder ( FC3000S) ”and thermocompression bonding was performed at 20 N (3.8 Kgf / cm 2 ) for the bonding time shown in Table 1 under the head and stage temperature conditions shown in Table 1. Then, it heat-hardened at 165 degreeC for 2 hours, and manufactured the semiconductor device.
- Example 19 and 20 In a 150 cc stirring vessel, 3.56 g of epoxy resin (A1), 3.56 g of epoxy resin (A2), and 4.87 g of acid anhydride curing agent (B3) are weighed, and dispersant (F) is added thereto. Then, 1 part by weight (0.18 g) was blended and added to the total amount of filler (C), and the mixture was stirred at 2000 rpm and 1 kPa for 2 minutes using a self-revolving stirrer (ARV-310 manufactured by Sinky).
- A1 epoxy resin
- A2 epoxy resin
- B3 4.87 g of acid anhydride curing agent
- inorganic filler (C1) 18.0 g of inorganic filler (C1) was added, and the mixture was stirred for 3 minutes at 2000 rpm 1 and kPa with a self-revolving stirrer, and further stirred for 5 minutes at 1600 rpm and 1 kPa.
- 1.8 g of the curing accelerator (E) and 0.5 part by weight (0.06 g) of the flux (D1) are added to the total amount of resin, and the mixture is stirred at 1600 rpm and 1 kPa for 5 minutes to obtain an interlayer filler.
- a composition was prepared. ⁇ 130 of this interlayer filler composition was 1 Pa ⁇ s or less.
- heat-pressure bonding was performed under the bonding conditions shown in Table 1 to manufacture a semiconductor device.
- Examples 1 to 20 and Comparative Examples 1 to 8 were evaluated for bondability and voids, and the results are shown in Table 1.
- “Over” means a conduction failure (resistance value is 1 M ⁇ or more).
- inorganic filler (C2) was added, and after stirring for 5 minutes at 1800 rpm 1 kPa with a self-revolving stirrer, 16.8 g of inorganic filler (C3) was further added and stirred for 5 minutes at 1800 rpm 1 kPa.
- 0.96 g of a curing accelerator (E) is added and stirred for 5 minutes at 1800 rpm 1 kPa.
- 1 part by weight (0.06 g) of flux (D2) is added to the total amount of resin, and 5 at 1800 rpm 1 kPa. Stirring was performed for a minute to obtain an interlayer filler composition.
- ⁇ 130 of this interlayer filler composition was 1 Pa ⁇ s or less.
- interposer About 10 mg (about 20 mg / cm 2 per effective area) of the interlayer filler composition was applied to an interposer (IP80Model I, 10 mm square) manufactured by WALTS while heating to 70 ° C.
- IP80ModelI an interposer
- CC80ModelI, 7.3 mm square silicon solder bump chip coated with this interlayer filler composition
- FC3000S thermocompression bonding apparatus “Flip Chip Bonder (FC3000S)” manufactured by Toray Engineering Co., Ltd.
- FC3000S thermocompression bonding apparatus “Flip Chip Bonder (FC3000S)” manufactured by Toray Engineering Co., Ltd.
- FC3000S Frlip Chip Bonder
- An interposer was set on the side shown in Table 2, and thermocompression bonding was performed under the pressure conditions of the head and stage shown in Table 2 with a pressure of 20 N (3.8 kgf / cm 2 ) and a heating and pressing time of 5 seconds. Then, it heat-hardened at 180 degreeC for 2 hours, and
- Example 25 About 2 mg (about 4 mg / cm 2 per effective area) of the interlayer filler composition used in Example 1 was applied to an interposer (IP80Model I, 10 mm square) manufactured by WALTS while heating to 70 ° C. Using an interposer (IP80Model I) and a silicon TSV chip (CC80TSV-2, 7.3 mm square) coated with this interlayer filler composition, using a thermocompression bonding apparatus “Flip Chip Bonder (FC3000S)” manufactured by Toray Engineering Co., Ltd.
- FC3000S thermocompression bonding apparatus
- thermocompression bonding was performed at a head temperature of 250 ° C., a stage temperature of 250 ° C., a bonding time of 5 sec, and a bonding pressure of 20 N (3.8 kgf / cm 2 ).
- about 8 mg of the interlayer filler composition was applied to the bonded substrates while heating to 70 ° C. (about 16 mg / cm 2 per effective area), and a silicon solder bump chip (CC80 Model I, 7.3 mm square) Were heat-press bonded under the same conditions. Then, it heat-hardened at 165 degreeC for 2 hours, and manufactured the semiconductor device. As a result, there was no void and conduction was confirmed.
- FIG. 3 shows an appearance shape and a cross-sectional photograph of the obtained semiconductor device.
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Abstract
Provided is a method for making a semiconductor device wherein a cured adhesive layer that is excellent in bonding property and in conductivity can be formed without occurrence of voids in the cured adhesive layer. In a method for making a semiconductor device by using thermocompression bonding equipment to thermocompression-bond together a semiconductor chip having solder bumps and a semiconductor board having electrode pads with an interlayer filler composition intervening therebetween, the bonding is performed on temperature condition that the temperatures of the head and stage of the thermocompression bonding equipment are in a range defined, in a graph having an ordinate axis representative of the head temperature and having an abscissa axis representative of the stage temperature, by the following four equations:
H + 1.9S = 590 Equation 1,
H + 0.526S = 310 Equation 2,
H + 0.8S = 580 Equation 3,
H + 1.25S = 725 Equation 4,
where H is the head temperature (centigrade) and S is the stage temperature (centigrade).
Description
本発明は、半田バンプを有する半導体チップと電極パッドを有する半導体基板とを、層間充填剤組成物を介して熱圧着接合装置により熱圧着接合して半導体デバイスを製造する方法に関する。
The present invention relates to a method of manufacturing a semiconductor device by thermocompression bonding a semiconductor chip having solder bumps and a semiconductor substrate having electrode pads by means of a thermocompression bonding apparatus via an interlayer filler composition.
近年、半導体デバイスの更なる性能向上のために、トランジスタや配線の微細化に加えて、半導体デバイス層が形成された半導体基板や、有機基板などの複数の基板を、基板面に対して垂直に積み上げて積層化した積層型半導体装置の研究開発が進められている。
積層型半導体装置には、半導体基板と有機基板とを積層したものなどが知られているが、より具体的には、半導体基板同士が、その基板間において半田バンプ等の電気信号端子等で接続されると共に、基板間に層間充填剤組成物が充填されており、層間充填剤組成物層により基板同士が接着された構造を有する三次元積層型半導体装置が知られている。 In recent years, in order to further improve the performance of semiconductor devices, in addition to miniaturization of transistors and wiring, a plurality of substrates such as a semiconductor substrate on which a semiconductor device layer is formed and an organic substrate are placed perpendicular to the substrate surface. Research and development of stacked semiconductor devices stacked and stacked is underway.
Multilayer semiconductor devices are known in which a semiconductor substrate and an organic substrate are stacked. More specifically, semiconductor substrates are connected to each other with electrical signal terminals such as solder bumps between the substrates. In addition, a three-dimensional stacked semiconductor device having a structure in which an interlayer filler composition is filled between substrates and the substrates are bonded to each other by an interlayer filler composition layer is known.
積層型半導体装置には、半導体基板と有機基板とを積層したものなどが知られているが、より具体的には、半導体基板同士が、その基板間において半田バンプ等の電気信号端子等で接続されると共に、基板間に層間充填剤組成物が充填されており、層間充填剤組成物層により基板同士が接着された構造を有する三次元積層型半導体装置が知られている。 In recent years, in order to further improve the performance of semiconductor devices, in addition to miniaturization of transistors and wiring, a plurality of substrates such as a semiconductor substrate on which a semiconductor device layer is formed and an organic substrate are placed perpendicular to the substrate surface. Research and development of stacked semiconductor devices stacked and stacked is underway.
Multilayer semiconductor devices are known in which a semiconductor substrate and an organic substrate are stacked. More specifically, semiconductor substrates are connected to each other with electrical signal terminals such as solder bumps between the substrates. In addition, a three-dimensional stacked semiconductor device having a structure in which an interlayer filler composition is filled between substrates and the substrates are bonded to each other by an interlayer filler composition layer is known.
積層型半導体装置の製造方法として、半導体デバイス層を形成したウエハー上に、層間充填剤組成物(ICF:Inter Chip Fill)からなる層を形成し、必要に応じて加熱してBステージ化を行い、次いでダイシング(Dicing)によるチップの切り出しを行い、得られた半導体基板を複数積層し、加圧加熱による仮接合を繰り返し、最終的に加圧加熱条件下で本接合を行うプレアプライ法(Pre-applied process)によるプロセスが提案されている(例えば、非特許文献1参照)。
As a method of manufacturing a stacked semiconductor device, a layer made of an inter-layer filler composition (ICF: Inter Chip Fill) is formed on a wafer on which a semiconductor device layer is formed, and heated to be B-staged as necessary. Then, the chip is cut out by dicing, the obtained semiconductor substrates are stacked, a plurality of temporary bondings are repeated by pressure heating, and finally the pre-application method (Pre- A process based on applied process has been proposed (see, for example, Non-Patent Document 1).
図2は、プレアプライ法による半導体デバイスの製造方法を示す斜視図であり、ランド端子1Aとハンダ1Bとからなる複数の半田バンプ1が形成された半導体チップ2の上に、塗布ノズル4より層間充填剤組成物3を供給して(図2(a))、層間充填剤組成物層5を形成した後(図2(b))、必要に応じて、Bステージ化を行い、層間充填剤組成物層5が形成された半導体チップ2を反転させて、熱圧着接合装置のステージ(図示せず)上に載置された、電極パッド6が形成された半導体基板7上に層間充填剤組成物層5側を対向させて、図示しないヘッドにより押圧する(図示2(c))。熱圧着接合装置のヘッドとステージ間で、半導体基板7と半導体チップ2とを加熱加圧することにより、層間充填剤組成物を硬化させて、層間充填剤組成物の硬化接着層8を介して半導体チップ2と半導体基板7とが接合された半導体デバイス10を得ることができる(図2(d))。
FIG. 2 is a perspective view showing a method of manufacturing a semiconductor device by the pre-applied method, and an interlayer filling is performed by a coating nozzle 4 on a semiconductor chip 2 on which a plurality of solder bumps 1 composed of land terminals 1A and solder 1B are formed. After supplying the agent composition 3 (FIG. 2 (a)) and forming the interlayer filler composition layer 5 (FIG. 2 (b)), if necessary, the B-stage is formed, and the interlayer filler composition The semiconductor chip 2 on which the physical layer 5 is formed is reversed, and the interlayer filler composition is placed on the semiconductor substrate 7 on which the electrode pad 6 is formed, which is placed on the stage (not shown) of the thermocompression bonding apparatus. The layer 5 side is made to oppose, and it presses with the head which is not illustrated (illustration 2 (c)). By heating and pressurizing the semiconductor substrate 7 and the semiconductor chip 2 between the head and the stage of the thermocompression bonding apparatus, the interlayer filler composition is cured, and the semiconductor is interposed through the cured adhesive layer 8 of the interlayer filler composition. A semiconductor device 10 in which the chip 2 and the semiconductor substrate 7 are bonded can be obtained (FIG. 2D).
積層型半導体装置は、このような工程を繰り返し、図2(d)に示される半導体デバイス10の半導体チップ2(この場合、半導体チップ2の硬化接着層8とは反対側の面には電極パッドが形成されている。)上に、更に、図2(b)に示す層間充填剤組成物層5を形成した半導体チップ2を接着する工程を繰り返すことにより製造される。
The stacked semiconductor device repeats such a process, and an electrode pad is formed on the surface of the semiconductor chip 10 of the semiconductor device 10 shown in FIG. 2D (in this case, the surface opposite to the cured adhesive layer 8 of the semiconductor chip 2). 2) is further manufactured by repeating the step of bonding the semiconductor chip 2 on which the interlayer filler composition layer 5 shown in FIG. 2B is formed.
プレアプライ法による半導体デバイスの製造においては、以下のような課題がある。
(1) 硬化接着層にボイド(空隙)が生じる。ボイドの発生は、接合工程や硬化工程の加熱条件下で、層間充填剤組成物中の低分子成分などが揮発することが原因と考えられるが、硬化接着層にボイドが存在すると、電気的接合が損なわれる上に、温度変化などの収縮差などが大きくなり、接着面が剥がれたり割れたりすることで、半導体装置としての性能が損なわれる。
(2) 図2(a)に示されるように、半田バンプ1が形成された半導体チップ2上に、層間充填剤組成物3を供給して層間充填剤組成物層を形成する際、層間充填剤組成物3が半田バンプ1,1間の狭い間隙に十分に行きわたらないことによっても、上記(1)と同様、ボイドとなる空隙部が形成され、上記と同様の問題が起こる。 In manufacturing a semiconductor device by the pre-apply method, there are the following problems.
(1) Voids (voids) occur in the cured adhesive layer. The generation of voids is thought to be caused by the low-molecular components in the interlayer filler composition volatilizing under the heating conditions of the bonding process and curing process, but if voids exist in the cured adhesive layer, electrical bonding In addition, the shrinkage difference such as temperature change is increased, and the adhesion surface is peeled off or cracked, so that the performance as a semiconductor device is impaired.
(2) When the interlayer filler composition layer is formed by supplying theinterlayer filler composition 3 on the semiconductor chip 2 on which the solder bumps 1 are formed as shown in FIG. Even if the agent composition 3 does not reach the narrow gap between the solder bumps 1 and 1 sufficiently, a void portion that becomes a void is formed similarly to the above (1), and the same problem as described above occurs.
(1) 硬化接着層にボイド(空隙)が生じる。ボイドの発生は、接合工程や硬化工程の加熱条件下で、層間充填剤組成物中の低分子成分などが揮発することが原因と考えられるが、硬化接着層にボイドが存在すると、電気的接合が損なわれる上に、温度変化などの収縮差などが大きくなり、接着面が剥がれたり割れたりすることで、半導体装置としての性能が損なわれる。
(2) 図2(a)に示されるように、半田バンプ1が形成された半導体チップ2上に、層間充填剤組成物3を供給して層間充填剤組成物層を形成する際、層間充填剤組成物3が半田バンプ1,1間の狭い間隙に十分に行きわたらないことによっても、上記(1)と同様、ボイドとなる空隙部が形成され、上記と同様の問題が起こる。 In manufacturing a semiconductor device by the pre-apply method, there are the following problems.
(1) Voids (voids) occur in the cured adhesive layer. The generation of voids is thought to be caused by the low-molecular components in the interlayer filler composition volatilizing under the heating conditions of the bonding process and curing process, but if voids exist in the cured adhesive layer, electrical bonding In addition, the shrinkage difference such as temperature change is increased, and the adhesion surface is peeled off or cracked, so that the performance as a semiconductor device is impaired.
(2) When the interlayer filler composition layer is formed by supplying the
このようなことから、半導体チップ-基板間、或いは半導体チップ-半導体チップ間の接合にあたっては、硬化接着層にボイド(空隙)を発生させることなく、接合性、導通性に優れた硬化接着層を形成することが望まれる。
For this reason, when bonding between a semiconductor chip and a substrate or between a semiconductor chip and a semiconductor chip, a cured adhesive layer excellent in bondability and conductivity is formed without generating voids in the cured adhesive layer. It is desirable to form.
本発明は、半導体デバイスの製造において、半導体チップ-基板間、あるいは半導体チップ-半導体チップ間の接合の際に、硬化接着層にボイド(空隙)を発生させることなく、接合性、導通性に優れた硬化接着層を形成して、高品質で信頼性の高い半導体デバイスを製造する方法を提供することを課題とする。
The present invention is excellent in bondability and conductivity without producing voids (voids) in the cured adhesive layer when bonding between a semiconductor chip and a semiconductor chip or between a semiconductor chip and a semiconductor chip in the manufacture of a semiconductor device. Another object of the present invention is to provide a method for manufacturing a high-quality and highly reliable semiconductor device by forming a cured adhesive layer.
本発明者は、上記課題を解決すべく鋭意検討した結果、上記課題を解決できることを見出し、本発明を完成するに至った。
As a result of intensive studies to solve the above problems, the present inventors have found that the above problems can be solved, and have completed the present invention.
すなわち、本発明は以下を要旨とする。
That is, the gist of the present invention is as follows.
[1]半田バンプを有する半導体チップと電極パッドを有する半導体基板とを、層間充填剤組成物を介して熱圧着接合装置により熱圧着接合して半導体デバイスを製造する方法において、該熱圧着接合装置のヘッド及びステージの温度が、ヘッド温度を縦軸、ステージ温度を横軸としたグラフにおいて、下記4つの式で囲まれた範囲内となる温度条件にて接合する半導体デバイスの製造法。
H+1.9S=590 …式1
H+0.526S=310 …式2
H+0.8S=580 …式3
H+1.25S=725 …式4
(式1~4中、Hは接合時のヘッド温度(℃)、Sは接合時のステージ温度(℃)を表す。) [1] In a method of manufacturing a semiconductor device by thermocompression bonding a semiconductor chip having a solder bump and a semiconductor substrate having an electrode pad by a thermocompression bonding apparatus through an interlayer filler composition, the thermocompression bonding apparatus The method of manufacturing a semiconductor device in which the temperature of the head and stage is bonded under a temperature condition in which the head temperature is on the vertical axis and the stage temperature is on the horizontal axis in the range surrounded by the following four equations.
H + 1.9S = 590 ...Formula 1
H + 0.526S = 310Formula 2
H + 0.8S = 580Formula 3
H + 1.25S = 725Formula 4
(Informulas 1 to 4, H represents the head temperature (° C.) during bonding, and S represents the stage temperature (° C.) during bonding.)
H+1.9S=590 …式1
H+0.526S=310 …式2
H+0.8S=580 …式3
H+1.25S=725 …式4
(式1~4中、Hは接合時のヘッド温度(℃)、Sは接合時のステージ温度(℃)を表す。) [1] In a method of manufacturing a semiconductor device by thermocompression bonding a semiconductor chip having a solder bump and a semiconductor substrate having an electrode pad by a thermocompression bonding apparatus through an interlayer filler composition, the thermocompression bonding apparatus The method of manufacturing a semiconductor device in which the temperature of the head and stage is bonded under a temperature condition in which the head temperature is on the vertical axis and the stage temperature is on the horizontal axis in the range surrounded by the following four equations.
H + 1.9S = 590 ...
H + 0.526S = 310
H + 0.8S = 580
H + 1.25S = 725
(In
[2]半田バンプを有する半導体チップと電極パッドを有する半導体基板とを、個別に温度調節できるヘッド及びステージを有する熱圧着接合装置により、層間充填剤組成物を介して熱圧着接合して半導体デバイスを製造する方法であって、該熱圧着接合装置のヘッド及びステージの温度が、ヘッド温度を縦軸、ステージ温度を横軸としたグラフにおいて、下記4つの式で囲まれた範囲内となる温度条件にて接合する半導体デバイスの製造法。
H+1.9S=590 …式1
H+0.526S=310 …式2
H+0.8S=580 …式3
H+1.25S=725 …式4
(式1~4中、Hは接合時のヘッド温度(℃)、Sは接合時のステージ温度(℃)を表す。) [2] A semiconductor device in which a semiconductor chip having solder bumps and a semiconductor substrate having electrode pads are bonded by thermocompression bonding via an interlayer filler composition by a thermocompression bonding apparatus having a head and a stage capable of individually adjusting the temperature. The temperature of the head and the stage of the thermocompression bonding apparatus is a temperature surrounded by the following four formulas in a graph with the head temperature as the vertical axis and the stage temperature as the horizontal axis: A manufacturing method for semiconductor devices that are bonded under certain conditions.
H + 1.9S = 590 ...Formula 1
H + 0.526S = 310Formula 2
H + 0.8S = 580Formula 3
H + 1.25S = 725Formula 4
(Informulas 1 to 4, H represents the head temperature (° C.) during bonding, and S represents the stage temperature (° C.) during bonding.)
H+1.9S=590 …式1
H+0.526S=310 …式2
H+0.8S=580 …式3
H+1.25S=725 …式4
(式1~4中、Hは接合時のヘッド温度(℃)、Sは接合時のステージ温度(℃)を表す。) [2] A semiconductor device in which a semiconductor chip having solder bumps and a semiconductor substrate having electrode pads are bonded by thermocompression bonding via an interlayer filler composition by a thermocompression bonding apparatus having a head and a stage capable of individually adjusting the temperature. The temperature of the head and the stage of the thermocompression bonding apparatus is a temperature surrounded by the following four formulas in a graph with the head temperature as the vertical axis and the stage temperature as the horizontal axis: A manufacturing method for semiconductor devices that are bonded under certain conditions.
H + 1.9S = 590 ...
H + 0.526S = 310
H + 0.8S = 580
H + 1.25S = 725
(In
[3]前記層間充填剤組成物の130℃での粘度が100Pa・s以下である上記[1]又は[2]に記載の半導体デバイスの製造法。
[4]前記層間充填剤組成物は、エポキシ樹脂(A)、硬化剤(B)、フィラー(C)及びフラックス(D)を含有する上記[1]乃至[3]のいずれかに記載の半導体デバイスの製造法。
[5]前記層間充填剤組成物は、更に硬化促進剤(E)を含有する上記[4]に記載の半導体デバイスの製造法。 [3] The method for producing a semiconductor device according to the above [1] or [2], wherein the interlayer filler composition has a viscosity at 130 ° C. of 100 Pa · s or less.
[4] The semiconductor according to any one of [1] to [3], wherein the interlayer filler composition contains an epoxy resin (A), a curing agent (B), a filler (C), and a flux (D). Device manufacturing method.
[5] The method for producing a semiconductor device according to [4], wherein the interlayer filler composition further contains a curing accelerator (E).
[4]前記層間充填剤組成物は、エポキシ樹脂(A)、硬化剤(B)、フィラー(C)及びフラックス(D)を含有する上記[1]乃至[3]のいずれかに記載の半導体デバイスの製造法。
[5]前記層間充填剤組成物は、更に硬化促進剤(E)を含有する上記[4]に記載の半導体デバイスの製造法。 [3] The method for producing a semiconductor device according to the above [1] or [2], wherein the interlayer filler composition has a viscosity at 130 ° C. of 100 Pa · s or less.
[4] The semiconductor according to any one of [1] to [3], wherein the interlayer filler composition contains an epoxy resin (A), a curing agent (B), a filler (C), and a flux (D). Device manufacturing method.
[5] The method for producing a semiconductor device according to [4], wherein the interlayer filler composition further contains a curing accelerator (E).
[6]前記層間充填剤組成物は、更に分散剤(F)を含有する上記[4]又は[5]に記載の半導体デバイスの製造法。
[7]硬化剤(B)が、エポキシ樹脂(A)の100重量部あたり、30~150重量部である、[4]乃至[6]のいずれかに記載の半導体デバイスの製造法。
[8]硬化剤(B)が、アミン系硬化剤および酸無水物系硬化剤から選ばれる少なくとも1種の硬化剤を含有する、[4]乃至[7]のいずれかに記載の半導体デバイスの製造法。
[9]硬化剤(B)が、エポキシ樹脂(A)中のエポキシ基に対する硬化剤(B)中の官能基の当量比で、0.8~1.5の範囲である、[8]に記載の半導体デバイスの製造法。 [6] The method for producing a semiconductor device according to [4] or [5], wherein the interlayer filler composition further contains a dispersant (F).
[7] The method for producing a semiconductor device according to any one of [4] to [6], wherein the curing agent (B) is 30 to 150 parts by weight per 100 parts by weight of the epoxy resin (A).
[8] The semiconductor device according to any one of [4] to [7], wherein the curing agent (B) contains at least one curing agent selected from an amine curing agent and an acid anhydride curing agent. Manufacturing method.
[9] The curing agent (B) is in the range of 0.8 to 1.5 in terms of the equivalent ratio of the functional group in the curing agent (B) to the epoxy group in the epoxy resin (A). The manufacturing method of the semiconductor device of description.
[7]硬化剤(B)が、エポキシ樹脂(A)の100重量部あたり、30~150重量部である、[4]乃至[6]のいずれかに記載の半導体デバイスの製造法。
[8]硬化剤(B)が、アミン系硬化剤および酸無水物系硬化剤から選ばれる少なくとも1種の硬化剤を含有する、[4]乃至[7]のいずれかに記載の半導体デバイスの製造法。
[9]硬化剤(B)が、エポキシ樹脂(A)中のエポキシ基に対する硬化剤(B)中の官能基の当量比で、0.8~1.5の範囲である、[8]に記載の半導体デバイスの製造法。 [6] The method for producing a semiconductor device according to [4] or [5], wherein the interlayer filler composition further contains a dispersant (F).
[7] The method for producing a semiconductor device according to any one of [4] to [6], wherein the curing agent (B) is 30 to 150 parts by weight per 100 parts by weight of the epoxy resin (A).
[8] The semiconductor device according to any one of [4] to [7], wherein the curing agent (B) contains at least one curing agent selected from an amine curing agent and an acid anhydride curing agent. Manufacturing method.
[9] The curing agent (B) is in the range of 0.8 to 1.5 in terms of the equivalent ratio of the functional group in the curing agent (B) to the epoxy group in the epoxy resin (A). The manufacturing method of the semiconductor device of description.
[10]半田バンプを有する半導体チップと電極パッドを有する半導体基板とを、層間充填剤組成物を介して熱圧着接合装置を用いて接合する工程を有する半導体デバイスの製造法において、該熱圧着装置のヘッドまたはステージのいずれか一方のみの温度が120℃以上の状態で半田バンプと電極パッドを接触させ、半田バンプと電極パッドが接触した後に、ヘッドまたはステージの、半田バンプと電極パッドとの接触時には120℃未満であった側の温度を半田の融点以上とする、半導体デバイスの製造法。
[10] In a method of manufacturing a semiconductor device, including a step of bonding a semiconductor chip having solder bumps and a semiconductor substrate having electrode pads using a thermocompression bonding apparatus via an interlayer filler composition, the thermocompression bonding apparatus The solder bump and electrode pad are brought into contact with each other when the temperature of only one of the head and the stage is 120 ° C. or higher. After the solder bump and the electrode pad are in contact, the contact between the solder bump and the electrode pad on the head or stage A method for manufacturing a semiconductor device, wherein the temperature on the side that is sometimes less than 120 ° C. is set to be equal to or higher than the melting point of solder.
[11]前記層間充填剤組成物を、ヘッドまたはステージの、半田バンプと電極パッドとの接触時には120℃未満である側にセットされる半導体チップまたは半導体基板に、予め塗布した後に接合する、[10]に記載の半導体デバイスの製造法。
[12]前記層間充填剤組成物の100℃での粘度が0.1~10Pa・sである、[10]又は[11]に記載の半導体デバイスの製造法。
[13]前記層間充填剤組成物が、エポキシ樹脂(A)、硬化剤(B)、フィラー(C)、およびフラックス(D)を含有する、[11]乃至[12]のいずれかに記載の半導体デバイスの製造法。
[14]前記層間充填剤組成物が、硬化促進剤(E)を含有する、[13]のいずれかに記載の半導体デバイスの製造法。 [11] The interlayer filler composition is pre-applied to a semiconductor chip or a semiconductor substrate that is set on the side of the head or stage that is less than 120 ° C. at the time of contact between the solder bump and the electrode pad. 10]. A manufacturing method of a semiconductor device given in 10].
[12] The method for producing a semiconductor device according to [10] or [11], wherein the interlayer filler composition has a viscosity at 100 ° C. of 0.1 to 10 Pa · s.
[13] The interlayer filler composition according to any one of [11] to [12], wherein the interlayer filler composition contains an epoxy resin (A), a curing agent (B), a filler (C), and a flux (D). Manufacturing method of semiconductor devices.
[14] The method for producing a semiconductor device according to any one of [13], wherein the interlayer filler composition contains a curing accelerator (E).
[12]前記層間充填剤組成物の100℃での粘度が0.1~10Pa・sである、[10]又は[11]に記載の半導体デバイスの製造法。
[13]前記層間充填剤組成物が、エポキシ樹脂(A)、硬化剤(B)、フィラー(C)、およびフラックス(D)を含有する、[11]乃至[12]のいずれかに記載の半導体デバイスの製造法。
[14]前記層間充填剤組成物が、硬化促進剤(E)を含有する、[13]のいずれかに記載の半導体デバイスの製造法。 [11] The interlayer filler composition is pre-applied to a semiconductor chip or a semiconductor substrate that is set on the side of the head or stage that is less than 120 ° C. at the time of contact between the solder bump and the electrode pad. 10]. A manufacturing method of a semiconductor device given in 10].
[12] The method for producing a semiconductor device according to [10] or [11], wherein the interlayer filler composition has a viscosity at 100 ° C. of 0.1 to 10 Pa · s.
[13] The interlayer filler composition according to any one of [11] to [12], wherein the interlayer filler composition contains an epoxy resin (A), a curing agent (B), a filler (C), and a flux (D). Manufacturing method of semiconductor devices.
[14] The method for producing a semiconductor device according to any one of [13], wherein the interlayer filler composition contains a curing accelerator (E).
本発明によれば、半導体デバイスの製造において、半導体チップ-基板間、或いは半導体チップ-半導体チップ間の接合の際に、硬化接着層にボイド(空隙)を発生させることなく、接合性、導通性に優れた硬化接着層を形成することができるため、高品質で信頼性に優れた半導体デバイスを製造することができる。
本発明によれば、積層型半導体装置のより一層の高速、高容量化を図ることが可能となる。 According to the present invention, in the manufacture of a semiconductor device, when bonding between a semiconductor chip and a substrate, or between a semiconductor chip and a semiconductor chip, no bonding (void) occurs in the cured adhesive layer, and the bonding property and conductivity Therefore, a high-quality and highly reliable semiconductor device can be manufactured.
According to the present invention, it is possible to further increase the speed and capacity of the stacked semiconductor device.
本発明によれば、積層型半導体装置のより一層の高速、高容量化を図ることが可能となる。 According to the present invention, in the manufacture of a semiconductor device, when bonding between a semiconductor chip and a substrate, or between a semiconductor chip and a semiconductor chip, no bonding (void) occurs in the cured adhesive layer, and the bonding property and conductivity Therefore, a high-quality and highly reliable semiconductor device can be manufactured.
According to the present invention, it is possible to further increase the speed and capacity of the stacked semiconductor device.
以下、本発明の実施の形態について説明するが、本発明は以下の実施の形態に限定されるものではなく、その要旨の範囲内で種々変形して実施することができる。
Hereinafter, embodiments of the present invention will be described, but the present invention is not limited to the following embodiments, and various modifications can be made within the scope of the gist of the present invention.
以下、本発明の半導体デバイスの製造法において、半田バンプを有する半導体チップと電極パッドを有する半導体基板との接合に用いる層間充填剤組成物を、「層間充填剤組成物」と称することがある。また、本発明における「半導体チップ」と「半導体基板」は、纏めて「基板」ということがある。半導体チップと半導体基板は、集積回路の製造において半導体用の基板として通常用いることができる任意の材質からなるものであって、半田バンプが形成された基板を「半導体チップ」、当該半田バンプと接合する電極パッドが形成されているものを「半導体基板」という。半導体チップ、及び半導体基板には、貫通電極(以下、TSVと略記することがある)、半導体素子回路などが形成されていても良く、基板間では、半田バンプと電極パッドを介して接続される。
なお、同一の基板に、半田バンプ及び電極パッドを有する基板が用いられる場合、その基板は、半導体チップとみなしても、半導体基板とみなしても構わない。ただし、一つの基板が同時に「半導体チップ」及び「半導体基板」とみなされることは無い。 Hereinafter, in the method for producing a semiconductor device of the present invention, an interlayer filler composition used for bonding a semiconductor chip having solder bumps and a semiconductor substrate having electrode pads may be referred to as an “interlayer filler composition”. Further, the “semiconductor chip” and “semiconductor substrate” in the present invention may be collectively referred to as “substrate”. The semiconductor chip and the semiconductor substrate are made of any material that can be normally used as a semiconductor substrate in the manufacture of an integrated circuit. The substrate on which the solder bump is formed is connected to the “semiconductor chip” and the solder bump. A substrate on which an electrode pad is formed is called a “semiconductor substrate”. The semiconductor chip and the semiconductor substrate may be provided with a through electrode (hereinafter sometimes abbreviated as TSV), a semiconductor element circuit, and the like, and are connected between the substrates via solder bumps and electrode pads. .
When a substrate having solder bumps and electrode pads is used for the same substrate, the substrate may be regarded as a semiconductor chip or a semiconductor substrate. However, a single substrate is not considered as a “semiconductor chip” and a “semiconductor substrate” at the same time.
なお、同一の基板に、半田バンプ及び電極パッドを有する基板が用いられる場合、その基板は、半導体チップとみなしても、半導体基板とみなしても構わない。ただし、一つの基板が同時に「半導体チップ」及び「半導体基板」とみなされることは無い。 Hereinafter, in the method for producing a semiconductor device of the present invention, an interlayer filler composition used for bonding a semiconductor chip having solder bumps and a semiconductor substrate having electrode pads may be referred to as an “interlayer filler composition”. Further, the “semiconductor chip” and “semiconductor substrate” in the present invention may be collectively referred to as “substrate”. The semiconductor chip and the semiconductor substrate are made of any material that can be normally used as a semiconductor substrate in the manufacture of an integrated circuit. The substrate on which the solder bump is formed is connected to the “semiconductor chip” and the solder bump. A substrate on which an electrode pad is formed is called a “semiconductor substrate”. The semiconductor chip and the semiconductor substrate may be provided with a through electrode (hereinafter sometimes abbreviated as TSV), a semiconductor element circuit, and the like, and are connected between the substrates via solder bumps and electrode pads. .
When a substrate having solder bumps and electrode pads is used for the same substrate, the substrate may be regarded as a semiconductor chip or a semiconductor substrate. However, a single substrate is not considered as a “semiconductor chip” and a “semiconductor substrate” at the same time.
〔半導体デバイスの製造法〕
まず、本発明の半導体デバイスの製造法について説明する。層間充填剤組成物については後述する。 [Method of manufacturing semiconductor devices]
First, the manufacturing method of the semiconductor device of this invention is demonstrated. The interlayer filler composition will be described later.
まず、本発明の半導体デバイスの製造法について説明する。層間充填剤組成物については後述する。 [Method of manufacturing semiconductor devices]
First, the manufacturing method of the semiconductor device of this invention is demonstrated. The interlayer filler composition will be described later.
本発明の半導体デバイスの製造法では、熱圧着接合装置を用いて、後述の層間充填剤組成物を介して、半田バンプを有する半導体チップと電極パッドを有する半導体基板とを加熱加圧接合するに当たり、熱圧着接合装置のヘッド及びステージの温度が、図1に示すヘッド温度を縦軸、ステージ温度を横軸としたグラフにおいて、下記4つの式で囲まれた範囲内となる温度条件として接合することを特徴とする。ここで、ヘッド温度とは、熱圧着接合装置のヘッドのヒータの温度であり、ステージ温度とは、熱圧着接合装置のステージのヒータの温度である。
H+1.9S=590 …式1
H+0.526S=310 …式2
H+0.8S=580 …式3
H+1.25S=725 …式4
但し、上記式1~4中、Hは接合時のヘッド温度(℃)、Sは接合時のステージ温度(℃)を表す。 In the method for producing a semiconductor device of the present invention, a thermocompression bonding apparatus is used to heat and press-bond a semiconductor chip having solder bumps and a semiconductor substrate having electrode pads via an interlayer filler composition described later. The temperature of the head and the stage of the thermocompression bonding apparatus is bonded as a temperature condition in the range surrounded by the following four formulas in a graph in which the head temperature shown in FIG. 1 is the vertical axis and the stage temperature is the horizontal axis. It is characterized by that. Here, the head temperature is the temperature of the heater of the head of the thermocompression bonding apparatus, and the stage temperature is the temperature of the heater of the stage of the thermocompression bonding apparatus.
H + 1.9S = 590 ...Formula 1
H + 0.526S = 310Formula 2
H + 0.8S = 580Formula 3
H + 1.25S = 725Formula 4
In theabove formulas 1 to 4, H represents the head temperature (° C.) during bonding, and S represents the stage temperature (° C.) during bonding.
H+1.9S=590 …式1
H+0.526S=310 …式2
H+0.8S=580 …式3
H+1.25S=725 …式4
但し、上記式1~4中、Hは接合時のヘッド温度(℃)、Sは接合時のステージ温度(℃)を表す。 In the method for producing a semiconductor device of the present invention, a thermocompression bonding apparatus is used to heat and press-bond a semiconductor chip having solder bumps and a semiconductor substrate having electrode pads via an interlayer filler composition described later. The temperature of the head and the stage of the thermocompression bonding apparatus is bonded as a temperature condition in the range surrounded by the following four formulas in a graph in which the head temperature shown in FIG. 1 is the vertical axis and the stage temperature is the horizontal axis. It is characterized by that. Here, the head temperature is the temperature of the heater of the head of the thermocompression bonding apparatus, and the stage temperature is the temperature of the heater of the stage of the thermocompression bonding apparatus.
H + 1.9S = 590 ...
H + 0.526S = 310
H + 0.8S = 580
H + 1.25S = 725
In the
本発明において、熱圧着接合装置のヘッド及びステージの温度は、個別に調整され、前記4つの式で囲まれた範囲内となる温度条件として接合が行われる。従って、接合しようとする基板を、高温槽等に代表される炉等に入れ、全体を加熱するような接合方法とは区別される。ただし、個別に温度調整した結果、ヘッド及びステージの温度が同じになることを排除するものではない。個別に温度調節できるヘッド及びステージを有する熱圧着接合装置としては、後述の実施例で用いた、東レエンジニアリング社製の熱圧着接合装置「フリップチップボンダ(FC3000S)」などを用いることができる。
In the present invention, the temperatures of the head and the stage of the thermocompression bonding apparatus are individually adjusted, and bonding is performed as a temperature condition within the range surrounded by the above four equations. Therefore, it is distinguished from a bonding method in which the substrates to be bonded are put in a furnace or the like typified by a high-temperature bath and the whole is heated. However, it does not exclude that the temperature of the head and the stage becomes the same as a result of the individual temperature adjustment. As a thermocompression bonding apparatus having a head and a stage capable of individually adjusting the temperature, a thermocompression bonding apparatus “Flip Chip Bonder (FC3000S)” manufactured by Toray Engineering Co., Ltd. used in the examples described later can be used.
個別に温度調整されるヘッド及びステージの温度は、それらの昇温に要する時間を短縮して生産効率を高めたり、昇温に必要なエネルギーを小さくしたりすることができるという理由から、どちらか一方が、他方の温度より低いことが好ましい。その結果、ヘッドの温度とステージの温度は、異なることが好ましい。
The temperature of the head and stage that are individually temperature-controlled is either because the time required to raise their temperature can be shortened to increase production efficiency or to reduce the energy required for temperature increase. One is preferably lower than the other. As a result, the head temperature and the stage temperature are preferably different.
本発明によれば、上記式1~式4で囲まれた温度領域で接合することにより、硬化接着層におけるボイドの発生を抑制して、半田バンプを有する半導体チップと電極パッドを有する半導体基板とを良好な接合性及び導通性で接合することができる。この式1~式4で囲まれた温度領域外では、ボイドの発生が多く、また、接合性に劣るものとなる。
上記式1~式4で囲まれた温度領域内であって、さらに好ましい温度領域は、以下の式 ~式 で囲まれた範囲内であり、特に好ましい温度領域は以下の式5~式8で囲まれた範囲内である。
H+1.774S=624 …式5
H+0.564S=352 …式6
H+0.72S=550 …式7
H+1.39S=764 …式8 According to the present invention, by bonding in the temperature range surrounded by theabove formulas 1 to 4, the generation of voids in the cured adhesive layer is suppressed, and the semiconductor chip having solder bumps and the semiconductor substrate having electrode pads are provided. Can be bonded with good bondability and conductivity. Outside the temperature range surrounded by these formulas 1 to 4, there are many voids, and the bondability is poor.
Within the temperature range surrounded by theabove formulas 1 to 4, a more preferable temperature range is within the range surrounded by the following formulas 1 to 4. Particularly preferable temperature ranges are the following formulas 5 to 8. It is within the enclosed range.
H + 1.774S = 624Formula 5
H + 0.564S = 352 ... Formula 6
H + 0.72S = 550Equation 7
H + 1.39S = 764 Formula 8
上記式1~式4で囲まれた温度領域内であって、さらに好ましい温度領域は、以下の式 ~式 で囲まれた範囲内であり、特に好ましい温度領域は以下の式5~式8で囲まれた範囲内である。
H+1.774S=624 …式5
H+0.564S=352 …式6
H+0.72S=550 …式7
H+1.39S=764 …式8 According to the present invention, by bonding in the temperature range surrounded by the
Within the temperature range surrounded by the
H + 1.774S = 624
H + 0.564S = 352 ... Formula 6
H + 0.72S = 550
H + 1.39S = 764 Formula 8
本発明においては、熱圧着接合装置による接合に当たり、上記温度条件を採用すればよいが、層間材料に求められる機能を十分に発揮するために、ステージ温度は70~500℃が好ましく、100~450℃がより好ましく、120~430℃が更に好ましく、ヘッド温度は70~500℃が好ましく、100~450℃がより好ましく、120~430℃が更に好ましい。また、電気的接合を確実に行うという点で、ヘッド及びステージの温度は一定以上に高いことが好ましく、少なくともいずれか一方が225℃より高い温度であることが好ましく、230℃以上であることがより好ましく、235℃以上であることが特に好ましい。
In the present invention, the above temperature condition may be employed for bonding by the thermocompression bonding apparatus, but the stage temperature is preferably 70 to 500 ° C., and 100 to 450 in order to sufficiently exhibit the functions required for the interlayer material. ° C is more preferable, 120 to 430 ° C is more preferable, the head temperature is preferably 70 to 500 ° C, more preferably 100 to 450 ° C, and still more preferably 120 to 430 ° C. Further, the temperature of the head and the stage is preferably higher than a certain point in order to ensure electrical bonding, and at least one of them is preferably higher than 225 ° C., more preferably 230 ° C. or higher. More preferred is 235 ° C. or higher.
上記の特定の温度条件での接合工程における加圧力は、0.1~50Kgf/cm2であり、特に好ましくは0.1~10Kgf/cm2である。加熱加圧時間は0.1~30秒であり、特に0.5~10秒とすることが好ましい。
なお、この熱圧着接合装置による加熱加圧接合後は、一旦装置より取り外し、室温にまで冷却した後、100~200℃に加熱する硬化処理を行ってもよい。 The applied pressure in the bonding step under the above specific temperature condition is 0.1 to 50 kgf / cm 2 , particularly preferably 0.1 to 10 kgf / cm 2 . The heating and pressing time is 0.1 to 30 seconds, and preferably 0.5 to 10 seconds.
Note that after the heat and pressure bonding by the thermocompression bonding apparatus, it may be once removed from the apparatus, cooled to room temperature, and then cured by heating to 100 to 200 ° C.
なお、この熱圧着接合装置による加熱加圧接合後は、一旦装置より取り外し、室温にまで冷却した後、100~200℃に加熱する硬化処理を行ってもよい。 The applied pressure in the bonding step under the above specific temperature condition is 0.1 to 50 kgf / cm 2 , particularly preferably 0.1 to 10 kgf / cm 2 . The heating and pressing time is 0.1 to 30 seconds, and preferably 0.5 to 10 seconds.
Note that after the heat and pressure bonding by the thermocompression bonding apparatus, it may be once removed from the apparatus, cooled to room temperature, and then cured by heating to 100 to 200 ° C.
本発明の半導体デバイスの製造法は、熱圧着接合装置のヘッド及びステージの温度を個別に調整して、上記の温度条件を採用すること以外は、常法に従って半田バンプを有する半導体チップと電極パッドを有する半導体基板との接合を行うことができる。例えば、図2(a)に示すように、ランド端子1Aとハンダ1Bとからなる複数の半田バンプ1が形成された半導体基板(半導体チップ)2の上に、塗布ノズル4より本発明の層間充填剤組成物3を供給することにより、図2(b)に示すように、層間充填剤組成物層5を形成した後、必要に応じて、Bステージ化を行う。その後、層間充填剤組成物層5が形成された半導体チップ2を上下反転させて、図2(c)に示すように、熱圧着接合装置のステージ(図示せず)上に載置された、電極パッド6が形成された半導体基板7上に、層間充填剤組成物層5側を対向させて、図示しないヘッドにより押圧する。熱圧着接合装置のヘッドとステージ間で、半導体基板7と半導体チップ2とを上記の温度条件にて加熱加圧することにより、層間充填剤組成物を硬化させて、図2(d)に示すように、層間充填剤組成物の硬化接着層8を介して半導体チップ2と半導体基板7とが接合された半導体デバイス10を得る。
The semiconductor device manufacturing method of the present invention includes a semiconductor chip and an electrode pad having solder bumps according to a conventional method, except that the temperature and temperature of the head and stage of the thermocompression bonding apparatus are individually adjusted and the above temperature conditions are adopted. It is possible to perform bonding with a semiconductor substrate having For example, as shown in FIG. 2A, the interlayer filling of the present invention is applied from a coating nozzle 4 onto a semiconductor substrate (semiconductor chip) 2 on which a plurality of solder bumps 1 composed of land terminals 1A and solder 1B are formed. By supplying the agent composition 3, as shown in FIG.2 (b), after forming the interlayer filler composition layer 5, B-stage is performed as needed. Thereafter, the semiconductor chip 2 on which the interlayer filler composition layer 5 was formed was turned upside down and placed on a stage (not shown) of a thermocompression bonding apparatus, as shown in FIG. The interlayer filler composition layer 5 side is opposed to the semiconductor substrate 7 on which the electrode pads 6 are formed, and pressed by a head (not shown). The interlayer filler composition is cured by heating and pressurizing the semiconductor substrate 7 and the semiconductor chip 2 between the head and the stage of the thermocompression bonding apparatus under the above temperature conditions, as shown in FIG. Then, the semiconductor device 10 is obtained in which the semiconductor chip 2 and the semiconductor substrate 7 are bonded via the cured adhesive layer 8 of the interlayer filler composition.
複数の半導体チップ2を有する積層型半導体装置は、このような工程を繰り返し、図2(d)に示される半導体デバイス10の半導体チップ2(この場合、半導体チップ2の硬化接着層8とは反対側の面には電極パッドが形成されている。)の上に更に、図2(b)に示す層間充填剤組成物層5を形成した半導体チップ2を接着する工程を繰り返すことにより製造することができる。この場合、既に接着されている第一の半導体チップと、その上に更に積層する第二の半導体チップでは、第一の半導体チップを本発明における半導体基板とみなし、第二の半導体チップを本発明における半導体チップとみなす。
A stacked semiconductor device having a plurality of semiconductor chips 2 repeats such a process, and the semiconductor chip 2 of the semiconductor device 10 shown in FIG. 2D (in this case, opposite to the cured adhesive layer 8 of the semiconductor chip 2). The electrode pad is formed on the side surface.) Further, it is manufactured by repeating the step of bonding the semiconductor chip 2 formed with the interlayer filler composition layer 5 shown in FIG. Can do. In this case, in the first semiconductor chip that has already been bonded and the second semiconductor chip that is further stacked thereon, the first semiconductor chip is regarded as the semiconductor substrate in the present invention, and the second semiconductor chip is in the present invention. It is regarded as a semiconductor chip.
本発明における半導体チップ及び半導体基板は、通常、集積回路の製造において半導体用の基板として用いることができる任意の材質からなる基板を用いることができる。なかでも、シリコン基板が好ましく使用される。シリコン基板としては、口径に応じた基板膜厚のまま用いても良いし、バックサイドエッチング(Backside Etching)やバックグラインド(Back grinding)等の裏面研磨により、100μm以下に薄膜化した後に用いても良い。
As the semiconductor chip and the semiconductor substrate in the present invention, a substrate made of any material that can be used as a semiconductor substrate in the manufacture of an integrated circuit can be used. Among these, a silicon substrate is preferably used. The silicon substrate may be used as it is depending on the diameter of the substrate, or may be used after being thinned to 100 μm or less by backside polishing such as backside etching or backgrinding. good.
半田バンプの形成には微細な半田ボールを用いても良いし、リソグラフィーにて開口部を形成後、開口部の下地に直接、又はニッケルや銅のポストを形成した上に半田めっきを施して、レジスト材を除去後、加熱処理により半田バンプを形成しても良い。半田の組成としては特に限定はされないが、電気的な接合性及び低温接合性を勘案して、錫を主要成分として含有する半田が好ましく用いられる。
Fine solder balls may be used to form solder bumps, and after forming openings by lithography, solder plating is performed directly on the base of the openings or after nickel or copper posts are formed, After removing the resist material, solder bumps may be formed by heat treatment. The solder composition is not particularly limited, but a solder containing tin as a main component is preferably used in consideration of electrical bondability and low-temperature bondability.
ランド端子は、基板上にPVD(Physical Vapor Deposition)等を用いて薄膜を成膜した後、リソグラフィーによるレジスト膜形成、及びドライ又はウエットエッチイングにより、不要部を除去することにより形成することができる。ランド端子の材料としては、半田バンプと接合可能なものであれば特に限定はされないが、半田との接合性及び信頼性等を勘案して、金、銅、ニッケルなどを好ましく用いることができる。
The land terminal can be formed by forming a thin film on the substrate using PVD (Physical Vapor Deposition) or the like and then removing unnecessary portions by lithography resist film formation and dry or wet etching. . The material of the land terminal is not particularly limited as long as it can be bonded to the solder bump, but gold, copper, nickel and the like can be preferably used in consideration of the bonding property and reliability to the solder.
プレアプライ法による層間充填剤組成物層は、従来公知の形成法、例えば、ディップ法、スピンコート法、スプレーコート法、ブレード法、その他の任意の方法で形成することができる。層間充填剤組成物層は、図2に示すように半田バンプを有する半導体チップ2側に形成してもよいし、後述の実施例におけるように、電極パッドを有する半導体基板7側に形成してもよいし、これらの両方に形成してもよい。
The interlayer filler composition layer by the pre-apply method can be formed by a conventionally known forming method, for example, a dip method, a spin coat method, a spray coat method, a blade method, or any other method. The interlayer filler composition layer may be formed on the side of the semiconductor chip 2 having solder bumps as shown in FIG. 2, or may be formed on the side of the semiconductor substrate 7 having electrode pads as in the examples described later. Alternatively, they may be formed on both of them.
半導体チップへの層間充填剤組成物の供給量は、半導体チップの面積当たり、1~50mg/cm2、特に2~30mg/cm2であることが好ましい。半導体基板側へ層間充填剤組成物を供給する場合や、半導体チップと半導体基板の両方に層間充填剤組成物を供給して層間充填剤組成物層を形成する場合も、この程度の供給量となるように、層間充填剤組成物を塗布すればよい。
The supply amount of interlayer filler composition to the semiconductor chip, per area of the semiconductor chip, 1 ~ 50mg / cm 2, it is particularly preferably 2 ~ 30mg / cm 2. When supplying an interlayer filler composition to the semiconductor substrate side, or when supplying an interlayer filler composition to both a semiconductor chip and a semiconductor substrate to form an interlayer filler composition layer, this amount of supply The interlayer filler composition may be applied so as to be.
半導体チップ(及び/又は半導体基板)上に層間充填剤組成物層を形成した後に、層間充填剤組成物中に含まれる低分子量成分などを除去するために、50~150℃の任意の温度、好ましくは60~130℃の任意の温度でベーキング処理を行い、Bステージ化処理を行ってもよい。
この際、一定の温度においてベーキング処理を行ってもよいが、組成物中の揮発成分除去を円滑に進めるために、減圧条件下にてベーキング処理を行ってもよい。また、樹脂の硬化が進行しない範囲で、段階的な昇温によるベーキング処理を行っても良い。例えば、初めに60℃、次に80℃、更に120℃で各5~90分程度のべーキング処理を実施することができる。 After forming the interlayer filler composition layer on the semiconductor chip (and / or semiconductor substrate), any temperature of 50 to 150 ° C. is used to remove low molecular weight components contained in the interlayer filler composition, Preferably, a B-stage process may be performed by performing a baking process at an arbitrary temperature of 60 to 130 ° C.
At this time, the baking treatment may be performed at a constant temperature, but in order to smoothly remove the volatile components in the composition, the baking treatment may be performed under reduced pressure conditions. Further, a baking process by stepwise temperature rise may be performed within a range in which the curing of the resin does not proceed. For example, baking can be performed for 5 to 90 minutes each at 60 ° C., then at 80 ° C., and further at 120 ° C.
この際、一定の温度においてベーキング処理を行ってもよいが、組成物中の揮発成分除去を円滑に進めるために、減圧条件下にてベーキング処理を行ってもよい。また、樹脂の硬化が進行しない範囲で、段階的な昇温によるベーキング処理を行っても良い。例えば、初めに60℃、次に80℃、更に120℃で各5~90分程度のべーキング処理を実施することができる。 After forming the interlayer filler composition layer on the semiconductor chip (and / or semiconductor substrate), any temperature of 50 to 150 ° C. is used to remove low molecular weight components contained in the interlayer filler composition, Preferably, a B-stage process may be performed by performing a baking process at an arbitrary temperature of 60 to 130 ° C.
At this time, the baking treatment may be performed at a constant temperature, but in order to smoothly remove the volatile components in the composition, the baking treatment may be performed under reduced pressure conditions. Further, a baking process by stepwise temperature rise may be performed within a range in which the curing of the resin does not proceed. For example, baking can be performed for 5 to 90 minutes each at 60 ° C., then at 80 ° C., and further at 120 ° C.
本発明に代表されるような、半田バンプを有する半導体チップと、電極パッドを有する半導体基板とを、層間充填材組成物を介して熱圧着接合装置を用いて接合する工程を有する半導体デバイスの製造法において、接合前段階の各種工程の条件も、高品質の半導体デバイスを製造するのに独立的に重要である。勿論、熱圧着接合装置を用いて接合する工程の条件と、接合前段階の各種工程の条件とが、両方好ましい条件である場合に特に高品質の半導体デバイスを製造することができる。
Manufacturing of a semiconductor device having a step of joining a semiconductor chip having a solder bump and a semiconductor substrate having an electrode pad using a thermocompression bonding apparatus through an interlayer filler composition, as typified by the present invention In the method, the conditions of the various processes before the bonding are also independently important for manufacturing a high-quality semiconductor device. Of course, a high quality semiconductor device can be manufactured especially when the conditions of the process of joining using a thermocompression bonding apparatus and the conditions of various processes before the joining are preferable conditions.
より具体的には、加熱加圧接合を行う前段階で半田バンプと電極パッドとは接触することになるが、その接触の際には、熱圧着装置のヘッドまたはステージのいずれか一方のみの温度が120℃以上の状態で半田バンプと電極パッドを接触させることが好ましい。そして、該接触の後に、ヘッドまたはステージの、半田バンプと電極パッドが接触した際には120℃未満であった側の温度を半田の融点以上の温度条件として、加熱加圧接合を行うことが好ましい。この場合、層間充填材組成物は、半田バンプと電極パッドが接触した際には120℃未満である側にセットされるチップまたは基板に、予め塗布しておくことが更に好ましい。この場合、層間充填材組成物の粘度が高すぎると、加熱加圧接合時の障害となる場合があるため、半田バンプと電極パッドが接触した際に120℃未満である側の温度は、40℃以上であることが好ましい。
More specifically, the solder bump and the electrode pad are in contact with each other before the heat and pressure bonding is performed, but at the time of the contact, the temperature of only one of the head or the stage of the thermocompression bonding apparatus is used. Preferably, the solder bump and the electrode pad are brought into contact with each other at a temperature of 120 ° C. or higher. Then, after the contact, heating and pressurizing bonding may be performed by setting the temperature of the head or stage on the side that is lower than 120 ° C. when the solder bump and the electrode pad are in contact with each other as a temperature condition equal to or higher than the melting point of the solder. preferable. In this case, the interlayer filler composition is more preferably preliminarily applied to a chip or a substrate set on the side that is lower than 120 ° C. when the solder bump and the electrode pad are in contact with each other. In this case, if the viscosity of the interlayer filler composition is too high, it may become an obstacle at the time of heat-pressure bonding. Therefore, when the solder bump and the electrode pad are in contact with each other, the temperature on the side of less than 120 ° C. is 40 It is preferable that the temperature is not lower than ° C.
層間充填剤組成物層を形成した後に、接合対象の半導体チップと、半導体チップおよび/または半導体基板とを仮接合してもよい。仮接合の温度としては、80℃~150℃の温度で行うことが好ましい。接合が複数層の場合には、前記仮接合を基板の層数分繰り返しても良いし、基板を複数層重ね合わせた後に、加熱してまとめて仮接合してもよい。仮接合は、必要に応じて基板間に、好ましくは1gf/cm2~50Kgf/cm2、より好ましくは10gf/cm2~10Kgf/cm2の荷重をかけて実施することが好ましい。
After forming the interlayer filler composition layer, the semiconductor chip to be bonded may be temporarily bonded to the semiconductor chip and / or the semiconductor substrate. The temperature for temporary bonding is preferably 80 ° C. to 150 ° C. When the bonding is performed in a plurality of layers, the temporary bonding may be repeated for the number of layers of the substrate, or the substrates may be stacked and then temporarily bonded together by heating. Provisional bonding, between the substrates as necessary, preferably 1gf / cm 2 ~ 50Kgf / cm 2, more preferably it is preferably carried out under a load of 10gf / cm 2 ~ 10Kgf / cm 2.
〔層間充填剤組成物〕
本発明の層間充填剤組成物は、好ましくはエポキシ樹脂(A)、硬化剤(B)、フィラー(C)及びフラックス(D)を含有し、130℃での粘度(以下「η130」と記載する場合がある。)が好ましくは100Pa・s以下である。
本発明の層間充填剤組成物は、更に、硬化促進剤(E)及び分散剤(F)を含有することが好ましい。 (Interlayer filler composition)
The interlayer filler composition of the present invention preferably contains an epoxy resin (A), a curing agent (B), a filler (C) and a flux (D), and has a viscosity at 130 ° C. (hereinafter referred to as “η 130 ”). Is preferably 100 Pa · s or less.
The interlayer filler composition of the present invention preferably further contains a curing accelerator (E) and a dispersing agent (F).
本発明の層間充填剤組成物は、好ましくはエポキシ樹脂(A)、硬化剤(B)、フィラー(C)及びフラックス(D)を含有し、130℃での粘度(以下「η130」と記載する場合がある。)が好ましくは100Pa・s以下である。
本発明の層間充填剤組成物は、更に、硬化促進剤(E)及び分散剤(F)を含有することが好ましい。 (Interlayer filler composition)
The interlayer filler composition of the present invention preferably contains an epoxy resin (A), a curing agent (B), a filler (C) and a flux (D), and has a viscosity at 130 ° C. (hereinafter referred to as “η 130 ”). Is preferably 100 Pa · s or less.
The interlayer filler composition of the present invention preferably further contains a curing accelerator (E) and a dispersing agent (F).
[粘度]
本発明の層間充填剤組成物は、130℃での粘度η130が100Pa・s以下の低粘度であることが好ましい。層間充填剤組成物のη130が100Pa・sよりも高いと、接合時に層間充填剤組成物が流動しにくくなり、接合不良が生じる場合がある。本発明の層間充填剤組成物のη130は、より好ましくは50Pa・s以下、特に好ましくは10Pa・s以下である。ただし、この粘度が過度に低いとフィレット形成(Fillet Formation)が難しくなるため、本発明の層間充填剤組成物のη130は、0.1Pa・s以上であることが好ましい。 [viscosity]
The interlayer filler composition of the present invention preferably has a low viscosity with a viscosity η 130 at 130 ° C. of 100 Pa · s or less. If the η 130 of the interlayer filler composition is higher than 100 Pa · s, the interlayer filler composition is difficult to flow during bonding, and bonding failure may occur. Η 130 of the interlayer filler composition of the present invention is more preferably 50 Pa · s or less, and particularly preferably 10 Pa · s or less. However, if this viscosity is excessively low, fillet formation becomes difficult, so that the η 130 of the interlayer filler composition of the present invention is preferably 0.1 Pa · s or more.
本発明の層間充填剤組成物は、130℃での粘度η130が100Pa・s以下の低粘度であることが好ましい。層間充填剤組成物のη130が100Pa・sよりも高いと、接合時に層間充填剤組成物が流動しにくくなり、接合不良が生じる場合がある。本発明の層間充填剤組成物のη130は、より好ましくは50Pa・s以下、特に好ましくは10Pa・s以下である。ただし、この粘度が過度に低いとフィレット形成(Fillet Formation)が難しくなるため、本発明の層間充填剤組成物のη130は、0.1Pa・s以上であることが好ましい。 [viscosity]
The interlayer filler composition of the present invention preferably has a low viscosity with a viscosity η 130 at 130 ° C. of 100 Pa · s or less. If the η 130 of the interlayer filler composition is higher than 100 Pa · s, the interlayer filler composition is difficult to flow during bonding, and bonding failure may occur. Η 130 of the interlayer filler composition of the present invention is more preferably 50 Pa · s or less, and particularly preferably 10 Pa · s or less. However, if this viscosity is excessively low, fillet formation becomes difficult, so that the η 130 of the interlayer filler composition of the present invention is preferably 0.1 Pa · s or more.
このような粘度の層間充填剤組成物を調製するためには、層間充填剤組成物に含まれるエポキシ樹脂(A)として低粘度のものを用いたり、硬化剤(B)や、その他の成分の配合組成を調整すればよい。
In order to prepare an interlayer filler composition having such a viscosity, a low-viscosity epoxy resin (A) contained in the interlayer filler composition is used, or a curing agent (B) or other components are used. What is necessary is just to adjust a composition.
なお、本発明において、層間充填剤組成物の粘度は、後述の実施例の項に記載の方法で測定された値を採用する。
In the present invention, the viscosity of the interlayer filler composition is a value measured by the method described in the Examples section below.
[エポキシ樹脂(A)]
本発明で用いるエポキシ樹脂(A)は、本発明の層間充填剤組成物のガラス転移温度を向上させるため、2以上のエポキシ基を有する化合物であることが好ましい。また、本発明の層間充填剤組成物を熱硬化させた硬化物の破壊靭性値K1c値を高いものとするためには、1分子中に含まれるエポキシ基の範囲は1以上8以下であることが好ましく、より好ましくは2以上3以下である。 [Epoxy resin (A)]
The epoxy resin (A) used in the present invention is preferably a compound having two or more epoxy groups in order to improve the glass transition temperature of the interlayer filler composition of the present invention. In order to increase the fracture toughness value K1c value of the cured product obtained by thermosetting the interlayer filler composition of the present invention, the range of epoxy groups contained in one molecule is 1 or more and 8 or less. Is more preferable, and more preferably 2 or more and 3 or less.
本発明で用いるエポキシ樹脂(A)は、本発明の層間充填剤組成物のガラス転移温度を向上させるため、2以上のエポキシ基を有する化合物であることが好ましい。また、本発明の層間充填剤組成物を熱硬化させた硬化物の破壊靭性値K1c値を高いものとするためには、1分子中に含まれるエポキシ基の範囲は1以上8以下であることが好ましく、より好ましくは2以上3以下である。 [Epoxy resin (A)]
The epoxy resin (A) used in the present invention is preferably a compound having two or more epoxy groups in order to improve the glass transition temperature of the interlayer filler composition of the present invention. In order to increase the fracture toughness value K1c value of the cured product obtained by thermosetting the interlayer filler composition of the present invention, the range of epoxy groups contained in one molecule is 1 or more and 8 or less. Is more preferable, and more preferably 2 or more and 3 or less.
本発明の層間充填剤組成物の熱伝導性を向上させるため、本発明で用いるエポキシ樹脂(A)としては、ビスフェノールA型骨格、ビスフェノールF型骨格、又はビフェニル骨格の芳香環を有するエポキシ化合物を用いることが好ましい。
In order to improve the thermal conductivity of the interlayer filler composition of the present invention, the epoxy resin (A) used in the present invention is an epoxy compound having an aromatic ring of a bisphenol A skeleton, a bisphenol F skeleton, or a biphenyl skeleton. It is preferable to use it.
より具体的には、ビスフェノールA型エポキシ樹脂、ビスフェノールF型エポキシ樹脂、ビスフェノールS型エポキシ樹脂、ビフェニル型エポキシ樹脂、ナフタレン環含有エポキシ樹脂、ジシクロペンタジエン骨格を有するエポキシ樹脂、フェノールノボラック型樹脂、クレゾールノボラック型エポキシ樹脂、トリフェニルメタン型エポキシ樹脂、脂肪族系エポキシ樹脂、脂肪族系エポキシ樹脂と芳香族系エポキシ樹脂の共重合体エポキシ樹脂等が例示される。これらの中でも、ビスフェノールA型エポキシ樹脂、ビスフェノールF型エポキシ樹脂、ビスフェノールS型エポキシ樹脂、ビフェニル型エポキシ樹脂又はナフタレン環含有エポキシ樹脂が好ましく、より好ましくはビスフェノールA型エポキシ樹脂、ビスフェノールF型エポキシ樹脂、ナフタレン環含有エポキシ樹脂又はビフェニル型エポキシ樹脂が用いられる。
More specifically, bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, biphenyl type epoxy resin, naphthalene ring-containing epoxy resin, epoxy resin having a dicyclopentadiene skeleton, phenol novolac type resin, cresol Examples thereof include novolac type epoxy resins, triphenylmethane type epoxy resins, aliphatic epoxy resins, aliphatic epoxy resin copolymer epoxy resins, and the like. Among these, bisphenol A type epoxy resins, bisphenol F type epoxy resins, bisphenol S type epoxy resins, biphenyl type epoxy resins or naphthalene ring-containing epoxy resins are preferable, and bisphenol A type epoxy resins, bisphenol F type epoxy resins are more preferable. A naphthalene ring-containing epoxy resin or a biphenyl type epoxy resin is used.
また、層間充填剤組成物を熱硬化させた硬化物の破壊靭性を向上させるため、本発明で用いるエポキシ樹脂(A)としては、多官能エポキシ樹脂も用いられる。
多官能エポキシ樹脂としては、フェノールノボラック樹脂、クレゾールノボラック樹脂、ビスフェノールAノボラック樹脂、ジシクロペンタジエンフェノール樹脂、フェノールアラルキル樹脂、ナフトールノボラック樹脂、ビフェニルノボラック樹脂、テルペンフェノール樹脂、重質油変性フェノール樹脂などのフェノール類や、フェノール類と、ヒドロキシベンズアルデヒド、クロトンアルデヒド、グリオキザールなどのアルデヒド類との縮合反応で得られる多価フェノール樹脂等の各種のフェノール系化合物と、エピハロヒドリンとから製造されるエポキシ樹脂等のグリシジルエーテル型多官能エポキシ樹脂が好ましい。 Moreover, in order to improve the fracture toughness of the cured product obtained by thermosetting the interlayer filler composition, a polyfunctional epoxy resin is also used as the epoxy resin (A) used in the present invention.
Polyfunctional epoxy resins include phenol novolac resin, cresol novolac resin, bisphenol A novolak resin, dicyclopentadiene phenol resin, phenol aralkyl resin, naphthol novolac resin, biphenyl novolac resin, terpene phenol resin, heavy oil modified phenol resin, etc. Glycidyls such as epoxy resins produced from phenols, various phenolic compounds such as polyhydric phenol resins obtained by condensation reaction of phenols with aldehydes such as hydroxybenzaldehyde, crotonaldehyde, and glyoxal, and epihalohydrins Ether type polyfunctional epoxy resins are preferred.
多官能エポキシ樹脂としては、フェノールノボラック樹脂、クレゾールノボラック樹脂、ビスフェノールAノボラック樹脂、ジシクロペンタジエンフェノール樹脂、フェノールアラルキル樹脂、ナフトールノボラック樹脂、ビフェニルノボラック樹脂、テルペンフェノール樹脂、重質油変性フェノール樹脂などのフェノール類や、フェノール類と、ヒドロキシベンズアルデヒド、クロトンアルデヒド、グリオキザールなどのアルデヒド類との縮合反応で得られる多価フェノール樹脂等の各種のフェノール系化合物と、エピハロヒドリンとから製造されるエポキシ樹脂等のグリシジルエーテル型多官能エポキシ樹脂が好ましい。 Moreover, in order to improve the fracture toughness of the cured product obtained by thermosetting the interlayer filler composition, a polyfunctional epoxy resin is also used as the epoxy resin (A) used in the present invention.
Polyfunctional epoxy resins include phenol novolac resin, cresol novolac resin, bisphenol A novolak resin, dicyclopentadiene phenol resin, phenol aralkyl resin, naphthol novolac resin, biphenyl novolac resin, terpene phenol resin, heavy oil modified phenol resin, etc. Glycidyls such as epoxy resins produced from phenols, various phenolic compounds such as polyhydric phenol resins obtained by condensation reaction of phenols with aldehydes such as hydroxybenzaldehyde, crotonaldehyde, and glyoxal, and epihalohydrins Ether type polyfunctional epoxy resins are preferred.
これらのエポキシ樹脂(A)は、1種を単独で用いてもよく、2種以上を任意の組み合わせ及び比率で混合して用いてもよい。
These epoxy resins (A) may be used alone or in a combination of two or more in any combination and ratio.
[硬化剤(B)]
本発明で用いる硬化剤(B)とは、エポキシ樹脂(A)の架橋基間の架橋反応に寄与する物質を示す。 [Curing agent (B)]
The curing agent (B) used in the present invention refers to a substance that contributes to the crosslinking reaction between the crosslinking groups of the epoxy resin (A).
本発明で用いる硬化剤(B)とは、エポキシ樹脂(A)の架橋基間の架橋反応に寄与する物質を示す。 [Curing agent (B)]
The curing agent (B) used in the present invention refers to a substance that contributes to the crosslinking reaction between the crosslinking groups of the epoxy resin (A).
硬化剤(B)としては特に制限はなく、一般的にエポキシ樹脂硬化剤として知られているものが使用できる。例えば、フェノール系硬化剤、脂肪族アミン、ポリエーテルアミン、脂環式アミン、芳香族アミンなどのアミン系硬化剤、酸無水物系硬化剤、アミド系硬化剤、第3級アミン、イミダゾール若しくはその誘導体、有機ホスフィン類、ホスホニウム塩、テトラフェニルボロン塩、有機酸ジヒドラジド、ハロゲン化ホウ素アミン錯体、ポリメルカプタン系硬化剤、イソシアネート系硬化剤、ブロックイソシアネート系硬化剤等が挙げられる。
There is no restriction | limiting in particular as a hardening | curing agent (B), What is generally known as an epoxy resin hardening | curing agent can be used. For example, phenolic curing agents, aliphatic amines, polyether amines, alicyclic amines, aromatic amines and other amine curing agents, acid anhydride curing agents, amide curing agents, tertiary amines, imidazoles or the like Derivatives, organic phosphines, phosphonium salts, tetraphenylboron salts, organic acid dihydrazides, boron halide amine complexes, polymercaptan curing agents, isocyanate curing agents, blocked isocyanate curing agents, and the like.
フェノール系硬化剤の具体例としては、ビスフェノールA、ビスフェノールF、4,4’-ジヒドロキシジフェニルメタン、4,4’-ジヒドロキシジフェニルエーテル、1,4-ビス(4-ヒドロキシフェノキシ)ベンゼン、1,3-ビス(4-ヒドロキシフェノキシ)ベンゼン、4,4’-ジヒドロキシジフェニルスルフィド、4,4’-ジヒドロキシジフェニルケトン、4,4’-ジヒドロキシジフェニルスルホン、4,4’-ジヒドロキシビフェニル、2,2’-ジヒドロキシビフェニル、10-(2,5-ジヒドロキシフェニル)-10H-9-オキサ-10-ホスファフェナンスレン-10-オキサイド、フェノールノボラック、ビスフェノールAノボラック、o-クレゾールノボラック、m-クレゾールノボラック、p-クレゾールノボラック、キシレノールノボラック、ポリ-p-ヒドロキシスチレン、ハイドロキノン、レゾルシン、カテコール、t-ブチルカテコール、t-ブチルハイドロキノン、フルオログリシノール、ピロガロール、t-ブチルピロガロール、アリル化ピロガロール、ポリアリル化ピロガロール、1,2,4-ベンゼントリオール、2,3,4-トリヒドロキシベンゾフェノン、1,2-ジヒドロキシナフタレン、1,3-ジヒドロキシナフタレン、1,4-ジヒドロキシナフタレン、1,5-ジヒドロキシナフタレン、1,6-ジヒドロキシナフタレン、1,7-ジヒドロキシナフタレン、1,8-ジヒドロキシナフタレン、2,3-ジヒドロキシナフタレン、2,4-ジヒドロキシナフタレン、2,5-ジヒドロキシナフタレン、2,6-ジヒドロキシナフタレン、2,7-ジヒドロキシナフタレン、2,8-ジヒドロキシナフタレン、上記ジヒドロキシナフタレンのアリル化物又はポリアリル化物、アリル化ビスフェノールA、アリル化ビスフェノールF、アリル化フェノールノボラック、アリル化ピロガロール等が例示される。
Specific examples of phenolic curing agents include bisphenol A, bisphenol F, 4,4'-dihydroxydiphenylmethane, 4,4'-dihydroxydiphenyl ether, 1,4-bis (4-hydroxyphenoxy) benzene, 1,3-bis (4-hydroxyphenoxy) benzene, 4,4'-dihydroxydiphenyl sulfide, 4,4'-dihydroxydiphenyl ketone, 4,4'-dihydroxydiphenyl sulfone, 4,4'-dihydroxybiphenyl, 2,2'-dihydroxybiphenyl 10- (2,5-dihydroxyphenyl) -10H-9-oxa-10-phosphaphenanthrene-10-oxide, phenol novolak, bisphenol A novolak, o-cresol novolak, m-cresol novolak, p-ke Zole novolak, xylenol novolak, poly-p-hydroxystyrene, hydroquinone, resorcin, catechol, t-butylcatechol, t-butylhydroquinone, fluoroglycinol, pyrogallol, t-butyl pyrogallol, allylated pyrogallol, polyallylated pyrogallol, 1, 2,4-benzenetriol, 2,3,4-trihydroxybenzophenone, 1,2-dihydroxynaphthalene, 1,3-dihydroxynaphthalene, 1,4-dihydroxynaphthalene, 1,5-dihydroxynaphthalene, 1,6-dihydroxy Naphthalene, 1,7-dihydroxynaphthalene, 1,8-dihydroxynaphthalene, 2,3-dihydroxynaphthalene, 2,4-dihydroxynaphthalene, 2,5-dihydroxynaphthalene, 2 Examples include 6-dihydroxynaphthalene, 2,7-dihydroxynaphthalene, 2,8-dihydroxynaphthalene, allylated or polyallylated dihydroxynaphthalene, allylated bisphenol A, allylated bisphenol F, allylated phenol novolak, allylated pyrogallol, etc. Is done.
アミン系硬化剤である、脂肪族アミン類としては、エチレンジアミン、1,3-ジアミノプロパン、1,4-ジアミノプロパン、ヘキサメチレンジアミン、2,5-ジメチルヘキサメチレンジアミン、トリメチルヘキサメチレンジアミン、ジエチレントリアミン、イミノビスプロピルアミン、ビス(ヘキサメチレン)トリアミン、トリエチレンテトラミン、テトラエチレンペンタミン、ペンタエチレンヘキサミン、N-ヒドロキシエチルエチレンジアミン、テトラ(ヒドロキシエチル)エチレンジアミン等が例示される。ポリエーテルアミン類としては、トリエチレングリコールジアミン、テトラエチレングリコールジアミン、ジエチレングリコールビス(プロピルアミン)、ポリオキシプロピレンジアミン、ポリオキシプロピレントリアミン類等が例示される。脂環式アミン類としては、イソホロンジアミン、メタセンジアミン、N-アミノエチルピペラジン、ビス(4-アミノ-3-メチルジシクロヘキシル)メタン、ビス(アミノメチル)シクロヘキサン、3,9-ビス(3-アミノプロピル)-2,4,8,10-テトラオキサスピロ(5,5)ウンデカン、ノルボルネンジアミン等が例示される。芳香族アミン類としては、テトラクロロ-p-キシレンジアミン、m-キシレンジアミン、p-キシレンジアミン、m-フェニレンジアミン、o-フェニレンジアミン、p-フェニレンジアミン、2,4-ジアミノアニソール、2,4-トルエンジアミン、2,4-ジアミノジフェニルメタン、4,4’-ジアミノジフェニルメタン、4,4’-ジアミノ-1,2-ジフェニルエタン、2,4-ジアミノジフェニルスルホン、4,4’-ジアミノジフェニルスルホン、m-アミノフェノール、m-アミノベンジルアミン、ベンジルジメチルアミン、2-ジメチルアミノメチル)フェノール、トリエタノールアミン、メチルベンジルアミン、α-(m-アミノフェニル)エチルアミン、α-(p-アミノフェニル)エチルアミン、ジアミノジエチルジメチルジフェニルメタン、α,α’-ビス(4-アミノフェニル)-p-ジイソプロピルベンゼン等が例示される。
Examples of aliphatic amines that are amine curing agents include ethylenediamine, 1,3-diaminopropane, 1,4-diaminopropane, hexamethylenediamine, 2,5-dimethylhexamethylenediamine, trimethylhexamethylenediamine, diethylenetriamine, Examples include iminobispropylamine, bis (hexamethylene) triamine, triethylenetetramine, tetraethylenepentamine, pentaethylenehexamine, N-hydroxyethylethylenediamine, tetra (hydroxyethyl) ethylenediamine, and the like. Examples of polyether amines include triethylene glycol diamine, tetraethylene glycol diamine, diethylene glycol bis (propylamine), polyoxypropylene diamine, polyoxypropylene triamines, and the like. Cycloaliphatic amines include isophorone diamine, metacene diamine, N-aminoethylpiperazine, bis (4-amino-3-methyldicyclohexyl) methane, bis (aminomethyl) cyclohexane, 3,9-bis (3-amino). (Propyl) -2,4,8,10-tetraoxaspiro (5,5) undecane, norbornenediamine and the like. Aromatic amines include tetrachloro-p-xylenediamine, m-xylenediamine, p-xylenediamine, m-phenylenediamine, o-phenylenediamine, p-phenylenediamine, 2,4-diaminoanisole, 2,4 -Toluenediamine, 2,4-diaminodiphenylmethane, 4,4'-diaminodiphenylmethane, 4,4'-diamino-1,2-diphenylethane, 2,4-diaminodiphenylsulfone, 4,4'-diaminodiphenylsulfone, m-aminophenol, m-aminobenzylamine, benzyldimethylamine, 2-dimethylaminomethyl) phenol, triethanolamine, methylbenzylamine, α- (m-aminophenyl) ethylamine, α- (p-aminophenyl) ethylamine , Diaminodiethyl Examples include rudimethyldiphenylmethane, α, α'-bis (4-aminophenyl) -p-diisopropylbenzene.
酸無水物系硬化剤の具体例としては、ドデセニル無水コハク酸、ポリアジピン酸無水物、ポリアゼライン酸無水物、ポリセバシン酸無水物、ポリ(エチルオクタデカン二酸)無水物、ポリ(フェニルヘキサデカン二酸)無水物、メチルテトラヒドロ無水フタル酸、メチルヘキサヒドロ無水フタル酸、ヘキサヒドロ無水フタル酸、無水メチルハイミック酸、テトラヒドロ無水フタル酸、トリアルキルテトラヒドロ無水フタル酸、メチルシクロヘキセンジカルボン酸無水物、メチルシクロヘキセンテトラカルボン酸無水物、無水フタル酸、無水トリメリット酸、無水ピロメリット酸、ベンゾフェノンテトラカルボン酸無水物、エチレングリコールビストリメリテート二無水物、無水ヘット酸、無水ナジック酸、無水メチルナジック酸、5-(2,5-ジオキソテトラヒドロ-3-フラニル)-3-メチル-3-シクロヘキサン-1,2-ジカルボン酸無水物、3,4-ジメチル-6-(2-メチル-1-プロペニル)-4-シクロヘキセン-1,2-ジカルボン酸無水物、3,4-ジカルボキシ-1,2,3,4-テトラヒドロ-1-ナフタレンコハク酸二無水物、1-メチル-ジカルボキシ-1,2,3,4-テトラヒドロ-1-ナフタレンコハク酸二無水物等が例示される。
Specific examples of acid anhydride curing agents include dodecenyl succinic anhydride, polyadipic acid anhydride, polyazeline acid anhydride, polysebacic acid anhydride, poly (ethyloctadecanedioic acid) anhydride, poly (phenylhexadecanedioic acid) Anhydride, Methyltetrahydrophthalic anhydride, Methylhexahydrophthalic anhydride, Hexahydrophthalic anhydride, Methylhymic anhydride, Tetrahydrophthalic anhydride, Trialkyltetrahydrophthalic anhydride, Methylcyclohexene dicarboxylic anhydride, Methylcyclohexene tetracarboxylic Acid anhydride, phthalic anhydride, trimellitic anhydride, pyromellitic anhydride, benzophenone tetracarboxylic anhydride, ethylene glycol bistrimellitic dianhydride, het anhydride, nadic anhydride, methyl nadic anhydride, 5- ( 2 5-dioxotetrahydro-3-furanyl) -3-methyl-3-cyclohexane-1,2-dicarboxylic anhydride, 3,4-dimethyl-6- (2-methyl-1-propenyl) -4-cyclohexene 1,2-dicarboxylic anhydride, 3,4-dicarboxy-1,2,3,4-tetrahydro-1-naphthalene succinic dianhydride, 1-methyl-dicarboxy-1,2,3,4 Examples thereof include tetrahydro-1-naphthalene succinic dianhydride.
アミド系硬化剤としては、ジシアンジアミド、ポリアミド樹脂等が例示される。
Examples of amide type curing agents include dicyandiamide and polyamide resin.
第3級アミンとしては、1,8-ジアザビシクロ(5,4,0)ウンデセン-7、トリエチレンジアミン、ベンジルジメチルアミン、トリエタノールアミン、ジメチルアミノエタノール、トリス(ジメチルアミノメチル)フェノール等が例示される。
Examples of tertiary amines include 1,8-diazabicyclo (5,4,0) undecene-7, triethylenediamine, benzyldimethylamine, triethanolamine, dimethylaminoethanol, tris (dimethylaminomethyl) phenol, and the like. .
イミダゾール若しくはその誘導体としては、1-シアノエチル-2-フェニルイミダゾール、2-フェニルイミダゾール、2-エチル-4(5)-メチルイミダゾール、2-フェニル-4-メチルイミダゾール、1-ベンジル-2-メチルイミダゾール、1-ベンジル-2-フェニルイミダゾール、1-シアノエチル-2-ウンデシルイミダゾール、1-シアノ-2-フェニルイミダゾール、1-シアノエチル-2-ウンデシルイミダゾールトリメリテイト、1-シアノエチル-2-フェニルイミダゾリウムトリメリテイト、2,4-ジアミノ-6-[2’-メチルイミダゾリル-(1’)]-エチル-s-トリアジン、2,4-ジアミノ-6-[2’-エチル-4’-メチルイミダゾリル-(1’)]-エチル-s-トリアジン、2,4-ジアミノ-6-[2’-メチルイミダゾリル-(1’)]-エチル-s-トリアジンイソシアヌル酸付加体、2-フェニルイミダゾールイソシアヌル酸付加体、2-フェニル-4,5-ジヒドロキシメチルイミダゾール、2-フェニル-4-メチル-5-ヒドロキシメチルイミダゾール、エポキシ樹脂と上記イミダゾール類との付加体等が例示される。
Examples of imidazole or derivatives thereof include 1-cyanoethyl-2-phenylimidazole, 2-phenylimidazole, 2-ethyl-4 (5) -methylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole 1-benzyl-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazo Lithium trimellitate, 2,4-diamino-6- [2'-methylimidazolyl- (1 ')]-ethyl-s-triazine, 2,4-diamino-6- [2'-ethyl-4'-methyl Imidazolyl- (1 ′)]-ethyl-s-triazine, 2,4 Diamino-6- [2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole, 2- Examples include phenyl-4-methyl-5-hydroxymethylimidazole, adducts of epoxy resin and the above imidazoles, and the like.
有機ホスフィン類としては、トリブチルホスフィン、メチルジフェニルホスフイン、トリフェニルホスフィン、ジフェニルホスフィン、フェニルホスフィン等が例示される。ホスホニウム塩としては、テトラフェニルホスホニウム・テトラフェニルボレート、テトラフェニルホスホニウム・エチルトリフェニルボレート、テトラブチルホスホニウム・テトラブチルボレート等が例示される。テトラフェニルボロン塩としては、2-エチル-4-メチルイミダゾール・テトラフェニルボレート、N-メチルモルホリン・テトラフェニルボレート等が例示される。
Examples of organic phosphines include tributylphosphine, methyldiphenylphosphine, triphenylphosphine, diphenylphosphine, and phenylphosphine. Examples of the phosphonium salt include tetraphenylphosphonium / tetraphenylborate, tetraphenylphosphonium / ethyltriphenylborate, and tetrabutylphosphonium / tetrabutylborate. Examples of the tetraphenylboron salt include 2-ethyl-4-methylimidazole / tetraphenylborate, N-methylmorpholine / tetraphenylborate and the like.
これらの硬化剤(B)は、1種を単独で用いてもよく、2種以上を任意の組み合わせ及び比率で混合して用いてもよい。
These curing agents (B) may be used alone or in a combination of two or more in any combination and ratio.
層間充填剤組成物中の硬化剤(B)の含有量は、エポキシ樹脂(A)の100重量部あたり、30~150重量部が好ましく、50~120重量部がより好ましい。
硬化剤(B)がフェノール系硬化剤、アミン系硬化剤、酸無水物系硬化剤の場合は、エポキシ樹脂(A)中のエポキシ基に対する、硬化剤(B)中の官能基との当量比で、0.8~1.5の範囲となるように用いることが好ましく、0.8~1.2の範囲となるように用いることがより好ましい。この範囲外であると、未反応のエポキシ基や硬化剤の官能基が残留し、所望の物性が得られないことがある。 The content of the curing agent (B) in the interlayer filler composition is preferably 30 to 150 parts by weight, more preferably 50 to 120 parts by weight, per 100 parts by weight of the epoxy resin (A).
When the curing agent (B) is a phenol curing agent, an amine curing agent, or an acid anhydride curing agent, the equivalent ratio of the functional group in the curing agent (B) to the epoxy group in the epoxy resin (A) Therefore, it is preferably used in a range of 0.8 to 1.5, and more preferably in a range of 0.8 to 1.2. Outside this range, unreacted epoxy groups and functional groups of the curing agent may remain, and desired physical properties may not be obtained.
硬化剤(B)がフェノール系硬化剤、アミン系硬化剤、酸無水物系硬化剤の場合は、エポキシ樹脂(A)中のエポキシ基に対する、硬化剤(B)中の官能基との当量比で、0.8~1.5の範囲となるように用いることが好ましく、0.8~1.2の範囲となるように用いることがより好ましい。この範囲外であると、未反応のエポキシ基や硬化剤の官能基が残留し、所望の物性が得られないことがある。 The content of the curing agent (B) in the interlayer filler composition is preferably 30 to 150 parts by weight, more preferably 50 to 120 parts by weight, per 100 parts by weight of the epoxy resin (A).
When the curing agent (B) is a phenol curing agent, an amine curing agent, or an acid anhydride curing agent, the equivalent ratio of the functional group in the curing agent (B) to the epoxy group in the epoxy resin (A) Therefore, it is preferably used in a range of 0.8 to 1.5, and more preferably in a range of 0.8 to 1.2. Outside this range, unreacted epoxy groups and functional groups of the curing agent may remain, and desired physical properties may not be obtained.
また、硬化剤(B)がアミド系硬化剤、第3級アミン、イミダゾール若しくはその誘導体、有機ホスフィン類、ホスホニウム塩、テトラフェニルボロン塩、有機酸ジヒドラジド、ハロゲン化ホウ素アミン錯体、ポリメルカプタン系硬化剤、イソシアネート系硬化剤、ブロックイソシアネート系硬化剤等の場合は、エポキシ樹脂(A)100重量部に対して、0.1~20重量部の範囲で用いることが好ましく、0.5~10重量部の範囲となるように用いることがより好ましい。
Further, the curing agent (B) is an amide-based curing agent, a tertiary amine, imidazole or a derivative thereof, an organic phosphine, a phosphonium salt, a tetraphenylboron salt, an organic acid dihydrazide, a boron halide amine complex, a polymercaptan-based curing agent. In the case of an isocyanate curing agent, a blocked isocyanate curing agent, etc., it is preferably used in an amount of 0.1 to 20 parts by weight, preferably 0.5 to 10 parts by weight, based on 100 parts by weight of the epoxy resin (A). It is more preferable to use so that it may become this range.
また、ジシアンジアミン化合物の場合は、エポキシ樹脂(A)100重量部に対して、0.1~10重量部の範囲で用いることが好ましく、0.5~6重量部の範囲となるように用いることがより好ましい。
In the case of a dicyandiamine compound, it is preferably used in the range of 0.1 to 10 parts by weight, and preferably in the range of 0.5 to 6 parts by weight with respect to 100 parts by weight of the epoxy resin (A). More preferably, it is used.
[フィラー(C)]
フィラー(C)は、熱伝導性の向上と線膨張係数の制御を目的に添加されるものであり、特に線膨張係数の制御が主目的である。 [Filler (C)]
The filler (C) is added for the purpose of improving thermal conductivity and controlling the linear expansion coefficient, and is mainly intended for controlling the linear expansion coefficient.
フィラー(C)は、熱伝導性の向上と線膨張係数の制御を目的に添加されるものであり、特に線膨張係数の制御が主目的である。 [Filler (C)]
The filler (C) is added for the purpose of improving thermal conductivity and controlling the linear expansion coefficient, and is mainly intended for controlling the linear expansion coefficient.
フィラー(C)としては、金属、炭素、金属炭化物、金属酸化物及び金属窒化物からなる群から選ばれる少なくとも1種の粒子が挙げられる。炭素の例としては、カーボンブラック、炭素繊維、グラファイト、フレーレン、ダイヤモンドなどが挙げられる。金属炭化物の例としては、炭化ケイ素、炭化チタン、炭化タングステンなどが挙げられる。金属酸化物の例としては、酸化マグネシウム、酸化アルミニウム、酸化ケイ素、酸化カルシウム、酸化亜鉛、酸化イットリウム、酸化ジルコニウム、酸化セリウム、酸化イッテルビウム、サイアロン(ケイ素、アルミニウム、酸素及び窒素からなるセラミックス)等が挙げられる。金属窒化物の例としては、窒化ホウ素、窒化アルミニウム、窒化ケイ素等が挙げられる。
Examples of the filler (C) include at least one particle selected from the group consisting of metal, carbon, metal carbide, metal oxide, and metal nitride. Examples of carbon include carbon black, carbon fiber, graphite, fullerene and diamond. Examples of metal carbides include silicon carbide, titanium carbide, tungsten carbide and the like. Examples of metal oxides include magnesium oxide, aluminum oxide, silicon oxide, calcium oxide, zinc oxide, yttrium oxide, zirconium oxide, cerium oxide, ytterbium oxide, sialon (ceramics made of silicon, aluminum, oxygen and nitrogen). Can be mentioned. Examples of metal nitrides include boron nitride, aluminum nitride, silicon nitride and the like.
フィラー(C)の形状について制限はなく、粒子状、ウィスカー状、繊維状、板状、又はそれらの凝集体であってもよい。
The shape of the filler (C) is not limited, and may be particulate, whisker, fiber, plate, or an aggregate thereof.
積層型半導体装置用の層間充填剤組成物においては、絶縁性が要求される場合が多いことから、フィラー(C)の中でも、酸化物又は窒化物が好ましい。このようなフィラー(C)として、より具体的には、アルミナ(Al2O3)、窒化アルミニウム(AlN)、窒化ホウ素(BN)、窒化ケイ素(Si3N4)、シリカ(SiO2)などが挙げられ、なかでも、Al2O3、AlN、BN又はSiO2が好ましく、とりわけAl2O3、BN又はSiO2が好ましい。
BN系フィラーとしては、日本特開2013-241321号公報に開示されるものが、好ましく用いられる。 In an interlayer filler composition for a stacked semiconductor device, since insulation is often required, oxide or nitride is preferable among the fillers (C). More specifically, as such filler (C), alumina (Al 2 O 3 ), aluminum nitride (AlN), boron nitride (BN), silicon nitride (Si 3 N 4 ), silica (SiO 2 ), etc. Among them, Al 2 O 3 , AlN, BN or SiO 2 is preferable, and Al 2 O 3 , BN or SiO 2 is particularly preferable.
As the BN filler, those disclosed in Japanese Unexamined Patent Publication No. 2013-241321 are preferably used.
BN系フィラーとしては、日本特開2013-241321号公報に開示されるものが、好ましく用いられる。 In an interlayer filler composition for a stacked semiconductor device, since insulation is often required, oxide or nitride is preferable among the fillers (C). More specifically, as such filler (C), alumina (Al 2 O 3 ), aluminum nitride (AlN), boron nitride (BN), silicon nitride (Si 3 N 4 ), silica (SiO 2 ), etc. Among them, Al 2 O 3 , AlN, BN or SiO 2 is preferable, and Al 2 O 3 , BN or SiO 2 is particularly preferable.
As the BN filler, those disclosed in Japanese Unexamined Patent Publication No. 2013-241321 are preferably used.
これらのフィラー(C)は、1種を単独で用いてもよく、2種以上を任意の組み合わせ及び比率で混合して用いてもよい。
These fillers (C) may be used alone or in a combination of two or more in any combination and ratio.
近年、三次元集積回路は、更なる高速化・高容量化などの性能向上のために各チップ間の距離が10~50μm程度にまで小さくなっているが、チップ間の層間充填層において、配合されるフィラーの最大粒子径は層間充填層の厚みの1/3以下程度にすることが好ましい。
フィラー(C)の最大粒子径が10μmを超えると硬化した後の層間充填層の表面にフィラー(C)が突出して、層間充填層の表面形状が悪化する傾向になる。フィラー(C)の最大粒子径としては、5μmが好ましく、より好ましくは3μmである。 In recent years, the distance between chips has been reduced to about 10 to 50 μm in order to improve performance such as higher speed and higher capacity in 3D integrated circuits. The maximum particle diameter of the filler to be formed is preferably about 1/3 or less of the thickness of the interlayer filling layer.
When the maximum particle diameter of the filler (C) exceeds 10 μm, the filler (C) protrudes from the surface of the interlayer filling layer after being cured, and the surface shape of the interlayer filling layer tends to deteriorate. The maximum particle size of the filler (C) is preferably 5 μm, more preferably 3 μm.
フィラー(C)の最大粒子径が10μmを超えると硬化した後の層間充填層の表面にフィラー(C)が突出して、層間充填層の表面形状が悪化する傾向になる。フィラー(C)の最大粒子径としては、5μmが好ましく、より好ましくは3μmである。 In recent years, the distance between chips has been reduced to about 10 to 50 μm in order to improve performance such as higher speed and higher capacity in 3D integrated circuits. The maximum particle diameter of the filler to be formed is preferably about 1/3 or less of the thickness of the interlayer filling layer.
When the maximum particle diameter of the filler (C) exceeds 10 μm, the filler (C) protrudes from the surface of the interlayer filling layer after being cured, and the surface shape of the interlayer filling layer tends to deteriorate. The maximum particle size of the filler (C) is preferably 5 μm, more preferably 3 μm.
本発明の層間充填剤組成物のフィラー(C)の含有量は、エポキシ樹脂(A)及び硬化剤(B)の総和100重量部当たり、10~500重量部が好ましく、20~400重量部がより好ましい。フィラー(C)の含有量がエポキシ樹脂(A)及び硬化剤(B)の総和100重量部当たり、10重量部未満であると、フィラー(C)の添加効果が小さくなり、目的とする線膨張係数や熱伝導性が得られない場合があり、500重量部を超えるとフィラー(C)の存在が接合性を阻害することがある。
The content of the filler (C) in the interlayer filler composition of the present invention is preferably 10 to 500 parts by weight, preferably 20 to 400 parts by weight per 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B). More preferred. When the content of the filler (C) is less than 10 parts by weight per 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B), the effect of adding the filler (C) is reduced, and the intended linear expansion The coefficient and thermal conductivity may not be obtained. When the amount exceeds 500 parts by weight, the presence of the filler (C) may hinder the bondability.
[フラックス(D)]
フラックス(D)とは、具体的には、金属端子の半田接合時において、半田バンプ等の金属電気信号端子及びランド(Land)の表面酸化膜の溶解除去や、半田バンプのランド表面における濡れ広がり性の向上、更には半田バンプの金属端子表面の再酸化防止などの機能を有する化合物である。 [Flux (D)]
Specifically, the flux (D) means that the metal electrical signal terminals such as solder bumps and the surface oxide film of the land (Land) are dissolved and removed when the metal terminals are soldered together, and the solder bumps are spread on the land surface. It is a compound having a function of improving the property and preventing reoxidation of the metal terminal surface of the solder bump.
フラックス(D)とは、具体的には、金属端子の半田接合時において、半田バンプ等の金属電気信号端子及びランド(Land)の表面酸化膜の溶解除去や、半田バンプのランド表面における濡れ広がり性の向上、更には半田バンプの金属端子表面の再酸化防止などの機能を有する化合物である。 [Flux (D)]
Specifically, the flux (D) means that the metal electrical signal terminals such as solder bumps and the surface oxide film of the land (Land) are dissolved and removed when the metal terminals are soldered together, and the solder bumps are spread on the land surface. It is a compound having a function of improving the property and preventing reoxidation of the metal terminal surface of the solder bump.
本発明で用いるフラックス(D)としては、蓚酸、マロン酸、コハク酸、グルタル酸、アジピン酸、リンゴ酸、酒石酸、クエン酸、乳酸、酢酸、プロピオン酸、酪酸、オレイン酸、ステアリン酸等の脂肪族カルボン酸;安息香酸、サリチル酸、フタル酸、トリメリト酸、トリメリト酸無水物、トリメシン酸、ベンゼンテトラカルボン酸等の芳香族カルボン酸若しくはその酸無水物;アビエチン酸、ロジンなどのテルペン系カルボン酸等の有機カルボン酸;有機カルボン酸をアルキルビニルエーテル類と反応して変換したヘミアセタールエステルである有機カルボン酸エステル;グルタミン酸塩酸塩、アニリン塩酸塩、ヒドラジン塩酸塩、臭化セチルピリジン、フェニルヒドラジン塩酸塩、テトラクロルナフタレン、メチルヒドラジン塩酸塩、メチルアミン塩酸塩、エチルアミン塩酸塩、ジエチルアミン塩酸塩、ブチルアミン塩酸塩等の有機ハロゲン化合物;尿素、ジエチレントリアミンヒドラジンなどのアミン類;エチレングリコール、ジエチレングリコール、トリエチレングリコール、テトラエチレングリコール、グリセリン等の多価アルコール類;塩酸、フッ酸、燐酸、ホウフッ化水素酸などの無機酸;フッ化カリウム、フッ化ナトリウム、フッ化アンモニウム、フッ化銅、フッ化ニッケル、フッ化亜鉛などのフッ化物;塩化カリウム、塩化ナトリウム、塩化第一銅、塩化ニッケル、塩化アンモニウム、塩化亜鉛、塩化第一錫などの塩化物;臭化カリウム、臭化ナトリウム、臭化アンモニウム、臭化錫、臭化亜鉛などの臭化物;などが挙げられる。これらの化合物は、そのまま用いても、また有機ポリマーや無機化合物等による被覆剤を用いてマイクロカプセル化したものを用いても良い。これらの化合物は1種を単独で用いてもよく、2種以上を任意の組み合わせ及び比率で混合して用いてもよい。
Examples of the flux (D) used in the present invention include fats such as succinic acid, malonic acid, succinic acid, glutaric acid, adipic acid, malic acid, tartaric acid, citric acid, lactic acid, acetic acid, propionic acid, butyric acid, oleic acid, and stearic acid. Aromatic carboxylic acids such as benzoic acid, salicylic acid, phthalic acid, trimellitic acid, trimellitic acid anhydride, trimesic acid, benzenetetracarboxylic acid, or acid anhydrides thereof; terpene carboxylic acids such as abietic acid and rosin, etc. An organic carboxylic acid which is a hemiacetal ester obtained by reacting an organic carboxylic acid with an alkyl vinyl ether; glutamic acid hydrochloride, aniline hydrochloride, hydrazine hydrochloride, cetylpyridine bromide, phenylhydrazine hydrochloride, Tetrachloronaphthalene, methyl hydrazine hydrochloride Organic halogen compounds such as methylamine hydrochloride, ethylamine hydrochloride, diethylamine hydrochloride and butylamine hydrochloride; amines such as urea and diethylenetriamine hydrazine; polyhydric alcohols such as ethylene glycol, diethylene glycol, triethylene glycol, tetraethylene glycol and glycerin Inorganic acids such as hydrochloric acid, hydrofluoric acid, phosphoric acid, borohydrofluoric acid; Fluorides such as potassium fluoride, sodium fluoride, ammonium fluoride, copper fluoride, nickel fluoride, zinc fluoride; potassium chloride, chloride Sodium, cuprous chloride, nickel chloride, ammonium chloride, zinc chloride, stannous chloride and other chlorides; potassium bromide, sodium bromide, ammonium bromide, tin bromide, zinc bromide and other bromides; etc. Can be mentioned. These compounds may be used as they are or may be microencapsulated using a coating agent made of an organic polymer or an inorganic compound. These compounds may be used individually by 1 type, and 2 or more types may be mixed and used for them in arbitrary combinations and ratios.
本発明の層間充填剤組成物中のフラックス(D)の含有量は、エポキシ樹脂(A)及び硬化剤(B)の総和100重量部当たり、好ましくは0.1~10重量部、より好ましくは0.5~5重量部である。フラックス(D)の含有量がエポキシ樹脂(A)及び硬化剤(B)の総和100重量部当たり0.1重量部未満では、酸化膜除去性低下による半田接続不良の恐れがあり、また10重量部を超えると組成物の粘度上昇による接続不良の恐れがでてくる。
The content of the flux (D) in the interlayer filler composition of the present invention is preferably 0.1 to 10 parts by weight, more preferably 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B). 0.5 to 5 parts by weight. If the content of the flux (D) is less than 0.1 parts by weight per 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B), there is a risk of poor solder connection due to a decrease in oxide film removal, and 10 weights. If it exceeds the part, there is a risk of poor connection due to an increase in the viscosity of the composition.
[硬化促進剤(E)]
本発明の層間充填剤組成物は、硬化温度を下げ、硬化時間を短くするために硬化剤(B)とともに、硬化促進剤(E)を含有していてもよい。
硬化促進剤(E)の例としては、三級アミノ基を含有する化合物、イミダゾール若しくはその誘導体、有機ホスフィン類、ジメチル尿素、有機ポリマーや無機化合物等による被覆剤を用いて上記化合物をマイクロカプセル化したものなどが挙げられる。 [Curing accelerator (E)]
The interlayer filler composition of the present invention may contain a curing accelerator (E) together with the curing agent (B) in order to lower the curing temperature and shorten the curing time.
Examples of the curing accelerator (E) include microencapsulation of the above compound using a coating agent such as a compound containing a tertiary amino group, imidazole or a derivative thereof, an organic phosphine, dimethylurea, an organic polymer or an inorganic compound. And the like.
本発明の層間充填剤組成物は、硬化温度を下げ、硬化時間を短くするために硬化剤(B)とともに、硬化促進剤(E)を含有していてもよい。
硬化促進剤(E)の例としては、三級アミノ基を含有する化合物、イミダゾール若しくはその誘導体、有機ホスフィン類、ジメチル尿素、有機ポリマーや無機化合物等による被覆剤を用いて上記化合物をマイクロカプセル化したものなどが挙げられる。 [Curing accelerator (E)]
The interlayer filler composition of the present invention may contain a curing accelerator (E) together with the curing agent (B) in order to lower the curing temperature and shorten the curing time.
Examples of the curing accelerator (E) include microencapsulation of the above compound using a coating agent such as a compound containing a tertiary amino group, imidazole or a derivative thereof, an organic phosphine, dimethylurea, an organic polymer or an inorganic compound. And the like.
三級アミノ基を含有する化合物としては、1,8-ジアザビシクロ(5,4,0)ウンデセン-7、トリエチレンジアミン、ベンジルジメチルアミン、トリエタノールアミン、ジメチルアミノエタノール、トリス(ジメチルアミノメチル)フェノール等が例示される。
Compounds containing tertiary amino groups include 1,8-diazabicyclo (5,4,0) undecene-7, triethylenediamine, benzyldimethylamine, triethanolamine, dimethylaminoethanol, tris (dimethylaminomethyl) phenol, etc. Is exemplified.
イミダゾール及びその誘導体としては、1-シアノエチルー2-フェニルイミダゾール、2-フェニルイミダゾール、2-エチル-4(5)-メチルイミダゾール、2-フェニル-4-メチルイミダゾール、1-ベンジル-2-メチルイミダゾール、1-ベンジル-2-フェニルイミダゾール、1-シアノエチル-2-ウンデシルイミダゾール、1-シアノ-2-フェニルイミダゾール、1-シアノエチル-2-ウンデシルイミダゾールトリメリテイト、1-シアノエチル-2-フェニルイミダゾリウムトリメリテイト、2,4-ジアミノ-6-[2’-メチルイミダゾリル-(1’)]-エチル-s-トリアジン、2,4-ジアミノ-6-[2’-エチル-4’-メチルイミダゾリル-(1’)]-エチル-s-トリアジン、2,4-ジアミノ-6-[2’-メチルイミダゾリル-(1’)]-エチル-s-トリアジンイソシアヌル酸付加体、2-フェニルイミダゾールイソシアヌル酸付加体、2-フェニル-4,5-ジヒドロキシメチルイミダゾール、2-フェニル-4-メチル-5-ヒドロキシメチルイミダゾール、エポキシ樹脂と上記イミダゾール類との付加体、2-フェニル-4,5-ジヒドロキシメチルイミダゾール、2-フェニル-4-メチル-5-ヒドロキシメチルイミダゾール等が例示される。
Examples of imidazole and its derivatives include 1-cyanoethyl-2-phenylimidazole, 2-phenylimidazole, 2-ethyl-4 (5) -methylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium Trimellitate, 2,4-diamino-6- [2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine, 2,4-diamino-6- [2′-ethyl-4′-methylimidazolyl] -(1 ')]-ethyl-s-triazine, 2,4-di Mino-6- [2′-methylimidazolyl- (1 ′)]-ethyl-s-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole, 2- Phenyl-4-methyl-5-hydroxymethylimidazole, adducts of epoxy resins with the above imidazoles, 2-phenyl-4,5-dihydroxymethylimidazole, 2-phenyl-4-methyl-5-hydroxymethylimidazole, etc. Illustrated.
有機ホスフィン類としては、トリブチルホスフィン、メチルジフェニルホスフイン、トリフェニルホスフィン、ジフェニルホスフィン、フェニルホスフィン等が例示される。ホスホニウム塩としては、テトラフェニルホスホニウム・テトラフェニルボレート、テトラフェニルホスホニウム・エチルトリフェニルボレート、テトラブチルホスホニウム・テトラブチルボレート等が例示される。テトラフェニルボロン塩としては、2-エチル-4-メチルイミダゾール・テトラフェニルボレート、N-メチルモルホリン・テトラフェニルボレート等が例示される。
Examples of organic phosphines include tributylphosphine, methyldiphenylphosphine, triphenylphosphine, diphenylphosphine, and phenylphosphine. Examples of the phosphonium salt include tetraphenylphosphonium / tetraphenylborate, tetraphenylphosphonium / ethyltriphenylborate, and tetrabutylphosphonium / tetrabutylborate. Examples of the tetraphenylboron salt include 2-ethyl-4-methylimidazole / tetraphenylborate, N-methylmorpholine / tetraphenylborate and the like.
これらのうち、比較的長いポットライフ、中温域での高い硬化性、硬化樹脂の高い耐熱性などの特徴から、イミダゾール化合物(イミダゾール若しくはその誘導体)及び有機ポリマーや無機化合物等による被覆剤を用いて上記化合物をマイクロカプセル化したものを用いることが好ましい。
Of these, imidazole compounds (imidazole or its derivatives) and organic polymer or inorganic compound coatings are used because of their relatively long pot life, high curability in the middle temperature range, and high heat resistance of the cured resin. It is preferable to use a microencapsulated product of the above compound.
これらの硬化促進剤(E)は、1種を単独で用いてもよく、2種以上を任意の組み合わせ及び比率で混合して用いてもよい。
These curing accelerators (E) may be used alone or in a combination of two or more in any combination and ratio.
本発明の層間充填剤組成物中に硬化促進剤(E)を含有する場合、硬化促進剤(E)の含有量は、エポキシ樹脂(A)及び硬化剤(B)の総和100重量部当たり、0.001~15重量部であることが好ましく、より好ましくは0.01~10重量部である。硬化促進剤(E)の含有量がエポキシ樹脂(A)及び硬化剤(B)の総和100重量部当たり0.001重量部未満であると、硬化促進効果が不十分になるおそれがあり、15重量部を超えると触媒硬化反応が支配的となり、ボイドの低減が達成できない場合がある。
When the interlayer accelerator composition of the present invention contains the curing accelerator (E), the content of the curing accelerator (E) is based on 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B). The amount is preferably 0.001 to 15 parts by weight, more preferably 0.01 to 10 parts by weight. If the content of the curing accelerator (E) is less than 0.001 part by weight per 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B), the curing acceleration effect may be insufficient, If the amount exceeds part by weight, the catalyst curing reaction becomes dominant, and the reduction of voids may not be achieved.
[分散剤(F)]
本発明の層間充填剤組成物は、フィラー(C)の分散性を高めるために、分散剤(F)を含有することが好ましい。分散剤(F)としては、特に制限はなく、従来、層間充填剤組成物に配合される分散剤として公知のものをいずれも用いることができる。 [Dispersant (F)]
The interlayer filler composition of the present invention preferably contains a dispersant (F) in order to enhance the dispersibility of the filler (C). There is no restriction | limiting in particular as a dispersing agent (F), Any conventionally well-known thing can be used as a dispersing agent mix | blended with an interlayer filler composition.
本発明の層間充填剤組成物は、フィラー(C)の分散性を高めるために、分散剤(F)を含有することが好ましい。分散剤(F)としては、特に制限はなく、従来、層間充填剤組成物に配合される分散剤として公知のものをいずれも用いることができる。 [Dispersant (F)]
The interlayer filler composition of the present invention preferably contains a dispersant (F) in order to enhance the dispersibility of the filler (C). There is no restriction | limiting in particular as a dispersing agent (F), Any conventionally well-known thing can be used as a dispersing agent mix | blended with an interlayer filler composition.
本発明の層間充填剤組成物において、分散剤(F)の含有量は、本発明の課題を解決できるものであれば、いかなる比率であっても構わないが、前記フィラー(C)を100重量部としたときに、分散剤(F)が、0.1~4重量部であることが好ましく、0.1~2重量部であることがより好ましい。
In the interlayer filler composition of the present invention, the content of the dispersant (F) may be any ratio as long as it can solve the problems of the present invention. Parts, the dispersant (F) is preferably 0.1 to 4 parts by weight, more preferably 0.1 to 2 parts by weight.
[その他の添加剤]
本発明の層間充填剤組成物には、その機能性の更なる向上を目的として、本発明の効果を損なわない範囲において、上記したもの以外の各種の添加剤を含んでいてもよい。
添加剤の例としては、接合性やエポキシ樹脂(A)とフィラー(C)との接合性向上のためのカップリング剤、保存安定性向上のための紫外線防止剤、酸化防止剤、可塑剤、難燃剤、着色剤、流動性改良剤、基材との密着性向上剤(例えば、熱可塑性のオリゴマー類)等が挙げられる。 [Other additives]
The interlayer filler composition of the present invention may contain various additives other than those described above within a range not impairing the effects of the present invention for the purpose of further improving the functionality.
Examples of additives include coupling agents for improving bondability and bondability between the epoxy resin (A) and the filler (C), UV inhibitors for improving storage stability, antioxidants, plasticizers, Examples include flame retardants, colorants, fluidity improvers, adhesion improvers with substrates (for example, thermoplastic oligomers), and the like.
本発明の層間充填剤組成物には、その機能性の更なる向上を目的として、本発明の効果を損なわない範囲において、上記したもの以外の各種の添加剤を含んでいてもよい。
添加剤の例としては、接合性やエポキシ樹脂(A)とフィラー(C)との接合性向上のためのカップリング剤、保存安定性向上のための紫外線防止剤、酸化防止剤、可塑剤、難燃剤、着色剤、流動性改良剤、基材との密着性向上剤(例えば、熱可塑性のオリゴマー類)等が挙げられる。 [Other additives]
The interlayer filler composition of the present invention may contain various additives other than those described above within a range not impairing the effects of the present invention for the purpose of further improving the functionality.
Examples of additives include coupling agents for improving bondability and bondability between the epoxy resin (A) and the filler (C), UV inhibitors for improving storage stability, antioxidants, plasticizers, Examples include flame retardants, colorants, fluidity improvers, adhesion improvers with substrates (for example, thermoplastic oligomers), and the like.
これらのその他の添加剤は、いずれも1種を単独で用いてもよく、2種以上を任意の組み合わせ及び比率で混合して用いてもよい。
Any of these other additives may be used alone, or two or more of them may be used in a combination and ratio.
その他の添加剤の配合量には特に制限はなく、必要な機能性が得られる程度に、通常の樹脂組成物の配合量で用いられるが、その他の添加剤成分の配合量は、エポキシ樹脂(A)及び硬化剤(B)の総和100重量部当たり、10重量部以下が好ましく、特に5重量部以下であることがより好ましい。
There are no particular restrictions on the amount of other additives used, and the amount of other additive components used is that of an epoxy resin (to the extent that necessary functionality is obtained). It is preferably 10 parts by weight or less, more preferably 5 parts by weight or less, per 100 parts by weight of the total of A) and the curing agent (B).
上記カップリング剤としては、シランカップリング剤、チタネートカップリング剤等が挙げられる。
Examples of the coupling agent include silane coupling agents and titanate coupling agents.
シランカップリング剤としては、γ-グリシドキシプロピルトリメトキシシラン、γ-グリシドキシプロピルトリエトキシシラン、β-(3,4-エポキシシクロヘキシル)エチルトリメトキシシラン等のエポキシシラン、γ-アミノプロピルトリエトキシシラン、N-β(アミノエチル)γ-アミノプロピルトリメトキシシラン、N-β(アミノエチル)γ-アミノプロピルメチルジメトキシシラン、γ-アミノプロピルトリメトキシシラン、γ-ウレイドプロピルトリエトキシシラン等のアミノシラン、3-メルカプトプロピルトリメトキシシラン等のメルカプトシラン、p-スチリルトリメトキシシラン、ビニルトリクロルシラン、ビニルトリス(β-メトキシエトキシ)シラン、ビニルトリメトキシシラン、ビニルトリエトキシシラン、γ-メタクリロキシプロピルトリメトキシシラン等のビニルシラン、さらに、エポキシ系、アミノ系、ビニル系の高分子タイプのシラン等が挙げられる。
Examples of silane coupling agents include epoxy silanes such as γ-glycidoxypropyltrimethoxysilane, γ-glycidoxypropyltriethoxysilane, β- (3,4-epoxycyclohexyl) ethyltrimethoxysilane, and γ-aminopropyl. Triethoxysilane, N-β (aminoethyl) γ-aminopropyltrimethoxysilane, N-β (aminoethyl) γ-aminopropylmethyldimethoxysilane, γ-aminopropyltrimethoxysilane, γ-ureidopropyltriethoxysilane, etc. Aminosilanes, mercaptosilanes such as 3-mercaptopropyltrimethoxysilane, p-styryltrimethoxysilane, vinyltrichlorosilane, vinyltris (β-methoxyethoxy) silane, vinyltrimethoxysilane, vinyltriethoxysilane, γ Methacryloxypropyl trimethoxysilane vinylsilane such, further, epoxy, amino-based, and a silane of the polymer type vinyl.
チタネートカップリング剤としては、イソプロピルトリイソステアロイルチタネート、イソプロピルトリ(N-アミノエチル・アミノエチル)チタネート、ジイソプロピルビス(ジオクチルホスフェート)チタネート、テトライソプロピルビス(ジオクチルホスファイト)チタネート、テトラオクチルビス(ジトリデシルホスファイト)チタネート、テトラ(2,2-ジアリルオキシメチル-1-ブチル)ビス(ジトリデシル)ホスファイトチタネート、ビス(ジオクチルパイロホスフェート)オキシアセテートチタネート、ビス(ジオクチルパイロホスフェート)エチレンチタネート等が挙げられる。
Titanate coupling agents include isopropyl triisostearoyl titanate, isopropyl tri (N-aminoethyl / aminoethyl) titanate, diisopropyl bis (dioctyl phosphate) titanate, tetraisopropyl bis (dioctyl phosphite) titanate, tetraoctyl bis (ditridecyl) Examples thereof include phosphite) titanate, tetra (2,2-diallyloxymethyl-1-butyl) bis (ditridecyl) phosphite titanate, bis (dioctylpyrophosphate) oxyacetate titanate, and bis (dioctylpyrophosphate) ethylene titanate.
これらのカップリング剤は、1種を単独で用いてもよく、2種以上を任意の組み合わせ及び比率で混合して用いてもよい。
These coupling agents may be used alone or in a combination of two or more in any combination and ratio.
本発明の層間充填剤組成物がカップリング剤を含む場合、その含有量は、層間充填剤組成物中の全固形分に対して0.1~2.0重量%程度とすることが好ましい。カップリング剤の配合量が少ないと、カップリング剤を配合したことによるマトリックス樹脂であるエポキシ樹脂(A)とフィラー(C)との密着性の向上効果を十分に得ることができず、多過ぎると得られる硬化物からカップリング剤がブリードアウトする問題がある。
When the interlayer filler composition of the present invention contains a coupling agent, the content is preferably about 0.1 to 2.0% by weight with respect to the total solid content in the interlayer filler composition. If the amount of the coupling agent is small, the effect of improving the adhesion between the epoxy resin (A) and the filler (C), which is a matrix resin, by blending the coupling agent cannot be sufficiently obtained, and the amount is too large. There is a problem that the coupling agent bleeds out from the obtained cured product.
本発明の層間充填剤組成物は、成形時の流動性改良及び基材との密着性向上のために、熱可塑性のオリゴマー類を含んでいてもよい。熱可塑性のオリゴマー類としては、C5系若しくはC9系の石油樹脂、スチレン樹脂、インデン樹脂、インデン・スチレン共重合樹脂、インデン・スチレン・フェノール共重合樹脂、インデン・クマロン共重合樹脂、インデン・ベンゾチオフェン共重合樹脂等が例示される。これらは、1種を単独で用いてもよく、2種以上を混合して用いてもよい。
The interlayer filler composition of the present invention may contain thermoplastic oligomers in order to improve the fluidity during molding and to improve the adhesion to the substrate. Thermoplastic oligomers include C5 or C9 petroleum resin, styrene resin, indene resin, indene / styrene copolymer resin, indene / styrene / phenol copolymer resin, indene / coumarone copolymer resin, indene / benzothiophene. Examples thereof include copolymer resins. These may be used alone or in combination of two or more.
本発明の層間充填剤組成物がこれらの熱可塑性のオリゴマー類を含む場合、その含有量は、通常、エポキシ樹脂(A)100重量部に対して2~30重量部、好ましくは5~20重量部である。
When the interlayer filler composition of the present invention contains these thermoplastic oligomers, the content thereof is usually 2 to 30 parts by weight, preferably 5 to 20 parts by weight with respect to 100 parts by weight of the epoxy resin (A). Part.
本発明の層間充填剤組成物は、更に、界面活性剤、乳化剤、低弾性化剤、希釈剤、消泡剤、イオントラップ剤等を含有していてもよい。
The interlayer filler composition of the present invention may further contain a surfactant, an emulsifier, a low elasticity agent, a diluent, an antifoaming agent, an ion trapping agent and the like.
界面活性剤としては、従来公知のアニオン系界面活性剤、ノニオン系界面活性剤、及びカチオン系界面活性剤のいずれも使用できる。
例えば、ポリオキシエチレンアルキルエーテル類、ポリオキシエチレンアルキルアリールエーテル類、ポリオキシエチレンアルキルエステル類、ソルビタンアルキルエステル類、モノグリセリドアルキルエステル類、アルキルベンゼンスルホン酸塩類、アルキルナフタレンスルホン酸塩類、アルキル硫酸塩類、アルキルスルホン酸塩類、スルホコハク酸エステル塩類、アルキルベタイン類、アミノ酸類などが挙げられる。
また、これら界面活性剤において、C-H結合の一部又は全てがC-F結合となったフッ素界面活性剤も好ましく用いることができる。
本発明の層間充填剤組成物がこれらの界面活性剤を含む場合、その含有量は、通常、エポキシ樹脂(A)及び硬化剤(B)の総和100重量部に対して0.001~0.1重量部、好ましくは0.003~0.05重量部である。 As the surfactant, any of conventionally known anionic surfactants, nonionic surfactants, and cationic surfactants can be used.
For example, polyoxyethylene alkyl ethers, polyoxyethylene alkyl aryl ethers, polyoxyethylene alkyl esters, sorbitan alkyl esters, monoglyceride alkyl esters, alkyl benzene sulfonates, alkyl naphthalene sulfonates, alkyl sulfates, alkyl Examples include sulfonates, sulfosuccinate esters, alkylbetaines, amino acids, and the like.
In these surfactants, fluorine surfactants in which some or all of the C—H bonds are C—F bonds can also be preferably used.
When the interlayer filler composition of the present invention contains these surfactants, the content thereof is usually 0.001 to 0.00 with respect to 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B). 1 part by weight, preferably 0.003 to 0.05 part by weight.
例えば、ポリオキシエチレンアルキルエーテル類、ポリオキシエチレンアルキルアリールエーテル類、ポリオキシエチレンアルキルエステル類、ソルビタンアルキルエステル類、モノグリセリドアルキルエステル類、アルキルベンゼンスルホン酸塩類、アルキルナフタレンスルホン酸塩類、アルキル硫酸塩類、アルキルスルホン酸塩類、スルホコハク酸エステル塩類、アルキルベタイン類、アミノ酸類などが挙げられる。
また、これら界面活性剤において、C-H結合の一部又は全てがC-F結合となったフッ素界面活性剤も好ましく用いることができる。
本発明の層間充填剤組成物がこれらの界面活性剤を含む場合、その含有量は、通常、エポキシ樹脂(A)及び硬化剤(B)の総和100重量部に対して0.001~0.1重量部、好ましくは0.003~0.05重量部である。 As the surfactant, any of conventionally known anionic surfactants, nonionic surfactants, and cationic surfactants can be used.
For example, polyoxyethylene alkyl ethers, polyoxyethylene alkyl aryl ethers, polyoxyethylene alkyl esters, sorbitan alkyl esters, monoglyceride alkyl esters, alkyl benzene sulfonates, alkyl naphthalene sulfonates, alkyl sulfates, alkyl Examples include sulfonates, sulfosuccinate esters, alkylbetaines, amino acids, and the like.
In these surfactants, fluorine surfactants in which some or all of the C—H bonds are C—F bonds can also be preferably used.
When the interlayer filler composition of the present invention contains these surfactants, the content thereof is usually 0.001 to 0.00 with respect to 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B). 1 part by weight, preferably 0.003 to 0.05 part by weight.
本発明の層間充填剤組成物には、更に有機溶媒を添加することもできる。
有機溶媒としては、例えば、アセトン、メチルエチルケトン(MEK)、メチルイソブチルケトン、メチルアミルケトン、シクロヘキサノン等のケトン類、酢酸エチル等のエステル類、エチレングリコールモノメチルエーテル等のエーテル類、N,N-ジメチルホルムアミド、N,N-ジメチルアセトアミド等のアミド類、メタノール、エタノール等のアルコール類、ヘキサン、シクロヘキサン等のアルカン類、トルエン、キシレン等の芳香族類などが挙げられる。 An organic solvent can also be added to the interlayer filler composition of the present invention.
Examples of the organic solvent include acetone, methyl ethyl ketone (MEK), methyl isobutyl ketone, methyl amyl ketone, cyclohexanone and other ketones, ethyl acetate and other esters, ethylene glycol monomethyl ether and other ethers, N, N-dimethylformamide, and the like. Amides such as N, N-dimethylacetamide, alcohols such as methanol and ethanol, alkanes such as hexane and cyclohexane, and aromatics such as toluene and xylene.
有機溶媒としては、例えば、アセトン、メチルエチルケトン(MEK)、メチルイソブチルケトン、メチルアミルケトン、シクロヘキサノン等のケトン類、酢酸エチル等のエステル類、エチレングリコールモノメチルエーテル等のエーテル類、N,N-ジメチルホルムアミド、N,N-ジメチルアセトアミド等のアミド類、メタノール、エタノール等のアルコール類、ヘキサン、シクロヘキサン等のアルカン類、トルエン、キシレン等の芳香族類などが挙げられる。 An organic solvent can also be added to the interlayer filler composition of the present invention.
Examples of the organic solvent include acetone, methyl ethyl ketone (MEK), methyl isobutyl ketone, methyl amyl ketone, cyclohexanone and other ketones, ethyl acetate and other esters, ethylene glycol monomethyl ether and other ethers, N, N-dimethylformamide, and the like. Amides such as N, N-dimethylacetamide, alcohols such as methanol and ethanol, alkanes such as hexane and cyclohexane, and aromatics such as toluene and xylene.
このうち、樹脂の溶解性及び有機溶媒の沸点等を勘案すると、メチルエチルケトンやシクロヘキサノン等のケトン類、エステル類又はエーテル類が好ましく、特にメチルエチルケトン、シクロヘキサノン等のケトン類を用いることが特に好ましい。
これらの有機溶媒は、1種を単独で用いてもよく、2種以上を任意の組み合わせ及び比率で混合して用いてもよい。 Of these, considering the solubility of the resin and the boiling point of the organic solvent, ketones such as methyl ethyl ketone and cyclohexanone, esters and ethers are preferable, and ketones such as methyl ethyl ketone and cyclohexanone are particularly preferable.
These organic solvents may be used alone or in a combination of two or more in any combination and ratio.
これらの有機溶媒は、1種を単独で用いてもよく、2種以上を任意の組み合わせ及び比率で混合して用いてもよい。 Of these, considering the solubility of the resin and the boiling point of the organic solvent, ketones such as methyl ethyl ketone and cyclohexanone, esters and ethers are preferable, and ketones such as methyl ethyl ketone and cyclohexanone are particularly preferable.
These organic solvents may be used alone or in a combination of two or more in any combination and ratio.
ただし、有機溶媒を用いると、接合工程において有機溶媒が揮発することで硬化接着層にボイドが形成され易くなるため、本発明の層間充填剤組成物は、有機溶媒を含まないことが好ましい。
However, when an organic solvent is used, voids are easily formed in the cured adhesive layer due to volatilization of the organic solvent in the bonding step, and therefore the interlayer filler composition of the present invention preferably does not contain an organic solvent.
[層間充填剤組成物の製造方法]
本発明の層間充填剤組成物は、通常、エポキシ樹脂(A)、硬化剤(B)、フィラー(C)、フラックス(D)、必要に応じて用いられる硬化促進剤(E)、分散剤(F)及びその他の添加剤成分をミキサー等によって均一に混合した後、加熱ロール、ニーダー等によって混練して製造される。これらの成分の配合順序には特に制限はない。また、混練後にプレス機などを用いてフィルム化することも可能である。更には、混練後に溶融混練物の粉砕を行い、パウダー化することやタブレット化することも可能である。 [Method for Producing Interlayer Filler Composition]
The interlayer filler composition of the present invention usually comprises an epoxy resin (A), a curing agent (B), a filler (C), a flux (D), a curing accelerator (E) used as necessary, a dispersing agent ( F) and other additive components are uniformly mixed by a mixer or the like and then kneaded by a heating roll, a kneader or the like. There is no restriction | limiting in particular in the mixing | blending order of these components. It is also possible to form a film using a press after kneading. Further, after kneading, the melt-kneaded product can be pulverized to be powdered or tableted.
本発明の層間充填剤組成物は、通常、エポキシ樹脂(A)、硬化剤(B)、フィラー(C)、フラックス(D)、必要に応じて用いられる硬化促進剤(E)、分散剤(F)及びその他の添加剤成分をミキサー等によって均一に混合した後、加熱ロール、ニーダー等によって混練して製造される。これらの成分の配合順序には特に制限はない。また、混練後にプレス機などを用いてフィルム化することも可能である。更には、混練後に溶融混練物の粉砕を行い、パウダー化することやタブレット化することも可能である。 [Method for Producing Interlayer Filler Composition]
The interlayer filler composition of the present invention usually comprises an epoxy resin (A), a curing agent (B), a filler (C), a flux (D), a curing accelerator (E) used as necessary, a dispersing agent ( F) and other additive components are uniformly mixed by a mixer or the like and then kneaded by a heating roll, a kneader or the like. There is no restriction | limiting in particular in the mixing | blending order of these components. It is also possible to form a film using a press after kneading. Further, after kneading, the melt-kneaded product can be pulverized to be powdered or tableted.
以下、本発明について、実施例を用いてさらに詳細に説明するが、本発明はその趣旨を逸脱しない限り、以下の実施例に限定されるものではない。
Hereinafter, the present invention will be described in more detail with reference to examples, but the present invention is not limited to the following examples without departing from the gist thereof.
[配合成分]
以下の実施例及び比較例において、層間充填材組成物の調製に用いた配合成分は次の通りである。 [Composition ingredients]
In the following examples and comparative examples, the compounding components used for the preparation of the interlayer filler composition are as follows.
以下の実施例及び比較例において、層間充填材組成物の調製に用いた配合成分は次の通りである。 [Composition ingredients]
In the following examples and comparative examples, the compounding components used for the preparation of the interlayer filler composition are as follows.
<エポキシ樹脂(A)>
エポキシ樹脂(A1):ダイソーケミカル社製 品名「LX-01」(ビスフェノールA型グリシジルエーテルエポキシ樹脂、エポキシ当量181g/当量、25℃での粘度10Pa・s)
エポキシ樹脂(A2):三菱化学社製 品名「jER 1032H60」(トリス(ヒドロキシフェニル)メタン型固形エポキシ樹脂、エポキシ当量169g/当量、融点56~62℃) <Epoxy resin (A)>
Epoxy resin (A1): manufactured by Daiso Chemical Co., Ltd. Product name “LX-01” (bisphenol A type glycidyl ether epoxy resin, epoxy equivalent 181 g / equivalent,viscosity 10 Pa · s at 25 ° C.)
Epoxy resin (A2): manufactured by Mitsubishi Chemical Corporation “jER 1032H60” (Tris (hydroxyphenyl) methane type solid epoxy resin, epoxy equivalent 169 g / equivalent, melting point 56 to 62 ° C.)
エポキシ樹脂(A1):ダイソーケミカル社製 品名「LX-01」(ビスフェノールA型グリシジルエーテルエポキシ樹脂、エポキシ当量181g/当量、25℃での粘度10Pa・s)
エポキシ樹脂(A2):三菱化学社製 品名「jER 1032H60」(トリス(ヒドロキシフェニル)メタン型固形エポキシ樹脂、エポキシ当量169g/当量、融点56~62℃) <Epoxy resin (A)>
Epoxy resin (A1): manufactured by Daiso Chemical Co., Ltd. Product name “LX-01” (bisphenol A type glycidyl ether epoxy resin, epoxy equivalent 181 g / equivalent,
Epoxy resin (A2): manufactured by Mitsubishi Chemical Corporation “jER 1032H60” (Tris (hydroxyphenyl) methane type solid epoxy resin, epoxy equivalent 169 g / equivalent, melting point 56 to 62 ° C.)
<硬化剤(B)>
アミン系硬化剤(B1):和歌山精化工業社製 品名「セイカキュアS」(アミン価 124g/当量、融点177℃)
アミン系硬化剤(B2):イハラケミカル工業社製 品名「エラスマー250P」(ポリテトラメチレンオキシビス-4-アミノベンゾエート、アミン価235g/当量、融点60℃、25℃での粘度10Pa・s)
酸無水物系硬化剤(B3):三菱化学社製 品名「jERキュア YH306」(3,4-ジメチル-6-(2-メチル-1-プロペニル)-4-シクロヘキセン-1,2-ジカルボン酸無水物、酸無水物当量117g/当量、25℃での粘度0.1Pa・s) <Curing agent (B)>
Amine curing agent (B1): Wakayama Seika Kogyo Co., Ltd. Product name “Seika Cure S” (amine value 124 g / equivalent, melting point 177 ° C.)
Amine-based curing agent (B2): “Elastomer 250P” manufactured by Ihara Chemical Industry Co., Ltd. (polytetramethyleneoxybis-4-aminobenzoate, amine value 235 g / equivalent, melting point 60 ° C., viscosity at 25 ° C. 10 Pa · s)
Acid anhydride curing agent (B3): manufactured by Mitsubishi Chemical Corporation “jER Cure YH306” (3,4-dimethyl-6- (2-methyl-1-propenyl) -4-cyclohexene-1,2-dicarboxylic acid anhydride Product, acid anhydride equivalent 117 g / equivalent, viscosity at 25 ° C. 0.1 Pa · s)
アミン系硬化剤(B1):和歌山精化工業社製 品名「セイカキュアS」(アミン価 124g/当量、融点177℃)
アミン系硬化剤(B2):イハラケミカル工業社製 品名「エラスマー250P」(ポリテトラメチレンオキシビス-4-アミノベンゾエート、アミン価235g/当量、融点60℃、25℃での粘度10Pa・s)
酸無水物系硬化剤(B3):三菱化学社製 品名「jERキュア YH306」(3,4-ジメチル-6-(2-メチル-1-プロペニル)-4-シクロヘキセン-1,2-ジカルボン酸無水物、酸無水物当量117g/当量、25℃での粘度0.1Pa・s) <Curing agent (B)>
Amine curing agent (B1): Wakayama Seika Kogyo Co., Ltd. Product name “Seika Cure S” (amine value 124 g / equivalent, melting point 177 ° C.)
Amine-based curing agent (B2): “Elastomer 250P” manufactured by Ihara Chemical Industry Co., Ltd. (polytetramethyleneoxybis-4-aminobenzoate, amine value 235 g / equivalent, melting point 60 ° C., viscosity at 25 ° C. 10 Pa · s)
Acid anhydride curing agent (B3): manufactured by Mitsubishi Chemical Corporation “jER Cure YH306” (3,4-dimethyl-6- (2-methyl-1-propenyl) -4-cyclohexene-1,2-dicarboxylic acid anhydride Product, acid anhydride equivalent 117 g / equivalent, viscosity at 25 ° C. 0.1 Pa · s)
<フィラー(C)>
無機フィラー(C1):龍森社製 品名「MUF-2BV」(溶融シリカ)
無機フィラー(C2):龍森社製 品名「TS-AP-9」
無機フィラー(C3):アドマテックス社製 品名「AE9104-SXE」 <Filler (C)>
Inorganic filler (C1): manufactured by Tatsumori Co., Ltd. Product name “MUF-2BV” (fused silica)
Inorganic filler (C2): Product name “TS-AP-9” manufactured by Tatsumorisha
Inorganic filler (C3): Product name “AE9104-SXE” manufactured by Admatechs
無機フィラー(C1):龍森社製 品名「MUF-2BV」(溶融シリカ)
無機フィラー(C2):龍森社製 品名「TS-AP-9」
無機フィラー(C3):アドマテックス社製 品名「AE9104-SXE」 <Filler (C)>
Inorganic filler (C1): manufactured by Tatsumori Co., Ltd. Product name “MUF-2BV” (fused silica)
Inorganic filler (C2): Product name “TS-AP-9” manufactured by Tatsumorisha
Inorganic filler (C3): Product name “AE9104-SXE” manufactured by Admatechs
<フラックス(D)>
フラックス(D1):日油社製 品名「サンタシッドI」(モノアルキルビニルエーテルブロック2官能カルボン酸)
フラックス(D2):和光純薬社製 品名「ピメリン酸」 <Flux (D)>
Flux (D1): NOF Corporation product name “Santa Cid I” (monoalkyl vinyl ether block bifunctional carboxylic acid)
Flux (D2): Wako Pure Chemical Industries, Ltd. Product name “Pimelic acid”
フラックス(D1):日油社製 品名「サンタシッドI」(モノアルキルビニルエーテルブロック2官能カルボン酸)
フラックス(D2):和光純薬社製 品名「ピメリン酸」 <Flux (D)>
Flux (D1): NOF Corporation product name “Santa Cid I” (monoalkyl vinyl ether block bifunctional carboxylic acid)
Flux (D2): Wako Pure Chemical Industries, Ltd. Product name “Pimelic acid”
<硬化促進剤(E)>
硬化促進剤(E):旭化成イーマテリアルズ社製 品名「ノバキュアHXA3792」(マイクロカプセル化されたアミン系硬化剤及びビスフェノールA型液状エポキシ樹脂の混合物) <Curing accelerator (E)>
Curing accelerator (E): Product name “Novacure HXA3792” (mixture of microencapsulated amine curing agent and bisphenol A liquid epoxy resin) manufactured by Asahi Kasei E-Materials
硬化促進剤(E):旭化成イーマテリアルズ社製 品名「ノバキュアHXA3792」(マイクロカプセル化されたアミン系硬化剤及びビスフェノールA型液状エポキシ樹脂の混合物) <Curing accelerator (E)>
Curing accelerator (E): Product name “Novacure HXA3792” (mixture of microencapsulated amine curing agent and bisphenol A liquid epoxy resin) manufactured by Asahi Kasei E-Materials
<分散剤(F)>
分散剤(F):ビックケミー・ジャパン社製 品名「BYK-2155」(顔料親和性基を有するブロックコポリマー) <Dispersant (F)>
Dispersant (F): Product name “BYK-2155” (block copolymer having pigment affinity group) manufactured by Big Chemie Japan
分散剤(F):ビックケミー・ジャパン社製 品名「BYK-2155」(顔料親和性基を有するブロックコポリマー) <Dispersant (F)>
Dispersant (F): Product name “BYK-2155” (block copolymer having pigment affinity group) manufactured by Big Chemie Japan
[各種物性・特性の評価]
(1)層間充填剤組成物の粘度
アントンパール・ジャパン社製の粘弾性測定装置(Physica MCR102)を用いて、以下の通り、層間充填剤組成物の粘度(動的粘弾性測定による複素粘度)を測定した。
まず、測定対象である層間充填剤組成物をパラレルプレートディッシュ(Parallel Plate Dish)とパラレルプレート(φ20mm)の間に載置し、動的粘弾性測定を行った。
測定条件は、上記サンプルに正弦波歪みを0.5%与え、その歪みの周波数は1(Hz)とし、1分間に3℃の割合で昇温させる過程での粘度を40℃~200℃まで測定し、130℃における粘度をη130として求めた。 [Evaluation of various physical properties and characteristics]
(1) Viscosity of interlayer filler composition Viscoelasticity measuring device (Physica MCR102) manufactured by Anton Paar Japan Co., Ltd., and viscosity of interlayer filler composition as follows (complex viscosity by dynamic viscoelasticity measurement) Was measured.
First, the interlayer filler composition to be measured was placed between a parallel plate dish (Parallel Plate Dish) and a parallel plate (φ20 mm), and dynamic viscoelasticity measurement was performed.
The measurement condition is that 0.5% sinusoidal distortion is applied to the sample, the frequency of the distortion is 1 (Hz), and the viscosity in the process of raising the temperature at a rate of 3 ° C. per minute is from 40 ° C. to 200 ° C. measured to determine the viscosity at 130 ° C. as eta 130.
(1)層間充填剤組成物の粘度
アントンパール・ジャパン社製の粘弾性測定装置(Physica MCR102)を用いて、以下の通り、層間充填剤組成物の粘度(動的粘弾性測定による複素粘度)を測定した。
まず、測定対象である層間充填剤組成物をパラレルプレートディッシュ(Parallel Plate Dish)とパラレルプレート(φ20mm)の間に載置し、動的粘弾性測定を行った。
測定条件は、上記サンプルに正弦波歪みを0.5%与え、その歪みの周波数は1(Hz)とし、1分間に3℃の割合で昇温させる過程での粘度を40℃~200℃まで測定し、130℃における粘度をη130として求めた。 [Evaluation of various physical properties and characteristics]
(1) Viscosity of interlayer filler composition Viscoelasticity measuring device (Physica MCR102) manufactured by Anton Paar Japan Co., Ltd., and viscosity of interlayer filler composition as follows (complex viscosity by dynamic viscoelasticity measurement) Was measured.
First, the interlayer filler composition to be measured was placed between a parallel plate dish (Parallel Plate Dish) and a parallel plate (φ20 mm), and dynamic viscoelasticity measurement was performed.
The measurement condition is that 0.5% sinusoidal distortion is applied to the sample, the frequency of the distortion is 1 (Hz), and the viscosity in the process of raising the temperature at a rate of 3 ° C. per minute is from 40 ° C. to 200 ° C. measured to determine the viscosity at 130 ° C. as eta 130.
(2)接合性の評価
製造された半導体デバイス内部のデイジーチェイン(Daisy Chain)の電気抵抗をデジタルマルチメーターにより四端子法にて測定した。ペリフェラル部の外周の抵抗値R1=70Ω、内周の抵抗値R2=27Ωに対して、±5%に収まっている場合を「○」と評価し、±5%を超える場合を「×」とした。 (2) Evaluation of bondability The electrical resistance of a daisy chain inside a manufactured semiconductor device was measured by a four-terminal method using a digital multimeter. When the peripheral resistance value R1 = 70Ω and the inner peripheral resistance value R2 = 27Ω of the peripheral portion are within ± 5%, the evaluation is “◯”, and the case where the value exceeds ± 5% is indicated as “X”. did.
製造された半導体デバイス内部のデイジーチェイン(Daisy Chain)の電気抵抗をデジタルマルチメーターにより四端子法にて測定した。ペリフェラル部の外周の抵抗値R1=70Ω、内周の抵抗値R2=27Ωに対して、±5%に収まっている場合を「○」と評価し、±5%を超える場合を「×」とした。 (2) Evaluation of bondability The electrical resistance of a daisy chain inside a manufactured semiconductor device was measured by a four-terminal method using a digital multimeter. When the peripheral resistance value R1 = 70Ω and the inner peripheral resistance value R2 = 27Ω of the peripheral portion are within ± 5%, the evaluation is “◯”, and the case where the value exceeds ± 5% is indicated as “X”. did.
(3)接合面内のボイド評価
製造された半導体デバイスについて、日立パワーソリューションズ社製の超音波探査映像装置(FS300III)を用いて、接合チップ間のバンプとバンプの間におけるボイ
ドの有無を観察した。ボイドが10個以下の場合を「○」と評価し、ボイドが11個以上のものを「×」とした。 (3) Evaluation of voids in the bonding surface For the manufactured semiconductor device, the presence or absence of voids between the bumps between the bonding chips was observed using an ultrasonic exploration imaging device (FS300III) manufactured by Hitachi Power Solutions. . A case where the number of voids was 10 or less was evaluated as “◯”, and a case where there were 11 or more voids was determined as “x”.
製造された半導体デバイスについて、日立パワーソリューションズ社製の超音波探査映像装置(FS300III)を用いて、接合チップ間のバンプとバンプの間におけるボイ
ドの有無を観察した。ボイドが10個以下の場合を「○」と評価し、ボイドが11個以上のものを「×」とした。 (3) Evaluation of voids in the bonding surface For the manufactured semiconductor device, the presence or absence of voids between the bumps between the bonding chips was observed using an ultrasonic exploration imaging device (FS300III) manufactured by Hitachi Power Solutions. . A case where the number of voids was 10 or less was evaluated as “◯”, and a case where there were 11 or more voids was determined as “x”.
[実施例1~18、比較例1~8]
150ccの撹拌容器に、エポキシ樹脂(A1)を8.31g、アミン系硬化剤(B1)を2.26g、アミン系硬化剤(B2)を1.43g秤量し、これに分散剤(F)を、全フィラー(C)添加量に対して1重量部(0.18g)配合添加して、自公転攪拌機(シンキー社製のARV-310)を用いて、2000rpm、1kPaで2分間撹拌した。続いて、無機フィラー(C1)を18.0g添加して、自公転攪拌機にて、2000rpm、1kPaで3分間撹拌した後、更に、1600rpm、1kPaで5分間撹拌した。次に、フラックス(D1)を、全樹脂量に対して0.5重量部(0.06g)添加し、1600rpm、1kPaで5分間撹拌し、層間充填材組成物を調製した。この層間充填材組成物のη130は1Pa・s以下であった。 [Examples 1 to 18, Comparative Examples 1 to 8]
In a 150 cc stirring vessel, weigh 8.31 g of epoxy resin (A1), 2.26 g of amine curing agent (B1), and 1.43 g of amine curing agent (B2), and add dispersant (F) to this. Then, 1 part by weight (0.18 g) was added and added to the total amount of filler (C), and the mixture was stirred for 2 minutes at 2000 rpm and 1 kPa using a self-revolving stirrer (ARV-310 manufactured by Shinky Corporation). Subsequently, 18.0 g of inorganic filler (C1) was added, and the mixture was stirred for 3 minutes at 2000 rpm and 1 kPa with a self-revolving stirrer, and further stirred for 5 minutes at 1600 rpm and 1 kPa. Next, 0.5 part by weight (0.06 g) of flux (D1) was added to the total resin amount, and the mixture was stirred at 1600 rpm and 1 kPa for 5 minutes to prepare an interlayer filler composition. Η 130 of this interlayer filler composition was 1 Pa · s or less.
150ccの撹拌容器に、エポキシ樹脂(A1)を8.31g、アミン系硬化剤(B1)を2.26g、アミン系硬化剤(B2)を1.43g秤量し、これに分散剤(F)を、全フィラー(C)添加量に対して1重量部(0.18g)配合添加して、自公転攪拌機(シンキー社製のARV-310)を用いて、2000rpm、1kPaで2分間撹拌した。続いて、無機フィラー(C1)を18.0g添加して、自公転攪拌機にて、2000rpm、1kPaで3分間撹拌した後、更に、1600rpm、1kPaで5分間撹拌した。次に、フラックス(D1)を、全樹脂量に対して0.5重量部(0.06g)添加し、1600rpm、1kPaで5分間撹拌し、層間充填材組成物を調製した。この層間充填材組成物のη130は1Pa・s以下であった。 [Examples 1 to 18, Comparative Examples 1 to 8]
In a 150 cc stirring vessel, weigh 8.31 g of epoxy resin (A1), 2.26 g of amine curing agent (B1), and 1.43 g of amine curing agent (B2), and add dispersant (F) to this. Then, 1 part by weight (0.18 g) was added and added to the total amount of filler (C), and the mixture was stirred for 2 minutes at 2000 rpm and 1 kPa using a self-revolving stirrer (ARV-310 manufactured by Shinky Corporation). Subsequently, 18.0 g of inorganic filler (C1) was added, and the mixture was stirred for 3 minutes at 2000 rpm and 1 kPa with a self-revolving stirrer, and further stirred for 5 minutes at 1600 rpm and 1 kPa. Next, 0.5 part by weight (0.06 g) of flux (D1) was added to the total resin amount, and the mixture was stirred at 1600 rpm and 1 kPa for 5 minutes to prepare an interlayer filler composition. Η 130 of this interlayer filler composition was 1 Pa · s or less.
層間充填材組成物を、それぞれ、WALTS社製のインターポーザ(IP80ModelI、10mm角)に、70℃に加熱しながら、約10mg塗布(有効面積当たり約20mg/cm2)した。
この層間充填材組成物を塗布したインターポーザ(IP80ModelI)をステージ側にし、シリコン製はんだバンプチップ(CC80ModelI、7.3mm角)をヘッド側にし、東レエンジニアリング社製の熱圧着接合装置「フリップチップボンダ(FC3000S)」を用いて、表1に示すヘッド及びステージの温度条件で、20N(3.8Kgf/cm2)にて、表1に示す接合時間で加熱圧着接合した。その後、165℃で2時間加熱硬化させて、半導体デバイスを製造した。 About 10 mg (about 20 mg / cm 2 per effective area) of the interlayer filler composition was applied to an interposer (IP80Model I, 10 mm square) manufactured by WALTS while heating to 70 ° C.
The interposer (IP80 Model I) coated with this interlayer filler composition is on the stage side, the silicon solder bump chip (CC80 Model I, 7.3 mm square) is on the head side, and the thermocompression bonding device “Flip Chip Bonder ( FC3000S) ”and thermocompression bonding was performed at 20 N (3.8 Kgf / cm 2 ) for the bonding time shown in Table 1 under the head and stage temperature conditions shown in Table 1. Then, it heat-hardened at 165 degreeC for 2 hours, and manufactured the semiconductor device.
この層間充填材組成物を塗布したインターポーザ(IP80ModelI)をステージ側にし、シリコン製はんだバンプチップ(CC80ModelI、7.3mm角)をヘッド側にし、東レエンジニアリング社製の熱圧着接合装置「フリップチップボンダ(FC3000S)」を用いて、表1に示すヘッド及びステージの温度条件で、20N(3.8Kgf/cm2)にて、表1に示す接合時間で加熱圧着接合した。その後、165℃で2時間加熱硬化させて、半導体デバイスを製造した。 About 10 mg (about 20 mg / cm 2 per effective area) of the interlayer filler composition was applied to an interposer (IP80Model I, 10 mm square) manufactured by WALTS while heating to 70 ° C.
The interposer (IP80 Model I) coated with this interlayer filler composition is on the stage side, the silicon solder bump chip (CC80 Model I, 7.3 mm square) is on the head side, and the thermocompression bonding device “Flip Chip Bonder ( FC3000S) ”and thermocompression bonding was performed at 20 N (3.8 Kgf / cm 2 ) for the bonding time shown in Table 1 under the head and stage temperature conditions shown in Table 1. Then, it heat-hardened at 165 degreeC for 2 hours, and manufactured the semiconductor device.
[実施例19、20]
150ccの撹拌容器に、エポキシ樹脂(A1)を3.56g、エポキシ樹脂(A2)を3.56g、酸無水物系硬化剤(B3)を4.87g秤量し、これに分散剤(F)を、全フィラー(C)添加量に対して1重量部(0.18g)を配合添加して、自公転攪拌機(シンキー社製のARV-310)を用いて、2000rpm、1kPaで2分間撹拌した。続いて、無機フィラー(C1)を18.0g添加して、自公転攪拌機にて、2000rpm1、kPaで3分間撹拌した後、更に、1600rpm、1kPaで5分間撹拌した。次に、硬化促進剤(E)を1.8g、フラックス(D1)を全樹脂量に対して0.5重量部(0.06g)添加し、1600rpm、1kPaで5分間撹拌し、層間充填材組成物を調製した。この層間充填材組成物のη130は1Pa・s以下であった。
調製された層間充填材組成物を用いて、実施例1と同様に、表1に示す接合条件で加熱加圧接合を行って、半導体デバイスを製造した。 [Examples 19 and 20]
In a 150 cc stirring vessel, 3.56 g of epoxy resin (A1), 3.56 g of epoxy resin (A2), and 4.87 g of acid anhydride curing agent (B3) are weighed, and dispersant (F) is added thereto. Then, 1 part by weight (0.18 g) was blended and added to the total amount of filler (C), and the mixture was stirred at 2000 rpm and 1 kPa for 2 minutes using a self-revolving stirrer (ARV-310 manufactured by Sinky). Subsequently, 18.0 g of inorganic filler (C1) was added, and the mixture was stirred for 3 minutes at 2000rpm 1 and kPa with a self-revolving stirrer, and further stirred for 5 minutes at 1600 rpm and 1 kPa. Next, 1.8 g of the curing accelerator (E) and 0.5 part by weight (0.06 g) of the flux (D1) are added to the total amount of resin, and the mixture is stirred at 1600 rpm and 1 kPa for 5 minutes to obtain an interlayer filler. A composition was prepared. Η 130 of this interlayer filler composition was 1 Pa · s or less.
Using the prepared interlayer filler composition, similarly to Example 1, heat-pressure bonding was performed under the bonding conditions shown in Table 1 to manufacture a semiconductor device.
150ccの撹拌容器に、エポキシ樹脂(A1)を3.56g、エポキシ樹脂(A2)を3.56g、酸無水物系硬化剤(B3)を4.87g秤量し、これに分散剤(F)を、全フィラー(C)添加量に対して1重量部(0.18g)を配合添加して、自公転攪拌機(シンキー社製のARV-310)を用いて、2000rpm、1kPaで2分間撹拌した。続いて、無機フィラー(C1)を18.0g添加して、自公転攪拌機にて、2000rpm1、kPaで3分間撹拌した後、更に、1600rpm、1kPaで5分間撹拌した。次に、硬化促進剤(E)を1.8g、フラックス(D1)を全樹脂量に対して0.5重量部(0.06g)添加し、1600rpm、1kPaで5分間撹拌し、層間充填材組成物を調製した。この層間充填材組成物のη130は1Pa・s以下であった。
調製された層間充填材組成物を用いて、実施例1と同様に、表1に示す接合条件で加熱加圧接合を行って、半導体デバイスを製造した。 [Examples 19 and 20]
In a 150 cc stirring vessel, 3.56 g of epoxy resin (A1), 3.56 g of epoxy resin (A2), and 4.87 g of acid anhydride curing agent (B3) are weighed, and dispersant (F) is added thereto. Then, 1 part by weight (0.18 g) was blended and added to the total amount of filler (C), and the mixture was stirred at 2000 rpm and 1 kPa for 2 minutes using a self-revolving stirrer (ARV-310 manufactured by Sinky). Subsequently, 18.0 g of inorganic filler (C1) was added, and the mixture was stirred for 3 minutes at 2000
Using the prepared interlayer filler composition, similarly to Example 1, heat-pressure bonding was performed under the bonding conditions shown in Table 1 to manufacture a semiconductor device.
実施例1~20、比較例1~8で得られた半導体デバイスについて、接合性とボイドの評価を行い、結果をまとめて表1に示した。表1中、「Over」は、導通不良(抵抗値が1MΩ以上)であることを意味する。
The semiconductor devices obtained in Examples 1 to 20 and Comparative Examples 1 to 8 were evaluated for bondability and voids, and the results are shown in Table 1. In Table 1, “Over” means a conduction failure (resistance value is 1 MΩ or more).
[実施例21~24、比較例9~10]
150ccの撹拌容器に、エポキシ樹脂(A1)を1.78g、エポキシ樹脂(A2)を1.78g、酸無水物硬化剤(B3)を2.85g秤量し、これに分散剤(F)を全フィラー添加量に対して1重量部(0.34g)を配合添加して、自公転攪拌機(株式会社シンキー製 ARV-310)を用いて2000rpm1kPaで5分間撹拌した。続いて、無機フィラー(C2)を16.8g添加して、自公転攪拌機にて1800rpm1kPaで5分間撹拌後、更に、無機フィラー(C3)を16.8g添加し、1800rpm1kPaで5分間撹拌した。次に硬化促進剤(E)を0.96g添加し、1800rpm1kPaで5分間撹拌し、続いて、フラックス(D2)を全樹脂量に対して1重量部(0.06g)添加し、1800rpm1kPaで5分間撹拌し、層間充填材組成物を得た。この層間充填材組成物のη130は1Pa・s以下であった。 [Examples 21 to 24, Comparative Examples 9 to 10]
In a 150 cc stirring vessel, 1.78 g of epoxy resin (A1), 1.78 g of epoxy resin (A2), and 2.85 g of acid anhydride curing agent (B3) are weighed, and all of dispersant (F) is added thereto. 1 part by weight (0.34 g) was added and added to the added amount of filler, and the mixture was stirred for 5 minutes at 2000 rpm and 1 kPa using a self-revolving stirrer (ARV-310, manufactured by Shinky Corporation). Subsequently, 16.8 g of inorganic filler (C2) was added, and after stirring for 5 minutes at 1800rpm 1 kPa with a self-revolving stirrer, 16.8 g of inorganic filler (C3) was further added and stirred for 5 minutes at 1800 rpm 1 kPa. Next, 0.96 g of a curing accelerator (E) is added and stirred for 5 minutes at 1800 rpm 1 kPa. Subsequently, 1 part by weight (0.06 g) of flux (D2) is added to the total amount of resin, and 5 at 1800 rpm 1 kPa. Stirring was performed for a minute to obtain an interlayer filler composition. Η 130 of this interlayer filler composition was 1 Pa · s or less.
150ccの撹拌容器に、エポキシ樹脂(A1)を1.78g、エポキシ樹脂(A2)を1.78g、酸無水物硬化剤(B3)を2.85g秤量し、これに分散剤(F)を全フィラー添加量に対して1重量部(0.34g)を配合添加して、自公転攪拌機(株式会社シンキー製 ARV-310)を用いて2000rpm1kPaで5分間撹拌した。続いて、無機フィラー(C2)を16.8g添加して、自公転攪拌機にて1800rpm1kPaで5分間撹拌後、更に、無機フィラー(C3)を16.8g添加し、1800rpm1kPaで5分間撹拌した。次に硬化促進剤(E)を0.96g添加し、1800rpm1kPaで5分間撹拌し、続いて、フラックス(D2)を全樹脂量に対して1重量部(0.06g)添加し、1800rpm1kPaで5分間撹拌し、層間充填材組成物を得た。この層間充填材組成物のη130は1Pa・s以下であった。 [Examples 21 to 24, Comparative Examples 9 to 10]
In a 150 cc stirring vessel, 1.78 g of epoxy resin (A1), 1.78 g of epoxy resin (A2), and 2.85 g of acid anhydride curing agent (B3) are weighed, and all of dispersant (F) is added thereto. 1 part by weight (0.34 g) was added and added to the added amount of filler, and the mixture was stirred for 5 minutes at 2000 rpm and 1 kPa using a self-revolving stirrer (ARV-310, manufactured by Shinky Corporation). Subsequently, 16.8 g of inorganic filler (C2) was added, and after stirring for 5 minutes at 1800
層間充填材組成物を、それぞれ、WALTS社製のインターポーザ(IP80ModelI、10mm角)に、70℃に加熱しながら、約10mg塗布(有効面積当たり約20mg/cm2)した。
この層間充填材組成物を塗布したインターポーザ(IP80ModelI)及びシリコン製はんだバンプチップ(CC80ModelI、7.3mm角)を、東レエンジニアリング社製の熱圧着接合装置「フリップチップボンダ(FC3000S)」を用いて、表2に示す側にインターポーザをセットし、表2に示すヘッド及びステージの温度条件で、加圧力20N(3.8Kgf/cm2)、加熱加圧時間5秒で加熱圧着接合した。その後、180℃で2時間加熱硬化させて、半導体デバイスを製造した。 About 10 mg (about 20 mg / cm 2 per effective area) of the interlayer filler composition was applied to an interposer (IP80Model I, 10 mm square) manufactured by WALTS while heating to 70 ° C.
Using an interposer (IP80ModelI) and a silicon solder bump chip (CC80ModelI, 7.3 mm square) coated with this interlayer filler composition, using a thermocompression bonding apparatus “Flip Chip Bonder (FC3000S)” manufactured by Toray Engineering Co., Ltd. An interposer was set on the side shown in Table 2, and thermocompression bonding was performed under the pressure conditions of the head and stage shown in Table 2 with a pressure of 20 N (3.8 kgf / cm 2 ) and a heating and pressing time of 5 seconds. Then, it heat-hardened at 180 degreeC for 2 hours, and manufactured the semiconductor device.
この層間充填材組成物を塗布したインターポーザ(IP80ModelI)及びシリコン製はんだバンプチップ(CC80ModelI、7.3mm角)を、東レエンジニアリング社製の熱圧着接合装置「フリップチップボンダ(FC3000S)」を用いて、表2に示す側にインターポーザをセットし、表2に示すヘッド及びステージの温度条件で、加圧力20N(3.8Kgf/cm2)、加熱加圧時間5秒で加熱圧着接合した。その後、180℃で2時間加熱硬化させて、半導体デバイスを製造した。 About 10 mg (about 20 mg / cm 2 per effective area) of the interlayer filler composition was applied to an interposer (IP80Model I, 10 mm square) manufactured by WALTS while heating to 70 ° C.
Using an interposer (IP80ModelI) and a silicon solder bump chip (CC80ModelI, 7.3 mm square) coated with this interlayer filler composition, using a thermocompression bonding apparatus “Flip Chip Bonder (FC3000S)” manufactured by Toray Engineering Co., Ltd. An interposer was set on the side shown in Table 2, and thermocompression bonding was performed under the pressure conditions of the head and stage shown in Table 2 with a pressure of 20 N (3.8 kgf / cm 2 ) and a heating and pressing time of 5 seconds. Then, it heat-hardened at 180 degreeC for 2 hours, and manufactured the semiconductor device.
実施例21~24、比較例9~10で得られた半導体デバイスについて、接合性とボイドの評価を行い、結果をまとめて表2に示した。
The semiconductor devices obtained in Examples 21 to 24 and Comparative Examples 9 to 10 were evaluated for bondability and voids, and the results are summarized in Table 2.
[実施例25]
実施例1で用いた層間充填材組成物を、それぞれ、WALTS社製のインターポーザ(IP80ModelI、10mm角)に、70℃に加熱しながら約2mg塗布(有効面積当たり約4mg/cm2)した。
この層間充填材組成物を塗布したインターポーザ(IP80ModelI)及びシリコン製TSVチップ(CC80TSV-2、7.3mm角)を、東レエンジニアリング社製の熱圧着接合装置「フリップチップボンダ(FC3000S)」を用いて、ヘッド温度250℃、ステージ温度250℃、接合時間5sec、接合圧力20N(3.8Kgf/cm2)にて加熱圧着接合した。
その後、層間充填剤組成物を上記接合した基板に、70℃に加熱しながら約8mg塗布(有効面積当たり約16mg/cm2)し、更に、シリコン製はんだバンプチップ(CC80ModelI、7.3mm角)を、同条件で加熱圧着接合した。その後、165℃で2時間加熱硬化させて、半導体デバイスを製造した。
その結果、ボイドはなく導通も確認できた。得られた半導体デバイスの外観形状と断面写真を図3に示す。 [Example 25]
About 2 mg (about 4 mg / cm 2 per effective area) of the interlayer filler composition used in Example 1 was applied to an interposer (IP80Model I, 10 mm square) manufactured by WALTS while heating to 70 ° C.
Using an interposer (IP80Model I) and a silicon TSV chip (CC80TSV-2, 7.3 mm square) coated with this interlayer filler composition, using a thermocompression bonding apparatus “Flip Chip Bonder (FC3000S)” manufactured by Toray Engineering Co., Ltd. Then, thermocompression bonding was performed at a head temperature of 250 ° C., a stage temperature of 250 ° C., a bonding time of 5 sec, and a bonding pressure of 20 N (3.8 kgf / cm 2 ).
Thereafter, about 8 mg of the interlayer filler composition was applied to the bonded substrates while heating to 70 ° C. (about 16 mg / cm 2 per effective area), and a silicon solder bump chip (CC80 Model I, 7.3 mm square) Were heat-press bonded under the same conditions. Then, it heat-hardened at 165 degreeC for 2 hours, and manufactured the semiconductor device.
As a result, there was no void and conduction was confirmed. FIG. 3 shows an appearance shape and a cross-sectional photograph of the obtained semiconductor device.
実施例1で用いた層間充填材組成物を、それぞれ、WALTS社製のインターポーザ(IP80ModelI、10mm角)に、70℃に加熱しながら約2mg塗布(有効面積当たり約4mg/cm2)した。
この層間充填材組成物を塗布したインターポーザ(IP80ModelI)及びシリコン製TSVチップ(CC80TSV-2、7.3mm角)を、東レエンジニアリング社製の熱圧着接合装置「フリップチップボンダ(FC3000S)」を用いて、ヘッド温度250℃、ステージ温度250℃、接合時間5sec、接合圧力20N(3.8Kgf/cm2)にて加熱圧着接合した。
その後、層間充填剤組成物を上記接合した基板に、70℃に加熱しながら約8mg塗布(有効面積当たり約16mg/cm2)し、更に、シリコン製はんだバンプチップ(CC80ModelI、7.3mm角)を、同条件で加熱圧着接合した。その後、165℃で2時間加熱硬化させて、半導体デバイスを製造した。
その結果、ボイドはなく導通も確認できた。得られた半導体デバイスの外観形状と断面写真を図3に示す。 [Example 25]
About 2 mg (about 4 mg / cm 2 per effective area) of the interlayer filler composition used in Example 1 was applied to an interposer (IP80Model I, 10 mm square) manufactured by WALTS while heating to 70 ° C.
Using an interposer (IP80Model I) and a silicon TSV chip (CC80TSV-2, 7.3 mm square) coated with this interlayer filler composition, using a thermocompression bonding apparatus “Flip Chip Bonder (FC3000S)” manufactured by Toray Engineering Co., Ltd. Then, thermocompression bonding was performed at a head temperature of 250 ° C., a stage temperature of 250 ° C., a bonding time of 5 sec, and a bonding pressure of 20 N (3.8 kgf / cm 2 ).
Thereafter, about 8 mg of the interlayer filler composition was applied to the bonded substrates while heating to 70 ° C. (about 16 mg / cm 2 per effective area), and a silicon solder bump chip (CC80 Model I, 7.3 mm square) Were heat-press bonded under the same conditions. Then, it heat-hardened at 165 degreeC for 2 hours, and manufactured the semiconductor device.
As a result, there was no void and conduction was confirmed. FIG. 3 shows an appearance shape and a cross-sectional photograph of the obtained semiconductor device.
[考察]
表1及び実施例25より、本発明で規定されるヘッド及びステージ温度条件下、前記4つの式で囲まれる温度領域を採用することにより、ボイドを低減して良好な接合性、導通性を得ることができることが分かった。 [Discussion]
From Table 1 and Example 25, by adopting the temperature region surrounded by the above four formulas under the head and stage temperature conditions defined in the present invention, voids are reduced and good bonding properties and electrical conductivity are obtained. I found out that I could do it.
表1及び実施例25より、本発明で規定されるヘッド及びステージ温度条件下、前記4つの式で囲まれる温度領域を採用することにより、ボイドを低減して良好な接合性、導通性を得ることができることが分かった。 [Discussion]
From Table 1 and Example 25, by adopting the temperature region surrounded by the above four formulas under the head and stage temperature conditions defined in the present invention, voids are reduced and good bonding properties and electrical conductivity are obtained. I found out that I could do it.
本発明の半導体デバイスの製造法によれば、硬化接着層のボイドを低減して、良好な接合性、導通性を得ることができ、信頼性に優れた高品質の半導体デバイスを実現することができる。
なお、2014年10月10日に出願された日本特許出願2014-209100号、及び2015年8月31日に出願された日本特許出願2015-170906号の明細書、特許請求の範囲、図面及び要約書の全内容をここに引用し、本発明の明細書の開示として、取り入れるものである。 According to the method for manufacturing a semiconductor device of the present invention, it is possible to reduce voids in the cured adhesive layer, obtain good bonding properties and electrical conductivity, and realize a high-quality semiconductor device with excellent reliability. it can.
The specification, claims, drawings and abstract of Japanese Patent Application No. 2014-209100 filed on October 10, 2014 and Japanese Patent Application No. 2015-170906 filed on August 31, 2015. The entire contents of this document are hereby incorporated by reference as the disclosure of the specification of the present invention.
なお、2014年10月10日に出願された日本特許出願2014-209100号、及び2015年8月31日に出願された日本特許出願2015-170906号の明細書、特許請求の範囲、図面及び要約書の全内容をここに引用し、本発明の明細書の開示として、取り入れるものである。 According to the method for manufacturing a semiconductor device of the present invention, it is possible to reduce voids in the cured adhesive layer, obtain good bonding properties and electrical conductivity, and realize a high-quality semiconductor device with excellent reliability. it can.
The specification, claims, drawings and abstract of Japanese Patent Application No. 2014-209100 filed on October 10, 2014 and Japanese Patent Application No. 2015-170906 filed on August 31, 2015. The entire contents of this document are hereby incorporated by reference as the disclosure of the specification of the present invention.
1 半田バンプ 2 半導体チップ 3 層間充填剤組成物 5 層間充填剤組成物層 6 電極パッド 7 半導体基板 8 硬化接着層 10 半導体デバイス 11 貫通電極(TSV)
1 Solder bump 2 Semiconductor chip 3 Interlayer filler composition 5 Interlayer filler composition layer 6 Electrode pad 7 Semiconductor substrate 8 Hardened adhesive layer 10 Semiconductor device 11 Through electrode (TSV)
Claims (14)
- 半田バンプを有する半導体チップと電極パッドを有する半導体基板とを、層間充填剤組成物を介して熱圧着接合装置により熱圧着接合して半導体デバイスを製造する方法において、
該熱圧着接合装置のヘッド及びステージの温度が、ヘッド温度を縦軸、ステージ温度を横軸としたグラフにおいて、下記4つの式で囲まれた範囲内となる温度条件にて接合する半導体デバイスの製造法。
H+1.9S=590 …式1
H+0.526S=310 …式2
H+0.8S=580 …式3
H+1.25S=725 …式4
(上記式1~4中、Hは接合時のヘッド温度(℃)、Sは接合時のステージ温度(℃)を表す。) In a method of manufacturing a semiconductor device by thermocompression bonding a semiconductor chip having a solder bump and a semiconductor substrate having an electrode pad by a thermocompression bonding apparatus through an interlayer filler composition,
The temperature of the head and stage of the thermocompression bonding apparatus is a graph showing the temperature of the semiconductor device that is bonded within the range surrounded by the following four formulas in the graph where the head temperature is the vertical axis and the stage temperature is the horizontal axis. Manufacturing method.
H + 1.9S = 590 ... Formula 1
H + 0.526S = 310 Formula 2
H + 0.8S = 580 Formula 3
H + 1.25S = 725 Formula 4
(In the above formulas 1 to 4, H represents the head temperature (° C.) during bonding, and S represents the stage temperature (° C.) during bonding.) - 半田バンプを有する半導体チップと電極パッドを有する半導体基板とを、個別に温度調節できるヘッド及びステージを有する熱圧着接合装置により、層間充填剤組成物を介して熱圧着接合して半導体デバイスを製造する方法であって、
該熱圧着接合装置のヘッド及びステージの温度が、ヘッド温度を縦軸、ステージ温度を横軸としたグラフにおいて、下記4つの式で囲まれた範囲内となる温度条件にて接合する半導体デバイスの製造法。
H+1.9S=590 …式1
H+0.526S=310 …式2
H+0.8S=580 …式3
H+1.25S=725 …式4
(式1~4中、Hは接合時のヘッド温度(℃)、Sは接合時のステージ温度(℃)を表す。) A semiconductor chip having a solder bump and a semiconductor substrate having an electrode pad are bonded by thermocompression bonding via an interlayer filler composition using a thermocompression bonding apparatus having a head and a stage capable of individually adjusting the temperature to manufacture a semiconductor device. A method,
The temperature of the head and stage of the thermocompression bonding apparatus is a graph showing the temperature of the semiconductor device that is bonded within the range surrounded by the following four formulas in the graph where the head temperature is the vertical axis and the stage temperature is the horizontal axis. Manufacturing method.
H + 1.9S = 590 ... Formula 1
H + 0.526S = 310 Formula 2
H + 0.8S = 580 Formula 3
H + 1.25S = 725 Formula 4
(In formulas 1 to 4, H represents the head temperature (° C.) during bonding, and S represents the stage temperature (° C.) during bonding.) - 前記層間充填剤組成物の130℃での粘度が100Pa・s以下である請求項1又は2に記載の半導体デバイスの製造法。 The method for producing a semiconductor device according to claim 1 or 2, wherein the viscosity of the interlayer filler composition at 130 ° C is 100 Pa · s or less.
- 前記層間充填剤組成物は、エポキシ樹脂(A)、硬化剤(B)、フィラー(C)及びフラックス(D)を含有する請求項1乃至3のいずれか1項に記載の半導体デバイスの製造法。 The method for manufacturing a semiconductor device according to claim 1, wherein the interlayer filler composition contains an epoxy resin (A), a curing agent (B), a filler (C), and a flux (D). .
- 前記層間充填剤組成物は、更に、硬化促進剤(E)を含有する請求項4に記載の半導体デバイスの製造法。 The method for producing a semiconductor device according to claim 4, wherein the interlayer filler composition further contains a curing accelerator (E).
- 前記層間充填剤組成物は、更に、分散剤(F)を含有する請求項4又は5に記載の半導体デバイスの製造法。 The method for producing a semiconductor device according to claim 4 or 5, wherein the interlayer filler composition further contains a dispersant (F).
- 硬化剤(B)が、エポキシ樹脂(A)の100重量部あたり、30~150重量部である、請求項4乃至6のいずれか1項に記載の半導体デバイスの製造法。 The method for producing a semiconductor device according to any one of claims 4 to 6, wherein the curing agent (B) is 30 to 150 parts by weight per 100 parts by weight of the epoxy resin (A).
- 硬化剤(B)が、アミン系硬化剤および酸無水物系硬化剤から選ばれる少なくとも1種の硬化剤を含有する、請求項4乃至7のいずれか1項に記載の半導体デバイスの製造法。 The method for producing a semiconductor device according to any one of claims 4 to 7, wherein the curing agent (B) contains at least one curing agent selected from an amine curing agent and an acid anhydride curing agent.
- 硬化剤(B)が、エポキシ樹脂(A)中のエポキシ基に対する硬化剤(B)中の官能基の当量比で、0.8~1.5の範囲である、請求項8に記載の半導体デバイスの製造法。 The semiconductor according to claim 8, wherein the curing agent (B) is in the range of 0.8 to 1.5 in terms of an equivalent ratio of the functional group in the curing agent (B) to the epoxy group in the epoxy resin (A). Device manufacturing method.
- 半田バンプを有する半導体チップと電極パッドを有する半導体基板とを、層間充填剤組成物を介して熱圧着接合装置を用いて接合する工程を有する半導体デバイスの製造法において、該熱圧着装置のヘッドまたはステージのいずれか一方のみの温度が120℃以上の状態で半田バンプと電極パッドを接触させ、半田バンプと電極パッドが接触した後に、ヘッドまたはステージの、半田バンプと電極パッドとの接触時には120℃未満であった側の温度を半田の融点以上とする、半導体デバイスの製造法。 In a method for manufacturing a semiconductor device, comprising a step of bonding a semiconductor chip having solder bumps and a semiconductor substrate having electrode pads using a thermocompression bonding apparatus via an interlayer filler composition, the head of the thermocompression bonding apparatus or The solder bump and the electrode pad are brought into contact with each other in a state where the temperature of only one of the stages is 120 ° C. or higher. After the solder bump and the electrode pad are in contact with each other, the head or stage is in contact with the solder bump and the electrode pad at 120 ° C. A method for manufacturing a semiconductor device, wherein the temperature on the side that was less than or equal to the melting point of the solder is set.
- 前記層間充填剤組成物を、ヘッドまたはステージの、半田バンプと電極パッドとの接触時には120℃未満である側にセットされる半導体チップまたは半導体基板に、予め塗布した後に接合する、請求項10に記載の半導体デバイスの製造法。 The interlayer filler composition is bonded to a semiconductor chip or a semiconductor substrate set on the side of the head or stage at a temperature lower than 120 ° C. when contacting the solder bump and the electrode pad, and then bonded to the semiconductor chip or the semiconductor substrate. The manufacturing method of the semiconductor device of description.
- 前記層間充填剤組成物の100℃での粘度が0.1~10Pa・sである、請求項10又は11に記載の半導体デバイスの製造法。 The method for producing a semiconductor device according to claim 10 or 11, wherein the interlayer filler composition has a viscosity at 100 ° C of 0.1 to 10 Pa · s.
- 前記層間充填剤組成物が、エポキシ樹脂(A)、硬化剤(B)、フィラー(C)、およびフラックス(D)を含有する、請求項11乃至12のいずれか1項に記載の半導体デバイスの製造法。 13. The semiconductor device according to claim 11, wherein the interlayer filler composition contains an epoxy resin (A), a curing agent (B), a filler (C), and a flux (D). Manufacturing method.
- 前記層間充填剤組成物が、硬化促進剤(E)を含有する、請求項13に記載の半導体デバイスの製造法。 The method for producing a semiconductor device according to claim 13, wherein the interlayer filler composition contains a curing accelerator (E).
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