WO2016021314A1 - Inverter - Google Patents

Inverter Download PDF

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Publication number
WO2016021314A1
WO2016021314A1 PCT/JP2015/067764 JP2015067764W WO2016021314A1 WO 2016021314 A1 WO2016021314 A1 WO 2016021314A1 JP 2015067764 W JP2015067764 W JP 2015067764W WO 2016021314 A1 WO2016021314 A1 WO 2016021314A1
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WO
WIPO (PCT)
Prior art keywords
switching
lower arms
phase
drive line
switching speed
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PCT/JP2015/067764
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French (fr)
Japanese (ja)
Inventor
達貴 阿部
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アイシン・エィ・ダブリュ株式会社
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Publication of WO2016021314A1 publication Critical patent/WO2016021314A1/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration

Definitions

  • This disclosure relates to an inverter.
  • a gate control circuit that includes two switching elements connected in series of an upper arm and a lower arm that are connected to a DC power supply and supplies a gate signal to the two switching elements, the switching speed of the two switching elements can be changed.
  • a power converter see, for example, Patent Document 1.
  • the inverter includes a plurality of (for example, three sets in the case of three phases) upper and lower arms, and in each upper and lower arm, a surge voltage is generated due to the switching operation of each switching element.
  • the magnitude of the surge voltage is proportional to the magnitude of the wiring inductance. Since the wiring inductance is different for each upper and lower arm, the surge voltage is also different for each upper and lower arm.
  • the switching speed of the switching element is set so that the surge voltage does not exceed the breakdown voltage. At this time, if all the switching elements of the upper and lower arms are set to the same switching speed, the switching speed of the upper and lower arms should be set low even though there is a margin for the surge voltage. become. Such a configuration is not preferable from the viewpoint of switching loss and heat generation.
  • This disclosure is intended to provide an inverter that can efficiently reduce switching loss and heat generation.
  • a first upper and lower arm connected between the positive electrode side and the negative electrode side of the power source;
  • a second upper and lower arm connected between the positive and negative sides of the power source in parallel to the first upper and lower arm and at a position closer to the power source on the wiring than the first upper and lower arm;
  • an inverter including switching speed adjusting means for making the switching speed of the switching element forming the second upper and lower arms faster than the switching speed of the switching element forming the first upper and lower arms.
  • an inverter capable of efficiently reducing switching loss and heat generation can be obtained.
  • FIG. 1 is a diagram illustrating an example of an electric circuit 1 including an inverter 4.
  • FIG. 3 is a circuit diagram showing an example of a configuration of an inverter 4.
  • FIG. 3 is a diagram schematically illustrating an example of a refrigerant flow path of an inverter 4.
  • FIG. 3 is a diagram schematically illustrating an example of a refrigerant flow path of an inverter 4.
  • FIG. 4 is a table showing characteristics and the like of each phase of the inverter 4.
  • FIG. 1 is a diagram illustrating an example of an electric circuit 1 including an inverter 4.
  • the electric circuit 1 is for driving a motor, for example.
  • the electrical circuit 1 includes a power source 2, an inverter 4, and a smoothing capacitor C1.
  • a motor (not shown) is connected to the inverter 4.
  • the motor may be a traveling motor used in a hybrid vehicle or an electric vehicle.
  • the smoothing capacitor C ⁇ b> 1 is connected between a positive electrode side line connecting the positive electrode side of the power source 2 and the P terminal 13, and a negative electrode side line connecting the negative electrode side of the power source 2 and the N terminal 14.
  • a DC-DC converter may be provided between the smoothing capacitor C1 and the power source 2.
  • FIG. 2 is a circuit diagram showing an example of the configuration of the inverter 4.
  • the inverter 4 includes a first vertical arm 41, a second vertical arm 42, a third vertical arm 43, and drive lines 71 to 76.
  • the first upper and lower arms 41 are connected between the positive electrode side and the negative electrode side of the power source 2, that is, between the P terminal 13 and the N terminal 14.
  • the second upper and lower arm 42 is connected in parallel to the first upper and lower arm 41 between the P terminal 13 and the N terminal 14.
  • the third vertical arm 43 is connected in parallel to the first vertical arm 41 and the second vertical arm 42 between the P terminal 13 and the N terminal 14.
  • the first upper and lower arms 41 form a U phase
  • the second upper and lower arms 42 form a V phase
  • the third upper and lower arms 43 form a W phase.
  • the explanation will be continued based on this assumption.
  • the phase corresponding to the first upper and lower arms 41 and the like is arbitrary.
  • the first upper and lower arms 41 include switching elements Q1 and Q2 and free wheel diodes (FWDs) D1 and D2.
  • Each of the switching elements Q1 and Q2 is an IGBT (Insulated Gate Gate Bipolar Transistor).
  • the switching elements Q1 and Q2 may be other switching elements such as MOSFET (Metal / Oxide / Semiconductor / Field-Effect / Transistor) instead of the IGBT.
  • Switching element Q1 is connected in parallel to freewheel diode D1, and forms an upper arm of the U phase.
  • Switching element Q2 is connected in parallel to freewheeling diode D2, and forms a U-phase lower arm.
  • the second upper and lower arm 42 includes switching elements Q3 and Q4 and free wheel diodes D3 and D4.
  • Switching elements Q3 and Q4 are IGBTs, respectively, but may be other switching elements.
  • Switching element Q3 is connected in parallel to freewheel diode D3 and forms an upper arm of the V phase.
  • Switching element Q4 is connected in parallel to freewheeling diode D4 and forms a lower arm of the V phase.
  • the third upper and lower arm 43 includes switching elements Q5 and Q6 and free wheel diodes D5 and D6.
  • Switching elements Q5 and Q6 are IGBTs, respectively, but may be other switching elements.
  • Switching element Q5 is connected in parallel to freewheel diode D5 and forms an upper arm of the W phase.
  • Switching element Q6 is connected in parallel to freewheel diode D6, and forms a lower arm of the W phase.
  • the second vertical arm 42 is connected between the positive electrode side and the negative electrode side of the power source 2 at a position closer to the power source 2 than the first vertical arm 41.
  • the third vertical arm 43 is connected between the positive electrode side and the negative electrode side of the power source 2 at a position closer to the power source 2 than the second vertical arm 42. Therefore, in the example shown in FIG. 2, the wiring inductance Lu related to the U phase is larger than the wiring inductance Lv related to the V phase, and the wiring inductance Lv related to the V phase is larger than the wiring inductance Lw related to the W phase. That is, Lu> Lv> Lw (see FIG. 4).
  • Switching operations of the switching elements Q1, Q2, Q3, Q4, Q5, and Q6 are controlled by a control device (not shown). That is, the control device applies gate signals (drive signals) to the switching elements Q1, Q2, Q3, Q4, Q5, and Q6 via the drive lines 71 to 76, respectively, and switches the switching elements Q1, Q2, Q3, and Q4. , Q5 and Q6 are controlled.
  • the control method of switching element Q1, Q2, Q3, Q4, Q5, Q6 is arbitrary.
  • the drive lines 71 to 76 include resistors R1 to R6, respectively.
  • the resistors R1 to R6 may represent the effective resistance included in the drive lines 71 to 76 as a whole, or may represent the resistance of the resistance element.
  • the resistors R3 and R4 in the drive lines 73 and 74 are smaller than the resistors R1 and R2 in the drive lines 71 and 72 (an example of the first drive line), and the drive lines 75 and 76 (
  • the resistors R5 and R6 in the third drive line are smaller than the resistors R3 and R4 in the drive lines 73 and 74 (an example of the second drive line).
  • the resistors R1 and R2 may be the same, the resistors R3 and R4 may be the same, and the resistors R5 and R6 may be the same.
  • FIG. 3A and 3B are diagrams schematically showing an example of the refrigerant flow path of the inverter 4, FIG. 3A is a top view of the substrate, and FIG. 3B is a cross-sectional view.
  • the first vertical arm 41, the second vertical arm 42, and the third vertical arm 43 are disposed on the same substrate 80.
  • the substrate 80 may be a metal plate (heat sink) having fins 82 on the lower surface.
  • the switching element Q1 and the free wheel diode D1 of the first upper and lower arms 41, and the switching element Q2 and the free wheel diode D2 are mounted on the corresponding heat spreader 90 as a set.
  • the heat spreader 90 is provided on the substrate 80 via an insulating sheet, for example.
  • the inverter 4 includes a refrigerant flow path 60 as shown in FIG. 3B.
  • the coolant channel 60 is formed on the fin 82 side of the substrate 80.
  • An arbitrary refrigerant (in this example, LLC: Long Life Coolant) flows through the refrigerant flow path 60.
  • the flow direction of the refrigerant is a direction in which the first upper and lower arms 41, the second upper and lower arms 42, and the third upper and lower arms 43 are cooled in this order.
  • the switching elements Q1 and Q2 and the freewheel diodes D1 and D2 of the first upper and lower arm 41 are cooled first, and then the switching elements Q3 and Q4 and the freewheel diodes D3 and D4 of the second upper and lower arm 42 are cooled, Finally, the switching elements Q5 and Q6 and the freewheel diodes D5 and D6 of the third upper and lower arm 43 are cooled.
  • the switching element Q1 and the free wheel diode D1 of the first upper and lower arm 41, and the switching element Q2 and the free wheel diode D2 are arranged at the same position in the X direction. May be arranged in a manner having an offset in the X direction. The same applies to the second upper and lower arms 42 and the third upper and lower arms 43.
  • the arrangement of the switching elements Q1 to Q6 on the substrate 80 is such that the switching elements Q1 and Q2 of the first upper and lower arm 41 are cooled first, then the switching elements Q3 and Q4 of the second upper and lower arm 42 are cooled, and finally It is optional as long as the switching elements Q5 and Q6 of the third upper and lower arm 43 are cooled.
  • the first vertical arm 41, the second vertical arm 42, and the third vertical arm 43 may each be formed as separate modules.
  • FIG. 4 is a table showing the characteristics of each phase of the inverter 4.
  • the relationship between the wiring inductance Lu related to the U phase, the wiring inductance Lv related to the V phase, and the wiring inductance Lw related to the W phase is expressed as Lu. > Lv> Lw.
  • the switching speed means a speed at which switching elements such as the switching elements Q1 to Q6 are switched from the off state to the on state (or from the on state to the off state).
  • the switching speed becomes faster as the resistances R1 to R6 of the drive lines 71 to 76 are smaller.
  • R5, R6 ⁇ R3, R4 ⁇ R1, R2 the relationship between the switching speed Vu related to the U phase, the switching speed Vv related to the V phase, and the switching speed Vw related to the W phase is Vw> Vv> Vu.
  • the surge voltage is proportional to the product of the wiring inductance and the current change rate (dI / dt), and the current change rate increases as the switching speed increases.
  • the wiring inductance Lu is larger than the other phases, but the switching speed Vu is smaller than the other phases.
  • the wiring inductance Lw is smaller than the other phases, but the switching speed Vw is larger than the other phases.
  • both the wiring inductance Lv and the switching speed Vv are intermediate. Therefore, the surge voltage is substantially the same in each phase.
  • the switching speed of each phase is preferably adjusted so that the surge voltage becomes the same by absorbing the difference in wiring inductance of each phase.
  • the switching speed of each phase is set so that the surge voltage has the same margin with respect to the breakdown voltage (common) of the switching elements Q1 to Q6.
  • the amount of heat generated is proportional to the switching loss, and the switching loss increases as the switching speed decreases. Therefore, the relationship among the heat generation amount Qu related to the U phase, the heat generation amount Qv related to the V phase, and the heat generation amount Qw related to the W phase is Qu> Qv> Qw.
  • the LLC water temperature Twu when cooling the U phase and V The relationship between the LLC water temperature Twv when cooling the phase and the LLC water temperature Tww when cooling the W phase is Tww> Twv> Twu.
  • the chip temperature is related to the amount of heat generated and the temperature of the refrigerant.
  • the calorific value Qu is larger than that of the other phases, but the LLC water temperature Twu used for cooling is lower than that of the other phases.
  • the calorific value Qu is smaller than that of the other phases, but the LLC water temperature Tww used for cooling is higher than that of the other phases.
  • the calorific value Qv and the LLC water temperature Twv are both intermediate. Therefore, the chip temperature is substantially the same in each phase. In other words, the flow direction of the refrigerant is determined so as to absorb the difference in the calorific value of each phase so that the chip temperatures are the same (see FIGS. 3A and 3B).
  • the switching speed Vu related to the U phase, the switching speed Vv related to the V phase, and the switching speed Vw related to the W phase is Vw> Vv> Vu
  • the calorific value Qv concerning the V phase and the calorific value Qw concerning the W phase can be reduced. Therefore, the switching loss (heat generation amount) of the inverter 4 as a whole can be efficiently reduced.
  • the switching speed Vu related to the U phase, the switching speed Vv related to the V phase, and the switching speed Vw related to the W phase is Vw> Vv> Vu.
  • the switching loss (heat generation amount) of the inverter 4 as a whole can be efficiently reduced without increasing the withstand voltage performance of the switching elements Q1 to Q6.
  • the freshness having a high cooling capacity is sequentially increased from the upper and lower arms 41 having the highest heat generation amount. Therefore, the temperature of each of the switching elements Q1 to Q6 in the first vertical arm 41, the second vertical arm 42, and the third vertical arm 43 can be made uniform.
  • the inverter 4 for driving a three-phase motor is illustrated, but the present invention can also be applied to an inverter for driving a motor having a single phase or more phases than three phases.
  • the inverter 4 has a configuration in which any one of the first upper and lower arms 41, the second upper and lower arms 42, and the third upper and lower arms 43 is omitted.
  • the relationship between the switching speed Vu related to the U phase, the switching speed Vv related to the V phase, and the switching speed Vw related to the W phase is Vw> Vv> Vu. I can't.
  • the switching speeds related to the respective phases are made different by changing the resistances R1 to R6 of the drive lines 71 to 76, but the switching speeds related to the respective phases are different depending on other methods. It may be allowed.
  • the switching speed related to each phase may be varied by changing the voltage value of the gate signal by utilizing the fact that the switching speed increases as the voltage of the gate signal increases.
  • Switching speed adjusting means (R1 to R4) for making the switching speed of the switching elements Q3 and Q4 forming the second upper and lower arms 42 faster than the switching speed of the switching elements Q1 and Q2 forming the first upper and lower arms 41.
  • the second upper and lower arm 42 is connected to the power supply 2 at a position closer to the power source 2 than the first upper and lower arm 41, so that the wiring inductance related to the second upper and lower arm 42 is It is smaller than the first vertical arm 41. For this reason, even if the switching speed of the switching elements Q3 and Q4 forming the second upper and lower arms 42 is made faster than the switching speed of the switching elements Q1 and Q2 forming the first upper and lower arms 41, the surge power is suppressed to a withstand voltage or less. Is easy.
  • a third upper and lower arm 43 connected in parallel to the second upper and lower arm 42 at a position closer to the power source 2 on the wiring than the second upper and lower arm 42 is further provided between the positive electrode side and the negative electrode side of the power source 2.
  • the switching speed adjusting means (R1 to R6) further makes the switching speed of the switching elements Q5 and Q6 forming the third upper and lower arms 43 higher than the switching speed of the switching elements Q3 and Q4 forming the second upper and lower arms 42.
  • the third upper and lower arm 43 is connected to the power source 2 at a position closer to the power source 2 than the second upper and lower arm 42, so that the wiring inductance related to the third upper and lower arm 43 is It is smaller than the second upper and lower arm 42. For this reason, even if the switching speed of the switching elements Q5 and Q6 forming the third upper and lower arms 43 is higher than the switching speed of the switching elements Q3 and Q4 forming the second upper and lower arms 42, the surge power is suppressed to a withstand voltage or less. Is easy.
  • the switching loss of the switching elements Q5 and Q6 forming the third upper and lower arm 43 is reduced, so that the heat generation amount of the third upper and lower arm 43 can be reduced and the heat generation amount of the inverter 4 as a whole can be further reduced.
  • the switching speed adjusting means (R1 to R6) includes electrical resistances (R1 to R1) provided in the first drive line (71, 72), the second drive line (73, 74), and the third drive line (75, 76), respectively.
  • the electric resistance R5, R6 in is the inverter 4 according to (2), which is smaller than the electric resistance R3, R4 in the second drive line (73, 74).
  • the switching speeds of the switching elements Q1 to Q6 can be easily varied.
  • the refrigerant is cooled in the order of the switching elements Q1 and Q2 forming the first upper and lower arms 41, the switching elements Q3 and Q4 forming the second upper and lower arms 42, and the switching elements Q5 and Q6 forming the third upper and lower arms 43.
  • the inverter 4 as described in (2) or (3) provided with the refrigerant
  • the cooling capacity is increased in descending order of the heat generation amount. Since fresh refrigerant can be supplied, the temperatures of the switching elements Q1 to Q6 in the first vertical arm 41, the second vertical arm 42, and the third vertical arm 43 can be made uniform.

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  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

 An inverter, including: first upper/lower arms connected between the positive electrode side and the negative electrode side of a power supply; second upper/lower arms connected between the positive electrode side and the negative electrode side of the power supply so as to be parallel to the first upper/lower arms and positioned nearer the power supply, on the wiring, than the first upper/lower arms; a switching speed adjustment means for increasing the switching speed of a switching element forming the second upper/lower arms to as to be greater than the switching speed of a switching element forming the first upper/lower arms.

Description

インバータInverter
 本開示は、インバータに関する。 This disclosure relates to an inverter.
 直流電源に接続する上アームと下アームの直列接続された2つのスイッチング素子を備え、ゲート信号を2つのスイッチング素子へ供給するゲート制御回路において、2つのスイッチング素子のスイッチング速度が変更可能に構成される電力変換装置が知られている(例えば、特許文献1参照)。 In a gate control circuit that includes two switching elements connected in series of an upper arm and a lower arm that are connected to a DC power supply and supplies a gate signal to the two switching elements, the switching speed of the two switching elements can be changed. There is known a power converter (see, for example, Patent Document 1).
特開2014-011817号公報JP 2014-011817 A
 ところで、インバータは、複数(例えば3相の場合は3組)の上下アームを含み、各上下アームにおいては、各スイッチング素子のスイッチング動作に起因してサージ電圧が発生する。この際、サージ電圧の大きさは、配線インダクタンスの大きさに比例する。配線インダクタンスは、上下アーム毎に異なるので、サージ電圧も上下アーム毎に異なる。各上下アームにおいて、スイッチング素子のスイッチング速度は、サージ電圧が耐圧を超えないように設定される。この際、各上下アームの各スイッチング素子が全て同一のスイッチング速度に設定される場合には、ある上下アームにおいては、サージ電圧に対して余裕があるにも拘らずスイッチング速度が低く設定されることになる。かかる構成は、スイッチング損失及び発熱の観点からは好ましくない。 Incidentally, the inverter includes a plurality of (for example, three sets in the case of three phases) upper and lower arms, and in each upper and lower arm, a surge voltage is generated due to the switching operation of each switching element. At this time, the magnitude of the surge voltage is proportional to the magnitude of the wiring inductance. Since the wiring inductance is different for each upper and lower arm, the surge voltage is also different for each upper and lower arm. In each upper and lower arm, the switching speed of the switching element is set so that the surge voltage does not exceed the breakdown voltage. At this time, if all the switching elements of the upper and lower arms are set to the same switching speed, the switching speed of the upper and lower arms should be set low even though there is a margin for the surge voltage. become. Such a configuration is not preferable from the viewpoint of switching loss and heat generation.
 本開示は、スイッチング損失及び発熱量を効率的に低減できるインバータの提供を目的とする。 This disclosure is intended to provide an inverter that can efficiently reduce switching loss and heat generation.
 本開示の一局面によれば、電源の正極側と負極側との間に接続される第1上下アームと、
 前記電源の正極側と負極側との間に、前記第1上下アームに対して並列に且つ前記第1上下アームよりも前記電源に配線上で近い位置で接続される第2上下アームと、
 前記第2上下アームを形成するスイッチング素子のスイッチング速度を、前記第1上下アームを形成するスイッチング素子のスイッチング速度よりも速くするスイッチング速度調整手段とを含む、インバータが提供される。
According to one aspect of the present disclosure, a first upper and lower arm connected between the positive electrode side and the negative electrode side of the power source;
A second upper and lower arm connected between the positive and negative sides of the power source in parallel to the first upper and lower arm and at a position closer to the power source on the wiring than the first upper and lower arm;
There is provided an inverter including switching speed adjusting means for making the switching speed of the switching element forming the second upper and lower arms faster than the switching speed of the switching element forming the first upper and lower arms.
 本開示によれば、スイッチング損失及び発熱量を効率的に低減できるインバータが得られる。 According to the present disclosure, an inverter capable of efficiently reducing switching loss and heat generation can be obtained.
インバータ4を含む電気回路1の一例を示す図である。1 is a diagram illustrating an example of an electric circuit 1 including an inverter 4. FIG. インバータ4の構成の一例を示す回路図である。3 is a circuit diagram showing an example of a configuration of an inverter 4. FIG. インバータ4の冷媒流路の一例を模式的に示す図である。3 is a diagram schematically illustrating an example of a refrigerant flow path of an inverter 4. FIG. インバータ4の冷媒流路の一例を模式的に示す図である。3 is a diagram schematically illustrating an example of a refrigerant flow path of an inverter 4. FIG. インバータ4の各相の特性等を示す表図である。4 is a table showing characteristics and the like of each phase of the inverter 4. FIG.
 以下、添付図面を参照しながら各実施例について詳細に説明する。 Hereinafter, each example will be described in detail with reference to the accompanying drawings.
 図1は、インバータ4を含む電気回路1の一例を示す図である。電気回路1は、例えばモータ駆動用である。 FIG. 1 is a diagram illustrating an example of an electric circuit 1 including an inverter 4. The electric circuit 1 is for driving a motor, for example.
 電気回路1は、電源2と、インバータ4と、平滑コンデンサC1とを含む。インバータ4には、モータ(図示せず)が接続される。モータは、ハイブリッド車又は電気自動車で使用される走行用モータであってよい。 The electrical circuit 1 includes a power source 2, an inverter 4, and a smoothing capacitor C1. A motor (not shown) is connected to the inverter 4. The motor may be a traveling motor used in a hybrid vehicle or an electric vehicle.
 平滑コンデンサC1は、電源2の正極側とP端子13を繋げる正極側ラインと、電源2の負極側とN端子14を繋げる負極側ラインとの間に接続される。尚、平滑コンデンサC1と電源2との間には、DC-DCコンバータが設けられてもよい。 The smoothing capacitor C <b> 1 is connected between a positive electrode side line connecting the positive electrode side of the power source 2 and the P terminal 13, and a negative electrode side line connecting the negative electrode side of the power source 2 and the N terminal 14. A DC-DC converter may be provided between the smoothing capacitor C1 and the power source 2.
 図2は、インバータ4の構成の一例を示す回路図である。 FIG. 2 is a circuit diagram showing an example of the configuration of the inverter 4.
 インバータ4は、第1上下アーム41と、第2上下アーム42と、第3上下アーム43と、各駆動ライン71乃至76とを含む。第1上下アーム41は、電源2の正極側と負極側との間、即ち、P端子13とN端子14との間に接続される。第2上下アーム42は、P端子13とN端子14との間に、第1上下アーム41に対して並列に接続される。第3上下アーム43は、P端子13とN端子14との間に、第1上下アーム41及び第2上下アーム42に対して並列に接続される。 The inverter 4 includes a first vertical arm 41, a second vertical arm 42, a third vertical arm 43, and drive lines 71 to 76. The first upper and lower arms 41 are connected between the positive electrode side and the negative electrode side of the power source 2, that is, between the P terminal 13 and the N terminal 14. The second upper and lower arm 42 is connected in parallel to the first upper and lower arm 41 between the P terminal 13 and the N terminal 14. The third vertical arm 43 is connected in parallel to the first vertical arm 41 and the second vertical arm 42 between the P terminal 13 and the N terminal 14.
 尚、図2に示す例では、第1上下アーム41は、U相を形成し、第2上下アーム42は、V相を形成し、第3上下アーム43は、W相を形成し、以下、これを前提として説明を続ける。但し、第1上下アーム41等に対応する相は任意である。 In the example shown in FIG. 2, the first upper and lower arms 41 form a U phase, the second upper and lower arms 42 form a V phase, and the third upper and lower arms 43 form a W phase. The explanation will be continued based on this assumption. However, the phase corresponding to the first upper and lower arms 41 and the like is arbitrary.
 第1上下アーム41は、スイッチング素子Q1、Q2と、フリーホイールダイオード(FWD:Free Wheeling Diode)D1,D2とを含む。スイッチング素子Q1、Q2は、それぞれ、IGBT(Insulated Gate Bipolar Transistor)である。但し、スイッチング素子Q1、Q2は、IGBTに代えて、MOSFET(Metal Oxide Semiconductor Field-Effect Transistor)のような他のスイッチング素子であってもよい。スイッチング素子Q1は、フリーホイールダイオードD1に並列に接続され、U相の上アームを形成する。スイッチング素子Q2は、フリーホイールダイオードD2に並列に接続され、U相の下アームを形成する。 The first upper and lower arms 41 include switching elements Q1 and Q2 and free wheel diodes (FWDs) D1 and D2. Each of the switching elements Q1 and Q2 is an IGBT (Insulated Gate Gate Bipolar Transistor). However, the switching elements Q1 and Q2 may be other switching elements such as MOSFET (Metal / Oxide / Semiconductor / Field-Effect / Transistor) instead of the IGBT. Switching element Q1 is connected in parallel to freewheel diode D1, and forms an upper arm of the U phase. Switching element Q2 is connected in parallel to freewheeling diode D2, and forms a U-phase lower arm.
 第2上下アーム42は、スイッチング素子Q3、Q4と、フリーホイールダイオードD3,D4とを含む。スイッチング素子Q3、Q4は、それぞれ、IGBTであるが、他のスイッチング素子であってもよい。スイッチング素子Q3は、フリーホイールダイオードD3に並列に接続され、V相の上アームを形成する。スイッチング素子Q4は、フリーホイールダイオードD4に並列に接続され、V相の下アームを形成する。 The second upper and lower arm 42 includes switching elements Q3 and Q4 and free wheel diodes D3 and D4. Switching elements Q3 and Q4 are IGBTs, respectively, but may be other switching elements. Switching element Q3 is connected in parallel to freewheel diode D3 and forms an upper arm of the V phase. Switching element Q4 is connected in parallel to freewheeling diode D4 and forms a lower arm of the V phase.
 第3上下アーム43は、スイッチング素子Q5、Q6と、フリーホイールダイオードD5,D6とを含む。スイッチング素子Q5、Q6は、それぞれ、IGBTであるが、他のスイッチング素子であってもよい。スイッチング素子Q5は、フリーホイールダイオードD5に並列に接続され、W相の上アームを形成する。スイッチング素子Q6は、フリーホイールダイオードD6に並列に接続され、W相の下アームを形成する。 The third upper and lower arm 43 includes switching elements Q5 and Q6 and free wheel diodes D5 and D6. Switching elements Q5 and Q6 are IGBTs, respectively, but may be other switching elements. Switching element Q5 is connected in parallel to freewheel diode D5 and forms an upper arm of the W phase. Switching element Q6 is connected in parallel to freewheel diode D6, and forms a lower arm of the W phase.
 図2に示す例では、第2上下アーム42は、第1上下アーム41よりも電源2に近い位置で、電源2の正極側と負極側との間に接続される。また、第3上下アーム43は、第2上下アーム42よりも電源2に近い位置で、電源2の正極側と負極側との間に接続される。従って、図2に示す例では、U相に係る配線インダクタンスLuは、V相に係る配線インダクタンスLvよりも大きく、V相に係る配線インダクタンスLvは、W相に係る配線インダクタンスLwよりも大きい。即ち、Lu>Lv>Lwである(図4参照)。 In the example shown in FIG. 2, the second vertical arm 42 is connected between the positive electrode side and the negative electrode side of the power source 2 at a position closer to the power source 2 than the first vertical arm 41. The third vertical arm 43 is connected between the positive electrode side and the negative electrode side of the power source 2 at a position closer to the power source 2 than the second vertical arm 42. Therefore, in the example shown in FIG. 2, the wiring inductance Lu related to the U phase is larger than the wiring inductance Lv related to the V phase, and the wiring inductance Lv related to the V phase is larger than the wiring inductance Lw related to the W phase. That is, Lu> Lv> Lw (see FIG. 4).
 スイッチング素子Q1、Q2、Q3、Q4、Q5、Q6の各スイッチング動作は、図示しない制御装置により制御される。即ち、制御装置は、スイッチング素子Q1、Q2、Q3、Q4、Q5、Q6に、それぞれ駆動ライン71乃至76を介してゲート信号(駆動信号)を印加して、スイッチング素子Q1、Q2、Q3、Q4、Q5、Q6の各スイッチング動作を制御する。尚、スイッチング素子Q1、Q2、Q3、Q4、Q5、Q6の制御方法は任意である。 Switching operations of the switching elements Q1, Q2, Q3, Q4, Q5, and Q6 are controlled by a control device (not shown). That is, the control device applies gate signals (drive signals) to the switching elements Q1, Q2, Q3, Q4, Q5, and Q6 via the drive lines 71 to 76, respectively, and switches the switching elements Q1, Q2, Q3, and Q4. , Q5 and Q6 are controlled. In addition, the control method of switching element Q1, Q2, Q3, Q4, Q5, Q6 is arbitrary.
 駆動ライン71乃至76は、それぞれ、抵抗R1乃至R6を含む。抵抗R1乃至R6は、駆動ライン71乃至76に含まれる実効的な抵抗を全体として表してもよいし、抵抗素子の抵抗を表してもよい。駆動ライン73及び74(第2駆動ラインの一例)における各抵抗R3、R4は、駆動ライン71及び72(第1駆動ラインの一例)における各抵抗R1、R2よりも小さく、駆動ライン75及び76(第3駆動ラインの一例)における各抵抗R5、R6は、駆動ライン73及び74(第2駆動ラインの一例)における各抵抗R3、R4よりも小さい。R5,R6<R3,R4<R1,R2である。尚、抵抗R1、R2は、同一であってよく、抵抗R3、R4は、同一であってよく、抵抗R5、R6は、同一であってよい。 The drive lines 71 to 76 include resistors R1 to R6, respectively. The resistors R1 to R6 may represent the effective resistance included in the drive lines 71 to 76 as a whole, or may represent the resistance of the resistance element. The resistors R3 and R4 in the drive lines 73 and 74 (an example of the second drive line) are smaller than the resistors R1 and R2 in the drive lines 71 and 72 (an example of the first drive line), and the drive lines 75 and 76 ( The resistors R5 and R6 in the third drive line (an example) are smaller than the resistors R3 and R4 in the drive lines 73 and 74 (an example of the second drive line). R5, R6 <R3, R4 <R1, R2. The resistors R1 and R2 may be the same, the resistors R3 and R4 may be the same, and the resistors R5 and R6 may be the same.
 図3A及び図3Bは、インバータ4の冷媒流路の一例を模式的に示す図であり、図3Aは、基板の上面視であり、図3Bは、断面視である。 3A and 3B are diagrams schematically showing an example of the refrigerant flow path of the inverter 4, FIG. 3A is a top view of the substrate, and FIG. 3B is a cross-sectional view.
 図3A及び図3Bに示す例では、第1上下アーム41、第2上下アーム42及び第3上下アーム43は、同一の基板80上に配置される。基板80は、フィン82を下面に備える金属板(ヒートシンク)であってよい。第1上下アーム41のスイッチング素子Q1及びフリーホイールダイオードD1、及び、スイッチング素子Q2及びフリーホイールダイオードD2は、それぞれ組となって、対応するヒートスプレッダ90上に実装される。第2上下アーム42及び第3上下アーム43についても同様である。ヒートスプレッダ90は、例えば絶縁シートを介して基板80上に設けられる。 3A and 3B, the first vertical arm 41, the second vertical arm 42, and the third vertical arm 43 are disposed on the same substrate 80. The substrate 80 may be a metal plate (heat sink) having fins 82 on the lower surface. The switching element Q1 and the free wheel diode D1 of the first upper and lower arms 41, and the switching element Q2 and the free wheel diode D2 are mounted on the corresponding heat spreader 90 as a set. The same applies to the second upper and lower arms 42 and the third upper and lower arms 43. The heat spreader 90 is provided on the substrate 80 via an insulating sheet, for example.
 インバータ4は、図3Bに示すように、冷媒流路60を備える。冷媒流路60は、基板80のフィン82側に形成される。冷媒流路60には、任意の冷媒(本例ではLLC:Long Life Coolant)が流れる。冷媒の流れ方向は、図3Bにて矢印Rで示すように、第1上下アーム41、第2上下アーム42、及び、第3上下アーム43の順に冷やされる方向である。これにより、第1上下アーム41のスイッチング素子Q1、Q2及びフリーホイールダイオードD1、D2が最初に冷やされ、次いで第2上下アーム42のスイッチング素子Q3、Q4及びフリーホイールダイオードD3、D4が冷やされ、最後に第3上下アーム43のスイッチング素子Q5、Q6及びフリーホイールダイオードD5、D6が冷やされる。 The inverter 4 includes a refrigerant flow path 60 as shown in FIG. 3B. The coolant channel 60 is formed on the fin 82 side of the substrate 80. An arbitrary refrigerant (in this example, LLC: Long Life Coolant) flows through the refrigerant flow path 60. As shown by the arrow R in FIG. 3B, the flow direction of the refrigerant is a direction in which the first upper and lower arms 41, the second upper and lower arms 42, and the third upper and lower arms 43 are cooled in this order. Thereby, the switching elements Q1 and Q2 and the freewheel diodes D1 and D2 of the first upper and lower arm 41 are cooled first, and then the switching elements Q3 and Q4 and the freewheel diodes D3 and D4 of the second upper and lower arm 42 are cooled, Finally, the switching elements Q5 and Q6 and the freewheel diodes D5 and D6 of the third upper and lower arm 43 are cooled.
 尚、図3A及び図3Bに示す例では、第1上下アーム41のスイッチング素子Q1及びフリーホイールダイオードD1、及び、スイッチング素子Q2及びフリーホイールダイオードD2は、X方向で同一の位置に配置されているが、X方向でオフセットを有する態様で配置されてもよい。第2上下アーム42及び第3上下アーム43についても同様である。基板80上における各スイッチング素子Q1乃至Q6の配置方法は、第1上下アーム41のスイッチング素子Q1、Q2が最初に冷やされ、次いで第2上下アーム42のスイッチング素子Q3、Q4が冷やされ、最後に第3上下アーム43のスイッチング素子Q5、Q6が冷やされる態様であれば任意である。また、第1上下アーム41、第2上下アーム42、及び、第3上下アーム43は、それぞれ、別々のモジュールとして形成されていてもよい。 In the example shown in FIGS. 3A and 3B, the switching element Q1 and the free wheel diode D1 of the first upper and lower arm 41, and the switching element Q2 and the free wheel diode D2 are arranged at the same position in the X direction. May be arranged in a manner having an offset in the X direction. The same applies to the second upper and lower arms 42 and the third upper and lower arms 43. The arrangement of the switching elements Q1 to Q6 on the substrate 80 is such that the switching elements Q1 and Q2 of the first upper and lower arm 41 are cooled first, then the switching elements Q3 and Q4 of the second upper and lower arm 42 are cooled, and finally It is optional as long as the switching elements Q5 and Q6 of the third upper and lower arm 43 are cooled. The first vertical arm 41, the second vertical arm 42, and the third vertical arm 43 may each be formed as separate modules.
 図4は、インバータ4の各相の特性等を示す表図である。 FIG. 4 is a table showing the characteristics of each phase of the inverter 4.
 配線インダクタンスは、上述のように、配線の長さが長いほど大きいので、U相に係る配線インダクタンスLuと、V相に係る配線インダクタンスLvと、W相に係る配線インダクタンスLwとの関係は、Lu>Lv>Lwである。 Since the wiring inductance is larger as the wiring length is longer as described above, the relationship between the wiring inductance Lu related to the U phase, the wiring inductance Lv related to the V phase, and the wiring inductance Lw related to the W phase is expressed as Lu. > Lv> Lw.
 スイッチング速度とは、スイッチング素子Q1乃至Q6のようなスイッチング素子がオフ状態からオン状態(又はオン状態からオフ状態)へと切り替わる際の速度を意味する。スイッチング速度は、駆動ライン71乃至76の抵抗R1乃至R6が小さいほど速くなる。上述のように、R5,R6<R3,R4<R1,R2であるので、U相に係るスイッチング速度Vuと、V相に係るスイッチング速度Vvと、W相に係るスイッチング速度Vwとの関係は、Vw>Vv>Vuである。 The switching speed means a speed at which switching elements such as the switching elements Q1 to Q6 are switched from the off state to the on state (or from the on state to the off state). The switching speed becomes faster as the resistances R1 to R6 of the drive lines 71 to 76 are smaller. As described above, since R5, R6 <R3, R4 <R1, R2, the relationship between the switching speed Vu related to the U phase, the switching speed Vv related to the V phase, and the switching speed Vw related to the W phase is Vw> Vv> Vu.
 サージ電圧は、配線インダクタンスと電流変化率(dI/dt)の積に比例し、電流変化率は、スイッチング速度が速くなるほど大きくなる。U相は、配線インダクタンスLuが他の相よりも大きいが、スイッチング速度Vuが他の相よりも小さい。逆に、W相は、配線インダクタンスLwが他の相よりも小さいが、スイッチング速度Vwが他の相よりも大きい。V相は、配線インダクタンスLv及びスイッチング速度Vvは共に中間である。従って、サージ電圧は、各相において略同一となる。換言すると、各相のスイッチング速度は、好ましくは、各相の配線インダクタンスの相違を吸収してサージ電圧が同一となるように調整される。例えば、各相のスイッチング速度は、サージ電圧がスイッチング素子Q1乃至Q6の耐圧(共通)に対して同一のマージンを有するように設定される。 The surge voltage is proportional to the product of the wiring inductance and the current change rate (dI / dt), and the current change rate increases as the switching speed increases. In the U phase, the wiring inductance Lu is larger than the other phases, but the switching speed Vu is smaller than the other phases. Conversely, in the W phase, the wiring inductance Lw is smaller than the other phases, but the switching speed Vw is larger than the other phases. In the V phase, both the wiring inductance Lv and the switching speed Vv are intermediate. Therefore, the surge voltage is substantially the same in each phase. In other words, the switching speed of each phase is preferably adjusted so that the surge voltage becomes the same by absorbing the difference in wiring inductance of each phase. For example, the switching speed of each phase is set so that the surge voltage has the same margin with respect to the breakdown voltage (common) of the switching elements Q1 to Q6.
 発熱量は、スイッチング損失に比例し、スイッチング損失は、スイッチング速度が小さいほど大きくなる。従って、U相に係る発熱量Quと、V相に係る発熱量Qvと、W相に係る発熱量Qwとの関係は、Qu>Qv>Qwである。 ¡The amount of heat generated is proportional to the switching loss, and the switching loss increases as the switching speed decreases. Therefore, the relationship among the heat generation amount Qu related to the U phase, the heat generation amount Qv related to the V phase, and the heat generation amount Qw related to the W phase is Qu> Qv> Qw.
 冷媒の温度(LLC水温)は、冷媒流路60の上流側の方が低いので(第1上下アーム41等から熱を奪いながら流れるため)、U相を冷却する際のLLC水温Twuと、V相を冷却する際のLLC水温Twvと、W相を冷却する際のLLC水温Twwとの関係は、Tww>Twv>Twuである。 Since the temperature of the refrigerant (LLC water temperature) is lower on the upstream side of the refrigerant flow path 60 (because it flows while taking heat away from the first upper and lower arms 41 and the like), the LLC water temperature Twu when cooling the U phase and V The relationship between the LLC water temperature Twv when cooling the phase and the LLC water temperature Tww when cooling the W phase is Tww> Twv> Twu.
 チップ温度は、発熱量と冷媒の温度との関係する。U相は、発熱量Quが他の相よりも大きいが、冷却に供されるLLC水温Twuが他の相よりも低い。逆に、W相は、発熱量Quが他の相よりも小さいが、冷却に供されるLLC水温Twwが他の相よりも高い。V相は、発熱量Qv及びLLC水温Twvは共に中間である。従って、チップ温度は、各相において略同一となる。換言すると、冷媒の流れ方向は、各相の発熱量の相違を吸収してチップ温度が同一となるように決定される(図3A及び図3B参照)。 The chip temperature is related to the amount of heat generated and the temperature of the refrigerant. In the U phase, the calorific value Qu is larger than that of the other phases, but the LLC water temperature Twu used for cooling is lower than that of the other phases. Conversely, in the W phase, the calorific value Qu is smaller than that of the other phases, but the LLC water temperature Tww used for cooling is higher than that of the other phases. In the V phase, the calorific value Qv and the LLC water temperature Twv are both intermediate. Therefore, the chip temperature is substantially the same in each phase. In other words, the flow direction of the refrigerant is determined so as to absorb the difference in the calorific value of each phase so that the chip temperatures are the same (see FIGS. 3A and 3B).
 このように本実施例によれば、U相に係るスイッチング速度Vuと、V相に係るスイッチング速度Vvと、W相に係るスイッチング速度Vwとの関係が、Vw>Vv>Vuであるので、Vu=Vv=Vuとする構成に比べて、V相に係るスイッチング速度Vv及びW相に係るスイッチング速度Vwが速くなる。これにより、V相に係る発熱量Qv及びW相に係る発熱量Qwを低減できる。よって、インバータ4全体としてのスイッチング損失(発熱量)を効率的に低減できる。 Thus, according to the present embodiment, since the relationship between the switching speed Vu related to the U phase, the switching speed Vv related to the V phase, and the switching speed Vw related to the W phase is Vw> Vv> Vu, Vu The switching speed Vv related to the V phase and the switching speed Vw related to the W phase are increased as compared with the configuration in which = Vv = Vu. Thereby, the calorific value Qv concerning the V phase and the calorific value Qw concerning the W phase can be reduced. Therefore, the switching loss (heat generation amount) of the inverter 4 as a whole can be efficiently reduced.
 また、本実施例によれば、U相に係るスイッチング速度Vuと、V相に係るスイッチング速度Vvと、W相に係るスイッチング速度Vwとの関係が、Vw>Vv>Vuであるので、U相に係るスイッチング速度Vu、V相に係るスイッチング速度Vv、及び、W相に係るスイッチング速度Vwを、サージ電圧が各スイッチング素子Q1~Q6の耐圧(共通)に対して同一のマージンを有するように設定することができる。これにより、スイッチング素子Q1乃至Q6の耐圧性能を上げることなくインバータ4全体としてのスイッチング損失(発熱量)を効率的に低減できる。 Further, according to the present embodiment, since the relationship between the switching speed Vu related to the U phase, the switching speed Vv related to the V phase, and the switching speed Vw related to the W phase is Vw> Vv> Vu, Are set so that the surge voltage has the same margin with respect to the breakdown voltage (common) of the switching elements Q1 to Q6. can do. Thereby, the switching loss (heat generation amount) of the inverter 4 as a whole can be efficiently reduced without increasing the withstand voltage performance of the switching elements Q1 to Q6.
 また、本実施例によれば、第1上下アーム41、第2上下アーム42及び第3上下アーム43における発熱量の相違に応じて、発熱量の高い上下アーム41から順に、冷却能力の高い新鮮な冷媒を供給できるので、第1上下アーム41、第2上下アーム42及び第3上下アーム43における各スイッチング素子Q1~Q6の温度の均一化を図ることができる。 In addition, according to the present embodiment, in accordance with the difference in heat generation amount between the first upper and lower arms 41, the second upper and lower arms 42, and the third upper and lower arms 43, the freshness having a high cooling capacity is sequentially increased from the upper and lower arms 41 having the highest heat generation amount. Therefore, the temperature of each of the switching elements Q1 to Q6 in the first vertical arm 41, the second vertical arm 42, and the third vertical arm 43 can be made uniform.
 以上、各実施例について詳述したが、特定の実施例に限定されるものではなく、特許請求の範囲に記載された範囲内において、種々の変形及び変更が可能である。また、前述した実施例の構成要素を全部又は複数を組み合わせることも可能である。 As mentioned above, although each Example was explained in full detail, it is not limited to a specific Example, A various deformation | transformation and change are possible within the range described in the claim. It is also possible to combine all or a plurality of the components of the above-described embodiments.
 例えば、上述した実施例では、3相モータを駆動するためのインバータ4を例示しているが、単相や3相よりも多い相のモータを駆動するためのインバータにも適用可能である。例えば、単相の場合は、インバータ4において、第1上下アーム41、第2上下アーム42及び第3上下アーム43のうちの、任意の1つの上下アームを省略した構成となる。 For example, in the above-described embodiment, the inverter 4 for driving a three-phase motor is illustrated, but the present invention can also be applied to an inverter for driving a motor having a single phase or more phases than three phases. For example, in the case of a single phase, the inverter 4 has a configuration in which any one of the first upper and lower arms 41, the second upper and lower arms 42, and the third upper and lower arms 43 is omitted.
 また、上述した実施例では、U相に係るスイッチング速度Vuと、V相に係るスイッチング速度Vvと、W相に係るスイッチング速度Vwとの関係が、Vw>Vv>Vuであるが、これに限られない。例えば、U相に係るスイッチング速度Vuと、V相に係るスイッチング速度Vvと、W相に係るスイッチング速度Vwとの関係が、Vw=Vv>VuやVw>Vv=Vuである場合でも、上述の効果を少なくとも部分的に得ることができる。 In the above-described embodiment, the relationship between the switching speed Vu related to the U phase, the switching speed Vv related to the V phase, and the switching speed Vw related to the W phase is Vw> Vv> Vu. I can't. For example, even when the relationship between the switching speed Vu related to the U phase, the switching speed Vv related to the V phase, and the switching speed Vw related to the W phase is Vw = Vv> Vu or Vw> Vv = Vu, The effect can be obtained at least partially.
 また、上述した実施例では、駆動ライン71乃至76の抵抗R1乃至R6を異ならせることで、各相に係るスイッチング速度を異ならせているが、各相に係るスイッチング速度は、他の方法で異ならせてもよい。例えば、ゲート信号の電圧が高いほどスイッチング速度が速くなることを利用して、各相に係るスイッチング速度は、ゲート信号の電圧値を異ならせることで、異ならせてもよい。 Further, in the above-described embodiment, the switching speeds related to the respective phases are made different by changing the resistances R1 to R6 of the drive lines 71 to 76, but the switching speeds related to the respective phases are different depending on other methods. It may be allowed. For example, the switching speed related to each phase may be varied by changing the voltage value of the gate signal by utilizing the fact that the switching speed increases as the voltage of the gate signal increases.
 なお、以上の実施例に関し、さらに以下を開示する。
(1)
 電源2の正極側と負極側との間に接続される第1上下アーム41と、
 電源2の正極側と負極側との間に、第1上下アーム41に対して並列に且つ第1上下アーム41よりも電源2に配線上で近い位置で接続される第2上下アーム42と、
 第2上下アーム42を形成するスイッチング素子Q3,Q4のスイッチング速度を、第1上下アーム41を形成するスイッチング素子Q1,Q2のスイッチング速度よりも速くするスイッチング速度調整手段(R1乃至R4)とを含む、インバータ4。
In addition, the following is further disclosed regarding the above Example.
(1)
A first upper and lower arm 41 connected between the positive electrode side and the negative electrode side of the power source 2;
A second upper and lower arm 42 connected between the positive electrode side and the negative electrode side of the power source 2 in parallel to the first upper and lower arm 41 and closer to the power source 2 on the wiring than the first upper and lower arm 41;
Switching speed adjusting means (R1 to R4) for making the switching speed of the switching elements Q3 and Q4 forming the second upper and lower arms 42 faster than the switching speed of the switching elements Q1 and Q2 forming the first upper and lower arms 41. Inverter 4.
 (1)に記載の構成によれば、第2上下アーム42は、第1上下アーム41よりも電源2に配線上で近い位置で接続されるので、第2上下アーム42に係る配線インダクタンスは、第1上下アーム41よりも小さい。このため、第2上下アーム42を形成するスイッチング素子Q3,Q4のスイッチング速度を、第1上下アーム41を形成するスイッチング素子Q1,Q2のスイッチング速度より速くしても、サージ電力を耐圧以下に抑えることが容易である。この結果、第2上下アーム42を形成するスイッチング素子Q3,Q4のスイッチング損失が低減するので、第2上下アーム42の発熱量を低減でき、インバータ4全体としての発熱量を低減できる。
(2)
 電源2の正極側と負極側との間に、第2上下アーム42に対して並列に且つ第2上下アーム42よりも電源2に配線上で近い位置で接続される第3上下アーム43を更に含み、
 スイッチング速度調整手段(R1乃至R6)は、更に、第3上下アーム43を形成するスイッチング素子Q5,Q6のスイッチング速度を、第2上下アーム42を形成するスイッチング素子Q3,Q4のスイッチング速度よりも速くする、(1)に記載のインバータ4。
According to the configuration described in (1), the second upper and lower arm 42 is connected to the power supply 2 at a position closer to the power source 2 than the first upper and lower arm 41, so that the wiring inductance related to the second upper and lower arm 42 is It is smaller than the first vertical arm 41. For this reason, even if the switching speed of the switching elements Q3 and Q4 forming the second upper and lower arms 42 is made faster than the switching speed of the switching elements Q1 and Q2 forming the first upper and lower arms 41, the surge power is suppressed to a withstand voltage or less. Is easy. As a result, the switching loss of the switching elements Q3 and Q4 forming the second upper and lower arms 42 is reduced, so that the heat generation amount of the second upper and lower arms 42 can be reduced and the heat generation amount of the inverter 4 as a whole can be reduced.
(2)
A third upper and lower arm 43 connected in parallel to the second upper and lower arm 42 at a position closer to the power source 2 on the wiring than the second upper and lower arm 42 is further provided between the positive electrode side and the negative electrode side of the power source 2. Including
The switching speed adjusting means (R1 to R6) further makes the switching speed of the switching elements Q5 and Q6 forming the third upper and lower arms 43 higher than the switching speed of the switching elements Q3 and Q4 forming the second upper and lower arms 42. The inverter 4 according to (1).
 (2)に記載の構成によれば、第3上下アーム43は、第2上下アーム42よりも電源2に配線上で近い位置で接続されるので、第3上下アーム43に係る配線インダクタンスは、第2上下アーム42よりも小さい。このため、第3上下アーム43を形成するスイッチング素子Q5,Q6のスイッチング速度を、第2上下アーム42を形成するスイッチング素子Q3,Q4のスイッチング速度より速くしても、サージ電力を耐圧以下に抑えることが容易である。この結果、第3上下アーム43を形成するスイッチング素子Q5,Q6のスイッチング損失が低減するので、第3上下アーム43の発熱量を低減でき、インバータ4全体としての発熱量を更に低減できる。
(3)
 第1上下アーム41を形成するスイッチング素子Q1,Q2に駆動信号を印加する第1駆動ライン(71,72)と、
 第2上下アーム42を形成するスイッチング素子Q3,Q4に駆動信号を印加する第2駆動ライン(73,74)と、
 第3上下アーム43を形成するスイッチング素子Q5,Q6に駆動信号を印加する第3駆動ライン(75,76)とを含み、
 スイッチング速度調整手段(R1乃至R6)は、第1駆動ライン(71,72)、第2駆動ライン(73,74)及び第3駆動ライン(75,76)のそれぞれに設けられる電気抵抗(R1乃至R6)を含み、第2駆動ライン(73,74)における電気抵抗R3、R4は、第1駆動ライン(71,72)における電気抵抗R1、R2よりも小さく、第3駆動ライン(75,76)における電気抵抗R5、R6は、第2駆動ライン(73,74)における電気抵抗R3、R4よりも小さい、(2)に記載のインバータ4。
According to the configuration described in (2), the third upper and lower arm 43 is connected to the power source 2 at a position closer to the power source 2 than the second upper and lower arm 42, so that the wiring inductance related to the third upper and lower arm 43 is It is smaller than the second upper and lower arm 42. For this reason, even if the switching speed of the switching elements Q5 and Q6 forming the third upper and lower arms 43 is higher than the switching speed of the switching elements Q3 and Q4 forming the second upper and lower arms 42, the surge power is suppressed to a withstand voltage or less. Is easy. As a result, the switching loss of the switching elements Q5 and Q6 forming the third upper and lower arm 43 is reduced, so that the heat generation amount of the third upper and lower arm 43 can be reduced and the heat generation amount of the inverter 4 as a whole can be further reduced.
(3)
A first drive line (71, 72) for applying a drive signal to the switching elements Q1, Q2 forming the first upper and lower arms 41;
A second drive line (73, 74) for applying a drive signal to the switching elements Q3, Q4 forming the second upper and lower arms 42;
A third drive line (75, 76) for applying a drive signal to the switching elements Q5, Q6 forming the third upper and lower arms 43,
The switching speed adjusting means (R1 to R6) includes electrical resistances (R1 to R1) provided in the first drive line (71, 72), the second drive line (73, 74), and the third drive line (75, 76), respectively. R6), and the electric resistances R3 and R4 in the second drive line (73, 74) are smaller than the electric resistances R1, R2 in the first drive line (71, 72), and the third drive line (75, 76). The electric resistance R5, R6 in is the inverter 4 according to (2), which is smaller than the electric resistance R3, R4 in the second drive line (73, 74).
 (3)に記載の構成によれば、各スイッチング素子Q1~Q6のスイッチング速度を容易に異ならせることができる。
(4)
 第1上下アーム41を形成するスイッチング素子Q1,Q2、第2上下アーム42を形成するスイッチング素子Q3,Q4、及び、第3上下アーム43を形成するスイッチング素子Q5,Q6の順に冷やされる方向で冷媒が流れる冷媒流路60を備える、(2)又は(3)に記載のインバータ4。
According to the configuration described in (3), the switching speeds of the switching elements Q1 to Q6 can be easily varied.
(4)
The refrigerant is cooled in the order of the switching elements Q1 and Q2 forming the first upper and lower arms 41, the switching elements Q3 and Q4 forming the second upper and lower arms 42, and the switching elements Q5 and Q6 forming the third upper and lower arms 43. The inverter 4 as described in (2) or (3) provided with the refrigerant | coolant flow path 60 through which flows.
 (4)に記載の構成によれば、第1上下アーム41、第2上下アーム42及び第3上下アーム43における発熱量の相違に応じて、発熱量の高い上下アームから順に、冷却能力の高い新鮮な冷媒を供給できるので、第1上下アーム41、第2上下アーム42及び第3上下アーム43における各スイッチング素子Q1~Q6の温度の均一化を図ることができる。 According to the configuration described in (4), according to the difference in the heat generation amount in the first vertical arm 41, the second vertical arm 42, and the third vertical arm 43, the cooling capacity is increased in descending order of the heat generation amount. Since fresh refrigerant can be supplied, the temperatures of the switching elements Q1 to Q6 in the first vertical arm 41, the second vertical arm 42, and the third vertical arm 43 can be made uniform.
 なお、本国際出願は、2014年8月6日に出願した日本国特許出願2014-160607号に基づく優先権を主張するものであり、その全内容は本国際出願にここでの参照により援用されるものとする。 Note that this international application claims priority based on Japanese Patent Application No. 2014-160607 filed on August 6, 2014, the entire contents of which are incorporated herein by reference. Shall be.
 1  電気回路
 2  電源
 4  インバータ
 41  第1上下アーム
 42  第2上下アーム
 43  第3上下アーム
 60  冷媒流路
 71乃至76  駆動ライン
 Q1、Q2、Q3、Q4、Q5、Q6  スイッチング素子
DESCRIPTION OF SYMBOLS 1 Electric circuit 2 Power supply 4 Inverter 41 1st upper / lower arm 42 2nd upper / lower arm 43 3rd upper / lower arm 60 Refrigerant flow path 71 thru | or 76 Drive line Q1, Q2, Q3, Q4, Q5, Q6 Switching element

Claims (4)

  1.  電源の正極側と負極側との間に接続される第1上下アームと、
     前記電源の正極側と負極側との間に、前記第1上下アームに対して並列に且つ前記第1上下アームよりも前記電源に配線上で近い位置で接続される第2上下アームと、
     前記第2上下アームを形成するスイッチング素子のスイッチング速度を、前記第1上下アームを形成するスイッチング素子のスイッチング速度よりも速くするスイッチング速度調整手段とを含む、インバータ。
    A first upper and lower arm connected between the positive side and the negative side of the power source;
    A second upper and lower arm connected between the positive and negative sides of the power source in parallel to the first upper and lower arm and at a position closer to the power source on the wiring than the first upper and lower arm;
    An inverter comprising: switching speed adjusting means for making a switching speed of a switching element forming the second upper and lower arms higher than a switching speed of a switching element forming the first upper and lower arms.
  2.  前記電源の正極側と負極側との間に、前記第2上下アームに対して並列に且つ前記第2上下アームよりも前記電源に配線上で近い位置で接続される第3上下アームを更に含み、
     前記スイッチング速度調整手段は、更に、前記第3上下アームを形成するスイッチング素子のスイッチング速度を、前記第2上下アームを形成するスイッチング素子よりも速くする、請求項1に記載のインバータ。
    A third upper and lower arm connected in parallel to the second upper and lower arm and at a position closer to the power source on the wiring than the second upper and lower arm is further included between the positive electrode side and the negative electrode side of the power source. ,
    2. The inverter according to claim 1, wherein the switching speed adjusting unit further makes a switching speed of a switching element forming the third upper and lower arms faster than a switching element forming the second upper and lower arms.
  3.  前記第1上下アームを形成するスイッチング素子に駆動信号を印加する第1駆動ラインと、
     前記第2上下アームを形成するスイッチング素子に駆動信号を印加する第2駆動ラインと、
     前記第3上下アームを形成するスイッチング素子に駆動信号を印加する第3駆動ラインとを含み、
     前記スイッチング速度調整手段は、前記第1駆動ライン、前記第2駆動ライン及び前記第3駆動ラインのそれぞれに設けられる電気抵抗を含み、前記第2駆動ラインにおける電気抵抗は、前記第1駆動ラインにおける電気抵抗よりも小さく、前記第3駆動ラインにおける電気抵抗は、前記第2駆動ラインにおける電気抵抗よりも小さい、請求項2に記載のインバータ。
    A first drive line for applying a drive signal to the switching elements forming the first upper and lower arms;
    A second drive line for applying a drive signal to the switching elements forming the second upper and lower arms;
    A third drive line for applying a drive signal to the switching elements forming the third upper and lower arms,
    The switching speed adjusting means includes an electrical resistance provided in each of the first drive line, the second drive line, and the third drive line, and the electrical resistance in the second drive line is equal to that in the first drive line. The inverter according to claim 2, wherein an electrical resistance is smaller than an electrical resistance, and an electrical resistance in the third drive line is smaller than an electrical resistance in the second drive line.
  4.  前記第1上下アームを形成するスイッチング素子、前記第2上下アームを形成するスイッチング素子、及び、前記第3上下アームを形成するスイッチング素子の順に冷やされる方向で冷媒が流れる冷媒流路を備える、請求項2又は3に記載のインバータ。 A switching element that forms the first upper and lower arms, a switching element that forms the second upper and lower arms, and a refrigerant flow path through which the refrigerant flows in a cooling direction in the order of the switching elements that form the third upper and lower arms. Item 4. The inverter according to Item 2 or 3.
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