WO2015190637A1 - 대면적의 수직 정렬된 갈륨비소 반도체 나노선 어레이 제작 공정 - Google Patents
대면적의 수직 정렬된 갈륨비소 반도체 나노선 어레이 제작 공정 Download PDFInfo
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- WO2015190637A1 WO2015190637A1 PCT/KR2014/005645 KR2014005645W WO2015190637A1 WO 2015190637 A1 WO2015190637 A1 WO 2015190637A1 KR 2014005645 W KR2014005645 W KR 2014005645W WO 2015190637 A1 WO2015190637 A1 WO 2015190637A1
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- Prior art keywords
- gallium arsenide
- nanowire array
- semiconductor nanowire
- compound semiconductor
- present
- Prior art date
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- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 title claims abstract description 150
- 229910001218 Gallium arsenide Inorganic materials 0.000 title claims abstract description 149
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Classifications
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- B82B3/00—Manufacture or treatment of nanostructures by manipulation of individual atoms or molecules, or limited collections of atoms or molecules as discrete units
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H—ELECTRICITY
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82B—NANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS, MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES AS DISCRETE UNITS; MANUFACTURE OR TREATMENT THEREOF
- B82B3/00—Manufacture or treatment of nanostructures by manipulation of individual atoms or molecules, or limited collections of atoms or molecules as discrete units
- B82B3/0009—Forming specific nanostructures
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Definitions
- the present invention relates to a method for economically manufacturing a metal mesh thin film.
- the present invention also relates to a method for manufacturing a vertically aligned gallium arsenide semiconductor nanowire array using the above method.
- the present invention provides an anode comprising a metal thin film having aligned nanosized holes.
- the present invention relates to a method for fabricating a vertically aligned gallium arsenide semiconductor nanowire array.
- gallium arsenide an I I I-V semiconductor
- it can handle high frequency band up to 250GHz, and it is less influenced by temperature change, so it has the advantage of less noise when operating compared to silicon.
- gallium arsenide nanowires can be classified into a top-down approach and a bottom-up approach.
- Bottom-up approaches include molecular beam epitaxy (MBE), organometallics It can be grown using a chemical vapor deposition (Metal Organic Chemical Vapor Deposition), MOCVD.
- MBE molecular beam epitaxy
- MOCVD Metal Organic Chemical Vapor Deposition
- the top-down approach can be divided into dry etching and wet etching.
- Reactive ion etching (RIE) which is represented by dry etching, requires expensive equipment and can only damage materials during the process.
- RIE reactive ion etching
- the surface is uneven and may contain a large amount of impurities. Therefore, it is not preferable because it can greatly affect the physical and chemical properties and can be a variable in the device design.
- wet etching represented by metal-assisted chemical etching
- metal-assisted chemical etching is currently being actively researched in the manufacture of silicon nanowires, and the patterned thin film is used as an oxidizing agent. It is a method of obtaining nanowires with controlled length and diameter in a short time by inducing a spontaneous reaction by being immersed in an etchant containing. This method is expanding the scope of research in the production of ⁇ - ⁇ semiconductor nanowires containing gallium arsenide.
- the objective of the present invention is to overcome the technical limitations of the gallium arsenide semiconductor nanowire array manufacturing process by chemically wet etching a gallium arsenide semiconductor substrate using a metal as a catalyst. To provide a gallium arsenide semiconductor nanowire array having a length
- another object of the present invention is to suppress the side etching to produce a large aspect ratio nanowire having a uniform diameter to overcome the length limitation due to the side etching effect commonly found in II IV semiconductor substrates. To provide a way.
- the present invention also provides a method for producing a vertically aligned gallium arsenide nanowire array irrespective of the doping concentration and the type of doping of the gallium arsenide substrate.
- the present invention provides a method for manufacturing a vertically aligned gallium arsenide nanowire array having the same orientation as the substrate irrespective of the substrate having different crystallographic orientations.
- gallium arsenide nanowire arrays having one or more crystallographic orientations may be manufactured by controlling the etching direction of gallium arsenide or a route manufactured on a gallium arsenide substrate having one crystallographic orientation.
- the present invention provides a method of manufacturing a gallium arsenide nanowire array as well as a gallium arsenide nanowire array in a periodically crossed zigzag form.
- the step (a) comprises the steps of (al) forming a monolayer array of organic particles on the gallium arsenide substrate; (a2) depositing a metal thin film on the organic particle monolayer array; And 3) removing the organic particle monoulator array to prepare a metal mesh. It may be made to include more.
- the step (al) may further comprise the step of first pre-treating the gallium arsenide substrate.
- step (a2) heat or plasma treatment in an oxygen atmosphere (air or oxygen or ozone atmosphere) to shrink the organic particles of the organic particle array and the array and The gap between arrays can be widened to control the distance of nanowire formation.
- an oxygen atmosphere air or oxygen or ozone atmosphere
- One aspect of the present invention provides a method for preparing a metal nanomesh, comprising the steps of: (a) preparing a patterned metal nanomesh on a surface of an I I IV-V compound semiconductor substrate; And (b) applying an external bias to the metal mesh to wet etch the gallium arsenide substrate in the etchant; It provides a I I I-V compound semiconductor nanowire array manufacturing method comprising a.
- aspects of the present invention include the steps of (a) forming (a) forming a monolayer array of organic particles on a gallium arsenide substrate; (a2) depositing a metal thin film on the organic particle monolayer array; And (a3) the organic particle monoulator array Preparing a metal mesh by removing the metal mesh; Further comprising is to provide a method for producing a III ⁇ V group compound semiconductor nanowire array.
- the aspect of the present invention further provides a step of widening the gap between the arrays by applying heat after the step (a2) or by plasma treatment in an air, oxygen or ozone atmosphere to shrink the particles of the organic particle array. It provides a method for producing a III-V compound semiconductor nanowire array comprising.
- the conductive mesh hole has a circular, elliptical, square, rectangular, fibrous, and polygonal shape of at least one of the group III-V compound semiconductor nanowire array. It is.
- An aspect of the present invention also provides a method for producing a III-V group compound semiconductor nanowire array by applying a voltage or a current to the conductive mesh as an anode.
- the conductive mesh comprises a metal that does not corrode in the etchant, such as silver (Ag), gold (Au), palladium (Pd) or platinum (Pt). It is to provide a method for manufacturing a semiconductor nanowire array.
- the conductive mesh of the present invention may be an alloy having two or more elements, or may be a method of manufacturing a group III-V compound semiconductor nanowire array using two or more metals deposited in multiple layers.
- the conductive mesh may be manufactured through various patterning methods in addition to a manufacturing method using organic particles.
- the present invention is characterized in that the length of the nanowire is controlled by the size of the bias applied or controlled by the time the wet etching is performed.
- the etching solution of the present invention may be to provide a method for producing a group III-V compound semiconductor nanowire array comprising hydrofluoric acid (HF), hydrochloric acid (HC1) or nitric acid (HN0 3 ).
- the present invention may be a method for manufacturing a ⁇ - ⁇ compound semiconductor nanowire array manufactured in the wet etching step such that the nanowires have a vertical or zigzag shape from the substrate.
- the present invention may be a method of manufacturing a group III-V compound semiconductor nanowire array to induce a nanowire to have a porous surface by biasing the substrate in the wet etching step.
- the present invention may be a method of manufacturing a III-V compound semiconductor nanowire array in which the short length of the nanowires in the wet etching step is adjusted according to the pore size of the porous conductive mesh.
- the II-IV compound semiconductor may be gallium arsenide.
- the formation of the organic particle monolayer array in the (al) step is based on the entire formation of the gallium arsenide substrate, but only a part of the organic particle array may be formed if necessary, and the organic particle array may be formed.
- Two or three layers may be used to produce the gallium arsenide nanowire in a non-vertical form.
- Such a plurality of layers may also be formed in whole or in part only as necessary and may be formed so as to be common to each other.
- pretreatment of the gallium arsenide substrate is preferable for uniformity of nanowires formed by removing contaminants.
- Pretreatment is preferably done by washing with alternating organic solvents and deionized water.
- the organic solvent is not limited as long as it does not damage the gallium arsenide substrate, and examples thereof include, but are not limited to, acetone, ketone, ethane, methanol, ethyl ether, ethyl acetate or tetrahydrofuran.
- Pretreatment can take a variety of means, such as vortexing or just flowing.
- the organic particles are dispersed in the form of a monoator on the surface of a solvent or water, and then transferred to the gallium arsenide substrate.
- Transfer methods can be adopted in various ways.
- a gallium arsenide substrate may be introduced into a liquid medium in which organic particles are dispersed, and then the substrate may be gradually removed from the liquid medium to form a monolayer array on the surface of the substrate.
- the liquid medium may adopt various media depending on the nature of the organic particles.
- water or organic solvents used in the pretreatment may be adopted, but is not limited thereto.
- the organic particles may be controlled in various sizes from 1 nm to 5000 m, preferably from 10 nm to 100! M, more preferably from 10 nm to 10, but are not limited thereto.
- the type of the organic particles for example, polystyrene, polymethyl methacrylate, polyolefin, polyvinylacetate, polybutadiene, crosslinked acrylic particles, epoxy particles or other rubber particles may be adopted. It is not. Polystyrene particles are low in specific gravity, floating in water and There are many, so it is good to adopt this, but it is not limited to this.
- the organic particles may have various shapes such as circular, elliptical, square, rectangular, fibrous or plate-shaped, and the shape of the nanowires manufactured in the present invention may also be variously shaped. It can have This is because the shape of the holes of the metal mesh is determined according to the shape of the organic particles, and the shape of the nanowires is determined according to the shape of the metal mesh.
- step 2) heat is applied or plasma treatment is performed in an oxygen atmosphere (air, oxygen, or ozone atmosphere) to shrink the organic particles of the organic particle array to close the gap between the array and the array.
- an oxygen atmosphere air, oxygen, or ozone atmosphere
- the phenomenon that the organic particles shrink by having such a step is because the expanded volume inside the particles is densely shrunk or crosslinked by a full-lasma treatment or heat treatment. In the case of heat treatment, the organic particles should not be melted. Therefore, heat treatment at a temperature above the glass transition temperature and below the melting temperature is preferable.
- the deposition step of the metal thin film of the present invention may adopt various existing metal thin film forming methods adopted by this technique or the adjacent technique, and is not limited thereto. .
- the deposition of metal is thermal evaporat ion. ), Plasma sputtering or e-baem evaporat ion.
- Step (a3) of the present invention is a process of removing organic particles after deposition of metal.
- the organic particles attached on the gallium arsenide substrate are generated in the mesh position.
- the removal of the organic particles may be removed by dissolving with a solvent or removing the organic particles, or physically detaching the same through ultrasonic treatment, but is not limited to any one method.
- the porous metal mesh may be manufactured by removing the polystyrene nanoparticles aligned on the surface of the gallium arsenide substrate by putting in styrene or chloroform and sonicating.
- the cross section of the hole of the porous metal mesh may have a shape of at least one of a circle, an ellipse, a square, a rectangle, and a regular polygon.
- the material of the porous mesh used in the present invention gold (Au), silver (Ag), palladium (Pd) or platinum (Pt) has excellent characteristics, but is not limited to this, in addition to the specific etching solution It may include a metal that does not corrode in, but is not limited thereto.
- step (b) according to one aspect of the present invention will be described.
- the step (b) may be characterized in that the nanowires are formed by wet etching the gallium arsenide substrate using the porous metal mesh prepared through the step (a).
- the step (b) is applied to the gallium arsenide substrate by directly applying an external bias to the porous metal mesh to form a hole (h +) in the wetted gallium arsenide substrate in the etching solution Nanowires are formed in a top-down manner.
- the portion of the non-contact mesh type is lowered by the etching of the gallium arsenide substrate and is not etched as it is in the non-etched mesh position. Form is created.
- the power applied from the outside may include a DC current, a voltage, and a pulse type thereof.
- the etching solution used in the step (b) may include any solution capable of etching gallium arsenide, such as hydrofluoric acid (HF), hydrochloric acid (HC1) or nitric acid (HN0 3 ). Therefore, the present invention is not limited thereto.
- the gallium arsenide etching solution used in the present invention may include an etching solution diluted in deionized water and may be a mixture of deionized water and anhydrous ethanol (C 2 3 ⁇ 40H), but is not limited thereto.
- the bias applied to the metal thin film may be applied within a current of 0.5 to 50 mA (current density: 2.5 to 250 mA / cm 2 ) or a voltage of 0.2 to 10V.
- the present invention may also be targeted to the doped gallium arsenide substrate.
- the present invention which manufactures gallium arsenide nanowires by inducing electrochemical etching of a gallium arsenide substrate with a direct current or voltage applied from the outside, has electrical characteristics above a certain doping concentration, regardless of its doping concentration and type.
- the advantage is that nanowires can be fabricated and do not require additional doping because they directly etch wafers with the necessary doping concentrations without the need for a separate doping process to produce gallium arsenide substrates with desired electrical properties. Has an advantage.
- the gallium arsenide nanowire array having one or more crystallographic orientations can be prepared by controlling the etching direction of the gallium arsenide nanowires prepared on the gallium arsenide substrate having one crystallographic orientation, and the crystallographic orientations periodically cross each other.
- one or more crystallographic properties are controlled by controlling the etching direction of the nanowires manufactured on the gallium arsenide substrate having a given crystallographic orientation.
- the gallium arsenide nanowire array having an orientation can be prepared, and a zigzag-shaped gallium arsenide nanowire array in which crystallographic orientations are periodically crossed can be manufactured.
- a porous gallium arsenide nanowire array may also be manufactured by directly applying a direct current or voltage to a gallium arsenide substrate rather than a metal mesh.
- the gallium arsenide nanowire array can be vertically aligned regardless of the doping concentration and the doping type of the gallium arsenide substrate, it is necessary to implement the device without additional doping process.
- Nanowires can be manufactured directly using a substrate having a doping concentration and type.
- vertically aligned gallium arsenide nanowire arrays having the same orientation as the substrates may be manufactured regardless of substrates having different crystallographic orientations.
- vertically aligned gallium arsenide nanowire arrays having the same orientation as the substrate can be produced regardless of substrates having different crystallographic orientations.
- gallium arsenide nanowire arrays having one or more crystallographic orientations may be manufactured by controlling the etching direction of gallium arsenide or a route manufactured on a gallium arsenide substrate having one crystallographic orientation. It is possible to fabricate zigzag-shaped gallium arsenide nanowire arrays that are periodically crossed, as well as porous gallium arsenide nanowires. Arrays can be made.
- FIG. 1 is a flowchart illustrating a method of manufacturing a gallium arsenide semiconductor nanowire array according to an aspect of the present invention.
- FIG. 2 is a cross-sectional view illustrating a polystyrene nanoparticle monolayer array formed on a surface of deionized water according to an aspect of the present invention.
- FIG. 3 is a cross-sectional view showing a polystyrene nanoparticle monolayer array transfer method on a gallium arsenide substrate surface according to an aspect of the present invention
- Figure 4 is a cross-sectional view showing a method for reducing the size of the polystyrene nanoparticles according to an aspect of the present invention
- FIG. 5 is a cross-sectional view showing a metal thin film deposited on a polystyrene nanoparticle monolayer array formed on a gallium arsenide substrate according to an aspect of the present invention
- FIG. 6 is a cross-sectional view showing a polystyrene removal process according to an aspect of the present invention
- FIG. 7 is a scanning micrograph showing a porous metal mesh formed on a gallium arsenide substrate according to an aspect of the present invention.
- FIG. 8 is a schematic view showing a method of manufacturing a gallium arsenide nanowire array according to an aspect of the present invention
- FIG. 9 is a scanning electron micrograph showing a gallium arsenide nanowire array prepared by wet etching an N-type (100) gallium arsenide substrate in accordance with an aspect of the present invention
- FIG. 10 is a scanning electron micrograph showing a gallium arsenide nanowire array prepared by wet etching an N-type (111) gallium arsenic substrate according to an aspect of the present invention
- FIG. 11 is a scanning electron micrograph showing a gallium arsenide nanowire array fabricated by wet etching a P-type (100) gallium arsenide substrate according to an aspect of the present invention.
- FIG. 12 is a scanning electron micrograph showing a zigzag-type gallium arsenide nanowire array prepared by wet etching an n′-type (100) gallium arsenide substrate according to an aspect of the present invention.
- FIG. 13 is a scanning electron micrograph showing a porous gallium arsenide nanowire array prepared by wet etching an n′-type (100) gallium arsenide substrate according to an aspect of the present invention.
- first and second may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another.
- a monolayer array of polystyrene particles having a heavi-dense structure (when the closest layer is formed) is formed on the surface of deionized water, and then the polystyrene monolayer array is transferred onto a gallium arsenide substrate, followed by a polarization treatment such as oxygen.
- a polarization treatment such as oxygen.
- Gallium arsenide nanowires are generated in a top-down fashion.
- a porous metal mesh should be prepared.
- polystyrene nanoparticles 20 are dispersed in mono-ion in deionized water 30 as shown in FIG. 2. Subsequently, the gallium arsenide substrate 10 is impregnated and pulled as shown in FIG. 3 to form the polystyrene nanoparticle monolayer array 20 on the surface of the substrate 10. That is, the polystyrene nanoparticle monolayer array 10 formed on the surface of the deionized water 30 of FIG. 2 is arranged in a dense structure on the surface of the deionized water as shown in FIG. 3. Is killed.
- various means may be adopted. For example, various methods such as spin coating and knife coating may be used.
- the polystyrene nanoparticle monolayer array transferred to the gallium arsenide substrate surface should be reduced in diameter through polyoxygen plasma treatment.
- the polystyrene monolayer array 20 deposits a metal on the aligned substrate.
- metal deposition methods include thermal evaporat ion, plasma sputter, or e-beam evaporat i on.
- the substrate is supported by toluene or chloroform to remove the polystyrene nanoparticle monolayer array 20 to prepare a porous metal mesh 40.
- 7 is a scanning electron micrograph of a porous metal mesh 40 prepared according to an embodiment of the present invention.
- the holes in the metal mesh 50 can be scaled from nanometers (nra) to micrometers ( ⁇ ⁇ ), depending on the size of the polystyrene or the oxygen plasma treatment time, and the cross sections of the holes can be round, oval, square or rectangular. Various shapes such as regular polygons are possible.
- porous metal mesh 40 fabricated on the surface of the gallium arsenide substrate 10 is anode.
- a gallium arsenide semiconductor nanowire 60 is formed by wet biasing the gallium arsenide substrate in an etchant using an anode.
- ⁇ 95> 8 is a schematic diagram of a method of manufacturing a gallium arsenide semiconductor nanowire 60 using a porous metal mesh 40 according to an embodiment of the present invention.
- the porous metal mesh 40 is wet etched, the porous metal mesh 40 is biased to the anode to attract electrons from the gallium arsenide substrate 10 to thereby remove the gallium arsenide substrate 10 under the porous metal mesh 40.
- Oxidation is performed to form an oxide film layer under the metal, and the oxide film layer is etched by the etching solution used for the wet etching.
- the formation of the oxide film layer and the cycle of the etching are continuously performed, and only the region of the gallium arsenide substrate 10 in contact with the porous metal mesh 40 is selectively removed by etching.
- the porous metal mesh 40 serving as the anode remains on the surface of the gallium arsenide substrate 10 so that the lower gallium arsenide substrate is continuously etched, and the unetched mesh portion is topped with nanowires. It is formed in a beautiful way.
- the diameter of the through hole 50 of the porous metal mesh 40 is transferred to the short axis diameter of the gallium arsenide nanowire 60, and the diameter of the through hole 50 formed in the metal mesh 40 is reduced.
- the number of nanowires 60 formed on the gallium arsenide substrate 10 is controlled by the number, and the arrangement of the through holes 50 of the metal mesh 40 is formed on the gallium arsenide substrate 10. Is transferred to an array of bovine nanowires 60.
- the length of the gallium arsenide nanowire 60 is controlled by the depth to be etched of the gallium arsenide substrate 10 and the etching depth of the gallium arsenide substrate 10 is the time when the wet etching is performed, the size of the external bias applied Can be easily adjusted by adjusting.
- the etchant used for the wet etching may be hydrofluoric acid (HF), sulfuric acid (H 2 S0 4 ), hydrochloric acid (HC1), nitric acid (HN0 3 ), or the like.
- the etchant may include an etchant diluted in deionized water and may be a mixture of deionized water and anhydrous ethanol (C 2 H 5 0H).
- FIG. 9 shows scanning electron micrographs of vertically aligned gallium arsenide nanowires (60) arrays formed by wet n-type (100) gallium arsenide substrate (10) by the above method. It can be confirmed that it is formed uniformly.
- FIG. 10 is a scanning electron micrograph of a vertically aligned gallium arsenide nanowire (60) array formed by wet etching an n-type (111) gallium arsenide substrate (10) in this manner.
- FIG. 11 is a scanning electron micrograph of a vertically aligned gallium arsenide nanowire (60) array formed by wet etching a p-type (100) gallium arsenide substrate (10) in this manner.
- a bias is applied to the porous metal mesh 40 using the wet etching method to form a vertically aligned array of gallium arsenide nanowires 60, and then a bias is applied to the substrate.
- a bias is applied to the substrate.
- FIG. 13 is a scanning micrograph of a vertically aligned array of gallium arsenide nanowires 60 having a porous surface prepared by the above method.
- Example 1 The vertical nanowire forming method of FIG. 9.
- iNexus gallium arsenide N type (100), N type (111) and P type (100) substrates are washed and dried in the order of acetone, ethanol and deionized water to remove contaminants on the surface and oxygen plasma (Oxygen: 100 sccm, plasma power: 300 W, time: 20 minutes) is used to improve the wettability on the surface.
- Oxygen 100 sccm, plasma power: 300 W, time: 20 minutes
- Polystyrene nanoparticles (average particle size 250 nm) of Micropart i Cles were mixed with propanol (C 3 H 7 0H), and then injected onto the surface of deionized water in a beaker using a syringe pump to form polystyrene nanoparticles with hexagonal dense structure.
- the monolayer array is uniformly formed on the surface of deionized water, soaked using a pretreated gallium arsenide substrate, and slowly pulled to transfer the polystyrene nanoparticles to the surface of the gallium arsenide substrate.
- Polystyrene nanoparticle monolayer (monolayer) arrays arranged in a hexagonal dense structure transferred to a gallium arsenide substrate were subjected to oxygen plasma treatment (oxygen: 100 sccm, plasma power 300 W, time: 20 minutes). Was reduced and deposited a parallax (Pd) used as an electrode in the fabrication of the nanowire array.
- Deposition of the metal can be via plasma deposition. After deposition of the metal, toluene was loaded and sonicated to prepare a porous metal mesh by completely removing polystyrene nanoparticles aligned on the surface of the gallium arsenide substrate.
- the gallium arsenide substrate located on the surface of the metal mesh obtained by the above method is supported by hydrofluoric acid (HF) and vertically applied by applying voltage or current to the metal mesh through an external conductor (0.5 to 50.0 mA or 0.2 to 10.0 V).
- HF hydrofluoric acid
- An ordered large area gallium arsenide nanowire array was formed.
- Example 2 The vertical nanowire forming method of FIG. 10.
- Example 3 A vertical nanowire forming method of FIG.
- Example 4 The method of forming the vertical nanowire of FIG. 12.
- n-type (100) substrate as in Example 1 was used except that the shape of the current was changed to the fill current.
- Example 2 The same procedure as in Example 1 was performed except that the vertically aligned nanowires were formed and the current or voltage was changed to a GaAs substrate instead of a metal mesh. All. As described above in detail specific parts of the present invention, it will be apparent to those skilled in the art that these specific descriptions are merely preferred embodiments, and thus the scope of the present invention is not limited thereto. will be. Accordingly, the scope of the present invention will be defined by the appended claims and their equivalents.
Abstract
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US15/317,922 US10147789B2 (en) | 2014-06-11 | 2014-06-25 | Process for fabricating vertically-aligned gallium arsenide semiconductor nanowire array of large area |
JP2016572503A JP6391716B2 (ja) | 2014-06-11 | 2014-06-25 | 大面積の垂直整列されたガリウムヒ素半導体ナノワイヤーアレイの作製工程 |
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JP2004500250A (ja) * | 2000-03-01 | 2004-01-08 | ヒューレット・パッカード・カンパニー | 広範囲なワイヤを形成するためのナノスケール・パターン形成 |
KR20100002486A (ko) * | 2008-06-30 | 2010-01-07 | 서울옵토디바이스주식회사 | 패턴된 기판 및 질화물 반도체층 제조방법 |
KR20110024892A (ko) * | 2009-09-03 | 2011-03-09 | 한국표준과학연구원 | 반도체 나노선 어레이과 그 제조방법 |
JP2012246216A (ja) * | 2011-05-25 | 2012-12-13 | Agency For Science Technology & Research | 基板上にナノ構造を形成させる方法及びその使用 |
KR20130017684A (ko) * | 2011-08-11 | 2013-02-20 | 한국과학기술연구원 | Colloidal lithorgraphy를 이용한 GaAs 나노선 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20160181121A1 (en) * | 2013-07-25 | 2016-06-23 | The Board Of Trustees Of The Leland Stanford Junior University | Electro-assisted transfer and fabrication of wire arrays |
US10037896B2 (en) * | 2013-07-25 | 2018-07-31 | The Board Of Trustees Of The Leland Stanford Junior University | Electro-assisted transfer and fabrication of wire arrays |
CN106128957A (zh) * | 2016-07-29 | 2016-11-16 | 东莞华南设计创新院 | 一种GaAs纳米线的制作方法 |
Also Published As
Publication number | Publication date |
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US10147789B2 (en) | 2018-12-04 |
KR101588577B1 (ko) | 2016-01-28 |
KR20150142266A (ko) | 2015-12-22 |
CN106794985A (zh) | 2017-05-31 |
JP6391716B2 (ja) | 2018-09-19 |
US20170125519A1 (en) | 2017-05-04 |
JP2017517897A (ja) | 2017-06-29 |
CN106794985B (zh) | 2019-03-12 |
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