WO2015127744A1 - 覆晶式 led 芯片 - Google Patents

覆晶式 led 芯片 Download PDF

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Publication number
WO2015127744A1
WO2015127744A1 PCT/CN2014/082509 CN2014082509W WO2015127744A1 WO 2015127744 A1 WO2015127744 A1 WO 2015127744A1 CN 2014082509 W CN2014082509 W CN 2014082509W WO 2015127744 A1 WO2015127744 A1 WO 2015127744A1
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WIPO (PCT)
Prior art keywords
electrode
layer
conductive
led chip
hole
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PCT/CN2014/082509
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English (en)
French (fr)
Inventor
庞晓东
王瑞庆
刘镇
陈浩明
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深圳市兆明芯科技控股有限公司
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Publication of WO2015127744A1 publication Critical patent/WO2015127744A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/387Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer

Definitions

  • the present invention relates to the field of light emitting devices, and in particular, to a flip chip type LED chip.
  • flip-chip LEDs Light Emitting Diode, light-emitting diodes
  • Flip chip The chip-based package of LEDs (hereinafter referred to as flip-chip LEDs) has a simple solid crystal form and a higher degree of reliability, which makes the mass production feasibility greatly improved, and has a shorter process time and high yield for high-temperature baking.
  • the advantages of good thermal conductivity and high light output have become the technology that the industry is striving to carry out.
  • the illuminance of the LED is completed by the current of the positive electrode reaching the negative electrode, and the current reaches the negative electrode from the positive electrode with the minimum resistance.
  • the general resistance value is determined by the distance of the current path. The closer the positive electrode to the negative electrode is, the smaller the resistance value is, and the positive electrode to the negative electrode is. Farther, the resistance will be larger.
  • the electrodes in the existing LEDs are usually in the form of metal wires, which causes a current of a single point to enter the negative electrode from the positive electrode, and the closest distance from the positive electrode to the negative electrode is the brightest, and the other positions will be far from the metal wire and the resistance. Larger, relatively darker, so there is a problem of uneven illumination.
  • the technical problem to be solved by the present invention is to provide a flip chip type LED chip.
  • a technical solution adopted by the present invention is to provide a flip chip type LED chip including a substrate, and a first conductive type semiconductor layer, a light emitting layer, and a first layer are sequentially stacked from the front side of the substrate.
  • a second conductive semiconductor layer, a conductive layer and a reflective layer further comprising at least one first electrode hole and at least one second electrode hole, the first electrode hole penetrating from the reflective layer to the light emitting layer and exposing the first conductive type a semiconductor layer, the second electrode hole penetrating the reflective layer and exposing the conductive layer, the hole wall of the first electrode hole is coated with an insulating layer;
  • the first electrode hole is provided with a first electrode, and one end of the first electrode The front surface of the reflective layer is electrically contacted with the first conductive semiconductor layer;
  • the second electrode is provided with a second electrode, and one end of the second electrode is located on the front side of the reflective layer, and the other end is electrically connected to the conductive layer.
  • Contacting; the first electrode holes are evenly distributed on the LED chip, and the second electrode holes are evenly distributed around the first electrode holes.
  • the first electrode hole and the second electrode hole are provided with at least two, and the first electrodes are connected to each other to form a first electrode region, and the second electrodes are connected to each other to form a second electrode region.
  • the first electrode may be divided into multiple groups, each group including at least one first electrode; when the number of electrodes in the same group is more than one, the first electrodes in the same group are connected to each other, and different groups are The first electrodes are connected to the first electrode in the other group by at least one first electrode in the group.
  • the first electrode region and the second electrode region are covered with an isolation layer made of an insulating material, the isolation layer is provided with at least two through holes, and the through holes are provided with a conductive metal electrode, The conductive metal electrodes are individually connected to the first electrode region and the second electrode region, respectively.
  • the insulating layer and the reflective layer are made of the same high reflectivity insulating material, including a distributed Bragg reflector DBR or SiO2, SiNx, AlN.
  • the material of the first electrode and the second electrode is one of gold, silver, platinum, titanium, chromium, nickel, copper and aluminum.
  • the material of the isolation layer is silicon dioxide or a distributed Bragg reflector DBR.
  • the material of the conductive layer is a transparent conductive material.
  • the material of the conductive layer is tin-doped indium oxide ITO.
  • the beneficial effects of the invention are: uniformly arranging the first electrode on the LED chip and uniformly arranging the second electrode around the circumference of the first electrode, so as to ensure that the resistance values between the different positive and negative electrodes are relatively close, thereby causing the LED chip to emit Even light.
  • FIG. 1 is a cross-sectional view showing a first embodiment of a flip chip type LED chip of the present invention
  • FIG. 2 is a plan view of a first embodiment of a flip chip LED chip of the present invention
  • FIG. 3 is a plan view showing a second embodiment of the flip chip type LED chip of the present invention.
  • FIG. 4 is a plan view of a second embodiment of the flip chip LED chip of the present invention after covering the isolation layer;
  • Figure 5 is a plan view showing a third embodiment of the flip chip type LED chip of the present invention.
  • Fig. 6 is a plan view showing a fourth embodiment of the flip chip type LED chip of the present invention.
  • a substrate 20, a first conductive semiconductor layer; 30, a light-emitting layer; 40, a second conductive semiconductor layer; 50, a conductive layer; 60, a reflective layer; 61, an insulating layer; 70, a first electrode hole; 71, a first electrode; 72, a first electrode region; 80, a second electrode hole; 81, a second electrode; 82, a second electrode region; 90, an isolation layer; 91, a first through hole; Hole; 100, conductive metal electrode.
  • FIG. 1 is a longitudinal cross-sectional view of a first embodiment of the present invention, including a substrate 10 on which a first conductive type semiconductor layer 20, a light emitting layer 30, and a second conductive type semiconductor layer are laminated in this order from the front surface of the substrate 10. 40.
  • the method further includes three first electrode holes 70 and a plurality of second electrode holes 80 surrounding the first electrode holes 70.
  • the first electrode holes 70 are penetrated by the reflective layer 60 to the light emitting layer 30 and expose the first conductive type.
  • the semiconductor layer 20, the second electrode hole 80 penetrates the reflective layer 60 and exposes the conductive layer 50, and the hole wall of the first electrode hole 70 is coated with an insulating layer 61.
  • a first electrode 71 is disposed in the first electrode hole 70.
  • One end of the first electrode 71 is located on the front surface of the reflective layer 60, and the other end is in electrical contact with the first conductive semiconductor layer 20;
  • One end of the electrode 81 and the second electrode 81 are located on the front surface of the reflective layer, and the other end is in electrical contact with the conductive layer 50.
  • FIG. 2 is a top view of FIG. 1.
  • the first electrode holes 70 are evenly distributed on the LED chip, and the second electrode holes 80 are evenly distributed around the first electrode holes 70.
  • the first electrodes 70 are connected to each other to form a first electrode region 71, as shown by the shaded portion around the first electrode 70; the second electrodes 80 are connected to each other to form a second electrode region 81, as shown in FIG. The shaded portion around the electrode 80 is shown.
  • the first electrode may be a positive electrode
  • the second electrode may be a negative electrode, or vice versa
  • the first electrode may be a negative electrode
  • the second electrode may be a positive electrode. The effect of the implementation of these embodiments is not affected.
  • the insulating layer 61 and the reflective layer 60 are made of the same high reflectivity insulating material.
  • the high reflectivity insulating material may be selected from one of SiO2, SiNx, AlN and the like to achieve better insulation and reflection, or a distributed Bragg mirror DBR may be used. Reflective layer.
  • the first electrode 71 and the second electrode 72 are made of one of gold, silver, platinum, titanium, chromium, nickel, copper, and aluminum. These materials can be used to achieve the best results.
  • the conductive layer 50 may be made of a transparent conductive material, such that the light of the light-emitting layer 30 passes through the conductive layer 50 and is reflected by the reflective layer above the conductive layer 50. 60 reflects back for better lighting.
  • the conductive layer 50 may be doped with tin-doped indium oxide ITO. Although ITO is relatively expensive, the present invention can achieve the best results.
  • FIG. 3 is a second embodiment of the present invention, which differs from the first embodiment in that it includes 13 first electrodes 71 uniformly distributed and divided into four groups, wherein each of the three groups includes four mutual
  • the connected first electrode 71 constitutes three first electrode regions 72, and one of the groups includes a first electrode 71 which separately forms a first electrode region 72.
  • the remaining second electrode 81 uniformly distributed around constitutes the second electrode region 82.
  • the four sets of first electrode regions 72 and second electrode regions 82 are covered with an isolation layer 90 made of an insulating material.
  • the lower right corner of the isolation layer 90 is provided with four first through holes 91, and the four first through holes 91 expose four first electrodes 71 respectively belonging to four different first electrode regions 72; at the isolation layer 90
  • the second upper through hole 92 is provided in the upper left corner.
  • the two second through holes 92 expose the second electrode region 82.
  • the conductive metal electrodes 100 are respectively disposed in the first through hole 91 and the second through hole 92.
  • the conductive metal electrodes 100 located in the first through holes 91 are respectively electrically connected to the four sets of first electrode regions 72 and are connected to each other on the isolation layer 90 to form a first electrode layer (ie, a triangular region in the lower right corner of the figure);
  • the conductive metal electrode 100 in the second through hole 92 is electrically connected to the second electrode region 82 and connected to each other on the isolation layer 90 to form a second electrode layer (ie, a triangular region in the upper left corner of the figure).
  • the first electrode layer and the second electrode layer are used in the subsequent process as a whole electrode contact combined with the solder paste process, and the two electrode layers must have a certain interval therebetween, otherwise the conductive metal overflow on the electrode layer may occur in the subsequent process. The phenomenon causes a short circuit.
  • the embodiment is advantageous for integrally connecting the first electrode regions 72 distributed on different positions on the LED chip, thereby electrically connecting all the first electrodes 71, and further adding the isolation layer 90 to the first electrode region 72 and the first
  • the two electrode regions 82 are respectively provided with two different electrode contacts formed by the conductive metal electrodes 100, which can facilitate the subsequent packaging process, prevent short circuit between the first electrode and the second electrode, and significantly improve product yield.
  • the material of the isolation layer 90 is made of silicon dioxide or a distributed Bragg mirror DBR to achieve the best insulation isolation effect.
  • the third embodiment and the fourth embodiment shown in FIGS. 5 and 6 are different from the second embodiment in that the arrangement of the first electrode 71 and the first electrode region 72 is different, and the rest of the structures are the same.
  • the purpose is to be able to approach the optimum uniform illumination effect, and in actual production, the arrangement of the first electrode 71 and the first electrode region 72 is not limited to the above.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

一种覆晶式LED芯片,包括衬底(10),由衬底的正面向上依次层叠地设有第一导电型半导体层(20)、发光层(30)、第二导电型半导体层(40)、导电层(50)和反射层(60);还包括第一电极孔(70)和第二电极孔(80),第一电极孔暴露出第一导电型半导体层,其孔壁上涂覆有绝缘层(61),第二电极孔暴露出导电层;第一电极孔内设有第一电极(71),第一电极的一端位于反射层的正面,另一端与第一导电型半导体层电性接触;第二电极孔内设有第二电极(81),第二电极的一端位于反射层的正面,另一端与导电层电性接触;第一电极孔均匀分布在LED芯片上,第二电极孔均匀分布在第一电极孔周围。可以保证不同的正负电极之间的电阻阻值较为接近,从而使LED芯片发出均匀的光线。

Description

覆晶式 LED 芯片
技术领域
本发明涉及发光元件技术领域,尤其涉及一种覆晶式LED芯片。
背景技术
随着LED(Light Emitting Diode,发光二极管)照明技术的日益发展,LED在人们日常生活中的应用也越来越广泛。采用覆晶(Flip Chip)方式进行封装的LED(以下称覆晶式LED)的固晶方式简略,拥有更高的信赖度,使得量产可行性大幅晋升,且兼具缩短高温烘烤的制程时间、高良率、导热效果佳、高出光量等优势,遂成为业界竭力开展的技术。
LED的发光是利用正极的电流到达负极所完成,电流会以最小的电阻路线由正极到达负极,一般电阻值决定于电流路线的远近,正极到负极越近则电阻值越小、正极到负极越远则电阻就越大。然而,现有LED中的电极通常为金属线状,这使得单点的一个电流从正极进入负极,并以正极到负极给电流最近的距离最亮,其它位置将由于距离金属线较远而电阻较大、相对较暗,从而存在发光不均匀的问题。
发明内容
本发明主要解决的技术问题是提供一种覆晶式LED芯片。
为解决上述技术问题,本发明采用的一个技术方案是:提供一种覆晶式LED芯片,包括衬底,由衬底的正面向上依次层叠地设有第一导电型半导体层、发光层、第二导电型半导体层、导电层和反射层;还包括至少一个第一电极孔和至少一个第二电极孔,所述第一电极孔由所述反射层贯穿至发光层并暴露出第一导电型半导体层,所述第二电极孔贯穿反射层并暴露出导电层,第一电极孔的孔壁上涂覆有绝缘层;第一电极孔内设有第一电极,所述第一电极的一端位于反射层的正面、另一端与第一导电型半导体层电性接触;第二电极孔内设有第二电极,所述第二电极的一端位于反射层的正面、另一端与导电层电性接触;所述第一电极孔均匀分布在LED芯片上,所述第二电极孔均匀分布在第一电极孔周围。
其中,所述第一电极孔和第二电极孔设有至少两个,所述第一电极之间相互连接形成第一电极区,所述第二电极之间相互连接形成第二电极区。
其中,所述第一电极可分为多组,每一组至少包含一根第一电极;当同组中的电极数量多于一根,位于同组内的第一电极相互连接,不同组的第一电极之间至少通过本组中的一根第一电极与另一组内的第一电极连接。
其中,所述第一电极区和第二电极区上覆盖由绝缘材料制成的隔离层,所述隔离层上设有至少两个通孔,所述通孔内设有导电金属电极,所述导电金属电极分别单独与第一电极区和第二电极区连接。
其中,所述绝缘层和反射层由相同的高反射率绝缘材料制成,所述高反射率绝缘材料包括分布式布拉格反射镜DBR或SiO2、SiNx、AlN。
其中,所述第一电极和第二电极的材质为金、银、铂、钛、铬、镍、铜和铝中的一种。
其中,所述隔离层的材质为二氧化硅或分布式布拉格反射镜DBR。
其中,所述导电层的材质为透明的导电材料。
其中,所述导电层的材质为掺锡氧化铟ITO。
本发明的有益效果是:在LED芯片上均匀设置第一电极并围绕第一电极的周围均匀设置第二电极,可保证不同的正负电极之间的电阻阻值较为接近,从而使LED芯片发出均匀的光线。
附图说明
图1是本发明的覆晶式LED芯片的第一实施方式的剖面视图;
图2是本发明的覆晶式LED芯片的第一实施方式的俯视图;
图3是本发明的覆晶式LED芯片的第二实施方式的俯视图;
图4是本发明的覆晶式LED芯片的第二实施方式覆盖隔离层后的俯视图;
图5是本发明的覆晶式LED芯片的第三实施方式的俯视图;
图6是本发明的覆晶式LED芯片的第四实施方式的俯视图。
主要元件符号说明:
10、衬底;20、第一导电型半导体层;30、发光层;40、第二导电型半导体层;50、导电层;60、反射层;61、绝缘层;70、第一电极孔;71、第一电极;72、第一电极区;80、第二电极孔;81、第二电极;82、第二电极区;90、隔离层;91、第一通孔;92、第二通孔;100、导电金属电极。
具体实施方式
为详细说明本发明的技术内容、构造特征、所实现目的及效果,以下结合实施方式并配合附图详予说明。
图1为本发明的第一实施方式的纵向剖面图,包括衬底10,由衬底10的正面向上依次层叠地设有第一导电型半导体层20、发光层30、第二导电型半导体层40、导电层50和反射层60。其中,还包括三个第一电极孔70和多个围绕在第一电极孔70周围的第二电极孔80,第一电极孔70由反射层60贯穿至发光层30并暴露出第一导电型半导体层20,第二电极孔80贯穿反射层60并暴露出导电层50,第一电极孔70的孔壁上涂覆有绝缘层61。第一电极孔70内设有第一电极71,第一电极71的一端位于反射层60的正面、另一端与第一导电型半导体层20电性接触;第二电极孔80内设有第二电极81,第二电极81的一端位于反射层的正面、另一端与导电层50电性接触。
图2为图1的俯视图,图2中第一电极孔70均匀分布在LED芯片上,第二电极孔均80匀分布在第一电极孔70周围。其中第一电极70之间相互连接形成第一电极区71,如图中第一电极70周围的阴影部分所示;第二电极80之间相互连接形成第二电极区81,如图中第二电极80周围的阴影部分所示。
该实施方式通过在LED芯片上均匀设置第一电极并围绕第一电极的周围均匀设置第二电极,可保证不同的正负电极之间的电阻阻值较为接近,从而使LED芯片发出均匀的光线。在该实施方式以及后续的实施方式中,可将第一电极设为正电极,第二电极设为负电极,或反之,将第一电极设为负电极,第二电极设为正电极,都不影响这些实施方式的实施效果。
具体地,在对第一实施方式的一项优化改进中,所述绝缘层61和反射层60由相同的高反射率绝缘材料制成。在较为理想的实施方式中,所述高反射率绝缘材料可选用选用以SiO2、SiNx、AlN等原料中的一种以达到较好的绝缘和反射效果,或者采用分布式布拉格反射镜DBR来作为反射层。
具体地,在对第一实施方式的一项优化改进中,所述第一电极71和第二电极72的材质为金、银、铂、钛、铬、镍、铜和铝中的一种,采用这些材质可以达到最佳的效果。
具体地,在对第一实施方式的一项优化改进中,所述导电层50可采用透明的导电材料,这样能够使发光层30的光线穿过导电层50后由导电层50上方的反射层60反射回去,达到更好的光照效果。更进一步地,导电层50可选用掺锡氧化铟ITO,ITO虽然较为昂贵,但可以使本发明达到最好的效果。
图3为本发明的第二实施方式,其与第一实施方式的不同之处在于,包括均匀分布的十三根第一电极71,并分为4组,其中三组每组包含四根相互连接的第一电极71组成三个第一电极区72,有一组包含一根第一电极71单独形成一个第一电极区72。其余均匀分布在周围的第二电极81组成第二电极区82。
参照图4所示,四组第一电极区72和第二电极区82上覆盖由绝缘材料制成的隔离层90。该隔离层90的右下角设有四个第一通孔91,四个第一通孔91暴露出分别属于四组不同的第一电极区72的四根第一电极71;在该隔离层90的左上角设有两个第二通孔92,这两个第二通孔92暴露出第二电极区82,在第一通孔91和第二通孔92中分别设有导电金属电极100。位于第一通孔91内的导电金属电极100分别与四组第一电极区72电性连接并在隔离层90上相互连接构成第一电极层(即图中右下角的三角形区域);位于第二通孔92内的导电金属电极100与第二电极区82电性连接并在隔离层90上相互连接构成第二电极层(即图中左上角的三角形区域)。第一电极层和第二电极层用于后续工序中作为整体电极触点与锡膏制程结合,两电极层之间必须具有一定的间隔,否则在后续工序中可能出现电极层上的导电金属溢出的现象导致短路。
本实施方式有利于将LED芯片上分布于不同位置的第一电极区72连为一体,从而将所有的第一电极71电性相连,并再增加隔离层90后为第一电极区72和第二电极区82分别设置两个由导电金属电极100形成不同的整体电极触点,这样可方便后续的封装工序,防止第一电极和第二电极之间的短路,显著提升产品良率。
具体地,在对第二实施方式的一项优化改进中,隔离层90的材质采用二氧化硅或分布式布拉格反射镜DBR以达到最好的绝缘隔离效果。
图5和图6所示的第三实施方式和第四实施方式与第二实施方式的区别进在于第一电极71和第一电极区72的排布方式不同,其余的结构都相同。其目的都是在于能够趋近于最佳的均匀照明效果,而在实际生产中,第一电极71和第一电极区72的排布方式不限于上述几种。
以上所述仅为本发明的实施例,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关技术领域,均同理包括在本发明专利保护范围内。

Claims (9)

1、一种覆晶式LED芯片,包括衬底,由衬底的正面向上依次层叠地设有第一导电型半导体层、发光层、第二导电型半导体层、导电层和反射层;
还包括至少一个第一电极孔和至少一个第二电极孔,所述第一电极孔由所述反射层贯穿至发光层并暴露出第一导电型半导体层,所述第二电极孔贯穿反射层并暴露出导电层,第一电极孔的孔壁上涂覆有绝缘层;
第一电极孔内设有第一电极,所述第一电极的一端位于反射层的正面、另一端与第一导电型半导体层电性接触;第二电极孔内设有第二电极,所述第二电极的一端位于反射层的正面、另一端与导电层电性接触;
其特征在于,所述第一电极孔均匀分布在LED芯片上,所述第二电极孔均匀分布在第一电极孔周围。
2、根据权利要求1所述的覆晶式LED芯片,其特征在于,所述第一电极孔和第二电极孔设有至少两个,所述第一电极之间相互连接形成第一电极区,所述第二电极之间相互连接形成第二电极区。
3、根据权利要求2所述的覆晶式LED芯片,其特征在于,所述第一电极可分为多组,每一组至少包含一根第一电极;当同组中的电极数量多于一根,位于同组内的第一电极相互连接,不同组的第一电极之间至少通过本组中的一根第一电极与另一组内的第一电极连接。
4、根据权利要求3所述的覆晶式LED芯片,其特征在于,所述第一电极区和第二电极区上覆盖由绝缘材料制成的隔离层,所述隔离层上设有至少两个通孔,所述通孔内设有导电金属电极,所述导电金属电极分别单独与第一电极区和第二电极区连接。
5、根据权利要求1至4任意一项所述的覆晶式LED芯片,其特征在于,所述绝缘层和反射层由相同的高反射率绝缘材料制成,所述高反射率绝缘材料包括分布式布拉格反射镜DBR或SiO2、SiNx、AlN。
6、根据权利要求1至4任意一项所述的覆晶式LED芯片,其特征在于,所述第一电极和第二电极的材质为金、银、铂、钛、铬、镍、铜和铝中的一种。
7、根据权利要求1至4任意一项所述的覆晶式LED芯片,其特征在于,所述隔离层的材质为二氧化硅或分布式布拉格反射镜DBR。
8、根据权利要求1至4任意一项所述的覆晶式LED芯片,其特征在于,所述导电层的材质为透明的导电材料。
9、根据权利要求8所述的覆晶式LED芯片,其特征在于,所述导电层的材质为掺锡氧化铟ITO。
PCT/CN2014/082509 2014-02-25 2014-07-18 覆晶式 led 芯片 WO2015127744A1 (zh)

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