WO2015100623A1 - Circuit de commande de voyant et dispositif électronique - Google Patents

Circuit de commande de voyant et dispositif électronique Download PDF

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Publication number
WO2015100623A1
WO2015100623A1 PCT/CN2013/091135 CN2013091135W WO2015100623A1 WO 2015100623 A1 WO2015100623 A1 WO 2015100623A1 CN 2013091135 W CN2013091135 W CN 2013091135W WO 2015100623 A1 WO2015100623 A1 WO 2015100623A1
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WO
WIPO (PCT)
Prior art keywords
switch
terminal
logic unit
signal
level signal
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PCT/CN2013/091135
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English (en)
Chinese (zh)
Inventor
徐波
Original Assignee
华为终端有限公司
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Publication date
Application filed by 华为终端有限公司 filed Critical 华为终端有限公司
Priority to PCT/CN2013/091135 priority Critical patent/WO2015100623A1/fr
Publication of WO2015100623A1 publication Critical patent/WO2015100623A1/fr

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M1/00—Substation equipment, e.g. for use by subscribers
    • H04M1/72—Mobile telephones; Cordless telephones, i.e. devices for establishing wireless links to base stations without route selection
    • H04M1/724—User interfaces specially adapted for cordless or mobile telephones
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
    • H05B47/10—Controlling the light source

Definitions

  • the present invention relates to the field of circuits, and in particular, to an indicator light control circuit and an electronic device.
  • the discharge voltage range of the lithium battery is 3. 2 V ⁇ 4. 2 V
  • the operating voltage range of the portable mobile device is the same as the discharge voltage range of the lithium battery, which is 3. 2 V ⁇ 4. 2 V.
  • the discharge voltage of the lithium battery will be lower than 3. 2 V.
  • the lithium battery is trickle-charged with a current of 100 mA.
  • the discharge voltage of the lithium battery is 3.2 V
  • Stream charging since the discharge voltage of the lithium battery is lower than 3. 2 V, the processor of the portable mobile device cannot be normally started, so that the control indicator light cannot be illuminated, causing the user to mistake the portable mobile device for damage.
  • Embodiments of the present invention provide an indicator light control circuit and an electronic device for controlling the indicator light to illuminate when the processor of the portable mobile device fails to start normally, thereby improving the user experience.
  • the embodiment of the present invention uses the following technical solutions:
  • an embodiment of the present invention provides an indicator light control circuit, including: a first switch, a first logic unit, and an indicator light; wherein the first input end and the second input end of the first logic unit are respectively connected to the first a device and a charging management chip, the first device includes a processor or a power management chip; the first switch is connected between an output end of the first logic unit and the indicator light; Directly connected to the processor; the first logic unit is configured to control the first switch to be opened or closed according to an operating state of the first device and the charging management chip; working in the charging management chip, and The first logic unit controls the first opening and closing when the first device is not working The first logic unit controls the first switch to be turned off when the first device is in operation.
  • the first switch includes: a first control end, a first terminal, and a second terminal; the first switch is connected to an output end of the first logic unit
  • the indicator light includes: the first control end of the first switch is connected to an output end of the first logic unit; the first terminal of the first switch is grounded; The second terminal of the switch is coupled to the indicator light.
  • the first logic unit includes: a first inverter and a first AND gate An output end of the first inverter is connected to an input end of the first AND gate; wherein an input end of the first inverter is a first input end of the first logic unit or a second input end, the other input end of the first AND gate is a second input end or a first input end of the first logic unit, and an output end of the first AND gate is the first logic unit Output.
  • the first logic unit includes: a second inverter and a first and a second An output end of the second inverter is connected to an input end of the first NAND gate; wherein an input end of the second inverter is a first input end of the first logic unit Or a second input end, the other input end of the first NAND gate is a second input end or a first input end of the first logic unit, and the output end of the first NAND gate is the The output of a logic unit.
  • the first logic unit includes: a second switch, a first resistor, and a second
  • the second switch includes a second control terminal, a third terminal, and a fourth terminal; the second control end of the second switch is a first input end of the first logic unit, The third terminal of the second switch is grounded, the fourth terminal of the second switch is an output end of the first logic unit, the fourth terminal of the second switch is opposite to the first resistor
  • One end of the first resistor is connected to the other end of the first resistor, and one end of the second resistor Connected to one end of the first resistor, and the other end of the second resistor is grounded.
  • the method further includes: a first capacitor and a third resistor; and one end of the first capacitor and the first The first input end of the logic unit is connected, the other end of the first capacitor is grounded, one end of the third resistor is connected to the first terminal of the first switch, and the other end of the third resistor is grounded.
  • the first switch and the second switch are Metal-oxide-semiconductor M0 SFET.
  • the indicator light is a light emitting diode.
  • an embodiment of the present invention provides an electronic device, including the indicator light control circuit described in the foregoing embodiments.
  • the embodiment of the present invention provides an indicator light control circuit and an electronic device.
  • the indicator light control circuit includes: a first switch, a first logic unit and an indicator light, and the first input end of the first logic unit is configured to receive the first The signal sent by the device, the second input end of the first logic unit is configured to receive the signal sent by the charging management chip, and then the first logic unit operates the received signal, and outputs the operation result at the output end of the first logic unit.
  • the state of the first switch can be controlled according to the signal outputted by the output end of the first logic unit, that is, when the charging management chip operates, and the first device does not work, the signal outputted by the output end of the first logic unit controls the first
  • the switch is closed, the indicator light is bright; when the first device is working, the signal outputted by the output end of the first logic unit controls the first switch to be disconnected.
  • the processor control indicator light directly connected to the indicator light is illuminated. , thereby realizing that when the processor of the portable mobile device fails to start normally, the control indicator light is illuminated, and the use is improved. Experience.
  • FIG. 1 is a schematic diagram of an indicator light control circuit according to an embodiment of the present invention
  • FIG. 2 is a schematic diagram of another indicator light control circuit according to an embodiment of the present invention
  • FIG. 4 is a schematic structural diagram of another first logic unit according to an embodiment of the present invention
  • FIG. 5 is a schematic structural diagram of another first logic unit according to an embodiment of the present disclosure.
  • FIG. 6 is a schematic structural diagram of another first logic unit according to an embodiment of the present disclosure.
  • FIG. 7 is a schematic structural diagram of another first logic unit according to an embodiment of the present disclosure.
  • FIG. 8 is a schematic diagram of another indicator light control circuit according to an embodiment of the present invention. detailed description
  • An embodiment of the present invention provides an indicator light control circuit, as shown in FIG. 1, including: a first switch 101, a first logic unit 102, and an indicator light 103.
  • the first logic unit 102 includes: a first input terminal 1021, a second input terminal 1022, and an output terminal 1023.
  • the first input terminal 1021 and the second input terminal 1022 of the first logic unit 102 are respectively connected to the first device and the charging management chip.
  • the first switch 101 is connected between the output end 1023 of the first logic unit 102 and the indicator light 103.
  • the first device includes a processor or a power management chip.
  • the first switch 101 may include a first control terminal 1011, a first terminal 1012, and a second terminal 1013.
  • the first control end 1011 of the first switch 101 is connected to the output end 1023 of the first logic unit 102; the first terminal 1012 of the first switch 101 The second terminal 1013 of the first switch 101 is connected to the indicator light 103.
  • the indicator light 1G3 is also directly connected to the processor.
  • the indicator light 103 is also directly connected to the processor, that is, the processor is not connected to the indicator light 103 through the first switch 101, but an input/output terminal of the processor chip is directly connected to the indicator light. One end of the low potential of 103 is connected.
  • the first logic unit 102 is configured to control the first switch 101 to be opened or closed according to an operating state of the first device and the charging management chip; working in the charging management chip, and the first device When not working, the first logic unit 102 controls the first switch 101 to be closed; when the first device is in operation, the first logic unit 102 controls the first switch 101 to be turned off.
  • the charging management chip works when the charger is inserted, and when the charging management chip is started, the charging management chip does not work when the charger is not inserted, and the charging management chip is not activated; the first device works or does not work. It means that the first device can be started or not. In the case of over-discharge of the battery, the first device does not work when the charger is just inserted for charging. When the battery is charged to a certain voltage, the first device starts to work. .
  • the first input end 1021 of the first logic unit 102 is configured to receive a signal sent by the first device
  • the second input end 1022 of the first logic unit 102 is configured to receive the a signal sent by the charging management chip; and the first logic unit 102 operates on the received signal, and outputs the operation result at the output end 1023 of the first logic unit 102, so that the output of the first logic unit 102 can be
  • the output signal of 1023 controls the state of the first switch 101, that is, when the charging management chip is started, and the first device does not start, the signal outputted by the output terminal 1023 of the first logic unit 102 controls the first switch 101 to be closed, then the indicator light 103 lights up, that is, by the first switch 101
  • the circuit formed by the first logic unit 102 causes the indicator light 103 to illuminate; when the first device is started, when the charge management chip is started or not activated, the signal output by the output terminal 1023 of the first logic unit 102 controls the first switch 101 to be disconnected.
  • the processor since the processor is started
  • the power management chip cannot be started at this time, and the processor cannot be started, the processor cannot directly control the indicator light 103 to be bright, and the indicator light control circuit described in the present invention
  • the first switch 101 is closed, so that the indicator light 103 connected to the first switch 101 is illuminated; when the first device is activated, charging
  • the first switch 101 can be turned off, so that the indicator lamp 103 is illuminated by the processor directly connected to the indicator lamp 103.
  • connection of the second terminal 1013 of the first switch 101 to the indicator light 103 means that the second terminal 1013 of the first switch 101 is connected to the lower end of the indicator light 103.
  • the processor when the power management chip is not started, the processor cannot be started. At this time, the signal sent by the processor defaults to a high level signal. When the power management chip is started, the processor starts, and the signal sent by the processor at this time. Is a low level signal.
  • the processor can control the indicator light to be turned on or off according to a preset policy.
  • the indicator control circuit is different according to the design of the circuit of the first logic unit 102, and the first logic signal outputted by the first output terminal 1023 of the first logic unit 102 is different, and the state of the first switch 101 is also different.
  • the method for controlling the indicator light 103 according to the working state of the first switch 101 and the processor is also different, as follows: When the first logic unit 102 includes the first inverter 1024 and the first AND gate 1025, as shown in the figure As shown in FIG. 3, the output of the first inverter 1024 is coupled to an input of the first AND gate 1025.
  • the input end of the first inverter 1024 is the first input end 1021 of the first logic unit 102, and the other input end of the first AND gate 1025 is the first end of the first logic unit 102.
  • the two input terminals 1022, the output end of the first AND gate 1025 is the output end 1023 of the first logic unit 102. That is to say, at this time, it is defined that the signal sent when the first device is started is a high level signal, and the signal sent when the first device is not activated is a low level signal; the signal sent by the charging management chip when the charger is inserted is high.
  • the level signal, the signal sent by the charging management chip when the charger is not inserted is a low level signal; the first control terminal 1011 of the first switch 101 is closed when receiving the high level signal, and the first control end of the first switch 101 1011 is disconnected when receiving a low level signal, then when the charger is inserted, when the first device is not activated, the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a low level signal,
  • the input end of an inverter 1024 is the first input end 1021 of the first logic unit 102, and then the first inverter 1024 receives the signal sent by the first device as a low level signal, at this time, by the first inversion
  • the device 1024 performs a non-operation on the received signal, and the signal outputted at the output end of the first inverter 1024 is a high level signal, that is, the signal received at one end of the first AND gate 1025 is a high level signal.
  • the other input end of the first AND gate 1025 serves as the second input end 1022 of the first logic unit 102
  • the other input end of the first AND gate 1025 receives the signal sent by the charge management chip as a high level signal, and further The first AND gate 1025 performs an AND operation on the signals received by the two input terminals to obtain a high level signal.
  • the output end of the first AND gate 1025 is the output terminal 1023 of the first logic unit 102
  • the first logic The signal outputted by the output terminal 1023 of the unit 102 is a high level signal.
  • the first control terminal 1011 of the first switch 101 receives the signal output from the output terminal 1023 of the first logic unit 102, that is, the first switch 101.
  • the signal received by the control terminal 1011 is a high level signal, and the first switch 101 is closed.
  • the first terminal 1012 of the first switch 101 is connected to the second terminal 1013 of the first switch 101. Since the first terminal 1012 of the first switch 101 is grounded, the signal output by the second terminal 1013 of the first switch 101 is low.
  • the flat signal because the second terminal 1013 of the first switch 101 is connected to the lower end of the indicator light 103, so that the indicator light 103 is illuminated, and since the processor is not activated, the processor cannot control the indicator light 103 at this time. bright. That is, when the charger is inserted and the first device is not activated, the circuit composed of the first switch 101 and the first logic unit 102 causes the indicator light 103 to illuminate.
  • the signal sent by the charging management chip is a high level signal
  • the signal sent by the first device is a high level signal
  • the input end of 1024 is the first input end 1021 of the first logic unit 102
  • the input end of the first inverter 1024 receives the signal sent by the first device as a high level signal, at this time, by the first inverter 1024, if the received signal is non-operated, the signal outputted at the output end of the first inverter 1024 is a low level signal, that is, the signal received at one end of the first AND gate 1025 is a low level signal
  • the other input end of the first AND gate 1025 serves as the second input end 1022 of the first logic unit 102
  • the other input end of the first AND gate 1025 receives the signal sent by the charge management chip as a high level signal, and further The first AND gate 1025 performs an AND operation on the signals received by the two input terminals to obtain a low
  • the first logic The signal outputted by the output terminal 1023 of the unit 102 is a low level signal.
  • the first control terminal 1011 of the first switch 101 receives the signal output from the output terminal 1023 of the first logic unit 102, that is, the first switch 101.
  • Control terminal 1011 receives Signal low level signal, the first switch 101 is turned off.
  • the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic
  • the circuit composed of the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, The processor control indicator 103 is illuminated. That is, when the charger is inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.
  • the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a high level signal, because the input end of the first inverter 1024 is the first logic
  • the first input terminal 1021 of the unit 102 receives the signal sent by the first device as a high level signal at the input end of the first inverter 1024. At this time, the received signal is not performed by the first inverter 1024.
  • the signal outputted at the output of the first inverter 1024 is a low level signal, that is, the signal received at one end of the first AND gate 1025 is a low level signal, and the other is due to the first AND gate 1025.
  • An input is used as the second input 1022 of the first logic unit 102, and the other input of the first AND gate 1025 receives the signal sent by the charging management chip as a low level signal.
  • the first AND gate 1025 performs an AND operation on the signals received by the two input terminals to obtain a low level signal. Since the output end of the first AND gate 1025 is the output end 1021 of the first logic unit 102, the first The signal outputted by the output terminal 1021 of the logic unit 102 is a low level signal.
  • the first control terminal 1011 of the first switch 101 receives the signal output from the output terminal 1023 of the first logic unit 102, that is, the first switch 101. When the signal received by the control terminal 1011 is a low level signal, the first switch 101 is turned off.
  • the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic
  • the circuit composed of the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, The processor control indicator 103 is illuminated. That is, when the charger is not inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.
  • the first device When the charger is not inserted, the first device is not activated, the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a low level signal, since the input end of the first inverter 1024 is the first
  • the first input terminal 1021 of the logic unit 102 receives the signal sent by the first device as a low level signal at the input end of the first inverter 1024. At this time, the received signal is performed by the first inverter 1024.
  • the signal outputted at the output of the first inverter 1024 is a high level signal, that is, the signal received at one end of the first AND gate 1025 is a high level signal, and the first AND gate 1025 is The other input end serves as the second input end 1022 of the first logic unit 102, and the other input end of the first AND gate 1025 receives the signal sent by the charging management chip as a low level signal, and then the first AND gate 1025 pairs The signals received by the inputs are ANDed to obtain a low level signal. Since the output of the first AND gate 1025 is the output 1023 of the first logic unit 102, the output is output at the output 1023 of the first logic unit 102.
  • the signal is low
  • the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101 is a low level. Signal, then the first switch 101 is turned off.
  • the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101,
  • the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the circuit composed of the first switch 101 and the first logic unit 102 cannot make the indicator light 103 illuminate, and since the processor is not activated, the signal sent by the processor As a high level signal, and since the processor is connected to the lower end of the indicator light 103, the processor cannot control the indicator light 103 to illuminate at this time. That is, when the charger is not inserted and the first device is not activated, the circuit and the processor composed of the first switch 101 and the first logic unit 102 cannot control the indicator light 103 to illuminate.
  • the output of the first inverter 1024 is coupled to an input of the first AND gate 1025.
  • the input end of the first inverter 1024 is the second input end 1022 of the first logic unit 102, and the other input end of the first AND gate 1025 is the first of the first logic unit 102.
  • An input terminal 1021, an output end of the first AND gate 1025 is an output terminal 1023 of the first logic unit 102.
  • the signal sent when the first device is started is a low level signal, and the signal sent when the first device is not activated is a high level signal; the signal sent by the charging management chip when the charger is inserted is low.
  • the signal sent by the charging management chip when the charger is not inserted is a high level signal; when the first control terminal 1011 of the first switch 101 receives the high level signal, the first control terminal 1011 of the first switch 101 is closed.
  • the signal sent by the charging management chip is a low level signal
  • the signal sent by the first device is a high level signal
  • the input end of an inverter 1024 is the second input end 1022 of the first logic unit 102, and then the first inverter 1024 receives the signal sent by the charge management chip as a low level signal, at this time, by the first inversion
  • the device 1024 performs a non-operation on the received signal, and the signal outputted at the output end of the first inverter 1024 is a high level signal, that is, the signal received at one end of the first AND gate 1025 is a high level signal.
  • the other input end of the first AND gate 1025 serves as the first input end 1021 of the first logic unit 102
  • the other input end of the first AND gate 1025 receives the signal sent by the first device as a high level signal.
  • the first AND gate 1025 performs an AND operation on the signals received by the two input terminals to obtain a high level signal. Since the output end of the first AND gate 1025 is the output end 1023 of the first logic unit 102, the first The signal outputted by the output terminal 1023 of the logic unit 102 is a high level signal.
  • the first control terminal 1011 of the first switch 101 receives the first logic unit.
  • the signal output from the output terminal 1023 of 102 that is, the signal received by the first control terminal 1011 of the first switch 101 is a high level signal, and the first switch 101 is closed.
  • the first terminal 1012 of the first switch 101 is connected to the second terminal 1013 of the first switch 101. Since the first terminal 1012 of the first switch 101 is grounded, the signal output by the second terminal 1013 of the first switch 101 is low.
  • the flat signal because the second terminal 1013 of the first switch 101 is connected to the lower end of the indicator light 103, so that the indicator light 103 is illuminated, and since the processor is not activated, the processor cannot control the indicator light 103 at this time. bright. That is, when the charger is inserted and the first device is not activated, the circuit composed of the first switch 101 and the first logic unit 102 causes the indicator light 103 to illuminate.
  • the signal sent by the charging management chip is a low level signal
  • the signal sent by the first device is a low level signal
  • the signal sent by the first device is a low level signal
  • the input end of the first inverter 1024 is the first logic unit.
  • the second input end 1022 of the first inverter 1024 receives the signal sent by the charging management chip as a low level signal. At this time, the first inverter 1024 performs the non-operation on the received signal.
  • the signal outputted at the output end of the first inverter 1024 is a high level signal, that is, the signal received by one input terminal of the first AND gate 1025 is a high level signal, and the first AND gate 1025 is The other input end is the first input end 1021 of the first logic unit 102, and the other input end of the first AND gate 1025 receives the signal sent by the first device as a low level signal, and then the first AND gate 1025 pairs The signals received at the input terminals are ANDed to obtain a low level signal. Since the output of the first AND gate 1025 is the first output terminal 1023 of the first logic unit 102, the output of the first logic unit 102 is at the output end of the first logic unit 102.
  • the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101 is For the low level signal, the first switch 101 is turned off.
  • the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic
  • the circuit composed of the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, Controlled by the processor Light 103 is illuminated. That is, when the charger is inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.
  • the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a low level signal, because the input end of the first inverter 1024 is the first logic
  • the second input end 1022 of the unit 102 receives the signal sent by the charging management chip as a high level signal at the input end of the first inverter 1024. At this time, the received signal is not performed by the first inverter 1024.
  • the signal outputted at the output of the first inverter 1024 is a low level signal, that is, the signal received at one end of the first AND gate 1025 is a low level signal, and the other is due to the first AND gate 1025.
  • An input terminal is used as the first input terminal 1021 of the first logic unit 102, and the other input end of the first AND gate 1025 receives the signal sent by the first device as a low level signal, and then the first AND gate 1025 pairs the two The signal received at the input is ANDed to obtain a low level signal. Since the output of the first AND gate 1025 is the output 1023 of the first logic unit 102, the output of the first logic unit 102 The first output terminal 1011 of the first switch 101 receives the signal outputted from the output terminal 1023 of the first logic unit 102, that is, the first control terminal 1011 of the first switch 101 receives the signal. The signal is a low level signal, and the first switch 101 is turned off.
  • the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic.
  • the circuit formed by the unit 102 cannot make the indicator light 103 illuminate, but at this time, since the processor is started, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, The processor control indicator 103 is illuminated. That is, when the charger is not inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.
  • the first device When the charger is not inserted, the first device is not activated, the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a high level signal, since the input end of the first inverter 1024 is the first
  • the second input end 1022 of the logic unit 102 receives the signal sent by the charging management chip as a high level signal at the input end of the first inverter 1024. At this time, the received signal is performed by the first inverter 1024.
  • the signal outputted from the output of the first inverter 1024 is a low level signal, that is, the signal received at one end of the first AND gate 1025 is a low level signal, and the other input of the first AND gate 1025 is
  • the first input end 1021 of the first logic unit 102 receives the signal sent by the first device as a high level signal, and the first AND gate 1025 receives the two inputs.
  • the signal is ANDed to obtain a low level signal. Since the output of the first AND gate 1025 is the output 1023 of the first logic unit 102, the signal outputted at the output 1023 of the first logic unit 102 is low.
  • the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101 is a low level signal. Then, the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic.
  • the circuit composed by the unit 102 cannot make the indicator light 103 illuminate, and since the processor is not activated, the signal sent by the processor is a high level signal, and since the processor is connected to the lower end of the indicator light 103, the processor At this time, the control indicator 103 cannot be illuminated. That is, when the charger is not inserted and the first device is not activated, the circuit and the processor composed of the first switch 101 and the first logic unit 102 cannot control the indicator light 103 to illuminate.
  • the first logic unit 102 includes the second inverter 1026 and the first NAND gate 1027, as shown in FIG. 5, the output of the second inverter 1026 and the first NAND gate 1027 One input is connected.
  • the input end of the second inverter 1026 is the first input end 1021 of the first logic unit 102, and the other input end of the first NAND gate 1027 is the first logic unit 102.
  • the second input end 1022, the output end of the first NAND gate 1027 is the output end 1023 of the first logic unit 102.
  • the signal sent when the first device is started is a high level signal, and the signal sent when the first device is not activated is a low level signal; the signal sent by the charging management chip when the charger is inserted is high.
  • the level signal, the signal sent by the charging management chip when the charger is not inserted is a low level signal; the first control terminal 1011 of the first switch 101 is turned off when receiving the high level signal, and the first control of the first switch 101 End 1011 received
  • the low level signal is closed, when the charger is inserted, when the first device is not activated, the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a low level signal, due to the second inverter
  • the input terminal of 1026 is the first input terminal 1021 of the first logic unit 102, and then the second inverter 1026 receives the signal sent by the first device as a low level signal, and at this time, the second inverter 1026 receives the signal.
  • the signal outputted at the output end of the second inverter 1026 is a high level signal, that is, the signal received by one input terminal of the first NAND gate 1027 is a high level signal, and Since the other input terminal of the first NAND gate 1027 serves as the second input terminal 1022 of the first logic unit 102, the other input terminal of the first NAND gate 1027 receives the signal sent by the charge management chip as a high level signal. And the first NAND gate 1027 performs a NAND operation on the signals received by the two input terminals to obtain a low level signal.
  • the first control terminal 1011 of the first switch 101 receives the signal output by the first output terminal 1023 of the first logic unit 102, that is, the signal of the first switch 101.
  • the signal received by the first control terminal 1011 is a low level signal, and the first switch 101 is closed.
  • the first terminal 1012 of the first switch 101 is connected to the second terminal 1013 of the first switch 101. Since the first terminal 1012 of the first switch 101 is grounded, the signal output by the second terminal 1013 of the first switch 101 is low.
  • the flat signal because the second terminal 1013 of the first switch 101 is connected to the lower end of the indicator light 103, so that the indicator light 103 is illuminated, and since the processor is not activated, the processor cannot control the indicator light 103 at this time. bright. That is, when the charger is inserted and the first device is not activated, the circuit composed of the first switch 101 and the first logic unit 102 causes the indicator light 103 to illuminate.
  • the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a high level signal, because the input end of the second inverter 1026 is the first logic unit.
  • the first input terminal 1021 of 102, the second inverter 1026 receives the signal sent by the first device as a high level signal, and at this time, the second inverter 1026 performs a non-operation on the received signal, then
  • the signal outputted from the output of the second inverter 1026 is a low level signal, that is, the signal received by one input of the first NAND gate 1027 is a low level signal, and the other is due to the first NAND gate 1027.
  • the other input end of the first NAND gate 1027 receives the signal sent by the charge management chip as a high level signal, and then the first NAND gate 1027 pairs The signal received by the input terminal performs a NAND operation to obtain a high level signal. Since the output end of the first NAND gate 1027 is the output terminal 1023 of the first logic unit 102, the output terminal 1023 of the first logic unit 102 is at the output end 1023. The output signal is a high level signal.
  • the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the first control terminal 1011 of the first switch 101 receives the signal.
  • the first switch 101 When the signal is a high level signal, the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic
  • the circuit composed of the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103,
  • the processor control indicator 103 is illuminated. That is, when the charger is inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.
  • the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a high level signal, because the input end of the second inverter 1026 is the first logic
  • the second inverter 1026 receives the signal sent by the first device as a high level signal, and at this time, the second inverter 1026 performs a non-operation on the received signal.
  • the signal outputted at the output of the second inverter 1026 is a low level signal, that is, the signal received by one input of the first NAND gate 027 is a low level signal, and the first NAND gate 1027
  • the other input terminal is the second input end 1022 of the first logic unit 102, and the other input end of the first NAND gate 1027 receives the signal sent by the charging management chip as a low level signal, and then the first NAND gate 1027.
  • the first control terminal 1011 of the first switch 101 receives the signal output from the output terminal 1023 of the first logic unit 102, that is, the first switch 101 When the signal received by the control terminal 1011 is a high level signal, the first switch 101 is turned off.
  • the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic
  • the circuit formed by the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, The processor control indicator 103 is illuminated. That is, when the charger is not inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.
  • the first device When the charger is not inserted, the first device is not activated, the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a low level signal, because the input end of the second inverter 1026 is the first The first input 1021 of the logic unit 102, the second inverter 1026 receives the signal sent by the first device as a low level signal, and at this time, the second inverter 1026 performs a non-operation on the received signal.
  • the signal outputted at the output end of the second inverter 1026 is a high level signal, that is, the signal received by one input terminal of the first NAND gate 1027 is a high level signal, and the first NAND gate 1027 is The other input end of the first logic unit 102 is the second input end 1022 of the first logic unit 102, and the other input end of the first NAND gate 1027 receives the signal sent by the charge management chip as a low level signal, and then the first NAND gate 1027 performs a NAND operation on the signals received by the two inputs to obtain a high level signal.
  • the first logic unit 102 Output 1023
  • the signal is a high level signal.
  • the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101. When it is a high level signal, the first switch 101 is turned off.
  • the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic
  • the circuit composed of the unit 102 cannot make the indicator light 103 illuminate, and since the processor is not activated, the signal sent by the processor is a high level signal, and since the processor is connected to the lower end of the indicator light 103, the processor At this time, the control indicator 103 cannot be illuminated. That is, when the charger is not inserted and the first device is not activated, The circuit and the processor composed of the first switch 101 and the first logic unit 102 cannot control the indicator light 103 to illuminate.
  • the output of the second inverter 1026 is coupled to an input of the first NAND gate 1027.
  • the input end of the second inverter 1026 is the second input end 1022 of the first logic unit 102, and the other input end of the first NAND gate 1027 is the first logic unit 102.
  • the first input end 1021, the output end of the first NAND gate 1027 is the output end 1023 of the first logic unit 102.
  • the signal sent when the first device is started is a low level signal, and the signal sent when the first device is not activated is a high level signal; the signal sent by the charging management chip when the charger is inserted is low.
  • the level signal, the signal sent by the charging management chip when the charger is not inserted is a high level signal; the first control terminal 1011 of the first switch 101 is turned off when receiving the high level signal, and the first control of the first switch 101
  • the terminal 1011 is closed when receiving the low level signal, when the charger is inserted, when the first device is not activated, the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a high level signal, due to the
  • the input end of the second inverter 1026 is the second input end 1022 of the first logic unit 102, and the second inverter 1026 receives the signal sent by the charge management chip as a low level signal, at this time, by the second inversion.
  • the device 1026 performs a non-operation on the received signal, and the signal outputted at the output of the second inverter 1026 is a high level signal, that is, the signal received at one input of the first NAND gate 1027 is high.
  • the level signal and because the other input end of the first NAND gate 1027 is the first input terminal 1021 of the first logic unit 102, the other input terminal of the first NAND gate 1027 receives the signal sent by the first device.
  • a high level signal, and then the first NAND gate 1027 performs a NAND operation on the signals received by the two input terminals to obtain a low level signal, since the output end of the first NAND gate 1027 is the first logic unit 102.
  • the output terminal 1023 then the first logic signal outputted at the output terminal 1023 of the first logic unit 102 is a low level signal.
  • the first control terminal 1011 of the first switch 101 receives the output end of the first logic unit 102.
  • the signal outputted by 1023 that is, the signal received by the first control terminal 1011 of the first switch 101 is a low level signal, and the first switch 101 is closed.
  • the first terminal 1012 of the first switch 101 and the first switch The second terminal 1013 of the 101 is connected.
  • the signal output by the second terminal 1013 of the first switch 101 is a low level signal, because the second terminal 1013 of the first switch 101 is The low potential end of the indicator light 103 is connected, so that the indicator light 103 is illuminated, and since the processor is not activated, the processor cannot control the indicator light 103 to illuminate at this time. That is, when the charger is inserted and the first device is not activated, the circuit composed of the first switch 101 and the first logic unit 102 causes the indicator light 103 to illuminate.
  • the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a low level signal, because the input end of the second inverter 1026 is the first logic unit.
  • the second input terminal 1022 of the second inverter 1026 receives the signal sent by the charge management chip as a low level signal.
  • the second inverter 1026 performs a non-operation on the received signal.
  • the signal outputted from the output of the second inverter 1026 is a high level signal, that is, the signal received by one input terminal of the first NAND gate 1027 is a high level signal, and the other is due to the first NAND gate 1027.
  • An input terminal is used as the first input terminal 1021 of the first logic unit 102, and the other input terminal of the first NAND gate 1027 receives the signal sent by the first device as a low level signal, and then the first NAND gate 1027 The signals received by the two inputs are NANDed to obtain a high level signal. Since the output of the first NAND gate 1027 is the output 1023 of the first logic unit 102, the output of the first logic unit 102. Output from terminal 1023 The signal is a high level signal.
  • the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101 is When the signal is high, the first switch 101 is turned off.
  • the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic
  • the circuit composed of the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, The processor control indicator 103 is illuminated. That is, when the charger is inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.
  • the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a low level signal, because the input end of the second inverter 1026 is the first logic
  • the second input terminal 1022 of the unit 102 receives the signal sent by the charging management chip as a high level signal. At this time, the second inverter 1026 performs a non-operation on the received signal.
  • the signal outputted at the output of the second inverter 1026 is a low level signal, that is, the signal received by one input of the first NAND gate 1027 is a low level signal, and the first NAND gate 1027
  • the other input end is the first input end 1021 of the first logic unit 102, and the other input end of the first NAND gate 1027 receives the signal sent by the first device as a low level signal, and then the first NAND gate 1027 Performing a NAND operation on the signals received by the two inputs to obtain a high level signal. Since the output of the first NAND gate 1027 is the output 1023 of the first logic unit 102, the first logic unit 102 Output 1023 loss The signal is a high level signal.
  • the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101. When it is a high level signal, the first switch 101 is turned off.
  • the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic
  • the circuit formed by the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, The processor control indicator 103 is illuminated. That is, when the charger is not inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.
  • the first device When the charger is not inserted, the first device is not activated, the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a high level signal, since the input end of the second inverter 1026 is the first
  • the second input 1022 of the logic unit 102 receives the signal sent by the charge management chip as a high level signal. At this time, the second inverter 1026 performs a non-operation on the received signal.
  • the signal outputted at the output end of the second inverter 1026 is a low level signal, that is, the signal received by one input terminal of the first NAND gate 1027 is a low level signal, and the first NAND gate 1027 is The other input end of the first logic unit 102 is the first input end 1021 of the first logic unit 102, and the other input end of the first NAND gate 1027 receives the signal sent by the first device as a high level signal, and then the first NAND gate 1027 performs a NAND operation on the signals received by the two input terminals to obtain a high level signal.
  • the first logic unit 102 Since the output end of the first NAND gate 1027 is the output end 1023 of the first logic unit 102, the first logic unit 102 The output signal of the output terminal 1023 is a high level signal. At this time, the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the first control end of the first switch 101. When the signal received by 1011 is a high level signal, the first switch 101 is turned off.
  • the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic
  • the circuit composed of the unit 102 cannot make the indicator light 103 illuminate, and since the processor is not activated, the signal sent by the processor is a high level signal, and since the processor is connected to the lower end of the indicator light 103, the processor At this time, the control indicator 103 cannot be illuminated. That is, when the charger is not inserted and the first device is not activated, the circuit and the processor composed of the first switch 101 and the first logic unit 102 cannot control the indicator light 103 to illuminate.
  • the second switch 1028 includes a second control terminal, a third terminal, and a fourth terminal.
  • the second control terminal of the second switch 1028 is the first input end 1021 of the first logic unit 102, the third terminal of the second switch 1028 is grounded, and the second switch 1028
  • the fourth terminal is the output end 1023 of the first logic unit 102, the fourth terminal of the second switch 1028 is connected to one end of the first resistor 1029, and the first resistor 1029 is another One end is the second input end 1022 of the first logic unit 102, one end of the second resistor 10210 is connected to one end of the first resistor 1029, and the other end of the second resistor 10210 is grounded.
  • the indicator light control circuit further includes: a first capacitor 104 and a third resistor 105.
  • One end of the first capacitor 104 and the first input of the first logic unit 102 The other end of the first capacitor 104 is connected to the ground, the other end of the third resistor 105 is connected to the first terminal 1012 of the first switch 101, and the other end of the third resistor 105 is grounded.
  • the first switch 101 and the second switch 1028 are both N-MOSFETs (N-Me ta 1 -Ox i de-Sem i conduc t or Field - Effect Transistor, N-channel-metal The oxide semiconductor field effect transistor), the indicator light 103 is a light emitting diode.
  • the working principle of the indicator light control circuit shown in FIG. 7 is: At this time, the signal sent when the first device is started is defined as a high level signal, and the signal sent when the first device is not started is a low level signal; The signal sent by the charging management chip when the charger is inserted is a high level signal, and the signal sent by the charging management chip when the charger is not inserted is a low level signal; the first control end 1011 of the first switch 101 receives the high level When the signal is closed, the first control terminal 1011 of the first switch 101 is turned off when receiving the low level signal, and when the charger is inserted, when the first device is not activated, the voltage provided by the charge management chip passes through the first logic unit 102.
  • the second input terminal 1022 is input to the first resistor 1029, and is divided by the first resistor 1029 and the second resistor 10210. Since the first device is not activated, the signal received by the first input terminal 1021 of the first logic unit 102 is low.
  • the level signal that is, the signal received by the first control terminal of the second switch 1028 is a low level signal, and the fourth terminal of the second switch 1028 is in a high impedance state, thereby being provided by the charge management chip.
  • the voltage is divided by the first resistor 1029 and the second resistor 10210 and outputted at the output end 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101 is a high level signal, due to the first
  • the first terminal 1012 of the switch 101 is grounded through the third resistor 105, and the voltage of the first control terminal 1011 of the first switch 101 is greater than the voltage of the first terminal 1012 of the first switch 101, so that the first switch 101 is turned on.
  • the second terminal 1013 of the first switch 101 is connected to the first terminal 1012 of the first switch 101, that is, the signal output by the second terminal 1013 of the first switch 101 is a low level signal, due to the second terminal of the first switch 101.
  • the processor 1013 is connected to the lower end of the indicator light 103, so that the indicator light 103 is illuminated, and since the processor is not activated, the processor cannot control the indicator light 103 to illuminate at this time. That is, when the charger is inserted and the first device is not activated, the first switch 101 and the first A circuit consisting of a logic unit 102 causes the indicator light 103 to illuminate.
  • the voltage provided by the charge management chip is input to the first resistor 1029 through the second input terminal 1022 of the first logic unit 102, and is divided by the first resistor 1029 and the second resistor 10210.
  • the signal received by the first input end 1021 of the first logic unit 102 is a high level signal, that is, the signal received by the first control end of the second switch 1028 is a high level signal, and then the second The fourth terminal of the switch 1028 is in communication with the first terminal of the second switch 1028.
  • the signal output by the second terminal of the second switch 1028 is a low level signal
  • the first switch The third control signal received by the first control terminal 1011 of the 101 is a low level signal
  • the second terminal 1013 of the first switch 101 is not connected to the first terminal 1012 of the first switch 101, and the first switch 101 is disconnected. That is, the second terminal of the first switch 101 is in a high impedance state, that is, the circuit composed of the first switch 101 and the first logic unit 102 cannot make the indicator light 103 illuminate, but at this time
  • the processor starts processing a signal sent by a low level signal, and the potential due to the low end of the indicator 103 is connected to the processor so that the indicator lights 103 may be controlled by the processor. That is, when the charger is plugged in, the signal sent by the processor causes the indicator light 103 to illuminate when the first device is activated.
  • the voltage provided by the charging management chip is zero. Since the first device is activated, the signal received by the first input terminal 1021 of the first logic unit 102 is a high level signal, that is, The signal received by the first control terminal of the second switch 1028 is a high level signal, and the fourth terminal of the second switch 1028 is in communication with the first terminal of the second switch 1028.
  • the signal output by the second terminal of the second switch 1028 is a low level signal, and the signal received by the first control terminal 1011 of the first switch 101 is a low level signal, and the second terminal 1013 of the first switch 101 is The first terminal 1012 of the first switch 101 is not turned on, and the first switch 101 is turned off, that is, the second terminal of the first switch 101 is in a high impedance state, that is, the circuit composed of the first switch 101 and the first logic unit 102 cannot
  • the indicator light 103 is illuminated, but at this time, the processor sends a signal that is a low level signal, and the processor is connected to the lower end of the indicator light 103, so that it can be controlled by the processor.
  • Lamp 103 lights up. That is, when the charger is not inserted, the signal sent by the processor when the first device is started The indicator light 103 is illuminated.
  • the voltage provided by the charging management chip is zero. Since the first device is not activated, the signal received by the first input terminal 1021 of the first logic unit 102 is a low level signal. That is, the signal received by the first control terminal of the second switch 1028 is a low level signal, and the fourth terminal of the second switch 1028 is not connected to the first terminal of the second switch 1028, and the second switch 1028 is second.
  • the terminal is in a high-resistance state
  • the signal received by the first control terminal 1011 of the first switch 101 is a high-resistance signal
  • the second terminal 1013 of the first switch 101 is not connected to the first terminal 1012 of the first switch 101.
  • the first switch 101 is turned off, that is, the second terminal of the first switch 101 is in a high impedance state, that is, the circuit composed of the first switch 101 and the first logic unit 102 cannot make the indicator light 103 illuminate, and since the processor is not When it is started, the signal sent by the processor is a high level signal, and since the processor is connected to the lower end of the indicator light 103, the processor cannot control the indicator light 103 to illuminate at this time. That is, when the charger is not inserted and the first device is not activated, the indicator light 103 is not illuminated.
  • the first input end 1021 of the first logic unit 102 can also be connected to an input/output port of the processor.
  • the initial state of the input/output port is a low level, when the processor is started.
  • the input/output port is controlled by the application such that the level signal of the input/output port is a high level signal, and the second switch 1028 can be closed as well, and the first switch 101 is turned off.
  • the second switch 1028 is closed, and the process of disconnecting the first switch 101 can refer to the description of the indicator control circuit shown in FIG. 7 , and the details are not described herein again.
  • design of the circuit of the first logic unit 102 may also be other methods, which are not limited in the present invention.
  • the present invention is applicable to a scenario where the battery power source is in an over-discharge state, that is, when the battery power source is in an over-discharge state, the voltage supplied from the battery power source to the power management chip cannot enable the power management chip to be activated.
  • the charging management chip charges the battery power.
  • the power management chip starts, and the processor is started. That is, when the charger is just inserted, the power management chip cannot be started, and after the charger is inserted for a period of time, the battery is made
  • the voltage of the power supply reaches the voltage of the power management chip, the power management chip is started, and the processor is started.
  • the first switch 101 and the second switch 1028 are both MOSFETs
  • the indicator light is a light-emitting diode.
  • first switch 101 and the second switch 1028 may also be semiconductor switching devices other than metal-oxide-semiconductor field effect transistors, such as a triode, an IGBT (Insulated Gate Bipolar Transistor). Insulated gate bipolar transistor), the invention is not limited thereto.
  • semiconductor switching devices other than metal-oxide-semiconductor field effect transistors, such as a triode, an IGBT (Insulated Gate Bipolar Transistor). Insulated gate bipolar transistor), the invention is not limited thereto.
  • An embodiment of the present invention provides an indicator light control circuit, including: a first switch, a first logic unit, and an indicator light, wherein the first input end of the first logic unit is configured to receive a signal sent by the first device, where the first logic unit is The second input end is configured to receive a signal sent by the charging management chip, and the first logic unit performs an operation on the received signal, and outputs the operation result at an output end of the first logic unit, thereby being
  • the signal outputted by the output terminal controls the state of the first switch, that is, when the charging management chip operates, and the first device does not work, the signal outputted by the output end of the first logic unit controls the first switch to be closed, and the indicator light is illuminated; When the first device is in operation, the signal outputted by the output of the first logic unit controls the first switch to be turned off. At this time, the processor control indicator light directly connected to the indicator light is illuminated, thereby realizing the operation of the portable mobile device. When the processor fails to start properly, the control indicator lights up to improve the user
  • Embodiments of the present invention provide an electronic device, including an indicator light control circuit.
  • the indicator light control circuit is any one of the indicator light control circuits described in the above embodiments.
  • Embodiments of the present invention provide an electronic device including an indicator light control circuit.
  • the indicator light control circuit includes: a first switch, a first logic unit and an indicator light, a first input end of the first logic unit is configured to receive a signal sent by the first device, and a second input end of the first logic unit is used to Receiving a signal sent by the charging management chip, and then the first logic unit operates on the received signal, and outputs the operation result at an output end of the first logic unit, thereby being outputtable according to the output end of the first logic unit
  • the signal controls the state of the first switch, that is, when the charging management chip operates, and the first device does not work, the signal outputted by the output end of the first logic unit controls the first switch to be closed, and the indicator light is illuminated; During operation, the signal outputted by the output of the first logic unit controls the first switch to be turned off.
  • the processor control indicator light directly connected to the indicator light is illuminated, thereby realizing that the processor in the portable mobile device cannot be normal.
  • the disclosed system, apparatus, and method may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the unit is only a logical function division.
  • there may be another division manner for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not executed.
  • the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be electrical, mechanical or otherwise.
  • the units described as separate components may or may not be physically separated, and the components displayed as the units may or may not be physical units, and may be located in one place or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the embodiment of the present embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may be physically included separately, or two or more units may be integrated into one unit.
  • the above integrated unit can be implemented in the form of hardware or in the form of hardware plus software functional units.

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  • Engineering & Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

L'invention concerne un circuit de commande de voyant et un dispositif électronique, associés au domaine des circuits, et utilisés pour commander un voyant afin qu'il s'allume lorsqu'un processeur d'un dispositif mobile portatif ne peut être démarré normalement, de manière à améliorer l'expérience de l'utilisateur. Le circuit comprend : un premier commutateur, une première unité logique et un voyant, une première extrémité d'entrée et une deuxième extrémité d'entrée de la première unité logique étant connectées à un premier dispositif et à une puce de gestion de charge, respectivement, le premier dispositif comprenant un processeur ou une puce de gestion de source de courant ; le premier commutateur est connecté entre une extrémité de sortie de la première unité logique et le voyant ; le voyant est connecté en outre directement au processeur ; et la première unité logique est utilisée pour commander le premier commutateur afin qu'il soit déconnecté ou connecté en fonction d'un état de fonctionnement du premier dispositif et de la puce de gestion de charge ; lorsque la puce de gestion de charge fonctionne et que le premier dispositif ne fonctionne pas, la première unité logique commande le premier commutateur pour qu'il soit connecté ; et lorsque le premier dispositif ne fonctionne pas, la première unité logique commande le premier commutateur pour qu'il soit déconnecté. La présente invention peut s'appliquer à un scénario dans lequel une source d'alimentation par batterie se trouve dans un état de surcharge.
PCT/CN2013/091135 2013-12-31 2013-12-31 Circuit de commande de voyant et dispositif électronique WO2015100623A1 (fr)

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PCT/CN2013/091135 WO2015100623A1 (fr) 2013-12-31 2013-12-31 Circuit de commande de voyant et dispositif électronique

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CN108291278A (zh) * 2015-10-19 2018-07-17 特里梅特铝业欧洲股份公司 铝合金
CN106375565A (zh) * 2016-08-31 2017-02-01 深圳鼎智通讯股份有限公司 呼吸灯在智能设备应用通知中的实现方法

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