WO2015100623A1

WO2015100623A1 - Indication lamp control circuit and electronic device

Info

Publication number: WO2015100623A1
Application number: PCT/CN2013/091135
Authority: WO
Inventors: 徐波
Original assignee: 华为终端有限公司
Priority date: 2013-12-31
Filing date: 2013-12-31
Publication date: 2015-07-09

Abstract

Provided are an indication lamp control circuit and an electronic device, which relate to the field of circuits, and are used for controlling an indication lamp to shine when a processor of a portable mobile device cannot be started normally so as to improve user experience. The circuit comprises: a first switch, a first logical unit and an indication lamp, wherein a first input end and a second input end of the first logical unit are connected to a first device and a charging management chip respectively, the first device comprising a processor or a power source management chip; the first switch is connected between an output end of the first logical unit and the indication lamp; the indication lamp is further connected to the processor directly; and the first logical unit is used for controlling the first switch to be disconnected or connected according to a working state of the first device and the charging management chip; when the charging management chip is working and the first device is not working, the first logical unit controls the first switch to be connected; and when the first device is not working, the first logical unit controls the first switch to be disconnected. The present invention is applicable to a scenario where a battery power source is in an over-charging condition.

Description

一种指示灯控制电路及电子设备技术领域 Indicator light control circuit and electronic device

本发明涉及电路领域，尤其涉及一种指示灯控制电路及电子设备。 The present invention relates to the field of circuits, and in particular, to an indicator light control circuit and an electronic device.

背景技术 Background technique

目前，便携式移动设备，例如手机，主要釆用锂电池作为电源。其中，锂电池的放电电压范围为 3. 2 V ~ 4. 2 V , 便携式移动设备的处理器的工作电压范围与锂电池的放电电压范围相同，即为 3. 2 V ~ 4. 2 V。在便携式移动设备的使用过程中，当锂电池的电量耗尽，且处于过放电状态时，锂电池的放电电压会低于 3. 2 V。此时，釆用充电器对锂电池进行充电时，为了保护锂电池，首先釆用 1 00mA 的电流对锂电池进行涓流充电，当锂电池的放电电压为 3. 2 V时，再进行恒流充电。在涓流充电过程中，由于锂电池的放电电压低于 3. 2 V , 便携式移动设备的处理器无法正常启动，从而无法控制指示灯发亮，导致用户误以为便携式移动设备被损坏。 Currently, portable mobile devices, such as mobile phones, mainly use lithium batteries as a power source. Among them, the discharge voltage range of the lithium battery is 3. 2 V ~ 4. 2 V, and the operating voltage range of the portable mobile device is the same as the discharge voltage range of the lithium battery, which is 3. 2 V ~ 4. 2 V. During the use of a portable mobile device, when the lithium battery is exhausted and in an overdischarged state, the discharge voltage of the lithium battery will be lower than 3. 2 V. At this time, when charging the lithium battery with the charger, in order to protect the lithium battery, the lithium battery is trickle-charged with a current of 100 mA. When the discharge voltage of the lithium battery is 3.2 V, Stream charging. During the trickle charging process, since the discharge voltage of the lithium battery is lower than 3. 2 V, the processor of the portable mobile device cannot be normally started, so that the control indicator light cannot be illuminated, causing the user to mistake the portable mobile device for damage.

发明内容 Summary of the invention

本发明的实施例提供了一种指示灯控制电路及电子设备，用于在便携式移动设备的处理器无法正常启动时，控制指示灯发亮，提高用户体验。 Embodiments of the present invention provide an indicator light control circuit and an electronic device for controlling the indicator light to illuminate when the processor of the portable mobile device fails to start normally, thereby improving the user experience.

为达到上述目的，本发明的实施例釆用如下技术方案： In order to achieve the above object, the embodiment of the present invention uses the following technical solutions:

第一方面，本发明实施例提供了一种指示灯控制电路，包括：第一开关，第一逻辑单元及指示灯；所述第一逻辑单元的第一输入端和第二输入端分别连接第一设备和充电管理芯片，所述第一设备包括处理器或电源管理芯片；所述第一开关连接在所述第一逻辑单元的输出端和所述指示灯之间；所述指示灯还与处理器直接相连；所述第一逻辑单元用于根据所述第一设备和所述充电管理芯片的工作状态控制所述第一开关断开或闭合；在所述充电管理芯片工作，且所述第一设备不工作时，所述第一逻辑单元控制所述第一开关闭合；在所述第一设备工作时，所述第一逻辑单元控制所述第一开关断开。 In a first aspect, an embodiment of the present invention provides an indicator light control circuit, including: a first switch, a first logic unit, and an indicator light; wherein the first input end and the second input end of the first logic unit are respectively connected to the first a device and a charging management chip, the first device includes a processor or a power management chip; the first switch is connected between an output end of the first logic unit and the indicator light; Directly connected to the processor; the first logic unit is configured to control the first switch to be opened or closed according to an operating state of the first device and the charging management chip; working in the charging management chip, and The first logic unit controls the first opening and closing when the first device is not working The first logic unit controls the first switch to be turned off when the first device is in operation.

在第一方面的第一种可能的实现方式中，所述第一开关包括：第一控制端，第一端子及第二端子；所述第一开关连接在所述第一逻辑单元的输出端和所述指示灯之间包括：所述第一开关的所述第一控制端与所述第一逻辑单元的输出端连接；所述第一开关的所述第一端子接地；所述第一开关的所述第二端子与所述指示灯连接。 In a first possible implementation manner of the first aspect, the first switch includes: a first control end, a first terminal, and a second terminal; the first switch is connected to an output end of the first logic unit And the indicator light includes: the first control end of the first switch is connected to an output end of the first logic unit; the first terminal of the first switch is grounded; The second terminal of the switch is coupled to the indicator light.

结合第一方面，或第一方面的第一种可能的实现方式，在第一方面的第二种可能的实现方式中，所述第一逻辑单元包括：第一反相器及第一与门；所述第一反相器的输出端与所述第一与门的一个输入端连接；其中，所述第一反相器的输入端为所述第一逻辑单元的第一输入端或第二输入端，所述第一与门的另一个输入端为所述第一逻辑单元的第二输入端或第一输入端，所述第一与门的输出端为所述第一逻辑单元的输出端。 With reference to the first aspect, or the first possible implementation manner of the first aspect, in the second possible implementation manner of the first aspect, the first logic unit includes: a first inverter and a first AND gate An output end of the first inverter is connected to an input end of the first AND gate; wherein an input end of the first inverter is a first input end of the first logic unit or a second input end, the other input end of the first AND gate is a second input end or a first input end of the first logic unit, and an output end of the first AND gate is the first logic unit Output.

结合第一方面，或第一方面的第一种可能的实现方式，在第一方面的第三种可能的实现方式中，所述第一逻辑单元包括：第二反相器及第一与非门；所述第二反相器的输出端与所述第一与非门的一个输入端连接；其中，所述第二反相器的输入端为所述第一逻辑单元的第一输入端或第二输入端，所述第一与非门的另一个输入端为所述第一逻辑单元的第二输入端或第一输入端，所述第一与非门的输出端为所述第一逻辑单元的输出端。 With reference to the first aspect, or the first possible implementation manner of the first aspect, in a third possible implementation manner of the first aspect, the first logic unit includes: a second inverter and a first and a second An output end of the second inverter is connected to an input end of the first NAND gate; wherein an input end of the second inverter is a first input end of the first logic unit Or a second input end, the other input end of the first NAND gate is a second input end or a first input end of the first logic unit, and the output end of the first NAND gate is the The output of a logic unit.

结合第一方面，或第一方面的第一种可能的实现方式，在第一方面的第四种可能的实现方式中，所述第一逻辑单元包括：第二开关，第一电阻及第二电阻；其中，所述第二开关包括第二控制端，第三端子及第四端子；所述第二开关的所述第二控制端为所述第一逻辑单元的第一输入端，所述第二开关的所述第三端子接地，所述第二开关的所述第四端子为所述第一逻辑单元的输出端，所述第二开关的所述第四端子与所述第一电阻的一端连接，所述第一电阻的另一端作为所述第一逻辑单元的第二输入端，所述第二电阻的一端与所述第一电阻的一端连接，所述第二电阻的另一端接地。结合第一方面的第四种可能的实现方式，在第一方面的第五种可能的实现方式中，还包括：第一电容及第三电阻；所述第一电容的一端与所述第一逻辑单元的第一输入端连接，所述第一电容的另一端接地，所述第三电阻的一端与所述第一开关的所述第一端子连接，所述第三电阻的另一端接地。 With reference to the first aspect, or the first possible implementation manner of the first aspect, in a fourth possible implementation manner of the first aspect, the first logic unit includes: a second switch, a first resistor, and a second The second switch includes a second control terminal, a third terminal, and a fourth terminal; the second control end of the second switch is a first input end of the first logic unit, The third terminal of the second switch is grounded, the fourth terminal of the second switch is an output end of the first logic unit, the fourth terminal of the second switch is opposite to the first resistor One end of the first resistor is connected to the other end of the first resistor, and one end of the second resistor Connected to one end of the first resistor, and the other end of the second resistor is grounded. In conjunction with the fourth possible implementation of the first aspect, in a fifth possible implementation manner of the first aspect, the method further includes: a first capacitor and a third resistor; and one end of the first capacitor and the first The first input end of the logic unit is connected, the other end of the first capacitor is grounded, one end of the third resistor is connected to the first terminal of the first switch, and the other end of the third resistor is grounded.

结合第一方面，或第一方面的第一至第五任一种可能的实现方式，在第一方面的第六种可能的实现方式中，所述第一开关及所述第二开关均为金属-氧化物-半导体 M0 S F E T。 With reference to the first aspect, or any one of the first to the fifth possible implementation manners of the first aspect, in the sixth possible implementation manner of the first aspect, the first switch and the second switch are Metal-oxide-semiconductor M0 SFET.

结合第一方面，或第一方面的第一至第六任一种可能的实现方式，在第一方面的第七种可能的实现方式中，所述指示灯为发光二极管。 In conjunction with the first aspect, or any one of the first to the sixth possible implementations of the first aspect, in the seventh possible implementation of the first aspect, the indicator light is a light emitting diode.

第二方面，本发明实施例提供了一种电子设备，包括上述实施例所述的指示灯控制电路。 In a second aspect, an embodiment of the present invention provides an electronic device, including the indicator light control circuit described in the foregoing embodiments.

本发明实施例提供了一种指示灯控制电路及电子设备，所述指示灯控制电路包括：第一开关，第一逻辑单元及指示灯，第一逻辑单元的第一输入端用于接收第一设备发送的信号，第一逻辑单元的第二输入端用于接收充电管理芯片发送的信号，进而第一逻辑单元对接收到的信号进行运算，并将运算结果在第一逻辑单元的输出端输出，从而可以根据第一逻辑单元的输出端输出的信号来控制第一开关的状态，即在充电管理芯片工作，且第一设备不工作时，第一逻辑单元的输出端输出的信号控制第一开关闭合，则指示灯发亮；在第一设备工作时，第一逻辑单元的输出端输出的信号控制第一开关断开，此时，由直接与指示灯相连的处理器控制指示灯发亮，从而实现了在便携式移动设备的处理器无法正常启动时，控制指示灯发亮，提高用户体验。 The embodiment of the present invention provides an indicator light control circuit and an electronic device. The indicator light control circuit includes: a first switch, a first logic unit and an indicator light, and the first input end of the first logic unit is configured to receive the first The signal sent by the device, the second input end of the first logic unit is configured to receive the signal sent by the charging management chip, and then the first logic unit operates the received signal, and outputs the operation result at the output end of the first logic unit. Therefore, the state of the first switch can be controlled according to the signal outputted by the output end of the first logic unit, that is, when the charging management chip operates, and the first device does not work, the signal outputted by the output end of the first logic unit controls the first When the switch is closed, the indicator light is bright; when the first device is working, the signal outputted by the output end of the first logic unit controls the first switch to be disconnected. At this time, the processor control indicator light directly connected to the indicator light is illuminated. , thereby realizing that when the processor of the portable mobile device fails to start normally, the control indicator light is illuminated, and the use is improved. Experience.

附图说明 DRAWINGS

为了更清楚地说明本发明实施例的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。 In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments or the prior art description will be briefly described below, obviously, The drawings in the following description are only some of the embodiments of the present invention, and those skilled in the art can obtain other drawings based on these drawings without any creative work.

图 1为本发明实施例提供的一种指示灯控制电路的示意图；图 2为本发明实施例提供的另一种指示灯控制电路的示意图；图 3为本发明实施例提供的一种第一逻辑单元的结构示意图；图 4 为本发明实施例提供的另一种第一逻辑单元的结构示意图； 1 is a schematic diagram of an indicator light control circuit according to an embodiment of the present invention; FIG. 2 is a schematic diagram of another indicator light control circuit according to an embodiment of the present invention; FIG. 4 is a schematic structural diagram of another first logic unit according to an embodiment of the present invention;

图 5 为本发明实施例提供的另一种第一逻辑单元的结构示意图； FIG. 5 is a schematic structural diagram of another first logic unit according to an embodiment of the present disclosure;

图 6 为本发明实施例提供的另一种第一逻辑单元的结构示意图； FIG. 6 is a schematic structural diagram of another first logic unit according to an embodiment of the present disclosure;

图 7 为本发明实施例提供的另一种第一逻辑单元的结构示意图； FIG. 7 is a schematic structural diagram of another first logic unit according to an embodiment of the present disclosure;

图 8为本发明实施例提供的另一种指示灯控制电路的示意图。具体实施方式 FIG. 8 is a schematic diagram of another indicator light control circuit according to an embodiment of the present invention. detailed description

下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。 The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are only a part of the embodiments of the present invention, but not all embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

本发明实施例提供了一种指示灯控制电路，如图 1 所示，包括：第一开关 101, 第一逻辑单元 102及指示灯 103。 An embodiment of the present invention provides an indicator light control circuit, as shown in FIG. 1, including: a first switch 101, a first logic unit 102, and an indicator light 103.

其中，所述第一逻辑单元 102 包括：第一输入端 1021, 第二输入端 1022及输出端 1023。 The first logic unit 102 includes: a first input terminal 1021, a second input terminal 1022, and an output terminal 1023.

所述第一逻辑单元 102 的第一输入端 1021 和第二输入端 1022 分别连接第一设备和充电管理芯片。所述第一开关 101 连接在所述第一逻辑单元 102 的输出端 1023和所述指示灯 103之间。其中，所述第一设备包括处理器或电源管理芯片；所述第一开关 101可以包括：第一控制端 1011 ,第一端子 1012及第二端子 1013。 The first input terminal 1021 and the second input terminal 1022 of the first logic unit 102 are respectively connected to the first device and the charging management chip. The first switch 101 is connected between the output end 1023 of the first logic unit 102 and the indicator light 103. The first device includes a processor or a power management chip. The first switch 101 may include a first control terminal 1011, a first terminal 1012, and a second terminal 1013.

具体的，如图 2所示，所述第一开关 101的所述第一控制端 1011 与所述第一逻辑单元 102 的输出端 1023连接；所述第一开关 101 的所述第一端子 1012 接地；所述第一开关 101 的所述第二端子 1013 与所述指示灯 103连接。 Specifically, as shown in FIG. 2, the first control end 1011 of the first switch 101 is connected to the output end 1023 of the first logic unit 102; the first terminal 1012 of the first switch 101 The second terminal 1013 of the first switch 101 is connected to the indicator light 103.

所述指示灯 1G3还与处理器直接相连。 The indicator light 1G3 is also directly connected to the processor.

需要说明的是，所述指示灯 103还与处理器直接相连是指处理器不是通过第一开关 101 与指示灯 103连接，而是处理器芯片的某个输入 /输出端直接与所述指示灯 103的电位低的一端连接。 It should be noted that the indicator light 103 is also directly connected to the processor, that is, the processor is not connected to the indicator light 103 through the first switch 101, but an input/output terminal of the processor chip is directly connected to the indicator light. One end of the low potential of 103 is connected.

所述第一逻辑单元 102用于根据所述第一设备和所述充电管理芯片的工作状态控制所述第一开关 101 断开或闭合；在所述充电管理芯片工作，且所述第一设备不工作时，所述第一逻辑单元 102 控制所述第一开关 101 闭合；在所述第一设备工作时，所述第一逻辑单元 102控制所述第一开关 101 断开。 The first logic unit 102 is configured to control the first switch 101 to be opened or closed according to an operating state of the first device and the charging management chip; working in the charging management chip, and the first device When not working, the first logic unit 102 controls the first switch 101 to be closed; when the first device is in operation, the first logic unit 102 controls the first switch 101 to be turned off.

需要说明的是，充电管理芯片工作是指在充电器***，充电管理芯片启动时，充电管理芯片不工作是指在充电器未***，充电管理芯片未启动时；第一设备工作或不工作是指第一设备能够启动或不能够启动，在电池过放电的情况下，在刚***充电器进行充电时，第一设备是不工作的，当电池被充电到一定电压时，第一设备开始工作。 It should be noted that the charging management chip works when the charger is inserted, and when the charging management chip is started, the charging management chip does not work when the charger is not inserted, and the charging management chip is not activated; the first device works or does not work. It means that the first device can be started or not. In the case of over-discharge of the battery, the first device does not work when the charger is just inserted for charging. When the battery is charged to a certain voltage, the first device starts to work. .

具体的，所述第一逻辑单元 102 的所述第一输入端 1021用于接收所述第一设备发送的信号，所述第一逻辑单元 102 的所述第二输入端 1022用于接收所述充电管理芯片发送的信号；且所述第一逻辑单元 102 对接收到的信号进行运算，并将运算结果在第一逻辑单元 102 的输出端 1023输出，从而可以根据第一逻辑单元 102 的输出端 1023输出的信号来控制第一开关 101 的状态，即在充电管理芯片启动，且第一设备不启动时，第一逻辑单元 102的输出端 1023输出的信号控制第一开关 101 闭合，则指示灯 103发亮，即由第一开关 101 及第一逻辑单元 102 组成的电路使得指示灯 103发亮；在第一设备启动，充电管理芯片启动或未启动时，第一逻辑单元 102 的输出端 1023输出的信号控制第一开关 101 断开，此时，由于处理器启动，则由处理器来控制指示灯 103发亮。 Specifically, the first input end 1021 of the first logic unit 102 is configured to receive a signal sent by the first device, and the second input end 1022 of the first logic unit 102 is configured to receive the a signal sent by the charging management chip; and the first logic unit 102 operates on the received signal, and outputs the operation result at the output end 1023 of the first logic unit 102, so that the output of the first logic unit 102 can be The output signal of 1023 controls the state of the first switch 101, that is, when the charging management chip is started, and the first device does not start, the signal outputted by the output terminal 1023 of the first logic unit 102 controls the first switch 101 to be closed, then the indicator light 103 lights up, that is, by the first switch 101 And the circuit formed by the first logic unit 102 causes the indicator light 103 to illuminate; when the first device is started, when the charge management chip is started or not activated, the signal output by the output terminal 1023 of the first logic unit 102 controls the first switch 101 to be disconnected. At this time, since the processor is started, the indicator light 103 is illuminated by the processor.

也就是说，在电池电源处于过放电状态时，此时电源管理芯片不能启动，处理器也不能启动，则处理器不能直接控制指示灯 103 发亮，而本发明中所述的指示灯控制电路是在电池电源处于过放电状态时，在充电器***，第一设备未启动时，第一开关 101 闭合，从而使得与第一开关 101连接的指示灯 103发亮；在第一设备启动，充电器*** /未***时，均可以使得第一开关 101 断开，从而由与指示灯 103直接连接的处理器来控制指示灯 103发亮。 That is to say, when the battery power supply is in the over-discharge state, the power management chip cannot be started at this time, and the processor cannot be started, the processor cannot directly control the indicator light 103 to be bright, and the indicator light control circuit described in the present invention When the battery power is in an over-discharge state, when the charger is inserted, and the first device is not activated, the first switch 101 is closed, so that the indicator light 103 connected to the first switch 101 is illuminated; when the first device is activated, charging When the device is inserted/not inserted, the first switch 101 can be turned off, so that the indicator lamp 103 is illuminated by the processor directly connected to the indicator lamp 103.

需要说明的是，第一开关 101 的第二端子 1013 与指示灯 103 连接是指第一开关 101的第二端子 1013与指示灯 103的电位低的一端连接。 It should be noted that the connection of the second terminal 1013 of the first switch 101 to the indicator light 103 means that the second terminal 1013 of the first switch 101 is connected to the lower end of the indicator light 103.

需要说明的是，在电源管理芯片未启动时，处理器无法启动，此时处理器发送的信号默认为高电平信号，在电源管理芯片启动时，处理器启动，此时处理器发送的信号为低电平信号。 It should be noted that, when the power management chip is not started, the processor cannot be started. At this time, the signal sent by the processor defaults to a high level signal. When the power management chip is started, the processor starts, and the signal sent by the processor at this time. Is a low level signal.

还需要说明的是，在由处理器控制指示灯 103发亮的过程中，处理器可以根据预置的策略控制指示灯发亮或熄灭。 It should also be noted that during the process of the processor control indicator 103 being illuminated, the processor can control the indicator light to be turned on or off according to a preset policy.

具体的，所述指示灯控制电路根据第一逻辑单元 102 的电路的设计不同，第一逻辑单元 102的第一输出端 1023输出的第一逻辑信号也不同，则第一开关 101 的状态也不同，进而根据第一开关 101 及处理器的工作状态控制指示灯 103的方法也不同，具体如下：在所述第一逻辑单元 102 包括第一反相器 1024 及第一与门 1025 时，如图 3 所示，所述第一反相器 1024 的输出端与所述第一与门 1025 的一个输入端连接。其中，所述第一反相器 1024 的输入端为所述第一逻辑单元 102 的第一输入端 1021, 所述第一与门 1025 的另一个输入端为所述第一逻辑单元 102的第二输入端 1022, 所述第一与门 1025的输出端为所述第一逻辑单元 102 的输出端 1023。也就是说，此时，定义第一设备启动时发送的信号为高电平信号，第一设备未启动时发送的信号为低电平信号；充电管理芯片在充电器***时发送的信号为高电平信号，充电管理芯片在充电器未 ***时发送的信号为低电平信号；第一开关 101 的第一控制端 1011 接收到高电平信号时闭合，第一开关 101 的第一控制端 1011接收到低电平信号时断开，则在充电器***，第一设备未启动时，充电管理芯片发送的信号为高电平信号，第一设备发送的信号为低电平信号，由于第一反相器 1024 的输入端为第一逻辑单元 102的第一输入端 1021, 则第一反相器 1024 接收到第一设备发送的信号为低电平信号，此时，由第一反相器 1024将接收到的信号进行非运算，则在第一反相器 1024的输出端输出的信号为高电平信号，即为第一与门 1025 的一端接收到的信号为高电平信号，又由于第一与门 1025 的另一个输入端作为第一逻辑单元 102的第二输入端 1022, 则第一与门 1025 的另一个输入端接收到充电管理芯片发送的信号为高电平信号，进而第一与门 1025对两个输入端接收到的信号进行与运算，得出高电平信号，由于第一与门 1025的输出端为第一逻辑单元 102 的输出端 1023, 则在第一逻辑单元 102 的输出端 1023 输出的信号为高电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011接收到的信号为高电平信号，则第一开关 101 闭合。则第一开关 101 的第一端子 1012与第一开关 101 的第二端子 1013连接，由于第一开关 101 的第一端子 1012接地，则第一开关 101 的第二端子 1013 输出的信号为低电平信号，由于第一开关 101 的第二端子 1013与指示灯 103的电位低的一端连接，从而使得指示灯 103发亮，又由于处理器未启动，则处理器此时不能控制指示灯 103 发亮。即在充电器***，第一设备未启动时，由第一开关 101 及第一逻辑单元 102组成的电路使得指示灯 103发亮。 Specifically, the indicator control circuit is different according to the design of the circuit of the first logic unit 102, and the first logic signal outputted by the first output terminal 1023 of the first logic unit 102 is different, and the state of the first switch 101 is also different. The method for controlling the indicator light 103 according to the working state of the first switch 101 and the processor is also different, as follows: When the first logic unit 102 includes the first inverter 1024 and the first AND gate 1025, as shown in the figure As shown in FIG. 3, the output of the first inverter 1024 is coupled to an input of the first AND gate 1025. The input end of the first inverter 1024 is the first input end 1021 of the first logic unit 102, and the other input end of the first AND gate 1025 is the first end of the first logic unit 102. The two input terminals 1022, the output end of the first AND gate 1025 is the output end 1023 of the first logic unit 102. That is to say, at this time, it is defined that the signal sent when the first device is started is a high level signal, and the signal sent when the first device is not activated is a low level signal; the signal sent by the charging management chip when the charger is inserted is high. The level signal, the signal sent by the charging management chip when the charger is not inserted is a low level signal; the first control terminal 1011 of the first switch 101 is closed when receiving the high level signal, and the first control end of the first switch 101 1011 is disconnected when receiving a low level signal, then when the charger is inserted, when the first device is not activated, the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a low level signal, The input end of an inverter 1024 is the first input end 1021 of the first logic unit 102, and then the first inverter 1024 receives the signal sent by the first device as a low level signal, at this time, by the first inversion The device 1024 performs a non-operation on the received signal, and the signal outputted at the output end of the first inverter 1024 is a high level signal, that is, the signal received at one end of the first AND gate 1025 is a high level signal. Since the other input end of the first AND gate 1025 serves as the second input end 1022 of the first logic unit 102, the other input end of the first AND gate 1025 receives the signal sent by the charge management chip as a high level signal, and further The first AND gate 1025 performs an AND operation on the signals received by the two input terminals to obtain a high level signal. Since the output end of the first AND gate 1025 is the output terminal 1023 of the first logic unit 102, the first logic The signal outputted by the output terminal 1023 of the unit 102 is a high level signal. At this time, the first control terminal 1011 of the first switch 101 receives the signal output from the output terminal 1023 of the first logic unit 102, that is, the first switch 101. The signal received by the control terminal 1011 is a high level signal, and the first switch 101 is closed. The first terminal 1012 of the first switch 101 is connected to the second terminal 1013 of the first switch 101. Since the first terminal 1012 of the first switch 101 is grounded, the signal output by the second terminal 1013 of the first switch 101 is low. The flat signal, because the second terminal 1013 of the first switch 101 is connected to the lower end of the indicator light 103, so that the indicator light 103 is illuminated, and since the processor is not activated, the processor cannot control the indicator light 103 at this time. bright. That is, when the charger is inserted and the first device is not activated, the circuit composed of the first switch 101 and the first logic unit 102 causes the indicator light 103 to illuminate.

在充电器***，第一设备启动时，充电管理芯片发送的信号为高电平信号，第一设备发送的信号为高电平信号，由于第一反相器 1024的输入端为第一逻辑单元 102 的第一输入端 1021, 则第一反相器 1024 的输入端接收到第一设备发送的信号为高电平信号，此时，由第一反相器 1024 将接收到的信号进行非运算，则在第一反相器 1024 的输出端输出的信号为低电平信号，即为第一与门 1025 的一端接收到的信号为低电平信号，又由于第一与门 1025的另一个输入端作为第一逻辑单元 102 的第二输入端 1022, 则第一与门 1025 的另一个输入端接收到充电管理芯片发送的信号为高电平信号，进而第一与门 1025对两个输入端接收到的信号进行与运算，得出低电平信号，由于第一与门 1025 的输出端为第一逻辑单元 102 的输出端 1023, 则在第一逻辑单元 102的输出端 1023输出的信号为低电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102 的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011接收到的信号为低电平信号，则第一开关 101 断开。此时，第一开关 101 的第一端子 1012 与第一开关 101 的第二端子 1013 不连接，则第一开关 101 的第二端子 1013为高阻态，即由第一开关 101及第一逻辑单元 102 组成的电路不能使得指示灯 103发亮，但此时由于处理器启动，则处理器发送的信号为低电平信号，又由于处理器与指示灯 103 的电位低的一端连接，从而可以由处理器控制指示灯 103 发亮。即在充电器***，第一设备启动时，由处理器发送的信号使得指示灯 103发亮。 When the charger is inserted, when the first device is started, the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a high level signal, due to the first inverter The input end of 1024 is the first input end 1021 of the first logic unit 102, and the input end of the first inverter 1024 receives the signal sent by the first device as a high level signal, at this time, by the first inverter 1024, if the received signal is non-operated, the signal outputted at the output end of the first inverter 1024 is a low level signal, that is, the signal received at one end of the first AND gate 1025 is a low level signal, and Since the other input end of the first AND gate 1025 serves as the second input end 1022 of the first logic unit 102, the other input end of the first AND gate 1025 receives the signal sent by the charge management chip as a high level signal, and further The first AND gate 1025 performs an AND operation on the signals received by the two input terminals to obtain a low level signal. Since the output end of the first AND gate 1025 is the output terminal 1023 of the first logic unit 102, the first logic The signal outputted by the output terminal 1023 of the unit 102 is a low level signal. At this time, the first control terminal 1011 of the first switch 101 receives the signal output from the output terminal 1023 of the first logic unit 102, that is, the first switch 101. Control terminal 1011 receives Signal low level signal, the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic The circuit composed of the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, The processor control indicator 103 is illuminated. That is, when the charger is inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.

在充电器未***，第一设备启动时，充电管理芯片发送的信号为低电平信号，第一设备发送的信号为高电平信号，由于第一反相器 1024 的输入端为第一逻辑单元 102 的第一输入端 1021, 则第一反相器 1024的输入端接收到第一设备发送的信号为高电平信号，此时，由第一反相器 1024将接收到的信号进行非运算，则在第一反相器 1024 的输出端输出的信号为低电平信号，即为第一与门 1025 的一端接收到的信号为低电平信号，又由于第一与门 1025 的另一个输入端作为第一逻辑单元 102 的第二输入端 1022, 则第一与门 1025 的另一个输入端接收到充电管理芯片发送的信号为低电平信号，进而第一与门 1025对两个输入端接收到的信号进行与运算，得出低电平信号，由于第一与门 1025的输出端为第一逻辑单元 102的输出端 1021, 则在第一逻辑单元 102的输出端 1021输出的信号为低电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102 的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011接收到的信号为低电平信号，则第一开关 101 断开。此时，第一开关 101 的第一端子 1012 与第一开关 101 的第二端子 1013 不连接，则第一开关 101 的第二端子 1013为高阻态，即由第一开关 101及第一逻辑单元 102 组成的电路不能使得指示灯 103发亮，但此时由于处理器启动，则处理器发送的信号为低电平信号，又由于处理器与指示灯 103 的电位低的一端连接，从而可以由处理器控制指示灯 103 发亮。即在充电器未***，第一设备启动时，由处理器发送的信号使得指示灯 103发亮。 When the charger is not inserted, when the first device is started, the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a high level signal, because the input end of the first inverter 1024 is the first logic The first input terminal 1021 of the unit 102 receives the signal sent by the first device as a high level signal at the input end of the first inverter 1024. At this time, the received signal is not performed by the first inverter 1024. In operation, the signal outputted at the output of the first inverter 1024 is a low level signal, that is, the signal received at one end of the first AND gate 1025 is a low level signal, and the other is due to the first AND gate 1025. An input is used as the second input 1022 of the first logic unit 102, and the other input of the first AND gate 1025 receives the signal sent by the charging management chip as a low level signal. The first AND gate 1025 performs an AND operation on the signals received by the two input terminals to obtain a low level signal. Since the output end of the first AND gate 1025 is the output end 1021 of the first logic unit 102, the first The signal outputted by the output terminal 1021 of the logic unit 102 is a low level signal. At this time, the first control terminal 1011 of the first switch 101 receives the signal output from the output terminal 1023 of the first logic unit 102, that is, the first switch 101. When the signal received by the control terminal 1011 is a low level signal, the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic The circuit composed of the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, The processor control indicator 103 is illuminated. That is, when the charger is not inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.

在充电器未***，第一设备未启动时，充电管理芯片发送的信号为低电平信号，第一设备发送的信号为低电平信号，由于第一反相器 1024 的输入端为第一逻辑单元 102 的第一输入端 1021, 则第一反相器 1024的输入端接收到第一设备发送的信号为低电平信号，此时，由第一反相器 1024将接收到的信号进行非运算，则在第一反相器 1024 的输出端输出的信号为高电平信号，即为第一与门 1025 的一端接收到的信号为高电平信号，又由于第一与门 1025的另一个输入端作为第一逻辑单元 102 的第二输入端 1022, 则第一与门 1025 的另一个输入端接收到充电管理芯片发送的信号为低电平信号，进而第一与门 1025对两个输入端接收到的信号进行与运算，得出低电平信号，由于第一与门 1025的输出端为第一逻辑单元 102的输出端 1023, 则在第一逻辑单元 102的输出端 1023输出的信号为低电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102 的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011接收到的信号为低电平信号，则第一开关 101 断开。此时，第一开关 101 的第一端子 1012 与第一开关 101 的第二端子 1013 不连接，则第一开关 101 的第二端子 1013为高阻态，即由第一开关 101及第一逻辑单元 102 组成的电路不能使得指示灯 103发亮，且由于处理器未启动，则处理器发送的信号为高电平信号，又由于处理器与指示灯 103 的电位低的一端连接，则处理器此时也不能控制指示灯 103 发亮。即在充电器未***，第一设备未启动时，由第一开关 101 及第一逻辑单元 102组成的电路及处理器均不能控制指示灯 103发亮。 When the charger is not inserted, the first device is not activated, the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a low level signal, since the input end of the first inverter 1024 is the first The first input terminal 1021 of the logic unit 102 receives the signal sent by the first device as a low level signal at the input end of the first inverter 1024. At this time, the received signal is performed by the first inverter 1024. For non-operation, the signal outputted at the output of the first inverter 1024 is a high level signal, that is, the signal received at one end of the first AND gate 1025 is a high level signal, and the first AND gate 1025 is The other input end serves as the second input end 1022 of the first logic unit 102, and the other input end of the first AND gate 1025 receives the signal sent by the charging management chip as a low level signal, and then the first AND gate 1025 pairs The signals received by the inputs are ANDed to obtain a low level signal. Since the output of the first AND gate 1025 is the output 1023 of the first logic unit 102, the output is output at the output 1023 of the first logic unit 102. The signal is low The level signal, at this time, the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101 is a low level. Signal, then the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, The second terminal 1013 of the first switch 101 is in a high impedance state, that is, the circuit composed of the first switch 101 and the first logic unit 102 cannot make the indicator light 103 illuminate, and since the processor is not activated, the signal sent by the processor As a high level signal, and since the processor is connected to the lower end of the indicator light 103, the processor cannot control the indicator light 103 to illuminate at this time. That is, when the charger is not inserted and the first device is not activated, the circuit and the processor composed of the first switch 101 and the first logic unit 102 cannot control the indicator light 103 to illuminate.

或者，如图 4所示，所述第一反相器 1024的输出端与所述第一与门 1025 的一个输入端连接。其中，所述第一反相器 1024 的输入端为所述第一逻辑单元 102 的第二输入端 1022, 所述第一与门 1025 的另一个输入端为所述第一逻辑单元 102的第一输入端 1021, 所述第一与门 1025的输出端为所述第一逻辑单元 102 的输出端 1023。 Alternatively, as shown in FIG. 4, the output of the first inverter 1024 is coupled to an input of the first AND gate 1025. The input end of the first inverter 1024 is the second input end 1022 of the first logic unit 102, and the other input end of the first AND gate 1025 is the first of the first logic unit 102. An input terminal 1021, an output end of the first AND gate 1025 is an output terminal 1023 of the first logic unit 102.

也就是说，此时，第一设备启动时发送的信号为低电平信号，第一设备未启动时发送的信号为高电平信号；充电管理芯片在充电器***时发送的信号为低电平信号，充电管理芯片在充电器未*** 时发送的信号为高电平信号；第一开关 101 的第一控制端 1011接收到高电平信号时闭合，第一开关 101 的第一控制端 1011接收到低电平信号时断开时，则在充电器***，第一设备未启动时，充电管理芯片发送的信号为低电平信号，第一设备发送的信号为高电平信号，由于第一反相器 1024 的输入端为第一逻辑单元 102 的第二输入端 1022, 则第一反相器 1024接收到充电管理芯片发送的信号为低电平信号，此时，由第一反相器 1024将接收到的信号进行非运算，则在第一反相器 1024的输出端输出的信号为高电平信号，即为第一与门 1025 的一端接收到的信号为高电平信号，又由于第一与门 1025 的另一个输入端作为第一逻辑单元 102的第一输入端 1021, 则第一与门 1025 的另一个输入端接收到第一设备发送的信号为高电平信号，进而第一与门 1025对两个输入端接收到的信号进行与运算，得出高电平信号，由于第一与门 1025 的输出端为第一逻辑单元 102 的输出端 1023, 则在第一逻辑单元 102 的输出端 1023 输出的信号为高电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102 的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011 接收到的信号为高电平信号，则第一开关 101 闭合。则第一开关 101 的第一端子 1012 与第一开关 101 的第二端子 1013连接，由于第一开关 101 的第一端子 1012接地，则第一开关 101 的第二端子 1013 输出的信号为低电平信号，由于第一开关 101 的第二端子 1013与指示灯 103 的电位低的一端连接，从而使得指示灯 103发亮，又由于处理器未启动，则处理器此时不能控制指示灯 103 发亮。即在充电器***，第一设备未启动时，由第一开关 101 及第一逻辑单元 102 组成的电路使得指示灯 103发亮。 That is to say, at this time, the signal sent when the first device is started is a low level signal, and the signal sent when the first device is not activated is a high level signal; the signal sent by the charging management chip when the charger is inserted is low. The signal sent by the charging management chip when the charger is not inserted is a high level signal; when the first control terminal 1011 of the first switch 101 receives the high level signal, the first control terminal 1011 of the first switch 101 is closed. When the low level signal is received, when the charger is inserted, when the first device is not activated, the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a high level signal, The input end of an inverter 1024 is the second input end 1022 of the first logic unit 102, and then the first inverter 1024 receives the signal sent by the charge management chip as a low level signal, at this time, by the first inversion The device 1024 performs a non-operation on the received signal, and the signal outputted at the output end of the first inverter 1024 is a high level signal, that is, the signal received at one end of the first AND gate 1025 is a high level signal. In addition, since the other input end of the first AND gate 1025 serves as the first input end 1021 of the first logic unit 102, the other input end of the first AND gate 1025 receives the signal sent by the first device as a high level signal. Further, the first AND gate 1025 performs an AND operation on the signals received by the two input terminals to obtain a high level signal. Since the output end of the first AND gate 1025 is the output end 1023 of the first logic unit 102, the first The signal outputted by the output terminal 1023 of the logic unit 102 is a high level signal. At this time, the first control terminal 1011 of the first switch 101 receives the first logic unit. The signal output from the output terminal 1023 of 102, that is, the signal received by the first control terminal 1011 of the first switch 101 is a high level signal, and the first switch 101 is closed. The first terminal 1012 of the first switch 101 is connected to the second terminal 1013 of the first switch 101. Since the first terminal 1012 of the first switch 101 is grounded, the signal output by the second terminal 1013 of the first switch 101 is low. The flat signal, because the second terminal 1013 of the first switch 101 is connected to the lower end of the indicator light 103, so that the indicator light 103 is illuminated, and since the processor is not activated, the processor cannot control the indicator light 103 at this time. bright. That is, when the charger is inserted and the first device is not activated, the circuit composed of the first switch 101 and the first logic unit 102 causes the indicator light 103 to illuminate.

在充电器***，第一设备启动时，充电管理芯片发送的信号为低电平信号，第一设备发送的信号为低电平信号，由于第一反相器 1024的输入端为第一逻辑单元 102 的第二输入端 1022, 则第一反相器 1024 的输入端接收到充电管理芯片发送的信号为低电平信号，此时，由第一反相器 1024将接收到的信号进行非运算，则在第一反相器 1024 的输出端输出的信号为高电平信号，即为第一与门 1025 的一个输入端接收到的信号为高电平信号，又由于第一与门 1025的另一个输入端作为第一逻辑单元 102的第一输入端 1021, 则第一与门 1025的另一个输入端接收到第一设备发送的信号为低电平信号，进而第一与门 1025对两个输入端接收到的信号进行与运算，得出低电平信号，由于第一与门 1025的输出端为第一逻辑单元 102的第一输出端 1023, 则在第一逻辑单元 102 的输出端 1023 输出的信号为低电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102 的输出端 1023 输出的信号，即第一开关 101 的第一控制端 1011接收到的信号为低电平信号，则第一开关 101 断开。此时，第一开关 101 的第一端子 1012与第一开关 101 的第二端子 1013不连接，则第一开关 101 的第二端子 1013为高阻态，即由第一开关 101 及第一逻辑单元 102 组成的电路不能使得指示灯 103发亮，但此时由于处理器启动，则处理器发送的信号为低电平信号，又由于处理器与指示灯 103 的电位低的一端连接，从而可以由处理器控制指示灯 103 发亮。即在充电器***，第一设备启动时，由处理器发送的信号使得指示灯 103发亮。 When the charger is inserted, when the first device is started, the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a low level signal, because the input end of the first inverter 1024 is the first logic unit. The second input end 1022 of the first inverter 1024 receives the signal sent by the charging management chip as a low level signal. At this time, the first inverter 1024 performs the non-operation on the received signal. Then, the signal outputted at the output end of the first inverter 1024 is a high level signal, that is, the signal received by one input terminal of the first AND gate 1025 is a high level signal, and the first AND gate 1025 is The other input end is the first input end 1021 of the first logic unit 102, and the other input end of the first AND gate 1025 receives the signal sent by the first device as a low level signal, and then the first AND gate 1025 pairs The signals received at the input terminals are ANDed to obtain a low level signal. Since the output of the first AND gate 1025 is the first output terminal 1023 of the first logic unit 102, the output of the first logic unit 102 is at the output end of the first logic unit 102. 1023 output letter The first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101 is For the low level signal, the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic The circuit composed of the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, Controlled by the processor Light 103 is illuminated. That is, when the charger is inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.

在充电器未***，第一设备启动时，充电管理芯片发送的信号为高电平信号，第一设备发送的信号为低电平信号，由于第一反相器 1024 的输入端为第一逻辑单元 102 的第二输入端 1022, 则第一反相器 1024 的输入端接收到充电管理芯片发送的信号为高电平信号，此时，由第一反相器 1024将接收到的信号进行非运算，则在第一反相器 1024 的输出端输出的信号为低电平信号，即为第一与门 1025 的一端接收到的信号为低电平信号，又由于第一与门 1025 的另一个输入端作为第一逻辑单元 102的第一输入端 1021, 则第一与门 1025 的另一个输入端接收到第一设备发送的信号为低电平信号，进而第一与门 1025对两个输入端接收到的信号进行与运算，得出低电平信号，由于第一与门 1025 的输出端为第一逻辑单元 102 的输出端 1023, 则在第一逻辑单元 102 的输出端 1023 输出的信号为低电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102 的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011 接收到的信号为低电平信号，则第一开关 101 断开。此时，第一开关 101 的第一端子 1012与第一开关 101 的第二端子 1013 不连接，则第一开关 101 的第二端子 1013为高阻态，即由第一开关 101及第一逻辑单元 102组成的电路不能使得指示灯 103发亮，但此时由于处理器启动，则处理器发送的信号为低电平信号，又由于处理器与指示灯 103的电位低的一端连接，从而可以由处理器控制指示灯 103 发亮。即在充电器未***，第一设备启动时，由处理器发送的信号使得指示灯 103发亮。 When the charger is not inserted, when the first device is started, the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a low level signal, because the input end of the first inverter 1024 is the first logic The second input end 1022 of the unit 102 receives the signal sent by the charging management chip as a high level signal at the input end of the first inverter 1024. At this time, the received signal is not performed by the first inverter 1024. In operation, the signal outputted at the output of the first inverter 1024 is a low level signal, that is, the signal received at one end of the first AND gate 1025 is a low level signal, and the other is due to the first AND gate 1025. An input terminal is used as the first input terminal 1021 of the first logic unit 102, and the other input end of the first AND gate 1025 receives the signal sent by the first device as a low level signal, and then the first AND gate 1025 pairs the two The signal received at the input is ANDed to obtain a low level signal. Since the output of the first AND gate 1025 is the output 1023 of the first logic unit 102, the output of the first logic unit 102 The first output terminal 1011 of the first switch 101 receives the signal outputted from the output terminal 1023 of the first logic unit 102, that is, the first control terminal 1011 of the first switch 101 receives the signal. The signal is a low level signal, and the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic. The circuit formed by the unit 102 cannot make the indicator light 103 illuminate, but at this time, since the processor is started, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, The processor control indicator 103 is illuminated. That is, when the charger is not inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.

在充电器未***，第一设备未启动时，充电管理芯片发送的信号为高电平信号，第一设备发送的信号为高电平信号，由于第一反相器 1024 的输入端为第一逻辑单元 102 的第二输入端 1022, 则第一反相器 1024 的输入端接收到充电管理芯片发送的信号为高电平信号，此时，由第一反相器 1024将接收到的信号进行非运算，则在第一反相器 1024的输出端输出的信号为低电平信号，即为第一与门 1025 的一端接收到的信号为低电平信号，又由于第一与门 1025 的另一个输入端作为第一逻辑单元 102的第一输入端 1021, 则第一与门 1025 的另一个输入端接收到第一设备发送的信号为高电平信号，进而第一与门 1025对两个输入端接收到的信号进行与运算，得出低电平信号，由于第一与门 1025 的输出端为第一逻辑单元 102 的输出端 1023, 则在第一逻辑单元 102 的输出端 1023 输出的信号为低电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102 的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011 接收到的信号为低电平信号，则第一开关 101 断开。此时，第一开关 101 的第一端子 1012与第一开关 101 的第二端子 1013 不连接，则第一开关 101 的第二端子 1013为高阻态，即由第一开关 101及第一逻辑单元 102组成的电路不能使得指示灯 103发亮，且由于处理器未启动，则处理器发送的信号为高电平信号，又由于处理器与指示灯 103的电位低的一端连接，则处理器此时也不能控制指示灯 103 发亮。即在充电器未***，第一设备未启动时，由第一开关 101 及第一逻辑单元 102组成的电路及处理器均不能控制指示灯 103发亮。 When the charger is not inserted, the first device is not activated, the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a high level signal, since the input end of the first inverter 1024 is the first The second input end 1022 of the logic unit 102 receives the signal sent by the charging management chip as a high level signal at the input end of the first inverter 1024. At this time, the received signal is performed by the first inverter 1024. Non-operation, then The signal outputted from the output of the first inverter 1024 is a low level signal, that is, the signal received at one end of the first AND gate 1025 is a low level signal, and the other input of the first AND gate 1025 is The first input end 1021 of the first logic unit 102 receives the signal sent by the first device as a high level signal, and the first AND gate 1025 receives the two inputs. The signal is ANDed to obtain a low level signal. Since the output of the first AND gate 1025 is the output 1023 of the first logic unit 102, the signal outputted at the output 1023 of the first logic unit 102 is low. At the same time, the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101 is a low level signal. Then, the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic. The circuit composed by the unit 102 cannot make the indicator light 103 illuminate, and since the processor is not activated, the signal sent by the processor is a high level signal, and since the processor is connected to the lower end of the indicator light 103, the processor At this time, the control indicator 103 cannot be illuminated. That is, when the charger is not inserted and the first device is not activated, the circuit and the processor composed of the first switch 101 and the first logic unit 102 cannot control the indicator light 103 to illuminate.

在所述第一逻辑单元 102 包括第二反相器 1026 及第一与非门 1027 时，如图 5 所示，所述第二反相器 1026 的输出端与所述第一与非门 1027 的一个输入端连接。其中，所述第二反相器 1026 的输入端为所述第一逻辑单元 102 的第一输入端 1021, 所述第一与非门 1027的另一个输入端为所述第一逻辑单元 102的第二输入端 1022, 所述第一与非门 1027 的输出端为所述第一逻辑单元 102 的输出端 1023。 When the first logic unit 102 includes the second inverter 1026 and the first NAND gate 1027, as shown in FIG. 5, the output of the second inverter 1026 and the first NAND gate 1027 One input is connected. The input end of the second inverter 1026 is the first input end 1021 of the first logic unit 102, and the other input end of the first NAND gate 1027 is the first logic unit 102. The second input end 1022, the output end of the first NAND gate 1027 is the output end 1023 of the first logic unit 102.

也就是说，此时，定义第一设备启动时发送的信号为高电平信号，第一设备未启动时发送的信号为低电平信号；充电管理芯片在充电器***时发送的信号为高电平信号，充电管理芯片在充电器未 ***时发送的信号为低电平信号；第一开关 101 的第一控制端 1011 接收到高电平信号时断开，第一开关 101 的第一控制端 1011接收到低电平信号时闭合，则在充电器***，第一设备未启动时，充电管理芯片发送的信号为高电平信号，第一设备发送的信号为低电平信号，由于第二反相器 1026 的输入端为第一逻辑单元 102的第一输入端 1021, 则第二反相器 1026 接收到第一设备发送的信号为低电平信号，此时，由第二反相器 1026将接收到的信号进行非运算，则在第二反相器 1026的输出端输出的信号为高电平信号，即为第一与非门 1027 的一个输入端接收到的信号为高电平信号，又由于第一与非门 1027的另一个输入端作为第一逻辑单元 102的第二输入端 1022, 则第一与非门 1027 的另一个输入端接收到充电管理芯片发送的信号为高电平信号，进而第一与非门 1027对两个输入端接收到的信号进行与非运算，得出低电平信号，由于第一与非门 1027 的输出端为第一逻辑单元 102 的输出端 1023, 则在第一逻辑单元 102 的输出端 1023输出的信号为低电平信号，此时，第一开关 101 的第一控制端 1011 接收第一逻辑单元 102 的第一输出端 1023 输出的信号，即第一开关 101 的第一控制端 1011接收到的信号为低电平信号，则第一开关 101 闭合。则第一开关 101 的第一端子 1012与第一开关 101 的第二端子 1013连接，由于第一开关 101 的第一端子 1012接地，则第一开关 101 的第二端子 1013输出的信号为低电平信号，由于第一开关 101 的第二端子 1013与指示灯 103的电位低的一端连接，从而使得指示灯 103 发亮，又由于处理器未启动，则处理器此时不能控制指示灯 103 发亮。即在充电器***，第一设备未启动时，由第一开关 101及第一逻辑单元 102组成的电路使得指示灯 103发亮。 That is to say, at this time, it is defined that the signal sent when the first device is started is a high level signal, and the signal sent when the first device is not activated is a low level signal; the signal sent by the charging management chip when the charger is inserted is high. The level signal, the signal sent by the charging management chip when the charger is not inserted is a low level signal; the first control terminal 1011 of the first switch 101 is turned off when receiving the high level signal, and the first control of the first switch 101 End 1011 received When the low level signal is closed, when the charger is inserted, when the first device is not activated, the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a low level signal, due to the second inverter The input terminal of 1026 is the first input terminal 1021 of the first logic unit 102, and then the second inverter 1026 receives the signal sent by the first device as a low level signal, and at this time, the second inverter 1026 receives the signal. When the obtained signal is non-operating, the signal outputted at the output end of the second inverter 1026 is a high level signal, that is, the signal received by one input terminal of the first NAND gate 1027 is a high level signal, and Since the other input terminal of the first NAND gate 1027 serves as the second input terminal 1022 of the first logic unit 102, the other input terminal of the first NAND gate 1027 receives the signal sent by the charge management chip as a high level signal. And the first NAND gate 1027 performs a NAND operation on the signals received by the two input terminals to obtain a low level signal. Since the output end of the first NAND gate 1027 is the output end 1023 of the first logic unit 102, Then in the first logic The signal output from the output terminal 1023 of the element 102 is a low level signal. At this time, the first control terminal 1011 of the first switch 101 receives the signal output by the first output terminal 1023 of the first logic unit 102, that is, the signal of the first switch 101. The signal received by the first control terminal 1011 is a low level signal, and the first switch 101 is closed. The first terminal 1012 of the first switch 101 is connected to the second terminal 1013 of the first switch 101. Since the first terminal 1012 of the first switch 101 is grounded, the signal output by the second terminal 1013 of the first switch 101 is low. The flat signal, because the second terminal 1013 of the first switch 101 is connected to the lower end of the indicator light 103, so that the indicator light 103 is illuminated, and since the processor is not activated, the processor cannot control the indicator light 103 at this time. bright. That is, when the charger is inserted and the first device is not activated, the circuit composed of the first switch 101 and the first logic unit 102 causes the indicator light 103 to illuminate.

在充电器***，第一设备启动时，充电管理芯片发送的信号为高电平信号，第一设备发送的信号为高电平信号，由于第二反相器 1026的输入端为第一逻辑单元 102 的第一输入端 1021, 则第二反相器 1026接收到第一设备发送的信号为高电平信号，此时，由第二反相器 1026 将接收到的信号进行非运算，则在第二反相器 1026 的输出端输出的信号为低电平信号，即为第一与非门 1027的一个输入端接收到的信号为低电平信号，又由于第一与非门 1027的另一个输入端作为第一逻辑单元 102 的第二输入端 1022, 则第一与非门 1027 的另一个输入端接收到充电管理芯片发送的信号为高电平信号，进而第一与非门 1027对两个输入端接收到的信号进行与非运算，得出高电平信号，由于第一与非门 1027的输出端为第一逻辑单元 102 的输出端 1023, 则在第一逻辑单元 102 的输出端 1023 输出的信号为高电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102 的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011接收到的信号为高电平信号，则第一开关 101 断开。此时，第一开关 101 的第一端子 1012与第一开关 101 的第二端子 1013不连接，则第一开关 101 的第二端子 1013为高阻态，即由第一开关 101 及第一逻辑单元 102 组成的电路不能使得指示灯 103发亮，但此时由于处理器启动，则处理器发送的信号为低电平信号，又由于处理器与指示灯 103 的电位低的一端连接，从而可以由处理器控制指示灯 103 发亮。即在充电器***，第一设备启动时，由处理器发送的信号使得指示灯 103发亮。 When the charger is inserted, when the first device is started, the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a high level signal, because the input end of the second inverter 1026 is the first logic unit. The first input terminal 1021 of 102, the second inverter 1026 receives the signal sent by the first device as a high level signal, and at this time, the second inverter 1026 performs a non-operation on the received signal, then The signal outputted from the output of the second inverter 1026 is a low level signal, that is, the signal received by one input of the first NAND gate 1027 is a low level signal, and the other is due to the first NAND gate 1027. One input As the second input end 1022 of the first logic unit 102, the other input end of the first NAND gate 1027 receives the signal sent by the charge management chip as a high level signal, and then the first NAND gate 1027 pairs The signal received by the input terminal performs a NAND operation to obtain a high level signal. Since the output end of the first NAND gate 1027 is the output terminal 1023 of the first logic unit 102, the output terminal 1023 of the first logic unit 102 is at the output end 1023. The output signal is a high level signal. At this time, the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the first control terminal 1011 of the first switch 101 receives the signal. When the signal is a high level signal, the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic The circuit composed of the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, The processor control indicator 103 is illuminated. That is, when the charger is inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.

在充电器未***，第一设备启动时，充电管理芯片发送的信号为低电平信号，第一设备发送的信号为高电平信号，由于第二反相器 1026 的输入端为第一逻辑单元 102 的第一输入端 1021, 则第二反相器 1026接收到第一设备发送的信号为高电平信号，此时，由第二反相器 1026 将接收到的信号进行非运算，则在第二反相器 1026 的输出端输出的信号为低电平信号，即为第一与非门 027的一个输入端接收到的信号为低电平信号，又由于第一与非门 1027的另一个输入端作为第一逻辑单元 102 的第二输入端 1022, 则第一与非门 1027 的另一个输入端接收到充电管理芯片发送的信号为低电平信号，进而第一与非门 1027 对两个输入端接收到的信号进行与非运算，得出高电平信号，由于第一与非门 1027 的输出端为第一逻辑单元 102 的输出端 1023, 则在第一逻辑单元 102 的输出端 1023输出的信号为高电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102 的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011接收到的信号为高电平信号，则第一开关 101 断开。此时，第一开关 101 的第一端子 1012 与第一开关 101 的第二端子 1013 不连接，则第一开关 101 的第二端子 1013 为高阻态，即由第一开关 101 及第一逻辑单元 102组成的电路不能使得指示灯 103发亮，但此时由于处理器启动，则处理器发送的信号为低电平信号，又由于处理器与指示灯 103 的电位低的一端连接，从而可以由处理器控制指示灯 103 发亮。即在充电器未***，第一设备启动时，由处理器发送的信号使得指示灯 103发亮。 When the charger is not inserted, when the first device is started, the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a high level signal, because the input end of the second inverter 1026 is the first logic The first input terminal 1021 of the unit 102, the second inverter 1026 receives the signal sent by the first device as a high level signal, and at this time, the second inverter 1026 performs a non-operation on the received signal. The signal outputted at the output of the second inverter 1026 is a low level signal, that is, the signal received by one input of the first NAND gate 027 is a low level signal, and the first NAND gate 1027 The other input terminal is the second input end 1022 of the first logic unit 102, and the other input end of the first NAND gate 1027 receives the signal sent by the charging management chip as a low level signal, and then the first NAND gate 1027. Performing a NAND operation on the signals received by the two inputs to obtain a high level signal. Since the output of the first NAND gate 1027 is the output 1023 of the first logic unit 102, the first logic unit 102 Output 1023 output The signal is a high level signal. At this time, the first control terminal 1011 of the first switch 101 receives the signal output from the output terminal 1023 of the first logic unit 102, that is, the first switch 101 When the signal received by the control terminal 1011 is a high level signal, the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic The circuit formed by the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, The processor control indicator 103 is illuminated. That is, when the charger is not inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.

在充电器未***，第一设备未启动时，充电管理芯片发送的信号为低电平信号，第一设备发送的信号为低电平信号，由于第二反相器 1026 的输入端为第一逻辑单元 102 的第一输入端 1021, 则第二反相器 1026接收到第一设备发送的信号为低电平信号，此时，由第二反相器 1026将接收到的信号进行非运算，则在第二反相器 1026 的输出端输出的信号为高电平信号，即为第一与非门 ₁₀₂₇的一个输入端接收到的信号为高电平信号，又由于第一与非门 1027的另一个输入端作为第一逻辑单元 102 的第二输入端 1022, 则第一与非门 1027 的另一个输入端接收到充电管理芯片发送的信号为低电平信号，进而第一与非门 1027 对两个输入端接收到的信号进行与非运算，得出高电平信号，由于第一与非门 1027 的输出端为第一逻辑单元 102 的输出端 1023, 则在第一逻辑单元 102 的输出端 1023输出的信号为高电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102 的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011接收到的信号为高电平信号，则第一开关 101 断开。此时，第一开关 101 的第一端子 1012 与第一开关 101 的第二端子 1013 不连接，则第一开关 101 的第二端子 1013 为高阻态，即由第一开关 101 及第一逻辑单元 102组成的电路不能使得指示灯 103发亮，且由于处理器未启动，则处理器发送的信号为高电平信号，又由于处理器与指示灯 103 的电位低的一端连接，则处理器此时也不能控制指示灯 103 发亮。即在充电器未***，第一设备未启动时，由第一开关 101 及第一逻辑单元 102组成的电路及处理器均不能控制指示灯 103发亮。 When the charger is not inserted, the first device is not activated, the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a low level signal, because the input end of the second inverter 1026 is the first The first input 1021 of the logic unit 102, the second inverter 1026 receives the signal sent by the first device as a low level signal, and at this time, the second inverter 1026 performs a non-operation on the received signal. Then, the signal outputted at the output end of the second inverter 1026 is a high level signal, that is, the signal received by one input terminal of the first NAND gate ₁₀₂₇ is a high level signal, and the first NAND gate 1027 is The other input end of the first logic unit 102 is the second input end 1022 of the first logic unit 102, and the other input end of the first NAND gate 1027 receives the signal sent by the charge management chip as a low level signal, and then the first NAND gate 1027 performs a NAND operation on the signals received by the two inputs to obtain a high level signal. Since the output end of the first NAND gate 1027 is the output end 1023 of the first logic unit 102, the first logic unit 102 Output 1023 The signal is a high level signal. At this time, the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101. When it is a high level signal, the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic The circuit composed of the unit 102 cannot make the indicator light 103 illuminate, and since the processor is not activated, the signal sent by the processor is a high level signal, and since the processor is connected to the lower end of the indicator light 103, the processor At this time, the control indicator 103 cannot be illuminated. That is, when the charger is not inserted and the first device is not activated, The circuit and the processor composed of the first switch 101 and the first logic unit 102 cannot control the indicator light 103 to illuminate.

或者，如图 6所示，所述第二反相器 1026的输出端与所述第一与非门 1027 的一个输入端连接。其中，所述第二反相器 1026 的输入端为所述第一逻辑单元 102 的第二输入端 1022, 所述第一与非门 1027的另一个输入端为所述第一逻辑单元 102的第一输入端 1021, 所述第一与非门 1027 的输出端为所述第一逻辑单元 102 的输出端 1023。 Alternatively, as shown in FIG. 6, the output of the second inverter 1026 is coupled to an input of the first NAND gate 1027. The input end of the second inverter 1026 is the second input end 1022 of the first logic unit 102, and the other input end of the first NAND gate 1027 is the first logic unit 102. The first input end 1021, the output end of the first NAND gate 1027 is the output end 1023 of the first logic unit 102.

也就是说，此时，定义第一设备启动时发送的信号为低电平信号，第一设备未启动时发送的信号为高电平信号；充电管理芯片在充电器***时发送的信号为低电平信号，充电管理芯片在充电器未 ***时发送的信号为高电平信号；第一开关 101 的第一控制端 1011 接收到高电平信号时断开，第一开关 101 的第一控制端 1011接收到低电平信号时闭合，则在充电器***，第一设备未启动时，充电管理芯片发送的信号为低电平信号，第一设备发送的信号为高电平信号，由于第二反相器 1026 的输入端为第一逻辑单元 102的第二输入端 1022, 则第二反相器 1026 接收到充电管理芯片发送的信号为低电平信号，此时，由第二反相器 1026将接收到的信号进行非运算，则在第二反相器 1026的输出端输出的信号为高电平信号，即为第一与非门 1027的一个输入端接收到的信号为高电平信号，又由于第一与非门 1027 的另一个输入端作为第一逻辑单元 102 的第一输入端 1021, 则第一与非门 1027 的另一个输入端接收到第一设备发送的信号为高电平信号，进而第一与非门 1027对两个输入端接收到的信号进行与非运算，得出低电平信号，由于第一与非门 1027 的输出端为第一逻辑单元 102 的输出端 1023, 则在第一逻辑单元 102 的输出端 1023输出的第一逻辑信号为低电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102 的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011接收到的信号为低电平信号，则第一开关 101 闭合。则第一开关 101 的第一端子 1012 与第一开关 101 的第二端子 1013 连接，由于第一开关 101 的第一端子 1012接地，则第一开关 101 的第二端子 1013输出的信号为低电平信号，由于第一开关 101 的第二端子 1013 与指示灯 103 的电位低的一端连接，从而使得指示灯 103 发亮，又由于处理器未启动，则处理器此时不能控制指示灯 103发亮。即在充电器***，第一设备未启动时，由第一开关 101 及第一逻辑单元 102组成的电路使得指示灯 103发亮。 That is to say, at this time, it is defined that the signal sent when the first device is started is a low level signal, and the signal sent when the first device is not activated is a high level signal; the signal sent by the charging management chip when the charger is inserted is low. The level signal, the signal sent by the charging management chip when the charger is not inserted is a high level signal; the first control terminal 1011 of the first switch 101 is turned off when receiving the high level signal, and the first control of the first switch 101 When the terminal 1011 is closed when receiving the low level signal, when the charger is inserted, when the first device is not activated, the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a high level signal, due to the The input end of the second inverter 1026 is the second input end 1022 of the first logic unit 102, and the second inverter 1026 receives the signal sent by the charge management chip as a low level signal, at this time, by the second inversion. The device 1026 performs a non-operation on the received signal, and the signal outputted at the output of the second inverter 1026 is a high level signal, that is, the signal received at one input of the first NAND gate 1027 is high. The level signal, and because the other input end of the first NAND gate 1027 is the first input terminal 1021 of the first logic unit 102, the other input terminal of the first NAND gate 1027 receives the signal sent by the first device. A high level signal, and then the first NAND gate 1027 performs a NAND operation on the signals received by the two input terminals to obtain a low level signal, since the output end of the first NAND gate 1027 is the first logic unit 102. The output terminal 1023, then the first logic signal outputted at the output terminal 1023 of the first logic unit 102 is a low level signal. At this time, the first control terminal 1011 of the first switch 101 receives the output end of the first logic unit 102. The signal outputted by 1023, that is, the signal received by the first control terminal 1011 of the first switch 101 is a low level signal, and the first switch 101 is closed. Then the first terminal 1012 of the first switch 101 and the first switch The second terminal 1013 of the 101 is connected. Since the first terminal 1012 of the first switch 101 is grounded, the signal output by the second terminal 1013 of the first switch 101 is a low level signal, because the second terminal 1013 of the first switch 101 is The low potential end of the indicator light 103 is connected, so that the indicator light 103 is illuminated, and since the processor is not activated, the processor cannot control the indicator light 103 to illuminate at this time. That is, when the charger is inserted and the first device is not activated, the circuit composed of the first switch 101 and the first logic unit 102 causes the indicator light 103 to illuminate.

在充电器***，第一设备启动时，充电管理芯片发送的信号为低电平信号，第一设备发送的信号为低电平信号，由于第二反相器 1026的输入端为第一逻辑单元 102 的第二输入端 1022, 则第二反相器 1026接收到充电管理芯片发送的信号为低电平信号，此时，由第二反相器 1026 将接收到的信号进行非运算，则在第二反相器 1026 的输出端输出的信号为高电平信号，即为第一与非门 ₁₀₂₇的一个输入端接收到的信号为高电平信号，又由于第一与非门 1027的另一个输入端作为第一逻辑单元 102 的第一输入端 1021, 则第一与非门 1027的另一个输入端接收到第一设备发送的信号为低电平信号，进而第一与非门 1027对两个输入端接收到的信号进行与非运算，得出高电平信号，由于第一与非门 1027的输出端为第一逻辑单元 102 的输出端 1023, 则在第一逻辑单元 102 的输出端 1023 输出的信号为高电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102 的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011接收到的信号为高电平信号，则第一开关 101 断开。此时，第一开关 101 的第一端子 1012与第一开关 101 的第二端子 1013不连接，则第一开关 101 的第二端子 1013为高阻态，即由第一开关 101 及第一逻辑单元 102 组成的电路不能使得指示灯 103发亮，但此时由于处理器启动，则处理器发送的信号为低电平信号，又由于处理器与指示灯 103 的电位低的一端连接，从而可以由处理器控制指示灯 103 发亮。即在充电器***，第一设备启动时，由处理器发送的信号使得指示灯 103发亮。在充电器未***，第一设备启动时，充电管理芯片发送的信号为高电平信号，第一设备发送的信号为低电平信号，由于第二反相器 1026 的输入端为第一逻辑单元 102 的第二输入端 1022, 则第二反相器 1026接收到充电管理芯片发送的信号为高电平信号，此时，由第二反相器 1026 将接收到的信号进行非运算，则在第二反相器 1026 的输出端输出的信号为低电平信号，即为第一与非门 1027 的一个输入端接收到的信号为低电平信号，又由于第一与非门 1027的另一个输入端作为第一逻辑单元 102的第一输入端 1021, 则第一与非门 1027 的另一个输入端接收到第一设备发送的信号为低电平信号，进而第一与非门 1027 对两个输入端接收到的信号进行与非运算，得出高电平信号，由于第一与非门 1027 的输出端为第一逻辑单元 102 的输出端 1023, 则在第一逻辑单元 102 的输出端 1023输出的信号为高电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011接收到的信号为高电平信号，则第一开关 101 断开。此时，第一开关 101 的第一端子 1012 与第一开关 101 的第二端子 1013 不连接，则第一开关 101 的第二端子 1013 为高阻态，即由第一开关 101 及第一逻辑单元 102组成的电路不能使得指示灯 103发亮，但此时由于处理器启动，则处理器发送的信号为低电平信号，又由于处理器与指示灯 103 的电位低的一端连接，从而可以由处理器控制指示灯 103 发亮。即在充电器未***，第一设备启动时，由处理器发送的信号使得指示灯 103发亮。 When the charger is inserted, when the first device is started, the signal sent by the charging management chip is a low level signal, and the signal sent by the first device is a low level signal, because the input end of the second inverter 1026 is the first logic unit. The second input terminal 1022 of the second inverter 1026 receives the signal sent by the charge management chip as a low level signal. At this time, the second inverter 1026 performs a non-operation on the received signal. The signal outputted from the output of the second inverter 1026 is a high level signal, that is, the signal received by one input terminal of the first NAND gate ₁₀₂₇ is a high level signal, and the other is due to the first NAND gate 1027. An input terminal is used as the first input terminal 1021 of the first logic unit 102, and the other input terminal of the first NAND gate 1027 receives the signal sent by the first device as a low level signal, and then the first NAND gate 1027 The signals received by the two inputs are NANDed to obtain a high level signal. Since the output of the first NAND gate 1027 is the output 1023 of the first logic unit 102, the output of the first logic unit 102. Output from terminal 1023 The signal is a high level signal. At this time, the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101 is When the signal is high, the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic The circuit composed of the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, The processor control indicator 103 is illuminated. That is, when the charger is inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate. When the charger is not inserted, when the first device is started, the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a low level signal, because the input end of the second inverter 1026 is the first logic The second input terminal 1022 of the unit 102 receives the signal sent by the charging management chip as a high level signal. At this time, the second inverter 1026 performs a non-operation on the received signal. The signal outputted at the output of the second inverter 1026 is a low level signal, that is, the signal received by one input of the first NAND gate 1027 is a low level signal, and the first NAND gate 1027 The other input end is the first input end 1021 of the first logic unit 102, and the other input end of the first NAND gate 1027 receives the signal sent by the first device as a low level signal, and then the first NAND gate 1027 Performing a NAND operation on the signals received by the two inputs to obtain a high level signal. Since the output of the first NAND gate 1027 is the output 1023 of the first logic unit 102, the first logic unit 102 Output 1023 loss The signal is a high level signal. At this time, the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101. When it is a high level signal, the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic The circuit formed by the unit 102 cannot make the indicator light 103 illuminate, but at this time, due to the startup of the processor, the signal sent by the processor is a low level signal, and since the processor is connected to the lower end of the indicator light 103, The processor control indicator 103 is illuminated. That is, when the charger is not inserted and the first device is activated, the signal sent by the processor causes the indicator light 103 to illuminate.

在充电器未***，第一设备未启动时，充电管理芯片发送的信号为高电平信号，第一设备发送的信号为高电平信号，由于第二反相器 1026 的输入端为第一逻辑单元 102 的第二输入端 1022, 则第二反相器 1026 接收到充电管理芯片发送的信号为高电平信号，此时，由第二反相器 1026将接收到的信号进行非运算，则在第二反相器 1026 的输出端输出的信号为低电平信号，即为第一与非门 1027 的一个输入端接收到的信号为低电平信号，又由于第一与非门 1027 的另一个输入端作为第一逻辑单元 102的第一输入端 1021, 则第一与非门 1027 的另一个输入端接收到第一设备发送的信号为高电平信号，进而第一与非门 1027对两个输入端接收到的信号进行与非运算，得出高电平信号，由于第一与非门 1027 的输出端为第一逻辑单元 102 的输出端 1023, 则在第一逻辑单元 102 的输出端 1023输出的信号为高电平信号，此时，第一开关 101 的第一控制端 1011接收第一逻辑单元 102 的输出端 1023输出的信号，即第一开关 101 的第一控制端 1011接收到的信号为高电平信号，则第一开关 101 断开。此时，第一开关 101 的第一端子 1012 与第一开关 101 的第二端子 1013 不连接，则第一开关 101 的第二端子 1013 为高阻态，即由第一开关 101 及第一逻辑单元 102组成的电路不能使得指示灯 103发亮，且由于处理器未启动，则处理器发送的信号为高电平信号，又由于处理器与指示灯 103 的电位低的一端连接，则处理器此时也不能控制指示灯 103 发亮。即在充电器未***，第一设备未启动时，由第一开关 101 及第一逻辑单元 102组成的电路及处理器均不能控制指示灯 103发亮。 When the charger is not inserted, the first device is not activated, the signal sent by the charging management chip is a high level signal, and the signal sent by the first device is a high level signal, since the input end of the second inverter 1026 is the first The second input 1022 of the logic unit 102 receives the signal sent by the charge management chip as a high level signal. At this time, the second inverter 1026 performs a non-operation on the received signal. Then, the signal outputted at the output end of the second inverter 1026 is a low level signal, that is, the signal received by one input terminal of the first NAND gate 1027 is a low level signal, and the first NAND gate 1027 is The other input end of the first logic unit 102 is the first input end 1021 of the first logic unit 102, and the other input end of the first NAND gate 1027 receives the signal sent by the first device as a high level signal, and then the first NAND gate 1027 performs a NAND operation on the signals received by the two input terminals to obtain a high level signal. Since the output end of the first NAND gate 1027 is the output end 1023 of the first logic unit 102, the first logic unit 102 The output signal of the output terminal 1023 is a high level signal. At this time, the first control terminal 1011 of the first switch 101 receives the signal outputted by the output terminal 1023 of the first logic unit 102, that is, the first control end of the first switch 101. When the signal received by 1011 is a high level signal, the first switch 101 is turned off. At this time, the first terminal 1012 of the first switch 101 is not connected to the second terminal 1013 of the first switch 101, and the second terminal 1013 of the first switch 101 is in a high impedance state, that is, the first switch 101 and the first logic The circuit composed of the unit 102 cannot make the indicator light 103 illuminate, and since the processor is not activated, the signal sent by the processor is a high level signal, and since the processor is connected to the lower end of the indicator light 103, the processor At this time, the control indicator 103 cannot be illuminated. That is, when the charger is not inserted and the first device is not activated, the circuit and the processor composed of the first switch 101 and the first logic unit 102 cannot control the indicator light 103 to illuminate.

在所述第一逻辑单元 102 包括第二开关 1028, 第一电阻 1029，及第二电阻 10210时，如图 7所示，所述第二开关 1028 包括第二控制端，第三端子及第四端子；所述第二开关 1028的所述第二控制端为所述第一逻辑单元 102 的第一输入端 1021, 所述第二开关 1028 的所述第三端子接地，所述第二开关 1028 的所述第四端子为所述第一逻辑单元 102 的输出端 1023, 所述第二开关 1028 的所述第四端子与所述第一电阻 1029 的一端连接，所述第一电阻 1029 的另一端作为所述第一逻辑单元 102的第二输入端 1022,所述第二电阻 10210 的一端与所述第一电阻 1029 的一端连接，所述第二电阻 10210的另一端接地。 When the first logic unit 102 includes the second switch 1028, the first resistor 1029, and the second resistor 10210, as shown in FIG. 7, the second switch 1028 includes a second control terminal, a third terminal, and a fourth terminal. The second control terminal of the second switch 1028 is the first input end 1021 of the first logic unit 102, the third terminal of the second switch 1028 is grounded, and the second switch 1028 The fourth terminal is the output end 1023 of the first logic unit 102, the fourth terminal of the second switch 1028 is connected to one end of the first resistor 1029, and the first resistor 1029 is another One end is the second input end 1022 of the first logic unit 102, one end of the second resistor 10210 is connected to one end of the first resistor 1029, and the other end of the second resistor 10210 is grounded.

进一步的，如图 8 所示，所述指示灯控制电路还包括：第一电容 104及第三电阻 105。 Further, as shown in FIG. 8, the indicator light control circuit further includes: a first capacitor 104 and a third resistor 105.

所述第一电容 104 的一端与所述第一逻辑单元 102 的第一输入端 1021连接，所述第一电容 104 的另一端接地，所述第三电阻 105 的一端与所述第一开关 101 的所述第一端子 1012连接，所述第三电阻的 105另一端接地。 One end of the first capacitor 104 and the first input of the first logic unit 102 The other end of the first capacitor 104 is connected to the ground, the other end of the third resistor 105 is connected to the first terminal 1012 of the first switch 101, and the other end of the third resistor 105 is grounded.

需要说明的是，在图 7 中，第一开关 101与第二开关 1028均为 N-MOSFET ( N-Me t a 1 -Ox i de-Sem i conduc t or Field - Effect Transistor, N沟道-金属氧化物半导体场效晶体管），指示灯 103为发光二极管。 It should be noted that, in FIG. 7, the first switch 101 and the second switch 1028 are both N-MOSFETs (N-Me ta 1 -Ox i de-Sem i conduc t or Field - Effect Transistor, N-channel-metal The oxide semiconductor field effect transistor), the indicator light 103 is a light emitting diode.

具体的，图 7所示的指示灯控制电路的工作原理为：此时，定义第一设备启动时发送的信号为高电平信号，第一设备未启动时发送的信号为低电平信号；充电管理芯片在充电器***时发送的信号为高电平信号，充电管理芯片在充电器未***时发送的信号为低电平信号；第一开关 101的第一控制端 1011接收到高电平信号时闭合，第一开关 101 的第一控制端 1011接收到低电平信号时断开，则在充电器***，第一设备未启动时，充电管理芯片提供的电压通过第一逻辑单元 102 的第二输入端 1022 输入至第一电阻 1029, 经第一电阻 1029与第二电阻 10210分压，由于第一设备未启动，则第一逻辑单元 102 的第一输入端 1021接收到的信号为低电平信号，即第二开关 1028的第一控制端接收到的信号为低电平信号，则第二开关 1028 的第四端子为高阻态，从而充电管理芯片提供的电压经第一电阻 1029 与第二电阻 10210 分压后在第一逻辑单元 102 的输出端 1023 输出，即第一开关 101 的第一控制端 1011接收到的信号为高电平信号，由于第一开关 101 的第一端子 1012通过第三电阻 105接地，则第一开关 101的第一控制端 1011的电压大于第一开关 101的第一端子 1012 的电压，从而使得第一开关 101导通，则第一开关 101 的第二端子 1013与第一开关 101 的第一端子 1012接通，即第一开关 101 的第二端子 1013输出的信号为低电平信号，由于第一开关 101 的第二端子 1013 与指示灯 103 的电位低的一端连接，从而使得指示灯 103发亮，又由于处理器未启动，则处理器此时不能控制指示灯 103 发亮。即在充电器***，第一设备未启动时，由第一开关 101 及第一逻辑单元 102组成的电路使得指示灯 103发亮。 Specifically, the working principle of the indicator light control circuit shown in FIG. 7 is: At this time, the signal sent when the first device is started is defined as a high level signal, and the signal sent when the first device is not started is a low level signal; The signal sent by the charging management chip when the charger is inserted is a high level signal, and the signal sent by the charging management chip when the charger is not inserted is a low level signal; the first control end 1011 of the first switch 101 receives the high level When the signal is closed, the first control terminal 1011 of the first switch 101 is turned off when receiving the low level signal, and when the charger is inserted, when the first device is not activated, the voltage provided by the charge management chip passes through the first logic unit 102. The second input terminal 1022 is input to the first resistor 1029, and is divided by the first resistor 1029 and the second resistor 10210. Since the first device is not activated, the signal received by the first input terminal 1021 of the first logic unit 102 is low. The level signal, that is, the signal received by the first control terminal of the second switch 1028 is a low level signal, and the fourth terminal of the second switch 1028 is in a high impedance state, thereby being provided by the charge management chip. The voltage is divided by the first resistor 1029 and the second resistor 10210 and outputted at the output end 1023 of the first logic unit 102, that is, the signal received by the first control terminal 1011 of the first switch 101 is a high level signal, due to the first The first terminal 1012 of the switch 101 is grounded through the third resistor 105, and the voltage of the first control terminal 1011 of the first switch 101 is greater than the voltage of the first terminal 1012 of the first switch 101, so that the first switch 101 is turned on. The second terminal 1013 of the first switch 101 is connected to the first terminal 1012 of the first switch 101, that is, the signal output by the second terminal 1013 of the first switch 101 is a low level signal, due to the second terminal of the first switch 101. 1013 is connected to the lower end of the indicator light 103, so that the indicator light 103 is illuminated, and since the processor is not activated, the processor cannot control the indicator light 103 to illuminate at this time. That is, when the charger is inserted and the first device is not activated, the first switch 101 and the first A circuit consisting of a logic unit 102 causes the indicator light 103 to illuminate.

在充电器***，第一设备启动时，充电管理芯片提供的电压通过第一逻辑单元 102 的第二输入端 1022 输入至第一电阻 1029, 经第一电阻 1029与第二电阻 10210分压，由于第一设备启动，则第一逻辑单元 102 的第一输入端 1021接收到的信号为高电平信号，即第二开关 1028的第一控制端接收到的信号为高电平信号，则第二开关 1028 的第四端子与第二开关 1028 的第一端子连通，由于第二开关 1028 的第一端子接地，则第二开关 1028 的第二端子输出的信号为低电平信号，则第一开关 101 的第一控制端 1011接收到的第三控制信号为低电平信号，则第一开关 101 的第二端子 1013 与第一开关 101 的第一端子 1012 不接通，第一开关 101 断开，即第一开关 101 的第二端子为高阻态，即由第一开关 101 及第一逻辑单元 102 组成的电路不能使得指示灯 103 发亮，但此时由于处理器启动，则处理器发送的信号为低电平信号，又由于处理器与指示灯 103 的电位低的一端连接，从而可以由处理器控制指示灯 103 发亮。即在充电器 ***，第一设备启动时，由处理器发送的信号使得指示灯 103发亮。 When the charger is inserted, the voltage provided by the charge management chip is input to the first resistor 1029 through the second input terminal 1022 of the first logic unit 102, and is divided by the first resistor 1029 and the second resistor 10210. When the first device is started, the signal received by the first input end 1021 of the first logic unit 102 is a high level signal, that is, the signal received by the first control end of the second switch 1028 is a high level signal, and then the second The fourth terminal of the switch 1028 is in communication with the first terminal of the second switch 1028. Since the first terminal of the second switch 1028 is grounded, the signal output by the second terminal of the second switch 1028 is a low level signal, and the first switch The third control signal received by the first control terminal 1011 of the 101 is a low level signal, and the second terminal 1013 of the first switch 101 is not connected to the first terminal 1012 of the first switch 101, and the first switch 101 is disconnected. That is, the second terminal of the first switch 101 is in a high impedance state, that is, the circuit composed of the first switch 101 and the first logic unit 102 cannot make the indicator light 103 illuminate, but at this time The processor starts processing a signal sent by a low level signal, and the potential due to the low end of the indicator 103 is connected to the processor so that the indicator lights 103 may be controlled by the processor. That is, when the charger is plugged in, the signal sent by the processor causes the indicator light 103 to illuminate when the first device is activated.

在充电器未***，第一设备启动时，充电管理芯片提供的电压为零，由于第一设备启动，则第一逻辑单元 102的第一输入端 1021 接收到的信号为高电平信号，即第二开关 1028的第一控制端接收到的信号为高电平信号，则第二开关 1028的第四端子与第二开关 1028 的第一端子连通，由于第二开关 1028的第一端子接地，则第二开关 1028的第二端子输出的信号为低电平信号，则第一开关 101 的第一控制端 1011接收到的信号为低电平信号，则第一开关 101 的第二端子 1013与第一开关 101 的第一端子 1012 不接通，第一开关 101 断开，即第一开关 101 的第二端子为高阻态，即由第一开关 101 及第一逻辑单元 102组成的电路不能使得指示灯 103发亮，但此时由于处理器启动，则处理器发送的信号为低电平信号，又由于处理器与指示灯 103的电位低的一端连接，从而可以由处理器控制指示灯 103 发亮。即在充电器未***，第一设备启动时，由处理器发送的信号使得指示灯 103发亮。 When the charger is not inserted, when the first device is started, the voltage provided by the charging management chip is zero. Since the first device is activated, the signal received by the first input terminal 1021 of the first logic unit 102 is a high level signal, that is, The signal received by the first control terminal of the second switch 1028 is a high level signal, and the fourth terminal of the second switch 1028 is in communication with the first terminal of the second switch 1028. Since the first terminal of the second switch 1028 is grounded, Then, the signal output by the second terminal of the second switch 1028 is a low level signal, and the signal received by the first control terminal 1011 of the first switch 101 is a low level signal, and the second terminal 1013 of the first switch 101 is The first terminal 1012 of the first switch 101 is not turned on, and the first switch 101 is turned off, that is, the second terminal of the first switch 101 is in a high impedance state, that is, the circuit composed of the first switch 101 and the first logic unit 102 cannot The indicator light 103 is illuminated, but at this time, the processor sends a signal that is a low level signal, and the processor is connected to the lower end of the indicator light 103, so that it can be controlled by the processor. Lamp 103 lights up. That is, when the charger is not inserted, the signal sent by the processor when the first device is started The indicator light 103 is illuminated.

在充电器未***，第一设备未启动时，充电管理芯片提供的电压为零，由于第一设备未启动，则第一逻辑单元 102 的第一输入端 1021 接收到的信号为低电平信号，即第二开关 1028 的第一控制端接收到的信号为低电平信号，则第二开关 1028的第四端子与第二开关 1028 的第一端子不连通，则第二开关 1028 的第二端子为高阻态，则第一开关 101 的第一控制端 1011接收到的信号为高阻态信号，则第一开关 101 的第二端子 1013与第一开关 101 的第一端子 1012 不接通，第一开关 101 断开，即第一开关 101 的第二端子为高阻态，即由第一开关 101 及第一逻辑单元 102组成的电路不能使得指示灯 103 发亮，且由于处理器未启动，则处理器发送的信号为高电平信号，又由于处理器与指示灯 103 的电位低的一端连接，则处理器此时也不能控制指示灯 103 发亮。即在充电器未***，第一设备未启动时，指示灯 103不发亮。 When the charger is not inserted, and the first device is not activated, the voltage provided by the charging management chip is zero. Since the first device is not activated, the signal received by the first input terminal 1021 of the first logic unit 102 is a low level signal. That is, the signal received by the first control terminal of the second switch 1028 is a low level signal, and the fourth terminal of the second switch 1028 is not connected to the first terminal of the second switch 1028, and the second switch 1028 is second. When the terminal is in a high-resistance state, the signal received by the first control terminal 1011 of the first switch 101 is a high-resistance signal, and the second terminal 1013 of the first switch 101 is not connected to the first terminal 1012 of the first switch 101. The first switch 101 is turned off, that is, the second terminal of the first switch 101 is in a high impedance state, that is, the circuit composed of the first switch 101 and the first logic unit 102 cannot make the indicator light 103 illuminate, and since the processor is not When it is started, the signal sent by the processor is a high level signal, and since the processor is connected to the lower end of the indicator light 103, the processor cannot control the indicator light 103 to illuminate at this time. That is, when the charger is not inserted and the first device is not activated, the indicator light 103 is not illuminated.

可选的，第一逻辑单元 102 的第一输入端 1021 还可以连接处理器的输入 /输出端口，在处理器未启动时，输入 /输出端口的初始状态为低电平，当处理器启动时，由应用程序控制输入 /输出端口，使得输入 /输出端口的电平信号为高电平信号，则同样可以使得第二开关 1028 闭合，第一开关 101 断开。具体的，使得第二开关 1028 闭合，第一开关 101 断开的过程可参考上述对图 7 所示的指示灯控制电路的说明，本发明在此不再赘述。 Optionally, the first input end 1021 of the first logic unit 102 can also be connected to an input/output port of the processor. When the processor is not started, the initial state of the input/output port is a low level, when the processor is started. The input/output port is controlled by the application such that the level signal of the input/output port is a high level signal, and the second switch 1028 can be closed as well, and the first switch 101 is turned off. Specifically, the second switch 1028 is closed, and the process of disconnecting the first switch 101 can refer to the description of the indicator control circuit shown in FIG. 7 , and the details are not described herein again.

需要说明的是，第一逻辑单元 102 的电路的设计还可以是其他方法，本发明对此不做限制。 It should be noted that the design of the circuit of the first logic unit 102 may also be other methods, which are not limited in the present invention.

需要说明的是，本发明适用于电池电源处于过放电状态的场景，即当电池电源处于过放电状态时，电池电源提供给电源管理芯片的电压不能够使得电源管理芯片启动，此时，釆用充电管理芯片对电池电源进行充电，当电池电源的电压达到电源管理芯片启动的电压时，电源管理芯片启动，进而使得处理器启动。即在充电器刚*** 时，电源管理芯片无法启动，在充电器***一段时间后，使得电池电源的电压达到电源管理芯片启动的电压时，电源管理芯片启动，进而使得处理器启动。 It should be noted that the present invention is applicable to a scenario where the battery power source is in an over-discharge state, that is, when the battery power source is in an over-discharge state, the voltage supplied from the battery power source to the power management chip cannot enable the power management chip to be activated. The charging management chip charges the battery power. When the voltage of the battery power reaches the voltage of the power management chip, the power management chip starts, and the processor is started. That is, when the charger is just inserted, the power management chip cannot be started, and after the charger is inserted for a period of time, the battery is made When the voltage of the power supply reaches the voltage of the power management chip, the power management chip is started, and the processor is started.

可选的，所述第一开关 101 及所述第二开关 1028 均为 M0SFET Optionally, the first switch 101 and the second switch 1028 are both MOSFETs

(Me tal-Oxide- Semiconductor— Field-EffectTransistor, 金属一氧化物 -半导体-场效晶体管），所述指示灯为发光二极管。 (Metal-Oxide-Semiconductor-Field-Effect Transistor, Metal Oxide-Semiconductor-Field Effect Transistor), the indicator light is a light-emitting diode.

需要说明的是，所述第一开关 101及所述第二开关 1028还可以是除金属-氧化层-半导体 -场效晶体管之外的其他的半导体开关器件，如三极管， IGBT ( Insulated Gate Bipolar Transistor, 绝缘栅双极型晶体管），本发明对此不做限制。 It should be noted that the first switch 101 and the second switch 1028 may also be semiconductor switching devices other than metal-oxide-semiconductor field effect transistors, such as a triode, an IGBT (Insulated Gate Bipolar Transistor). Insulated gate bipolar transistor), the invention is not limited thereto.

本发明实施例提供了一种指示灯控制电路，包括：第一开关，第一逻辑单元及指示灯，第一逻辑单元的第一输入端用于接收第一设备发送的信号，第一逻辑单元的第二输入端用于接收充电管理芯片发送的信号，进而第一逻辑单元对接收到的信号进行运算，并将运算结果在第一逻辑单元的输出端输出，从而可以根据第一逻辑单元的输出端输出的信号来控制第一开关的状态，即在充电管理芯片工作，且第一设备不工作时，第一逻辑单元的输出端输出的信号控制第一开关闭合，则指示灯发亮；在第一设备工作时，第一逻辑单元的输出端输出的信号控制第一开关断开，此时，由直接与指示灯相连的处理器控制指示灯发亮，从而实现了在便携式移动设备的处理器无法正常启动时，控制指示灯发亮，提高用户体验。 An embodiment of the present invention provides an indicator light control circuit, including: a first switch, a first logic unit, and an indicator light, wherein the first input end of the first logic unit is configured to receive a signal sent by the first device, where the first logic unit is The second input end is configured to receive a signal sent by the charging management chip, and the first logic unit performs an operation on the received signal, and outputs the operation result at an output end of the first logic unit, thereby being The signal outputted by the output terminal controls the state of the first switch, that is, when the charging management chip operates, and the first device does not work, the signal outputted by the output end of the first logic unit controls the first switch to be closed, and the indicator light is illuminated; When the first device is in operation, the signal outputted by the output of the first logic unit controls the first switch to be turned off. At this time, the processor control indicator light directly connected to the indicator light is illuminated, thereby realizing the operation of the portable mobile device. When the processor fails to start properly, the control indicator lights up to improve the user experience.

本发明实施例提供了一种电子设备，包括指示灯控制电路。所述指示灯控制电路为上述实施例所述的任一种指示灯控制电路。 Embodiments of the present invention provide an electronic device, including an indicator light control circuit. The indicator light control circuit is any one of the indicator light control circuits described in the above embodiments.

本发明实施例提供了一种电子设备，该电子设备包括指示灯控制电路。所述指示灯控制电路包括：第一开关，第一逻辑单元及指示灯，第一逻辑单元的第一输入端用于接收第一设备发送的信号，第一逻辑单元的第二输入端用于接收充电管理芯片发送的信号，进而第一逻辑单元对接收到的信号进行运算，并将运算结果在第一逻辑单元的输出端输出，从而可以根据第一逻辑单元的输出端输出的信号来控制第一开关的状态，即在充电管理芯片工作，且第一设备不工作时，第一逻辑单元的输出端输出的信号控制第一开关闭合，则指示灯发亮；在第一设备工作时，第一逻辑单元的输出端输出的信号控制第一开关断开，此时，由直接与指示灯相连的处理器控制指示灯发亮，从而实现了在便携式移动设备的处理器无法正常启动时，控制指示灯发亮，提高用户体验。 Embodiments of the present invention provide an electronic device including an indicator light control circuit. The indicator light control circuit includes: a first switch, a first logic unit and an indicator light, a first input end of the first logic unit is configured to receive a signal sent by the first device, and a second input end of the first logic unit is used to Receiving a signal sent by the charging management chip, and then the first logic unit operates on the received signal, and outputs the operation result at an output end of the first logic unit, thereby being outputtable according to the output end of the first logic unit The signal controls the state of the first switch, that is, when the charging management chip operates, and the first device does not work, the signal outputted by the output end of the first logic unit controls the first switch to be closed, and the indicator light is illuminated; During operation, the signal outputted by the output of the first logic unit controls the first switch to be turned off. At this time, the processor control indicator light directly connected to the indicator light is illuminated, thereby realizing that the processor in the portable mobile device cannot be normal. When activated, the control indicator lights up to improve the user experience.

在本申请所提供的几个实施例中，应该理解到，所揭露的***，装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个***，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。 In the several embodiments provided by the present application, it should be understood that the disclosed system, apparatus, and method may be implemented in other manners. For example, the device embodiments described above are merely illustrative. For example, the division of the unit is only a logical function division. In actual implementation, there may be another division manner, for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not executed. In addition, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be electrical, mechanical or otherwise.

所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。 The units described as separate components may or may not be physically separated, and the components displayed as the units may or may not be physical units, and may be located in one place or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the embodiment of the present embodiment.

另外，在本发明各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理包括，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以釆用硬件的形式实现，也可以釆用硬件加软件功能单元的形式实现。 In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may be physically included separately, or two or more units may be integrated into one unit. The above integrated unit can be implemented in the form of hardware or in the form of hardware plus software functional units.

最后应说明的是：以上实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的精神和范围。 It should be noted that the above embodiments are only for explaining the technical solutions of the present invention, and are not intended to be limiting; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art that: The technical solutions described in the foregoing embodiments are modified, or some of the technical features are equivalently replaced. The modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

权利要求书 claims

1、一种指示灯控制电路，其特征在于，包括：第一开关，第一逻辑单元及指示灯； 1. An indicator light control circuit, characterized in that it includes: a first switch, a first logic unit and an indicator light;

所述第一逻辑单元的第一输入端和第二输入端分别连接第一设备和充电管理芯片，所述第一设备包括处理器或电源管理芯片；所述第一开关连接在所述第一逻辑单元的输出端和所述指示灯之间； The first input terminal and the second input terminal of the first logic unit are respectively connected to a first device and a charging management chip. The first device includes a processor or a power management chip; the first switch is connected to the first switch. Between the output of the logic unit and the indicator light;

所述指示灯还与处理器直接相连； The indicator light is also directly connected to the processor;

所述第一逻辑单元用于根据所述第一设备和所述充电管理芯片的工作状态控制所述第一开关断开或闭合；在所述充电管理芯片工作，且所述第一设备不工作时，所述第一逻辑单元控制所述第一开关闭合；在所述第一设备工作时，所述第一逻辑单元控制所述第一开关断开。 The first logic unit is used to control the first switch to open or close according to the working status of the first device and the charging management chip; when the charging management chip is working and the first device is not working When, the first logic unit controls the first switch to close; when the first device is working, the first logic unit controls the first switch to open.

2、根据权利要求 1所述的电路，其特征在于， 2. The circuit according to claim 1, characterized in that,

所述第一开关包括：第一控制端，第一端子及第二端子；所述第一开关连接在所述第一逻辑单元的输出端和所述指示灯之间包括： The first switch includes: a first control terminal, a first terminal and a second terminal; the first switch is connected between the output terminal of the first logic unit and the indicator light and includes:

所述第一开关的所述第一控制端与所述第一逻辑单元的输出端连接；所述第一开关的所述第一端子接地；所述第一开关的所述第二端子与所述指示灯连接。 The first control terminal of the first switch is connected to the output terminal of the first logic unit; the first terminal of the first switch is grounded; the second terminal of the first switch is connected to the output terminal of the first logic unit. The above indicator lights are connected.

3、根据权利要求 1或 2所述的电路，其特征在于，所述第一逻辑单元包括：第一反相器及第一与门； 3. The circuit according to claim 1 or 2, characterized in that the first logic unit includes: a first inverter and a first AND gate;

所述第一反相器的输出端与所述第一与门的一个输入端连接；其中，所述第一反相器的输入端为所述第一逻辑单元的第一输入端或第二输入端，所述第一与门的另一个输入端为所述第一逻辑单元的第二输入端或第一输入端，所述第一与门的输出端为所述第一逻辑单元的输出端。 The output terminal of the first inverter is connected to an input terminal of the first AND gate; wherein, the input terminal of the first inverter is the first input terminal or the second input terminal of the first logic unit. Input terminal, the other input terminal of the first AND gate is the second input terminal or the first input terminal of the first logic unit, and the output terminal of the first AND gate is the output of the first logic unit. end.

4、根据权利要求 1或 2所述的电路，其特征在于，所述第一逻辑单元包括：第二反相器及第一与非门；所述第二反相器的输出端与所述第一与非门的一个输入端连接；其中，所述第二反相器的输入端为所述第一逻辑单元的第一输入端或第二输入端，所述第一与非门的另一个输入端为所述第一逻辑单元的第二输入端或第一输入端，所述第一与非门的输出端为所述第一逻辑单元的输出端。 4. The circuit according to claim 1 or 2, characterized in that the first logic unit includes: a second inverter and a first NAND gate; The output terminal of the second inverter is connected to an input terminal of the first NAND gate; wherein, the input terminal of the second inverter is the first input terminal or the first input terminal of the first logic unit. Two input terminals, the other input terminal of the first NAND gate is the second input terminal or the first input terminal of the first logic unit, and the output terminal of the first NAND gate is the first logic unit. The output of the unit.

5、根据权利要求 1或 2所述的电路，其特征在于，所述第一逻辑单元包括：第二开关，第一电阻及第二电阻；其中，所述第二开关包括第二控制端，第三端子及第四端子； 5. The circuit according to claim 1 or 2, characterized in that, the first logic unit includes: a second switch, a first resistor and a second resistor; wherein, the second switch includes a second control terminal, The third terminal and the fourth terminal;

所述第二开关的所述第二控制端为所述第一逻辑单元的第一输入端，所述第二开关的所述第三端子接地，所述第二开关的所述第四端子为所述第一逻辑单元的输出端，所述第二开关的所述第四端子与所述第一电阻的一端连接，所述第一电阻的另一端作为所述第一逻辑单元的第二输入端，所述第二电阻的一端与所述第一电阻的一端连接，所述第二电阻的另一端接地。 The second control terminal of the second switch is the first input terminal of the first logic unit, the third terminal of the second switch is grounded, and the fourth terminal of the second switch is The output terminal of the first logic unit, the fourth terminal of the second switch is connected to one end of the first resistor, and the other end of the first resistor serves as the second input of the first logic unit terminal, one terminal of the second resistor is connected to one terminal of the first resistor, and the other terminal of the second resistor is connected to ground.

6、根据权利要求 5所述的电路，其特征在于，还包括：第一电容及第三电阻； 6. The circuit according to claim 5, further comprising: a first capacitor and a third resistor;

所述第一电容的一端与所述第一逻辑单元的第一输入端连接，所述第一电容的另一端接地，所述第三电阻的一端与所述第一开关的所述第一端子连接，所述第三电阻的另一端接地。 One end of the first capacitor is connected to the first input end of the first logic unit, the other end of the first capacitor is connected to ground, and one end of the third resistor is connected to the first terminal of the first switch. Connect the other end of the third resistor to ground.

7、根据权利要求 1 - 6任一项所述的电路，其特征在于，所述第一开关及所述第二开关均为金属-氧化物-半导体 M0 S FE T。 7. The circuit according to any one of claims 1 to 6, characterized in that both the first switch and the second switch are metal-oxide-semiconductor MOSFETs.

8、根据权利要求 1 - 7任一项所述的电路，其特征在于，所述指示灯为发光二极管。 8. The circuit according to any one of claims 1 to 7, characterized in that the indicator light is a light-emitting diode.

9、一种电子设备，其特征在于，包括：包括权利要求 1 - 8任一项所述的指示灯控制电路。 9. An electronic device, characterized in that it includes: the indicator light control circuit described in any one of claims 1 to 8.