WO2015066991A1 - C-si-based compound heterojunction solar cell - Google Patents

C-si-based compound heterojunction solar cell Download PDF

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WO2015066991A1
WO2015066991A1 PCT/CN2014/073291 CN2014073291W WO2015066991A1 WO 2015066991 A1 WO2015066991 A1 WO 2015066991A1 CN 2014073291 W CN2014073291 W CN 2014073291W WO 2015066991 A1 WO2015066991 A1 WO 2015066991A1
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compound semiconductor
crystalline silicon
film
semiconductor film
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PCT/CN2014/073291
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French (fr)
Chinese (zh)
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孙云
刘一鸣
戴小宛
夏天宇
蔡鸿琨
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南开大学
孙云
刘一鸣
戴小宛
夏天宇
蔡鸿琨
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0745Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0735Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising only AIIIBV compound semiconductors, e.g. GaAs/AlGaAs or InP/GaInAs solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022466Electrodes made of transparent conductive layers, e.g. TCO, ITO layers
    • H01L31/022475Electrodes made of transparent conductive layers, e.g. TCO, ITO layers composed of indium tin oxide [ITO]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B10/00Integration of renewable energy sources in buildings
    • Y02B10/10Photovoltaic [PV]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/544Solar cells from Group III-V materials

Definitions

  • the invention relates to a solar cell, which is a compound semiconductor heterojunction solar cell based on crystalline silicon material (c-Si-based) Compound Heterojunction Solar Cells ), referred to as HCT (Heterojunction with Compound) Thin-layer) Solar battery.
  • a solar cell which is a compound semiconductor heterojunction solar cell based on crystalline silicon material (c-Si-based) Compound Heterojunction Solar Cells ), referred to as HCT (Heterojunction with Compound) Thin-layer) Solar battery.
  • HIT crystalline silicon heterojunction solar cell
  • the n-type crystalline silicon has a thickness of about 90-200 micrometers and is a main light absorbing layer, and generates a large number of non-equilibrium electron-hole pairs when illuminated.
  • the p-type and n-type amorphous silicon layers on both sides are thick 5 - 10
  • the nano-thin film emitter establishes a strong electric field inside the device by heavy doping, which is used to directionally separate photo-generated carriers, and is connected to the load under illumination to produce photoelectric output.
  • the intrinsic amorphous silicon layer is introduced to passivate defects on the surface of the crystalline silicon, reduce carrier recombination, thereby improving the open circuit voltage and conversion efficiency of the battery.
  • the HIT cell uses a larger amorphous silicon material at the emitter to form a heterojunction with crystalline silicon, and a valence band of the heterojunction in the p region and the heterojunction in the n region.
  • the reflection barrier of the interface is formed at the interface, which effectively deactivates the surface recombination, and improves the difference between the electron and hole quasi-Fermi levels of the heterojunction in the bright state, and improves the open circuit voltage of the device.
  • the valence band of the heterojunction in the p region and the conduction band of the heterojunction in the n region generate a barrier barrier for the multi-substrate, which hinders the collection of current, as shown in Fig. 1(a). Therefore, the thickness of the amorphous silicon thin film layer is usually less than 10 nanometers.
  • the multiple ions can pass through the tunneling mechanism to compensate for the adverse effects of the barrier barrier. Therefore, in order to further improve the efficiency of the HIT battery, in addition to optimizing the conventional amorphous silicon/crystalline silicon heterojunction cell preparation process, it is also possible to introduce a new heterojunction material to replace the amorphous silicon.
  • the high minority carrier reflection barrier reduces the barrier barrier of the multi-sub-substrate, as shown in Figure 1(b), so that the crystalline silicon heterojunction cell has a better band-matching structure and has a higher mechanism. Theoretical efficiency, and ultimately the ability to produce more efficient new silicon-based heterojunction solar cells.
  • the object of the present invention is to provide a heterojunction solar cell based on a crystalline silicon material, which is suitable for the above problems.
  • a compound semiconductor as a novel p-layer and n-layer heterojunction material, better band matching with crystalline silicon is achieved, thereby further improving the photoelectric conversion efficiency of the crystalline silicon heterojunction solar cell.
  • Compound semiconductor heterojunction solar cell based on crystalline silicon material, Forming a photovoltaic device by sequentially stacking a gate electrode, a transparent conductive layer, a p-type or n-type compound semiconductor film, an n-type or p-type crystalline silicon wafer, an n-type or p-type compound semiconductor film, a transparent conductive layer and a gate electrode, wherein The n-type or p-type crystalline silicon wafer is etched on both sides with an anti-texture surface.
  • the order of the laminated structure is a gate electrode, a transparent conductive layer, a light-receiving surface p-type compound semiconductor film, an n-type crystalline silicon wafer, and a backlight surface n-type compound.
  • the thickness of the compound semiconductor film of p-type or n-type is 3-50 nm, and the forbidden band width is >1.7. eV, the thickness of the p-type or n-type compound semiconductor film on the backlight surface is also 3-50 nm; the electron affinity of the p-type compound semiconductor film is ⁇ 3.8, whether it is the light receiving surface or the backlight surface.
  • the sum of the electron affinity and the forbidden band width of the eV, n-type compound film is greater than >5.5 eV, and the thickness of the transparent conductive layer film is 150-800 nm.
  • AlAs aluminum arsenide
  • AlGaAs aluminum gallium arsenide
  • the surface of the n-type compound film material may be zinc sulfide (ZnS), gallium phosphide (GaP) or gallium arsenide (GaAs);
  • ZnS zinc sulfide
  • GaP gallium phosphide
  • GaAs gallium arsenide
  • the film is selected Zinc sulfide (ZnS) or gallium phosphide (GaP)
  • the back surface p-type compound film material is aluminum arsenide (AlAs) or aluminum gallium arsenide (AlGaAs).
  • the compound semiconductor film is formed by metal organic chemical vapor deposition (MOCVD), low pressure chemical vapor deposition (LPCVD), atomic layer deposition (ALD), plasma enhanced chemical vapor deposition (PECVD), chemical water bath deposition (CBD) or vacuum sputtering.
  • MOCVD metal organic chemical vapor deposition
  • LPCVD low pressure chemical vapor deposition
  • ALD atomic layer deposition
  • PECVD plasma enhanced chemical vapor deposition
  • CBD chemical water bath deposition
  • vacuum sputtering Preparation by shot process, the final film formation is crystalline or amorphous; compound semiconductor film is ⁇ 500 °C deposition under low substrate temperature conditions, thereby reducing thermal damage to the cell during the deposition process.
  • the transparent conductive layer adjacent to the n-type compound semiconductor film is indium tin oxide (ITO) or ZnO:X
  • the transparent conductive layer adjacent to the p-type compound semiconductor film is indium tin oxide (ITO), ZnO:X or Aluminum gallium arsenide (AlGaAs), where X is a group III element.
  • the working mechanism of the invention is beneficial to the absorption of crystal silicon through a wider range of short-wave incident light, which is beneficial to the short-circuit current of the solar cell.
  • the use of a p-layer material with a higher conduction band position than amorphous silicon can increase the barrier barrier of the minority electrons at the p-region interface at the p-region and the crystalline silicon interface, and reduce the recombination of the minority electrons at the p-region interface.
  • the compound film material used has a larger work function and also The built-in potential of the heterojunction is increased, and the space charge region width and the built-in electric field strength can be increased.
  • a material having a lower valence band position than amorphous silicon can increase the barrier barrier height of the n-region interface at the interface between the n-region and the crystalline silicon interface, and reduce the recombination of the minority-holes at the n-region interface.
  • Selecting a material with a lower conduction band position in the n region can reduce the barrier barrier of the multi-sub-electron interface at the n-region interface between the n-region and the crystalline silicon interface, and promote the interface transport of the multi-sub-electrons at the n-region interface.
  • the invention has the advantages that: the crystalline silicon wafer is used as the absorption layer of the battery, and the two conductivity types are wider than the amorphous silicon band gap.
  • the compound semiconductor film passivates each side of the crystalline silicon and forms a heterojunction and a homojunction on both sides of the crystalline silicon to establish a better interfacial band structure and a stronger built-in electric field than the HIT solar cell.
  • Heterojunction solar cell Low substrate temperature ( ⁇ 500) by comprehensive selection of compound heterojunction materials °C) deposited as a crystalline or amorphous nano-film, further reducing the recombination at the interface of the heterojunction, increasing the open circuit voltage of the solar cell, reducing the interfacial minority structure at the interface of the crystalline silicon, improving the interface carrier transport, and increasing the photogeneration. Current has higher photoelectric conversion efficiency than HIT solar cells.
  • Figure 1 is a schematic diagram of the energy band of a crystalline silicon heterojunction solar cell with a more compatible HIT solar cell and energy band structure, wherein: 1 Fermi level, 2
  • the p-region interface has a small electron blocking barrier, a 3 p-region interface multi-sub-hole blocking barrier, a 4 n-region interface multi-sub-electron electron blocking barrier, and a 5 n-region interface minority carrier hole blocking barrier.
  • FIG. 2 is a schematic cross-sectional view showing the structure of a compound silicon heterojunction solar cell of a crystalline silicon substrate according to the present invention.
  • n-type or p-type crystalline silicon wafer 2. reduced suede surface 3.
  • p-type or n-type compound semiconductor film 4.
  • n-type or p-type compound semiconductor film 5.
  • Light-receiving surface transparent conductive layer 6.
  • Back surface transparent conductive layer 7.
  • a heterojunction solar cell based on crystalline silicon material as shown in Figure 2, The gate electrode 7, the transparent conductive layer 5, the light-receiving surface p-type compound semiconductor film 3, and the n-type crystal silicon wafer 1
  • the n-type compound semiconductor film 4, the transparent conductive layer 6 and the gate electrode 7 are sequentially stacked to form a photovoltaic device in which the anti-texture surface 2 is etched on both sides of the n-type crystal silicon wafer, and the thickness of the p-type compound semiconductor film of the light-receiving surface is 10 nanometers, material forbidden band width > 1.7 eV, electron affinity ⁇ 3.8 eV, the thickness of the back surface n-type compound film is 10 nm, and the sum of the electron affinity and the forbidden band width is greater than >5.5
  • the thickness of the transparent conductive film of the light-receiving surface and the backlight surface of the eV is 400 nm.
  • the light-receiving surface p-type compound semiconductor thin film material is aluminum arsenide (AlAs), the backlight surface n-type compound thin film material is gallium phosphide (GaP), the transparent conductive layer material is indium tin oxide (ITO), and the gate electrode
  • AlAs aluminum arsenide
  • GaP gallium phosphide
  • ITO indium tin oxide
  • the gate electrode The material is nickel aluminum alloy.
  • the preparation method of the heterojunction solar cell based on the crystalline silicon material adopts a conventional semiconductor preparation process, and the steps are as follows:
  • MOCVD metal organic chemical vapor deposition
  • the film material is aluminum arsenide (AlAs)
  • the dopant is carbon tetrachloride (CCl 4 )
  • the carrier concentration after doping is 10 19 cm -3 ;
  • MOCVD metal organic chemical vapor deposition
  • the film material is gallium phosphide (GaP)
  • the dopant is hydrogen selenide (H 2 Se )
  • the carrier concentration after doping is 10 19 cm -3 ;
  • ITO indium tin oxide
  • AlAs aluminum arsenide
  • ITO indium tin oxide
  • GaP gallium phosphide
  • the nickel-aluminum alloy is thermally evaporated onto the back surface heterojunction transparent conductive film of the n-type single crystal silicon wafer to prepare a gate electrode.
  • a p-type or n-type compound semiconductor film is prepared on the light-receiving surface and the backlight surface of the crystalline silicon wafer by metal organic chemical vapor deposition (MOCVD), and a built-in electric field is established on both sides to separate photo-generated carriers;
  • MOCVD metal organic chemical vapor deposition
  • a transparent conductive layer is prepared on the light-receiving surface and the backlight surface; finally, a metal gate line is prepared on the light-receiving surface and the backlight surface of the silicon wafer to collect current, and the solar cell of the present invention is obtained.
  • a compound semiconductor heterojunction solar cell based on crystalline silicon material as shown in FIG. 2
  • a photovoltaic device is constructed by sequentially stacking a gate electrode 7, a transparent conductive layer 5, a light-receiving surface n-type compound semiconductor thin film 3, a p-type crystalline silicon wafer 1, a p-type compound semiconductor thin film 4, a transparent conductive layer 6, and a gate electrode 7, wherein p
  • the two sides of the crystalline silicon wafer are etched by the anti-texture surface, and the thickness of the n-type compound semiconductor film of the light-receiving surface is 10 nm, and the forbidden band width is >1.7.
  • the sum of the electron affinity and the band gap is greater than >5.5 eV
  • the thickness of the p-type compound film on the backlight is 10 nm
  • the electron affinity is ⁇ 3.8.
  • the thickness of the transparent conductive film of the light-receiving surface is 400 nm
  • the thickness of the transparent conductive film of the backlight is 400 nm.
  • the light-receiving surface n-type compound semiconductor thin film material is zinc sulfide (ZnS)
  • the backlight surface p-type compound thin film material is aluminum arsenide (AlAs)
  • the transparent conductive layer material is aluminum-doped zinc oxide material ZnO: Al, wherein The Al doping molar ratio is 2%
  • the gate electrode material is nickel aluminum alloy.
  • the preparation method of the compound semiconductor heterojunction solar cell based on the crystalline silicon material adopts a conventional semiconductor preparation process, Proceed as follows:
  • n-type compound semiconductor film depositing an n-type compound semiconductor film on the light-receiving surface of the p-type single crystal silicon wafer by metal organic chemical vapor deposition (MOCVD), the film material is zinc sulfide (ZnS), and the dopant is trimethyl aluminum (TMAl).
  • MOCVD metal organic chemical vapor deposition
  • ZnS zinc sulfide
  • TMAl trimethyl aluminum
  • MOCVD metal organic chemical vapor deposition
  • the film material is aluminum arsenide (AlAs)
  • the dopant is silane (SiH4), doped
  • the post carrier concentration is 10 19 cm -3 ;
  • Al transparent conductive layer is deposited on the heterojunction of the surface of the p-type single crystal silicon wafer and the aluminum arsenide by a vacuum sputtering method, wherein the Al doping molar ratio is 2%;
  • a nickel-aluminum alloy is thermally evaporated onto a transparent conductive film of a heterojunction surface composed of a light-receiving surface of a p-type single crystal silicon wafer and zinc sulfide to prepare a gate electrode;
  • the nickel-aluminum alloy is thermally evaporated onto the surface of the p-type single crystal silicon wafer and the heterojunction surface transparent conductive film made of aluminum arsenide to prepare a gate electrode.
  • An n-type and p-type compound semiconductor thin film is prepared on the light-receiving surface and the backlight surface of the crystalline silicon wafer by metal organic chemical vapor deposition (MOCVD), and a built-in electric field is established on both sides to separate the photo-generated carriers;
  • a transparent conductive layer is prepared on the surface of the heterojunction on both sides of the silicon wafer.
  • a metal gate line is prepared on the transparent conductive layer on both sides of the silicon wafer to collect current, and the solar cell of the present invention is obtained.
  • the light-receiving surface is made of a material with a larger band gap than amorphous silicon. It can penetrate the crystal silicon absorption layer through a wider range of short-wave incident light, which is beneficial to the increase of the short-circuit current of the solar cell; and further increases the difference of the electron hole quasi-Fermi level in the junction region during illumination, which is beneficial to the open circuit voltage. Improvement.
  • the p-layer compound thin film material with higher conduction band position than amorphous silicon increases the barrier barrier height of the minority electrons at the p-region interface at the p-region and the crystalline silicon interface, thereby reducing the composite of the minority electrons at the p-region interface. .
  • a material having a lower valence band position than amorphous silicon can increase the barrier barrier height of the n-region interface at the interface between the n region and the crystalline silicon interface, and reduce the recombination of the minority sub-holes at the n-region interface.
  • Selecting a material with a lower conduction band position in the n region can reduce the barrier barrier of the multi-sub-electron interface at the n-region interface between the n-region and the crystalline silicon interface, and promote the interface transport of the multi-sub-electrons at the n-region interface.
  • the carrier recombination at the interface of the heterojunction can be further reduced, the built-in electric field can be improved, and the open circuit voltage and the short-circuit current density of the solar cell are improved.
  • the new crystalline silicon heterojunction solar cell (HCT) based on this structure has higher photoelectric conversion efficiency than HIT solar cell under the same conditions of passivation effect at the crystalline silicon interface. .

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Abstract

A c-Si-based compound heterojunction solar cell, utilizing crystalline silicon as an absorption layer of the cell, passivating each side of the crystalline silicon by the compound semiconductor thin film having two conduction types and a wider band gap than amorphous silicon, and forming heterotype heterojunction and homotype heterojunction with two sides of the crystalline silicon, thus building an interface energy band structure better than an HIT solar cell and a stronger built-in electric field, and having higher photoelectric conversion efficiency than an HIT solar cell.

Description

一种基于晶体硅材料的化合物半导体异质结太阳电池  Compound semiconductor heterojunction solar cell based on crystalline silicon material 技术领域Technical field
本发明涉及太阳电池,是一种基于晶体硅材料的化合物半导体异质结太阳电池 ( c-Si-based Compound Heterojunction Solar Cells ),简称 HCT (Heterojunction with Compound Thin-layer) 太阳电池。  The invention relates to a solar cell, which is a compound semiconductor heterojunction solar cell based on crystalline silicon material (c-Si-based) Compound Heterojunction Solar Cells ), referred to as HCT (Heterojunction with Compound) Thin-layer) Solar battery.
背景技术Background technique
由日本 松下公司研发 的晶体硅异质结太阳电池(HIT)已在101.8平方厘米面积上实现了高达24.7%的光电转换效率,展现了使用异质结的技术思路制备高效硅基太阳电池的广阔应用前景。传统HIT电池,参见美国专利US20020069911 A1,US7030413 B2,通常采用如下结构:栅电极/透明导电金属氧化层/p型非晶硅/本征非晶硅/n型晶体硅/本征非晶硅/n型非晶硅/透明导电金属氧化层/栅电极。其中,n型晶体硅的厚度在90-200微米左右,为主要的光吸收层,光照时产生大量的非平衡电子空穴对。其两侧的p型、n型非晶硅层为厚度5 - 10 纳米的薄膜发射极,通过重掺杂在器件内部建立较强的电场,用于定向分离光生载流子,在光照下接上负载产生光电输出。本征非晶硅层的引入是为了钝化晶硅表面的缺陷,减小载流子复合,从而提高电池的开路电压与转换效率。 Developed by Japan Matsushita Co., Ltd. The crystalline silicon heterojunction solar cell (HIT) has achieved a photoelectric conversion efficiency of up to 24.7% over an area of 101.8 square centimeters, demonstrating the broad application prospects for the fabrication of high efficiency silicon-based solar cells using the heterojunction technology. Traditional HIT battery, see US patent US20020069911 A1, US7030413 B2, generally adopts the following structure: gate electrode/transparent conductive metal oxide layer/p-type amorphous silicon/intrinsic amorphous silicon/n-type crystalline silicon/intrinsic amorphous silicon/n-type amorphous silicon/transparent conductive metal oxide layer / gate electrode. Among them, the n-type crystalline silicon has a thickness of about 90-200 micrometers and is a main light absorbing layer, and generates a large number of non-equilibrium electron-hole pairs when illuminated. The p-type and n-type amorphous silicon layers on both sides are thick 5 - 10 The nano-thin film emitter establishes a strong electric field inside the device by heavy doping, which is used to directionally separate photo-generated carriers, and is connected to the load under illumination to produce photoelectric output. The intrinsic amorphous silicon layer is introduced to passivate defects on the surface of the crystalline silicon, reduce carrier recombination, thereby improving the open circuit voltage and conversion efficiency of the battery.
与 采用同质结结构 的晶硅太阳电池相比,HIT电池在发射极使用禁带宽度更大的非晶硅材料与晶硅形成异质结,在p区异质结的导带与n区异质结的价带处形成了界面少子的反射势垒,有效钝化了表面复合,并且提高了亮态下异质结的电子与空穴准费米能级之差,提高了器件的开路电压。但同时也在p区异质结的价带与n区异质结的导带产生了多子的阻挡势垒,有碍电流的收集,如附图1(a)所示。所以通常非晶硅薄膜层的厚度需低于10纳米量级,其中一个原因就是使多子能够以隧穿机制通过,弥补阻挡势垒带来的不利影响。因此,要进一步提高HIT电池的效率,除了优化传统的非晶硅/晶硅异质结电池制备工艺,还可以考虑引入新型的异质结材料以替代非晶硅。应该具备比非晶硅更高的禁带宽度,以透过更大范围的短波入射光,并增大光照时结区的电子空穴准费米能级之差;而且在能带上实现更高的少子反射势垒,减小多子的阻挡势垒,如附图1(b)所示,从而使晶硅异质结电池拥有更佳的能带匹配结构,在机理上具有更高的理论效率,并最终能够制备效率更高的新型硅基异质结太阳电池。 Homogeneous junction structure Compared with the crystalline silicon solar cell, the HIT cell uses a larger amorphous silicon material at the emitter to form a heterojunction with crystalline silicon, and a valence band of the heterojunction in the p region and the heterojunction in the n region. The reflection barrier of the interface is formed at the interface, which effectively deactivates the surface recombination, and improves the difference between the electron and hole quasi-Fermi levels of the heterojunction in the bright state, and improves the open circuit voltage of the device. However, at the same time, the valence band of the heterojunction in the p region and the conduction band of the heterojunction in the n region generate a barrier barrier for the multi-substrate, which hinders the collection of current, as shown in Fig. 1(a). Therefore, the thickness of the amorphous silicon thin film layer is usually less than 10 nanometers. One of the reasons is that the multiple ions can pass through the tunneling mechanism to compensate for the adverse effects of the barrier barrier. Therefore, in order to further improve the efficiency of the HIT battery, in addition to optimizing the conventional amorphous silicon/crystalline silicon heterojunction cell preparation process, it is also possible to introduce a new heterojunction material to replace the amorphous silicon. It should have a higher bandgap width than amorphous silicon to transmit a larger range of short-wave incident light and increase the difference in the electron-hole quasi-Fermi level of the junction region during illumination; The high minority carrier reflection barrier reduces the barrier barrier of the multi-sub-substrate, as shown in Figure 1(b), so that the crystalline silicon heterojunction cell has a better band-matching structure and has a higher mechanism. Theoretical efficiency, and ultimately the ability to produce more efficient new silicon-based heterojunction solar cells.
技术问题technical problem
本发明的目的是针对上述存在问题,提供一种 基于晶体硅材料的异质结太阳电池, 该 异质结太阳电池 通过采用化合物半导体作为新型的p层、n层异质结材料,与晶硅实现更佳的能带匹配,从而进一步提升晶硅异质结太阳电池的光电转换效率。  The object of the present invention is to provide a heterojunction solar cell based on a crystalline silicon material, which is suitable for the above problems. By using a compound semiconductor as a novel p-layer and n-layer heterojunction material, better band matching with crystalline silicon is achieved, thereby further improving the photoelectric conversion efficiency of the crystalline silicon heterojunction solar cell.
技术解决方案Technical solution
本发明的技术方案: The technical solution of the invention:
一种 基于晶体硅材料的化合物半导体异质结太阳电池, 由栅电极、透明导电层、p型或n型化合物半导体薄膜、n型或p型晶硅片、n型或p型化合物半导体薄膜、透明导电层和栅电极依次堆叠而构成光伏器件,其中在n型或p型晶硅片的两面腐蚀有减反织构面,叠层结构的顺序为栅电极、透明导电层、受光面p型化合物半导体薄膜、n型晶硅片、背光面n型化合物半导体薄膜、透明导电层和栅电极,或者是栅电极、透明导电层、受光面n型化合物半导体薄膜、p型晶硅片、背光面p型化合物半导体薄膜、透明导电层和栅电极;受光面为p型或n型的化合物半导体薄膜厚度均为3-50纳米,禁带宽度均>1.7 eV,背光面的p型或n型化合物半导体薄膜的厚度亦为3-50纳米;无论是受光面还是背光面,p型化合物半导体薄膜的电子亲和势<3.8 eV,n型化合物薄膜的电子亲和势与禁带宽度之和大于>5.5 eV,透明导电层薄膜厚度均为150-800纳米。 Compound semiconductor heterojunction solar cell based on crystalline silicon material, Forming a photovoltaic device by sequentially stacking a gate electrode, a transparent conductive layer, a p-type or n-type compound semiconductor film, an n-type or p-type crystalline silicon wafer, an n-type or p-type compound semiconductor film, a transparent conductive layer and a gate electrode, wherein The n-type or p-type crystalline silicon wafer is etched on both sides with an anti-texture surface. The order of the laminated structure is a gate electrode, a transparent conductive layer, a light-receiving surface p-type compound semiconductor film, an n-type crystalline silicon wafer, and a backlight surface n-type compound. a semiconductor film, a transparent conductive layer and a gate electrode, or a gate electrode, a transparent conductive layer, a light-receiving surface n-type compound semiconductor film, a p-type crystalline silicon wafer, a backlight surface p-type compound semiconductor film, a transparent conductive layer and a gate electrode; a light receiving surface The thickness of the compound semiconductor film of p-type or n-type is 3-50 nm, and the forbidden band width is >1.7. eV, the thickness of the p-type or n-type compound semiconductor film on the backlight surface is also 3-50 nm; the electron affinity of the p-type compound semiconductor film is <3.8, whether it is the light receiving surface or the backlight surface. The sum of the electron affinity and the forbidden band width of the eV, n-type compound film is greater than >5.5 eV, and the thickness of the transparent conductive layer film is 150-800 nm.
所述受光面为p型化合物薄膜时的材料采用砷化铝(AlAs) 或铝镓砷(AlGaAs),背光面为n型化合物薄膜材料可选用硫化锌(ZnS)、磷化镓(GaP)或砷化镓(GaAs);当n型化合物薄膜为受光面时,薄膜选用硫化锌(ZnS)或磷化镓(GaP),背光面p型化合物薄膜材料为砷化铝(AlAs)或铝镓砷(AlGaAs)。 When the light-receiving surface is a p-type compound film, aluminum arsenide (AlAs) is used as a material. Or aluminum gallium arsenide (AlGaAs), the surface of the n-type compound film material may be zinc sulfide (ZnS), gallium phosphide (GaP) or gallium arsenide (GaAs); when the n-type compound film is a light-receiving surface, the film is selected Zinc sulfide (ZnS) or gallium phosphide (GaP), the back surface p-type compound film material is aluminum arsenide (AlAs) or aluminum gallium arsenide (AlGaAs).
所述化合物半导体薄膜采用金属有机化学气相沉积(MOCVD)、低压化学气相沉积(LPCVD)、原子层沉积(ALD)、等离子体增强化学气相沉积(PECVD)、化学水浴法沉积(CBD)或真空溅射工艺制备,最终成膜为晶态或非晶态;化合物半导体薄膜在<500 °C低衬底温度条件下沉积,从而降低沉积工艺对电池的热损伤。 The compound semiconductor film is formed by metal organic chemical vapor deposition (MOCVD), low pressure chemical vapor deposition (LPCVD), atomic layer deposition (ALD), plasma enhanced chemical vapor deposition (PECVD), chemical water bath deposition (CBD) or vacuum sputtering. Preparation by shot process, the final film formation is crystalline or amorphous; compound semiconductor film is <500 °C deposition under low substrate temperature conditions, thereby reducing thermal damage to the cell during the deposition process.
所述与n型化合物半导体薄膜相邻的透明导电层为氧化铟锡(ITO)或ZnO:X,与p型化合物半导体薄膜相邻的透明导电层为氧化铟锡(ITO)、ZnO:X或铝镓砷(AlGaAs),其中X为III族元素。 The transparent conductive layer adjacent to the n-type compound semiconductor film is indium tin oxide (ITO) or ZnO:X, and the transparent conductive layer adjacent to the p-type compound semiconductor film is indium tin oxide (ITO), ZnO:X or Aluminum gallium arsenide (AlGaAs), where X is a group III element.
本发明的工作机理: 在受光面采用禁带宽度更宽的化合物半导体薄膜材料,有利于透过更大范围的短波入射光供晶硅吸收,有利于太阳电池短路电流的提升。采用导带位置比非晶硅更高的p层材料,能够增高p区与晶硅界面处的p区界面少子电子的阻挡势垒,减小p区界面少子电子的复合。所采用的化合物薄膜材料功函数更大,同时也 提高 了 异质结内建电势,可增加空间电荷区宽度与内建电场强度。 在n层采用价带位置比非晶硅更低的材料,能够增大n区与晶硅界面处的n区界面少子空穴的阻挡势垒高度,减少n区界面少子空穴的复合。在n区选择导带位置更低的材料,可以降低n区与晶硅界面处的n区界面多子电子的阻挡势垒,促进n区界面多子电子的界面输运。The working mechanism of the invention: The compound semiconductor film material with wider band gap on the light-receiving surface is beneficial to the absorption of crystal silicon through a wider range of short-wave incident light, which is beneficial to the short-circuit current of the solar cell. The use of a p-layer material with a higher conduction band position than amorphous silicon can increase the barrier barrier of the minority electrons at the p-region interface at the p-region and the crystalline silicon interface, and reduce the recombination of the minority electrons at the p-region interface. The compound film material used has a larger work function and also The built-in potential of the heterojunction is increased, and the space charge region width and the built-in electric field strength can be increased. In the n-layer, a material having a lower valence band position than amorphous silicon can increase the barrier barrier height of the n-region interface at the interface between the n-region and the crystalline silicon interface, and reduce the recombination of the minority-holes at the n-region interface. Selecting a material with a lower conduction band position in the n region can reduce the barrier barrier of the multi-sub-electron interface at the n-region interface between the n-region and the crystalline silicon interface, and promote the interface transport of the multi-sub-electrons at the n-region interface.
有益效果Beneficial effect
本发明的优点是: 以晶体硅片作为电池的吸收层,由两种导电类型、比非晶硅带隙更宽的 化合物半导体薄膜钝化晶硅各自一面,并与晶硅两面形成异型异质结及同型异质结,建立比HIT太阳电池更佳的界面能带结构与更强的内建电场。该 异质结太阳电池 通过综合选取化合物异质结材料,采用低衬底温度(<500 °C)沉积为晶态或非晶态纳米薄膜,进一步降低异质结界面处的复合,提高太阳电池开路电压,降低晶硅界面处的界面少子复合,改善界面载流子输运,增加光生电流,具有比HIT太阳电池更高的光电转换效率。  The invention has the advantages that: the crystalline silicon wafer is used as the absorption layer of the battery, and the two conductivity types are wider than the amorphous silicon band gap. The compound semiconductor film passivates each side of the crystalline silicon and forms a heterojunction and a homojunction on both sides of the crystalline silicon to establish a better interfacial band structure and a stronger built-in electric field than the HIT solar cell. Heterojunction solar cell Low substrate temperature (<500) by comprehensive selection of compound heterojunction materials °C) deposited as a crystalline or amorphous nano-film, further reducing the recombination at the interface of the heterojunction, increasing the open circuit voltage of the solar cell, reducing the interfacial minority structure at the interface of the crystalline silicon, improving the interface carrier transport, and increasing the photogeneration. Current has higher photoelectric conversion efficiency than HIT solar cells.
附图说明DRAWINGS
图1为传统HIT太阳电池与能带结构更为匹配的晶硅异质结太阳电池能带示意图,其中:① 费米能级,② p区界面少子电子阻挡势垒,③ p区界面多子空穴阻挡势垒,④ n区界面多子电子阻挡势垒,⑤ n区界面少子空穴阻挡势垒。 Figure 1 is a schematic diagram of the energy band of a crystalline silicon heterojunction solar cell with a more compatible HIT solar cell and energy band structure, wherein: 1 Fermi level, 2 The p-region interface has a small electron blocking barrier, a 3 p-region interface multi-sub-hole blocking barrier, a 4 n-region interface multi-sub-electron electron blocking barrier, and a 5 n-region interface minority carrier hole blocking barrier.
图2为本发明的晶硅基材化合物半导体异质结太阳电池结构截面示意图。 2 is a schematic cross-sectional view showing the structure of a compound silicon heterojunction solar cell of a crystalline silicon substrate according to the present invention.
图中:1.n型或p型晶硅片 2.减反绒面 3.p型或n型化合物半导体薄膜 4.n型或p型化合物半导体薄膜 5.受光面透明导电层 6.背光面透明导电层 7.栅电极 In the figure: 1. n-type or p-type crystalline silicon wafer 2. reduced suede surface 3. p-type or n-type compound semiconductor film 4. n-type or p-type compound semiconductor film 5. Light-receiving surface transparent conductive layer 6. Back surface transparent conductive layer 7. Gate electrode
本发明的最佳实施方式BEST MODE FOR CARRYING OUT THE INVENTION
以下结合具体实施方式,并参照附图,对本发明进一步详细说明。 The present invention will be further described in detail below in conjunction with the specific embodiments and with reference to the accompanying drawings.
实施例1: Example 1:
一种 基于晶体硅材料的异质结太阳电池,如图2所示, 由栅电极7、透明导电层5、受光面p型化合物半导体薄膜3、n型晶硅片1、 n型化合物半导体薄膜4、透明导电层6和栅电极7依次堆叠而构成光伏器件,其中在n型晶硅片的两面腐蚀有减反织构面2,受光面p型化合物半导体薄膜的厚度为10纳米,材料禁带宽度>1.7 eV,电子亲和势<3.8 eV,背光面n型化合物薄膜的厚度为10纳米,电子亲和势与禁带宽度之和大于>5.5 eV,受光面与背光面透明导电层薄膜的厚度均为400纳米。 A heterojunction solar cell based on crystalline silicon material, as shown in Figure 2, The gate electrode 7, the transparent conductive layer 5, the light-receiving surface p-type compound semiconductor film 3, and the n-type crystal silicon wafer 1 The n-type compound semiconductor film 4, the transparent conductive layer 6 and the gate electrode 7 are sequentially stacked to form a photovoltaic device in which the anti-texture surface 2 is etched on both sides of the n-type crystal silicon wafer, and the thickness of the p-type compound semiconductor film of the light-receiving surface is 10 nanometers, material forbidden band width > 1.7 eV, electron affinity <3.8 eV, the thickness of the back surface n-type compound film is 10 nm, and the sum of the electron affinity and the forbidden band width is greater than >5.5 The thickness of the transparent conductive film of the light-receiving surface and the backlight surface of the eV is 400 nm.
该实施例中,受光面p型化合物半导体薄膜材料为砷化铝(AlAs),背光面n型化合物薄膜材料为磷化镓(GaP),透明导电层材料为氧化铟锡(ITO),栅电极材料为镍铝合金。 In this embodiment, the light-receiving surface p-type compound semiconductor thin film material is aluminum arsenide (AlAs), the backlight surface n-type compound thin film material is gallium phosphide (GaP), the transparent conductive layer material is indium tin oxide (ITO), and the gate electrode The material is nickel aluminum alloy.
该 基于晶体硅材料的异质结太阳电池的制备方法,采 用常规的半导体制备工艺, 步骤如下: The preparation method of the heterojunction solar cell based on the crystalline silicon material adopts a conventional semiconductor preparation process, and the steps are as follows:
1 ) 用RCA标准清洗法清洗晶硅片; 1) cleaning the crystalline silicon wafer by RCA standard cleaning method;
2 )将清洗后的晶硅片放置在含有氢氧化钠和异丙醇的碱性溶液中进行各向异性腐蚀,制作减反织构面; 2) placing the cleaned silicon wafer in an alkaline solution containing sodium hydroxide and isopropanol for anisotropic etching to produce an anti-reverse texture surface;
3 )采用金属有机化学气相沉积方法(MOCVD)在n型单晶硅片的受光面沉积p型化合物半导体薄膜,薄膜材料为砷化铝(AlAs),掺杂剂为四氯化碳(CCl4),掺杂后载流子浓度为1019cm-33) depositing a p-type compound semiconductor film on the light-receiving surface of the n-type single crystal silicon wafer by metal organic chemical vapor deposition (MOCVD), the film material is aluminum arsenide (AlAs), and the dopant is carbon tetrachloride (CCl 4 ) ), the carrier concentration after doping is 10 19 cm -3 ;
4 )采用金属有机化学气相沉积方法(MOCVD)在n型单晶硅片的背光面沉积n型化合物半导体薄膜,薄膜材料为磷化镓(GaP),掺杂剂为硒化氢(H2Se),掺杂后载流子浓度为1019cm-34) depositing an n-type compound semiconductor film on the backlight surface of the n-type single crystal silicon wafer by metal organic chemical vapor deposition (MOCVD), the film material is gallium phosphide (GaP), and the dopant is hydrogen selenide (H 2 Se ), the carrier concentration after doping is 10 19 cm -3 ;
5 )采用真空溅射方法在n型单晶硅片的受光面与砷化铝(AlAs)构成的异质结表面沉积氧化铟锡(ITO)透明导电层; 5 Depositing an indium tin oxide (ITO) transparent conductive layer on the surface of the heterojunction composed of the light-receiving surface of the n-type single crystal silicon wafer and aluminum arsenide (AlAs) by a vacuum sputtering method;
6 )采用真空溅射方法在n型单晶硅片的背光面与磷化镓(GaP)构成的异质结表面沉积氧化铟锡(ITO)透明导电层; 6 Depositing an indium tin oxide (ITO) transparent conductive layer on the surface of the heterojunction of the n-type single crystal silicon wafer and the gallium phosphide (GaP) by a vacuum sputtering method;
7 )将镍铝合金热蒸发至n型单晶硅片的受光面异质结表层透明导电薄膜上,制备栅电极; 7) thermally evaporating the nickel-aluminum alloy onto the transparent conductive film of the light-receiving surface of the n-type single crystal silicon wafer to prepare a gate electrode;
8 )将镍铝合金热蒸发至n型单晶硅片的背光面异质结表层透明导电薄膜上,制备栅电极。 8) The nickel-aluminum alloy is thermally evaporated onto the back surface heterojunction transparent conductive film of the n-type single crystal silicon wafer to prepare a gate electrode.
通过金属有机化学气相沉积方法(MOCVD)在晶硅片受光面、背光面分别制备p型或n型化合物半导体薄膜,在两侧建立内建电场,起到分离光生载流子的作用;在硅片受光面及背光面制备透明导电层;最后在硅片受光面、背光面制备金属栅线,起到收集电流的作用,制得本发明的太阳电池。 A p-type or n-type compound semiconductor film is prepared on the light-receiving surface and the backlight surface of the crystalline silicon wafer by metal organic chemical vapor deposition (MOCVD), and a built-in electric field is established on both sides to separate photo-generated carriers; A transparent conductive layer is prepared on the light-receiving surface and the backlight surface; finally, a metal gate line is prepared on the light-receiving surface and the backlight surface of the silicon wafer to collect current, and the solar cell of the present invention is obtained.
实施例2: Example 2:
一种 基于晶体硅材料的化合物半导体异质结太阳电池,如图2所示, 由栅电极7、透明导电层5、受光面n型化合物半导体薄膜3、p型晶硅片1、p型化合物半导体薄膜4、透明导电层6和栅电极7依次堆叠而构成光伏器件,其中p型晶硅片的两面腐蚀有减反织构面,受光面n型化合物半导体薄膜的厚度为10纳米,材料禁带宽度>1.7 eV,电子亲和势与禁带宽度之和大于>5.5 eV,背光面p型化合物薄膜的厚度为10纳米,电子亲和势<3.8 eV,受光面透明导电层薄膜的厚度为400纳米,背光面透明导电层薄膜的厚度为400纳米。 A compound semiconductor heterojunction solar cell based on crystalline silicon material, as shown in FIG. 2 A photovoltaic device is constructed by sequentially stacking a gate electrode 7, a transparent conductive layer 5, a light-receiving surface n-type compound semiconductor thin film 3, a p-type crystalline silicon wafer 1, a p-type compound semiconductor thin film 4, a transparent conductive layer 6, and a gate electrode 7, wherein p The two sides of the crystalline silicon wafer are etched by the anti-texture surface, and the thickness of the n-type compound semiconductor film of the light-receiving surface is 10 nm, and the forbidden band width is >1.7. eV, the sum of the electron affinity and the band gap is greater than >5.5 eV, and the thickness of the p-type compound film on the backlight is 10 nm, and the electron affinity is <3.8. The thickness of the transparent conductive film of the light-receiving surface is 400 nm, and the thickness of the transparent conductive film of the backlight is 400 nm.
该实施例中,受光面n型化合物半导体薄膜材料为硫化锌(ZnS),背光面p型化合物薄膜材料为砷化铝(AlAs),透明导电层材料为掺铝氧化锌材料ZnO:Al,其中Al掺杂摩尔比为2%,栅电极材料为镍铝合金。 In this embodiment, the light-receiving surface n-type compound semiconductor thin film material is zinc sulfide (ZnS), the backlight surface p-type compound thin film material is aluminum arsenide (AlAs), and the transparent conductive layer material is aluminum-doped zinc oxide material ZnO: Al, wherein The Al doping molar ratio is 2%, and the gate electrode material is nickel aluminum alloy.
该 基于晶体硅材料的化合物半导体异质结太阳电池的制备方法,采 用常规的半导体制备工艺, 步骤如下: The preparation method of the compound semiconductor heterojunction solar cell based on the crystalline silicon material adopts a conventional semiconductor preparation process, Proceed as follows:
1 ) 用RCA标准清洗法清洗晶硅片; 1) cleaning the crystalline silicon wafer by RCA standard cleaning method;
2 )将清洗后的晶硅片放置在含有氢氧化钠和异丙醇的碱性溶液中进行各向异性腐蚀,制作减反织构面; 2) placing the cleaned silicon wafer in an alkaline solution containing sodium hydroxide and isopropanol for anisotropic etching to produce an anti-reverse texture surface;
3 )采用金属有机化学气相沉积方法(MOCVD)在p型单晶硅片的受光面沉积n型化合物半导体薄膜,薄膜材料为硫化锌(ZnS),掺杂剂为三甲基铝(TMAl),掺杂后载流子浓度为1019cm-33) depositing an n-type compound semiconductor film on the light-receiving surface of the p-type single crystal silicon wafer by metal organic chemical vapor deposition (MOCVD), the film material is zinc sulfide (ZnS), and the dopant is trimethyl aluminum (TMAl). The carrier concentration after doping was 10 19 cm -3 ;
4 )采用金属有机化学气相沉积方法(MOCVD)在p型单晶硅片的背光面沉积p型化合物半导体薄膜,薄膜材料为砷化铝(AlAs),掺杂剂为 硅烷( SiH4 ) ,掺杂后载流子浓度为1019cm-34) depositing a p-type compound semiconductor film on the backlight surface of the p-type single crystal silicon wafer by metal organic chemical vapor deposition (MOCVD), the film material is aluminum arsenide (AlAs), and the dopant is silane (SiH4), doped The post carrier concentration is 10 19 cm -3 ;
5 )采用真空溅射方法在p型单晶硅片的受光面与硫化锌构成的异质结上沉积ZnO:Al透明导电层,其中Al掺杂摩尔比为2%; 5 Depositing a ZnO:Al transparent conductive layer on the heterojunction of the light-receiving surface of the p-type single crystal silicon wafer and the zinc sulfide by a vacuum sputtering method, wherein the Al doping molar ratio is 2%;
6 )采用真空溅射方法在p型单晶硅片的背光面与砷化铝构成的异质结上溅射沉积ZnO:Al透明导电层,其中Al掺杂摩尔比为2%; 6 ZnO:Al transparent conductive layer is deposited on the heterojunction of the surface of the p-type single crystal silicon wafer and the aluminum arsenide by a vacuum sputtering method, wherein the Al doping molar ratio is 2%;
7 )将镍铝合金热蒸发至p型单晶硅片的受光面与硫化锌构成的异质结表面透明导电薄膜上,制备栅电极; 7 a nickel-aluminum alloy is thermally evaporated onto a transparent conductive film of a heterojunction surface composed of a light-receiving surface of a p-type single crystal silicon wafer and zinc sulfide to prepare a gate electrode;
8 )将镍铝合金热蒸发至p型单晶硅片的背光面与砷化铝构成的异质结表面透明导电薄膜上,制备栅电极。 8 The nickel-aluminum alloy is thermally evaporated onto the surface of the p-type single crystal silicon wafer and the heterojunction surface transparent conductive film made of aluminum arsenide to prepare a gate electrode.
通过金属有机化学气相沉积方法(MOCVD)在晶硅片受光面、背光面分别制备n型、p型化合物半导体薄膜,在两侧建立内建电场,起到分离光生载流子的作用;再在硅片两面异质结表层制备透明导电层;最后在硅片两面异质结的透明导电层上制备金属栅线,起到收集电流的作用,制得本发明的太阳电池。 An n-type and p-type compound semiconductor thin film is prepared on the light-receiving surface and the backlight surface of the crystalline silicon wafer by metal organic chemical vapor deposition (MOCVD), and a built-in electric field is established on both sides to separate the photo-generated carriers; A transparent conductive layer is prepared on the surface of the heterojunction on both sides of the silicon wafer. Finally, a metal gate line is prepared on the transparent conductive layer on both sides of the silicon wafer to collect current, and the solar cell of the present invention is obtained.
本发明达 到的有益效果 是: The beneficial effects of the present invention are:
受光面由于采用了禁带宽度比非晶硅更大的 材料 , 能透过更大范围的短波入射光进入晶硅吸收层,有利于太阳电池短路电流的提升;而且进一步增大了光照时结区的电子空穴准费米能级之差,有益于开路电压的提升。采用导带位置比非晶硅更高的p层化合物薄膜材料,增大了p区与晶硅界面处的p区界面少子电子的阻挡势垒高度,从而减小了p区界面少子电子的复合。在n区采用价带位置比非晶硅更低的材料,能够增大n区与晶硅界面处的n区界面少子空穴的阻挡势垒高度,减少n区界面少子空穴的复合。在n区选择导带位置更低的材料,可以降低n区与晶硅界面处的n区界面多子电子的阻挡势垒,促进n区界面多子电子的界面输运。通过采用上述化合物异质结材料替代HIT太阳电池中使用的非晶硅,可以进一步降低异质结界面处的载流子复合,提高内建电场,有利于太阳电池开路电压及短路电流密度提高,最终提高太阳电池器件转换效率。经过器件模拟仿真分析,在晶硅界面钝化效果相同的条件下,基于此结构的新型晶硅异质结太阳电池(HCT)具有比HIT太阳电池更高的光电转换效率 。 The light-receiving surface is made of a material with a larger band gap than amorphous silicon. It can penetrate the crystal silicon absorption layer through a wider range of short-wave incident light, which is beneficial to the increase of the short-circuit current of the solar cell; and further increases the difference of the electron hole quasi-Fermi level in the junction region during illumination, which is beneficial to the open circuit voltage. Improvement. The p-layer compound thin film material with higher conduction band position than amorphous silicon increases the barrier barrier height of the minority electrons at the p-region interface at the p-region and the crystalline silicon interface, thereby reducing the composite of the minority electrons at the p-region interface. . In the n region, a material having a lower valence band position than amorphous silicon can increase the barrier barrier height of the n-region interface at the interface between the n region and the crystalline silicon interface, and reduce the recombination of the minority sub-holes at the n-region interface. Selecting a material with a lower conduction band position in the n region can reduce the barrier barrier of the multi-sub-electron interface at the n-region interface between the n-region and the crystalline silicon interface, and promote the interface transport of the multi-sub-electrons at the n-region interface. By using the above-mentioned compound heterojunction material instead of the amorphous silicon used in the HIT solar cell, the carrier recombination at the interface of the heterojunction can be further reduced, the built-in electric field can be improved, and the open circuit voltage and the short-circuit current density of the solar cell are improved. Ultimately improve the conversion efficiency of solar cell devices. After device simulation analysis, the new crystalline silicon heterojunction solar cell (HCT) based on this structure has higher photoelectric conversion efficiency than HIT solar cell under the same conditions of passivation effect at the crystalline silicon interface. .
本发明的实施方式Embodiments of the invention
工业实用性Industrial applicability
序列表自由内容Sequence table free content

Claims (4)

  1. 一种基于晶体硅材料的化合物半导体异质结太阳电池,其特征在于: 由栅电极、透明导电层、p型或n型化合物半导体薄膜、n型或p型晶硅片、n型或p型化合物半导体薄膜、透明导电层和栅电极依次堆叠而构成光伏器件,其中在n型或p型晶硅片的两面腐蚀有减反织构面,叠层结构的顺序为栅电极、透明导电层、受光面p型化合物半导体薄膜、n型晶硅片、背光面n型化合物半导体薄膜、透明导电层和栅电极,或者是栅电极、透明导电层、受光面n型化合物半导体薄膜、p型晶硅片、背光面p型化合物半导体薄膜、透明导电层和栅电极;受光面为p型或n型的化合物半导体薄膜厚度均为3-50纳米,禁带宽度均>1.7 eV,背光面的p型或n型化合物半导体薄膜的厚度亦为3-50纳米;无论是受光面还是背光面,p型化合物半导体薄膜的电子亲和势<3.8 eV,n型化合物薄膜的电子亲和势与禁带宽度之和大于>5.5 eV,透明导电层薄膜厚度均为150-800纳米。A compound semiconductor heterojunction solar cell based on crystalline silicon material, characterized in that: Forming a photovoltaic device by sequentially stacking a gate electrode, a transparent conductive layer, a p-type or n-type compound semiconductor film, an n-type or p-type crystalline silicon wafer, an n-type or p-type compound semiconductor film, a transparent conductive layer and a gate electrode, wherein The n-type or p-type crystalline silicon wafer is etched on both sides with an anti-texture surface. The order of the laminated structure is a gate electrode, a transparent conductive layer, a light-receiving surface p-type compound semiconductor film, an n-type crystalline silicon wafer, and a backlight surface n-type compound. a semiconductor film, a transparent conductive layer and a gate electrode, or a gate electrode, a transparent conductive layer, a light-receiving surface n-type compound semiconductor film, a p-type crystalline silicon wafer, a backlight surface p-type compound semiconductor film, a transparent conductive layer and a gate electrode; a light receiving surface The thickness of the compound semiconductor film of p-type or n-type is 3-50 nm, and the forbidden band width is >1.7. eV, the thickness of the p-type or n-type compound semiconductor film on the backlight surface is also 3-50 nm; the electron affinity of the p-type compound semiconductor film is <3.8, whether it is the light receiving surface or the backlight surface. The sum of the electron affinity and the forbidden band width of the eV, n-type compound film is greater than >5.5 The thickness of the transparent conductive layer film of eV is 150-800 nm.
  2. 根据权利要求1所述According to claim 1
    基于晶体硅材料的化合物半导体异质结太阳电池,其特征在于:A compound semiconductor heterojunction solar cell based on a crystalline silicon material, characterized in that:
    所述受光面为p型化合物薄膜时的材料采用砷化铝(AlAs) 或铝镓砷(AlGaAs),背光面为n型化合物薄膜材料可选用硫化锌(ZnS)、磷化镓(GaP)或砷化镓(GaAs);当n型化合物薄膜为受光面时,薄膜选用硫化锌(ZnS)或磷化镓(GaP),背光面p型化合物薄膜材料为砷化铝(AlAs)或铝镓砷(AlGaAs)。When the light-receiving surface is a p-type compound film, aluminum arsenide (AlAs) is used as a material. Or aluminum gallium arsenide (AlGaAs), the surface of the n-type compound film material may be zinc sulfide (ZnS), gallium phosphide (GaP) or gallium arsenide (GaAs); when the n-type compound film is a light-receiving surface, the film is selected Zinc sulfide (ZnS) or gallium phosphide (GaP), the back surface p-type compound film material is aluminum arsenide (AlAs) or aluminum gallium arsenide (AlGaAs).
  3. 根据权利要求1所述According to claim 1
    基于晶体硅材料的化合物半导体异质结太阳电池,其特征在于:A compound semiconductor heterojunction solar cell based on a crystalline silicon material, characterized in that:
    所述化合物半导体薄膜采用金属有机化学气相沉积(MOCVD)、低压化学气相沉积(LPCVD)、原子层沉积(ALD)、等离子体增强化学气相沉积(PECVD)、化学水浴法沉积(CBD)或真空溅射工艺制备,最终成膜为晶态或非晶态;化合物半导体薄膜在<500 °C低衬底温度条件下沉积,从而降低沉积工艺对电池的热损伤。The compound semiconductor film is formed by metal organic chemical vapor deposition (MOCVD), low pressure chemical vapor deposition (LPCVD), atomic layer deposition (ALD), plasma enhanced chemical vapor deposition (PECVD), chemical water bath deposition (CBD) or vacuum sputtering. Preparation by shot process, the final film formation is crystalline or amorphous; compound semiconductor film is <500 °C deposition under low substrate temperature conditions, thereby reducing thermal damage to the cell during the deposition process.
  4. 根据权利要求1所述According to claim 1
    基于晶体硅材料的化合物半导体异质结太阳电池,其特征在于:A compound semiconductor heterojunction solar cell based on a crystalline silicon material, characterized in that:
    所述与n型化合物半导体薄膜相邻的透明导电层为氧化铟锡(ITO)或ZnO:X,与p型化合物半导体薄膜相邻的透明导电层为氧化铟锡(ITO)、ZnO:X或铝镓砷(AlGaAs),其中X为III族元素。The transparent conductive layer adjacent to the n-type compound semiconductor film is indium tin oxide (ITO) or ZnO:X, and the transparent conductive layer adjacent to the p-type compound semiconductor film is indium tin oxide (ITO), ZnO:X or Aluminum gallium arsenide (AlGaAs), where X is a group III element.
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