WO2015064477A1 - 表示パネル - Google Patents
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- WO2015064477A1 WO2015064477A1 PCT/JP2014/078259 JP2014078259W WO2015064477A1 WO 2015064477 A1 WO2015064477 A1 WO 2015064477A1 JP 2014078259 W JP2014078259 W JP 2014078259W WO 2015064477 A1 WO2015064477 A1 WO 2015064477A1
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- wiring
- auxiliary
- wirings
- display panel
- auxiliary capacitance
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Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/133345—Insulating layers
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134336—Matrix
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
- G02F1/136263—Line defects
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
- G02F1/136272—Auxiliary lines
Definitions
- the present invention relates to a display panel including auxiliary wiring for auxiliary capacitance wiring for supplying a signal to the auxiliary capacitance of a pixel electrode.
- a general active matrix type liquid crystal display panel includes a TFT substrate on which TFTs (thin film transistors) serving as switching elements and pixel electrodes arranged in a matrix are formed, and a predetermined distance from the TFT substrate. Opposite substrates, and liquid crystal is filled between the substrates.
- the liquid crystal display panel is further provided with two polarizing filters that sandwich the TFT substrate and the counter substrate.
- a backlight is provided adjacent to the liquid crystal display panel.
- Each pixel electrode is connected to the drain electrode of each TFT and functions as a switching element for controlling the voltage of the pixel electrode.
- a predetermined gate wiring for supplying a gate signal is connected to the gate electrode of each TFT, and a predetermined source wiring for supplying a data signal is connected to the source electrode.
- the area on the TFT substrate where the pixel electrodes are formed in a matrix is called an active area, and the area surrounding the active area is called a frame area.
- a source wiring and a gate wiring are drawn from the active area, and each wiring is connected to a driver IC.
- the driver IC connected to the source wiring is called a source driver, and the driver IC connected to the gate wiring is called a gate driver.
- a data signal is input to each pixel electrode every predetermined time. Therefore, an auxiliary capacitor for stably holding the input data signal until the next input is connected to each pixel electrode, and an auxiliary capacitor wiring for supplying a signal to the auxiliary capacitor is disposed on the TFT substrate.
- the auxiliary capacitance wiring is disposed on the TFT substrate, in general, a predetermined number in parallel with the gate wiring is provided between the predetermined number of gate wirings in parallel with each other at a predetermined interval. The number is arranged.
- an auxiliary capacity trunk that distributes signals to the auxiliary capacity wiring is connected to the auxiliary capacity wiring.
- the auxiliary capacity main line is connected to a voltage application circuit, a voltage is applied to the auxiliary capacity wiring via the auxiliary capacity main line, and a signal is applied to the auxiliary capacity of each pixel electrode.
- the auxiliary capacitance wiring or auxiliary capacitance trunk line arranged on the substrate may be formed in a disconnected state.
- the auxiliary capacitance signal is not supplied to the auxiliary capacitance of the pixel electrode on the downstream side in the signal transmission direction from the position where the disconnection occurs.
- display defects may appear on the display panel.
- the display defect appears, the display quality of the display panel will be significantly impaired.
- the yield of the product is reduced.
- Patent Document 1 forms a path that bypasses the disconnection location by providing a spare wiring in the frame area.
- a possible TFT substrate configuration is disclosed.
- the auxiliary capacitance signal can be correctly supplied to the auxiliary capacitance of the pixel electrode.
- the auxiliary wiring, the auxiliary capacity line connected to the auxiliary capacity main line upstream from the disconnection point, and the auxiliary capacity line connected to the auxiliary capacity main line downstream from the disconnection point are connected.
- the auxiliary wiring, the auxiliary capacity line connected to the auxiliary capacity main line upstream from the disconnection point, and the auxiliary capacity line connected to the auxiliary capacity main line downstream from the disconnection point are connected.
- the display defect can be corrected only when the disconnection portion is in the frame region, and when the disconnection portion is in the active region, the display defect is corrected. I can't.
- the present invention has been made in view of such circumstances, and an object of the present invention is to provide a display panel capable of correcting a display defect caused by the disconnection when the disconnection is formed in the auxiliary capacitance wiring in the active region. .
- a display panel includes a substrate, a plurality of pixel electrodes arranged in a matrix on the substrate and displaying an image, and a plurality of capacitor portions each having one end connected to the pixel electrode.
- a plurality of first wirings disposed on the substrate along the first direction of the matrix and connected to the other ends of the capacitor units, and a second crossing the substrate on the substrate in the first direction.
- a plurality of picture element electrodes for displaying an image are arranged in a matrix on a substrate, and one end of a capacitor is connected to each picture element electrode.
- a plurality of first wirings are arranged on the substrate along the first direction of the matrix, and each is connected to the other end of the capacitor.
- a plurality of second wirings are arranged on the substrate along a second direction intersecting the first direction, and are connected to the first wiring.
- the third wiring is disposed on the substrate along the first direction, is connected to the second wiring, supplies a signal to the first wiring through the second wiring, and applies a voltage to the capacitor portion.
- the fourth wiring is disposed on the substrate along the second direction, and overlaps the first wiring with the insulating film interposed therebetween.
- the disconnection portion is bypassed by short-circuiting the first wiring and the fourth wiring having a disconnection, and the normal wiring that transmits the same signal as the fourth wiring and the first wiring having the disconnection. A path can be formed. Therefore, it is possible to correct a signal transmission failure caused by the disconnection of the first wiring.
- the display panel according to the present invention is characterized in that the plurality of second wirings are connected to the first wiring in a region where the plurality of pixel electrodes are arranged.
- the plurality of second wirings are connected to the first wiring in the region where the plurality of pixel electrodes are arranged, that is, in the active region. Therefore, a plurality of second wirings can be arranged in the active region and can be connected to the first wiring. Therefore, even if the wiring is disconnected in the active region, the redundancy in which a signal is transmitted without being affected by the disconnection is provided. Can be held in the circuit.
- the display panel according to the present invention is characterized in that the third wiring is disposed in a peripheral region surrounding a region where the plurality of pixel electrodes are disposed.
- the third wiring is disposed in a peripheral region surrounding the active region, that is, a frame region. Therefore, the wiring in the active region can be simplified.
- the display panel according to the present invention is characterized in that the fourth wiring is disposed in a peripheral region surrounding a region where the plurality of pixel electrodes are disposed.
- the fourth wiring is arranged in the frame area. Therefore, when the first wiring is disconnected further outside the second wiring located on the outermost side in the active region, it is possible to correct a signal transmission failure caused by the disconnection.
- each of the plurality of second wirings is connected to a part of the first wiring, and a plurality of the third wirings are provided, each of which is a part of the second wiring. It is characterized by being connected to.
- each of the plurality of second wirings is connected to a part of the plurality of first wirings.
- a plurality of third wirings are provided, each of which is electrically connected to a part of the plurality of second wirings. Therefore, the entire wiring and the plurality of capacitor units are divided into different input systems, and different signals can be applied to the capacitor units belonging to different input systems.
- the plurality of first wirings and the third wiring are formed in the same layer
- the plurality of second wirings and the fourth wiring are formed in the same layer
- the plurality of first wirings The layer in which the third wiring is formed and the layer in which the plurality of second wirings and the fourth wiring are formed are separated by the insulating film.
- the first wiring and the third wiring are formed in the same layer.
- the second wiring and the fourth wiring are formed in the same layer.
- Each layer is separated from each other by an insulating film. Therefore, by forming the wirings arranged in parallel to each other in the same layer, it is not necessary to stack a large number of layers on the substrate, and the number of steps for forming the substrate can be reduced.
- the plurality of second wirings are overlapped with the plurality of first wirings and the third wiring, and are connected to each other through a contact hole formed in the insulating film in the overlapping portion. It is characterized by being.
- the second wiring is superimposed on the first wiring and the third wiring.
- the second wiring overlaps with the first wiring and the third wiring and is connected via a contact hole formed in the insulating film. Therefore, the predetermined wirings are connected to each other, and are appropriately insulated by the insulating film so that other unnecessary connections are not made.
- the display panel according to the present invention is characterized in that the fourth wiring is superimposed on the third wiring with the insulating film interposed in a peripheral region surrounding the region where the plurality of pixel electrodes are arranged. To do.
- the fourth wiring is overlapped with the third wiring in the frame region with the insulating film interposed therebetween. Therefore, when the first wiring is disconnected further outside the second wiring located on the outermost side in the active region, the first wiring and the fourth wiring having the disconnection, and the first wiring having the disconnection from the fourth wiring
- the third wiring that transmits the same signal as the above, it is possible to form a transmission path that bypasses the disconnection point, and to correct a signal transmission failure caused by the disconnection.
- the display panel according to the present invention is characterized in that the fourth wiring is divided into a plurality of parts.
- the fourth wiring is divided into a plurality of pieces. Therefore, since it is possible to cope with correction of disconnection at a plurality of locations with one fourth wiring, the number of fourth wirings to be arranged can be reduced, and wiring space can be saved.
- the display panel according to the present invention includes a transistor having a drain electrode connected to each of the plurality of pixel electrodes and a first direction, and is connected to each gate electrode of the transistor to supply a gate signal.
- a transistor having a drain electrode connected to each of a plurality of pixel electrodes performs switching control of a signal input to the pixel electrodes.
- a gate wiring arranged in the first direction and connected to the gate electrode of the transistor supplies a gate signal related to switching.
- a source wiring arranged in the second direction and arranged on the source electrode of the transistor supplies a source signal to the pixel electrode. Therefore, the transistor can be turned on by inputting the gate signal, and the signal can be supplied to the pixel electrode connected to the turned-on transistor by the data signal. Therefore, an arbitrary signal can be input to each pixel electrode by the gate wiring and the source wiring.
- the plurality of gate wirings are formed in the same layer as the layer in which the plurality of first wirings and the third wiring are formed, and the plurality of source wirings are the plurality of second wirings.
- the wiring layer and the fourth wiring are formed in the same layer as the layer.
- the gate wiring is formed in the same layer as the layer in which the first wiring and the third wiring are formed.
- the source wiring is formed in the same layer as the layer in which the second wiring and the fourth wiring are formed. Therefore, by forming wirings arranged in parallel to each other in the same layer, it is not necessary to stack a large number of layers on the substrate, and the manufacturing process of the substrate can be reduced.
- the present invention it is possible to provide a display panel capable of correcting a display defect caused by the disconnection when a disconnection is formed in the auxiliary capacitance wiring in the active region.
- FIG. 5 is a circuit diagram showing an equivalent circuit of FIG. 4. It is the figure which expanded the boundary part of the active area
- FIG. 1 It is a schematic diagram of the TFT substrate of the display panel 1 in a modification of the first embodiment of the present invention. It is the figure which expanded the boundary part of the active area
- FIG. 1 is a conceptual diagram of a display panel 1 according to an embodiment of the present invention.
- 100 is a TFT substrate
- 110 is a counter substrate.
- the top, bottom, left, and right sides when facing the display panel 1 as shown in FIG. 1 are referred to as an upper side, a lower side, a left side, and a right side, respectively.
- FIG. 2 is a schematic view showing wiring by enlarging a partial region of the TFT substrate 100.
- FIG. 3 is a cross-sectional view showing an electrical connection portion between the wirings.
- FIG. 4 is a schematic diagram showing the pixel electrodes and the respective wirings on the TFT substrate 100.
- FIG. 5 is a circuit diagram showing the equivalent circuit of FIG.
- the TFT substrate 100 is a rectangular substrate having translucency, and has a slightly larger area than the counter substrate 110.
- the TFT substrate 100 is generally made of glass.
- pixel electrodes 20 and TFTs 30 corresponding to a plurality of display picture elements arranged in a matrix are formed.
- a drain electrode 33 of each TFT 30 is connected to each pixel electrode 20.
- a region 101 where the pixel electrodes 20 on the TFT substrate 100 are arranged in a matrix is called an active region.
- the area 102 surrounding the active area 101 is called a frame area.
- a terminal region 103 is provided in the peripheral portion of the TFT substrate 100, and data is supplied to the gate line 11 or the source electrode 32 that supplies a gate signal to the gate electrode 31 of the TFT 30 connected to each pixel.
- a plurality of connection terminals 10 to which source wirings 12 for supplying signals are respectively connected are provided.
- a data signal to be supplied to the source electrode 32 is input from the driver IC (not shown) to the connection terminals 10 arranged along the upper side of the display panel 1.
- a driver IC that generates a data signal is called a source driver.
- the data signal is input to each source electrode 32 through the source line 12 drawn from the connection terminal 10.
- a gate signal to be supplied to each gate electrode 31 is input from the driver IC to the connection terminals 10 arranged along the left side or the right side of the display panel 1.
- a driver IC that generates a gate signal is called a gate driver.
- the gate signal is connected to each gate electrode 31 through the gate wiring 11 drawn from the connection terminal 10.
- the counter substrate 110 is a light-transmitting rectangular substrate and is provided to face one surface of the TFT substrate 100 with a predetermined interval.
- the counter substrate 110 is also generally made of glass.
- a common electrode 40 (FIG. 5) to which a voltage is applied is formed between each pixel electrode 20 on the surface of the counter substrate 110 facing the TFT substrate.
- a light shielding unit 111 that shields the area around the display area is provided.
- the TFT substrate 100 and the counter substrate 110 are bonded together with a sealing material in a state where a gap is provided between both substrates, and a liquid crystal material is sealed in the gap to form a liquid crystal layer.
- the display panel 1 includes various other components, but description of those not directly related to the present invention will be omitted.
- a gate wiring 11 and a source wiring 12 drawn from the connection terminal 10 are arranged on the TFT substrate 100.
- a plurality of gate wirings 11 are arranged in parallel to each other in the longitudinal direction of the TFT substrate 100 (first direction described in claims), and the source wiring 12 is arranged in the short direction of the TFT substrate 100 (in claims). In the second direction), a plurality of them are arranged in parallel to each other.
- auxiliary capacitor 50 is connected to each pixel electrode 20.
- the other ends of the auxiliary capacitors 50 are arranged in parallel with each other in the longitudinal direction, and are connected to first auxiliary capacitor wires 13 (first wires described in claims) that supply predetermined auxiliary capacitor signals, respectively.
- first auxiliary capacitor wires 13 first wires described in claims
- second auxiliary capacitance lines 14 for supplying a predetermined auxiliary capacitance signal to the first auxiliary capacitance lines 13 are arranged in parallel with each other on the substrate in the short direction. 1 is overlapped with the auxiliary capacitance wiring 13.
- one auxiliary capacity trunk line 15 (third wiring described in the claims) is provided in the longitudinal direction so as to be drawn out from the terminal region 103 on the long side.
- the auxiliary capacity trunk line 15 has an overlapping portion with all the second auxiliary capacity lines 14.
- the gate line 11, the first auxiliary capacity line 13, and the auxiliary capacity main line 15 are arranged in parallel to each other on the same layer on the TFT substrate 100.
- An insulating film 60 (FIG. 3) is formed so as to cover the layer in which the gate wiring 11, the first auxiliary capacitance wiring 13, and the auxiliary capacitance trunk line 15 are disposed.
- the source wiring 12 and the second auxiliary capacitance wiring 14 are arranged in parallel to each other on the same layer on the insulating film 60.
- the gate wiring 11 is insulated from the source wiring 12 and the second auxiliary capacitance wiring 14 by the insulating film 60.
- the first auxiliary capacitance line 13 is insulated from the source line 12, while the contact formed in the insulating film 60 is entirely overlapped with the second auxiliary capacitance line 14.
- the second auxiliary capacitance wiring 14 is connected through the hole 61.
- the contact hole 61 is filled with a conductor.
- Reference numeral 70 represents a protective film.
- elements other than those necessary for showing the connection between the wirings are omitted.
- the auxiliary capacity trunk line 15 has the same structure as that of FIG. 3 and is insulated from the source line 12, but is overlapped with the second auxiliary capacity line 14 through the contact hole 61 at all the overlapping portions with the second auxiliary capacity line 14. Connected.
- auxiliary capacity auxiliary wiring 16 (fourth wiring according to the claims) is provided in the same layer as the layer in which the source wiring 12 and the second auxiliary capacitance wiring 14 are arranged in the lateral direction in the frame region 102. It is arranged.
- the auxiliary capacitor spare line 16 has an overlapping portion with all the first auxiliary capacitor lines 13.
- the auxiliary capacity auxiliary wiring 16 is not connected to any other wiring and is formed in an electrically floating island state.
- FIG. 2 only the auxiliary capacitor auxiliary wiring 16 disposed on the left side of the TFT substrate 100 is shown, but it is also disposed on the right side.
- the drain electrode 33 of the TFT 30 is connected to each pixel electrode 20.
- a gate wiring 11 is connected to the gate electrode 31 of the TFT 30, and a source wiring 12 is connected to the source electrode 32.
- One common electrode 40 faces each pixel electrode 20, and a voltage is applied between each pixel electrode 20. The potential of the common electrode 40 is uniform regardless of the position, and is represented by Vcom.
- the gate signal generated by the gate driver is input to the gate electrode 31 of each TFT 30 via the gate wiring 11, and each TFT 30 is turned on.
- a data signal generated by the source driver is input to the source electrode 32 of the TFT 30 that is turned on via the source wiring 12, and an arbitrary voltage is applied between each pixel electrode 20 and the common electrode 40.
- the first auxiliary capacitance wiring 13 is connected to the auxiliary capacitance 50, and a predetermined auxiliary capacitance signal is input.
- a predetermined auxiliary capacitance signal By inputting a predetermined auxiliary capacitance signal to the auxiliary capacitance 50, each pixel electrode 20 can continue to hold the data signal until the next input after the data signal is inputted. Therefore, the image can be continuously displayed for a predetermined time.
- a predetermined auxiliary capacitance signal may not be correctly input to some of the auxiliary capacitors 50 depending on the disconnection location.
- the pixel electrode 20 connected to the auxiliary capacitor 50 cannot continue to hold the data signal and appears as a display defect on the display panel 1. Therefore, in order to repair the display defect, it is necessary to correct the wiring.
- FIG. 6 is an enlarged view of the boundary portion between the active region 101 and the frame region 102 of the TFT substrate 100 according to the first embodiment of the present invention, and shows the wiring and disconnection points.
- FIG. 7 is a diagram showing a wiring correction method in the region of FIG. 6 and 7, the dotted line represents the boundary line between the active area 101 and the frame area 102, and the filled square represents that the wiring is connected. The same applies to the other drawings.
- Reference numeral 13 denotes a signal transmission defective portion Y where a predetermined auxiliary capacitance signal does not flow. Therefore, a predetermined auxiliary capacitance signal is not input to the auxiliary capacitance 50 connected to the signal transmission defective portion Y, and appears as a display defect in the corresponding picture element.
- Such display defects can be detected by visual recognition when a predetermined image for quality inspection is displayed on the display panel 1 in the inspection process.
- a display defect is detected in a part of the outermost picture element of the display panel 1, there is a possibility of disconnection as shown in FIG.
- the location of the disconnection X can be specified by observing, for example, with a microscope, a region on the TFT substrate 100 corresponding to the position of the visually recognized display defect on the display panel 1.
- FIG. 8 is a cross-sectional view taken along the line VIII-VIII in FIG.
- the overlapping portion A is visually observed, and the insulating film 60 of the overlapping portion A is irradiated with a laser from the outside of the TFT substrate 100 to melt the insulating film 60.
- the overlapping portion A at least one of the first auxiliary capacitor line 13 and the auxiliary capacitor auxiliary line 16 is melted by irradiating a laser to physically connect the first auxiliary capacitor line 13 and the auxiliary capacitor auxiliary line 16.
- the short-circuit part 62 to be connected is formed.
- the overlapping portion B is also short-circuited in the same process.
- any normal first auxiliary capacitance wiring 13 that is short-circuited with the auxiliary capacitance auxiliary wiring 16 may be selected as long as there is no defect.
- the closest first auxiliary capacitance line 13 is selected in order to shorten the transmission path and reduce the electrical resistance.
- the disconnection portion of the first auxiliary capacitance wiring 13 is inside the outermost second auxiliary capacitance wiring 14 in the active region 101, a plurality of the second auxiliary capacitance wirings 14 are arranged, and therefore there is a disconnection.
- the first auxiliary capacitance line 13 is connected to the second auxiliary capacitance line 14 together with fragments on both sides of the disconnection portion. Therefore, there is no defective transmission of the auxiliary capacitance signal and no display defect appears.
- the second auxiliary capacitance line 14 is disconnected, the auxiliary capacitance signal transmission failure does not occur and the display defect occurs because the second auxiliary capacitance line 14 is connected to the first auxiliary capacitance line 13 or the auxiliary capacity trunk line 15 on both sides of the disconnected position. Does not appear.
- FIG. 9 is a schematic diagram of the TFT substrate 100 of the display panel 1 in a modification of the first embodiment.
- two auxiliary capacity trunk lines 15a and 15b are provided.
- two auxiliary capacitor spare lines 16 are provided. Different auxiliary capacity signals can be transmitted to the two auxiliary capacity trunk lines 15a and 15b.
- the second auxiliary capacity line 14a is connected to the auxiliary capacity main line 15a
- the second auxiliary capacity line 14b is connected to the auxiliary capacity main line 15b.
- the storage capacitor main lines 15a and 15b are alternately connected. Accordingly, different auxiliary capacitance signals can be transmitted to the second auxiliary capacitance lines 14a and 14b.
- the first auxiliary capacitance line 13a is connected to all of the second auxiliary capacitance lines 14a, and the first auxiliary capacitance line 13b is connected to the second auxiliary capacitance line 14b.
- the second auxiliary capacitance lines 14a and 14b are alternately connected. Accordingly, the first auxiliary capacitance lines 13a and 13b can transmit different signals, and different auxiliary capacitance signals can be input to the auxiliary capacitances 50 connected thereto.
- FIG. 10 is an enlarged view of the boundary portion between the active region 101 and the frame region 102 of the TFT substrate 100 according to the modification of the first embodiment of the present invention, and shows the wiring and disconnection points.
- FIG. 11 is a diagram showing a wiring correction method in the region of FIG.
- the first auxiliary capacitance line 13a outside the disconnection X is , A signal transmission defective portion Y where a predetermined auxiliary capacitance signal does not flow. Since a predetermined auxiliary capacity signal is not input to the auxiliary capacity 50 connected to the signal transmission defective portion Y, it appears as a display defect in the corresponding picture element.
- the capacitor spare wiring 16 is short-circuited at the overlapping portion A.
- a short circuit occurs at the overlapping portion B. Since the method for identifying the location of the disconnection X and the method for short-circuiting the wiring are the same as those in the first embodiment, description thereof is omitted.
- auxiliary capacity trunk lines 15 and the auxiliary capacity reserve wiring 16 are arrange
- positioned it is not restricted to this. There may be three or more of each. Further, the number of auxiliary capacity trunk lines 15 and auxiliary capacity spare lines 16 is not limited to the same number.
- FIG. 12 is an enlarged view of the boundary portion between the active region 101 and the frame region 102 of the TFT substrate 100 according to the second embodiment of the present invention, and shows the wiring and disconnection locations.
- FIG. 13 is a diagram illustrating a wiring correction method in the region of FIG.
- the auxiliary capacity spare wiring 16 is superimposed on the auxiliary capacity main line 15 in the frame region 102.
- the first auxiliary capacitance line 13 outside the disconnection X is a predetermined auxiliary capacitance. It becomes a signal transmission defective portion Y in which no signal flows. Therefore, a predetermined auxiliary capacitance signal is not input to the auxiliary capacitance 50 connected to the signal transmission defective portion Y, and appears as a display defect in the corresponding picture element.
- the signal transmission defective portion Y of the disconnected first auxiliary capacitance wiring 13 and the auxiliary capacitance auxiliary wiring 16 that overlaps the signal transmission defective portion Y with the insulating film 60 interposed therebetween are superimposed.
- Short circuit at part A the auxiliary capacity spare line 16 and the auxiliary capacity trunk line 15 that transmits the same auxiliary capacity signal as the disconnected first auxiliary capacity line 13 are short-circuited at the overlapping portion B. Since the method for identifying the location of the disconnection X and the method for short-circuiting the wiring are the same as those in the first embodiment, description thereof is omitted.
- FIG. 14 is a diagram showing the disconnection of the storage capacitor main line 15 by enlarging the boundary portion between the active region 101 and the frame region 102 of the TFT substrate 100 according to the second embodiment of the present invention.
- FIG. 15 is a diagram showing a wiring correction method in the region of FIG. As shown in FIG. 14, the auxiliary capacity trunk line 15 is disconnected outside the outermost second auxiliary capacity line 14, and the position of the disconnection X is upstream from the second auxiliary capacity line 14 in the signal transmission direction. If there is, the auxiliary capacitance signal is not transmitted to all the auxiliary capacitances 50 connected to the auxiliary capacitance trunk 15 having the disconnection X via the second auxiliary capacitance wiring 14 and the first auxiliary capacitance wiring 13. Therefore, display defects appear in a wide range on the display panel 1.
- Such display defects can be detected by visual recognition when a predetermined image for quality inspection is displayed on the display panel 1 in the inspection process.
- the auxiliary capacity main line 15 may be disconnected as shown in FIG.
- the location of the disconnection X can be specified by observing the upstream portion of the auxiliary capacity trunk line 15 on the TFT substrate 100 with, for example, a microscope.
- the auxiliary capacity trunk line 15 having the disconnection X and the auxiliary capacity auxiliary wiring 16 overlapping the auxiliary capacity main line 15 with the insulating film 60 interposed therebetween are superimposed.
- the auxiliary capacitor spare line 16 is connected to the auxiliary capacitor trunk line 15 having the disconnection X, which overlaps the auxiliary capacitor spare line 16 with the insulating film 60 interposed therebetween, and is connected through the second auxiliary capacitor line 14.
- the first auxiliary capacitance line 13 is short-circuited at the overlapping portion B. Since the wiring short-circuit method is the same as that of the first embodiment, the description thereof is omitted.
- the disconnection X is bypassed, and the auxiliary capacitance main line 15 having the disconnection X is connected to the auxiliary capacitance main line 15 having the disconnection X via the second auxiliary capacitance line 14 and the first auxiliary capacitance line 13.
- a predetermined auxiliary capacitance signal is transmitted to all the auxiliary capacitors 50. Therefore, the display defect is corrected.
- the auxiliary capacitor spare line 16 can correct the wiring not only on the first auxiliary capacitor line 13 but also on the auxiliary capacitor main line 15.
- auxiliary capacity trunk line 15 and one auxiliary capacity auxiliary line 16 are provided, but the present invention is not limited to this. Two or more of each may be provided, and the number of each may be different.
- FIG. 16 is an enlarged view of the boundary portion between the active region 101 and the frame region 102 of the TFT substrate 100 according to the third embodiment of the present invention, and shows the wiring and disconnection locations.
- FIG. 17 is a diagram showing a wiring correction method in the region of FIG.
- the auxiliary capacitor spare line 16 is divided into a plurality of pieces.
- the first auxiliary capacitance line 13a outside the disconnection X is a predetermined auxiliary capacitance. It becomes a signal transmission defective portion Y in which no signal flows. Therefore, a predetermined auxiliary capacitance signal is not input to the auxiliary capacitance 50 connected to the signal transmission defective portion Y, and appears as a display defect in the corresponding picture element.
- a predetermined auxiliary capacitance signal can be transmitted to the signal transmission defective portion Y by bypassing the disconnection X and passing through the piece Z of the auxiliary capacitance auxiliary wiring 16. Therefore, a predetermined auxiliary capacity signal is input to the auxiliary capacity 50 connected to the signal transmission defective portion Y, and the display defect is eliminated.
- one auxiliary capacitor spare line 16 is divided into a plurality of pieces, even if one piece is used for correcting disconnection at one place, another piece is another piece. It can be used to correct the disconnection at the point.
- the first auxiliary capacitance line 13b that transmits an auxiliary capacitance signal that is different from the auxiliary capacitance signal transmitted by the first auxiliary capacitance line 13a having the disconnection X at a location far from the location of the disconnection X is the outermost second.
- the wiring can be corrected by using a fragment other than the fragment Z.
- the frame region 102 can be formed narrow, and the appearance quality of the display device equipped with the display panel 1 of the present embodiment can be improved.
- two auxiliary capacity trunk lines are provided and one auxiliary capacity backup line 16 is provided, but the present invention is not limited to this.
- One or three or more auxiliary capacity trunk lines may be provided, and two or more auxiliary capacity spare lines 16 may be provided.
- the common electrode is formed on the counter substrate.
- the present invention is not limited to this.
- the present invention can be applied to an IPS (In-Plane-Switching) type display panel having no common electrode on the counter substrate.
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Abstract
Description
実施の形態1.
図1は、本発明の実施の形態における表示パネル1の概念図である。100はTFT基板であり、110は対向基板である。本明細書中では、図1の様に表示パネル1に正対した場合の上下左右の辺をそれぞれ、上辺、下辺、左辺、右辺と呼称する。図2は、TFT基板100の一部領域を拡大して配線を示した模式図である。図3は、配線同士の電気的接続部分を示した断面図である。図4は、TFT基板100上の絵素電極及び各配線を示した模式図である。図5は、図4の等価回路を示した回路図である。
以下、本発明の実施の形態1の変形例における、実施の形態1と異なる特徴について説明する。実施の形態1と共通の点については同一の符号を付してその詳細な説明を省略する。図9は実施の形態1の変形例における表示パネル1のTFT基板100の模式図である。実施の形態1の変形例においては、図9に示す様に、2本の補助容量幹線15a,15bが配設されている。また、2本の補助容量予備配線16が配設されている。2本の補助容量幹線15a,15bにはそれぞれ異なる補助容量信号を伝送することができる。
以下、本発明の実施の形態2における、実施の形態1と異なる特徴について説明する。実施の形態1と共通の点については同一の符号を付してその詳細な説明を省略する。図12は、本発明の実施の形態2におけるTFT基板100のアクティブ領域101と額縁領域102の境界部分を拡大して配線及び断線箇所を示した図である。図13は、図12の領域における配線の修正方法を示した図である。
以下、本発明の実施の形態3における、実施の形態1,2と異なる特徴について説明する。実施の形態1,2と共通の点については同一の符号を付してその詳細な説明を省略する。図16は、本発明の実施の形態3におけるTFT基板100のアクティブ領域101と額縁領域102の境界部分を拡大して配線及び断線箇所を示した図である。図17は、図16の領域における配線の修正方法を示した図である。
10 接続端子
11 ゲート配線
12 ソース配線
13 第1補助容量配線
14 第2補助容量配線
15 補助容量幹線
16 補助容量予備配線
20 絵素電極
30 TFT
31 ゲート電極
32 ソース電極
33 ドレイン電極
40 共通電極
50 補助容量
60 絶縁膜
61 コンタクトホール
62 短絡部
70 保護膜
100 TFT基板
101 アクティブ領域
102 額縁領域
103 端子領域
110 対向基板
111 遮光部
Claims (11)
- 基板と、
該基板上にマトリックス状に配置され、画像を表示するための複数の絵素電極と、
各一端が該絵素電極夫々に接続された複数の容量部と、
前記基板上に前記マトリックスの第1方向に沿って配設され、前記各容量部の他端に夫々接続された複数の第1配線と、
前記基板上に第1方向に交差する第2方向に沿って配設され、夫々所定の第1配線と接続された複数の第2配線と、
前記基板上に第1方向に沿って配設され、所定の第2配線と接続され、該第2配線を介して、前記複数の第1配線に所定の信号を供給する第3配線と、
前記基板上に第2方向に沿って配設され、前記複数の第1配線に重畳された第4配線と、
前記第1配線と前記第4配線を絶縁する絶縁膜と
を備えることを特徴とする表示パネル。 - 前記複数の第2配線は、前記複数の絵素電極が配置された領域内で、第1配線と接続されている
ことを特徴とする請求項1に記載の表示パネル。 - 前記第3配線は、前記複数の絵素電極が配置された領域を囲繞する周辺領域に配設されていること
を特徴とする請求項1又は2に記載の表示パネル。 - 前記第4配線は、前記複数の絵素電極が配置された領域を囲繞する周辺領域に配設されている
ことを特徴とする請求項1から3のいずれか一つに記載の表示パネル。 - 前記複数の第2配線は夫々、前記第1配線の一部と接続されており、
前記第3配線は複数本配設され、夫々、前記第2配線の一部と接続されている
ことを特徴とする請求項1から4のいずれか一つに記載の表示パネル。 - 前記複数の第1配線及び前記第3配線は同じ層に形成され、
前記複数の第2配線及び前記第4配線は同じ層に形成され、
前記複数の第1配線及び前記第3配線が形成される層と、前記複数の第2配線及び前記第4配線が形成される層とは、前記絶縁膜により隔てられている
ことを特徴とする請求項1から5のいずれか一つに記載の表示パネル。 - 前記複数の第2配線は、前記複数の第1配線及び前記第3配線に重畳され、
重畳部分の前記絶縁膜に開設されたコンタクトホールを介して夫々接続されている
ことを特徴とする請求項6に記載の表示パネル。 - 前記第4配線は、前記複数の絵素電極が配置された領域を囲繞する周辺領域で前記絶縁膜を挟んで前記第3配線に重畳されている
ことを特徴とする請求項7に記載の表示パネル。 - 前記第4配線は、複数に分割されている
ことを特徴とする請求項7に記載の表示パネル。 - ドレイン電極が前記複数の絵素電極夫々に接続されたトランジスタと、
第1方向に沿って配設され、前記トランジスタのゲート電極に夫々接続され、ゲート信号を供給する複数のゲート配線と、
第2方向に沿って配設され、前記トランジスタのソース電極に夫々接続され、データ信号を供給する複数のソース配線と
を備えることを特徴とする請求項7から9のいずれか一つに記載の表示パネル。 - 前記複数のゲート配線は、前記複数の第1配線及び前記第3配線が形成される層と同じ層に形成され、
前記複数のソース配線は、前記複数の第2配線及び前記第4配線が形成される層と同じ層に形成される
ことを特徴とする請求項10に記載の表示パネル。
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CN201480058983.2A CN105684068B (zh) | 2013-10-30 | 2014-10-23 | 显示面板 |
US15/031,593 US10191342B2 (en) | 2013-10-30 | 2014-10-23 | Display panel |
JP2015544959A JP6473692B2 (ja) | 2013-10-30 | 2014-10-23 | 表示パネル |
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KR102590959B1 (ko) * | 2019-02-25 | 2023-10-18 | 주식회사 엘지화학 | 광학 디바이스 |
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- 2014-10-23 WO PCT/JP2014/078259 patent/WO2015064477A1/ja active Application Filing
- 2014-10-23 CN CN201480058983.2A patent/CN105684068B/zh active Active
- 2014-10-23 US US15/031,593 patent/US10191342B2/en not_active Expired - Fee Related
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Also Published As
Publication number | Publication date |
---|---|
US10191342B2 (en) | 2019-01-29 |
US20160259222A1 (en) | 2016-09-08 |
JP6473692B2 (ja) | 2019-02-20 |
CN105684068B (zh) | 2019-06-18 |
CN105684068A (zh) | 2016-06-15 |
JPWO2015064477A1 (ja) | 2017-03-09 |
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