WO2014153806A1 - 像素电路及其驱动方法、显示装置 - Google Patents

像素电路及其驱动方法、显示装置 Download PDF

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Publication number
WO2014153806A1
WO2014153806A1 PCT/CN2013/075176 CN2013075176W WO2014153806A1 WO 2014153806 A1 WO2014153806 A1 WO 2014153806A1 CN 2013075176 W CN2013075176 W CN 2013075176W WO 2014153806 A1 WO2014153806 A1 WO 2014153806A1
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WO
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Prior art keywords
switching transistor
control signal
transistor
gate
driving
Prior art date
Application number
PCT/CN2013/075176
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English (en)
French (fr)
Inventor
金泰逵
孙拓
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US14/354,771 priority Critical patent/US9734761B2/en
Publication of WO2014153806A1 publication Critical patent/WO2014153806A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing

Definitions

  • the present invention relates to the field of display manufacturing, and in particular, to a pixel circuit, a driving method thereof, and a display device. Background technique
  • AMOLED Active Matrix Organic Light Emitting Diode
  • TFT field effect thin film transistor
  • LCD liquid crystal display
  • the AMOLED can be driven by the current generated by the driving TFT in the saturated state. Because the same gray voltage is input, different threshold voltages will generate different driving currents, resulting in poor current consistency, and brightness uniformity is always very good. difference.
  • the circuit includes only two TFTs, T1 is a switching transistor, and the DTFT is a pixel-driven driving transistor.
  • the scan line Scan turns on the switch tube T1
  • the data voltage Data charges the storage capacitor C.
  • the switch tube T1 is turned off, and the stored voltage on the capacitor keeps the drive tube DTFT turned on, and the conduction current causes the OLED to emit light.
  • the advantage of the voltage control circuit is that the structure is simple and the charging speed of the capacitor is fast, but the disadvantage is that the linear control of the driving current is difficult because the uniformity of the ⁇ ⁇ (threshold voltage) of the DTFT is very high on the LTPS (low temperature polysilicon) process. Poor, and ⁇ ⁇ (threshold voltage) also drifts, even if the V th (threshold voltage) of different TFTs fabricated by the same process parameters is greatly different, causing poor illumination uniformity and brightness attenuation of the driving light-emitting circuit. . Summary of the invention
  • the present disclosure is directed to a pixel circuit, a driving method thereof, and a display device for compensating for a Vth uniformity of a driving tube in a pixel circuit, and solving the problem that the luminance of the LED is poor.
  • a pixel circuit comprising: a light emitting device connected in series between a first voltage signal terminal and a second voltage signal terminal; and a driving transistor for driving the light emitting device, the pixel circuit further comprising An illumination control module and a compensation module, wherein:
  • the input end of the illumination control module is connected to the first control signal, and the output end is respectively connected to the drive a source and a drain of the transistor are connected, and the light emission control module is configured to control a state of the driving transistor to cause the light emitting device to emit light or turn off in response to the first control signal;
  • the input end of the compensation module is connected to the second control signal, and the output end is respectively connected to the gate and the source of the driving transistor and the illumination control module, and the compensation module is configured to respond to the second control signal. Disconnecting or conducting a connection between a gate and a source of the driving transistor such that a voltage at a gate of the driving transistor compensates for a threshold voltage of the driving transistor when the light emitting device emits light.
  • the illumination control module includes:
  • a gate of the second switching transistor is connected to the first control signal, and a source is connected to a drain of the driving transistor;
  • a gate of the third switching transistor is connected to the first control signal, for disconnecting or conducting a connection between the driving transistor and the light emitting device in response to the first control signal, a drain of the third switching transistor is connected to a source of the driving transistor, and a source of the third switching transistor is connected to the light emitting device;
  • the compensation module includes:
  • a first capacitor and a second capacitor disposed in series between a drain of the second switching transistor and a gate of the driving transistor
  • a first switching transistor disposed between a gate and a source of the driving transistor, a gate of the first switching transistor being coupled to the second control signal, configured to be disconnected in response to the second control signal Or turning on the connection between the gate and the source of the driving transistor.
  • the compensation module further includes:
  • a gate of the fifth switching transistor is connected to the second control signal, a source of the fifth switching transistor is connected to a reference voltage, and a drain of the fifth switching transistor is opposite to the first A capacitor is connected to a common connection between the second capacitor.
  • the compensation module further includes:
  • a fourth switching transistor is disposed between the data signal terminal and the common connection end of the second switching transistor and the first capacitor, and a gate of the fourth switching transistor is connected to the second control signal
  • the drain of the fourth switching transistor is connected to one end of the first capacitor, and the source of the fourth switching transistor is connected to a data signal.
  • the reference voltage is connected to ground.
  • the first control signal and the second control signal output a low level, so that The first switching transistor, the second switching transistor and the third switching transistor are both turned on, and the gate of the driving transistor is connected to the drain;
  • the first control signal outputs a high level
  • the second control signal outputs a low level
  • the first switching transistor is turned on, the second switching transistor and the third switching transistor Disconnected, the gate and the drain of the driving transistor are kept connected;
  • the first control signal outputs a low level
  • the second control signal outputs a high level
  • the first switching transistor is turned off
  • the second switching transistor and the third switching transistor Turning on, the gate and drain of the driving transistor are disconnected, the driving transistor is saturated, and the light emitting device emits light.
  • Another aspect of the present invention also provides a method for driving a pixel circuit as described above, the method comprising:
  • the illumination control module is responsive to the first control signal
  • the compensation module is responsive to the second control signal to cause the drive transistor
  • the illumination control module is responsive to the first control signal
  • the compensation module is responsive to the second control signal to cause the drive transistor
  • the gate is connected to the drain
  • the illumination control module is responsive to the first control signal
  • the compensation module is responsive to the second control signal to cause the drive transistor Saturated, the light emitting device emits light.
  • the illuminating control module specifically includes:
  • a gate of the second switching transistor is connected to the first control signal, and a source is connected to a drain of the driving transistor;
  • a gate of the third switching transistor is connected to the first control signal, for disconnecting or conducting a connection between the driving transistor and the light emitting device in response to the first control signal, a drain of the third switching transistor is connected to a source of the driving transistor, and a source of the third switching transistor is connected to the light emitting device;
  • the compensation module includes:
  • a first capacitor and a second capacitor disposed in series between a drain of the second switching transistor and a gate of the driving transistor; a first switching transistor disposed between a gate and a source of the driving transistor, a gate of the first switching transistor being coupled to the second control signal, configured to be disconnected in response to the second control signal Or turning on the connection between the gate and the source of the driving transistor;
  • a gate of the fifth switching transistor is connected to the second control signal, a source of the fifth switching transistor is connected to a reference voltage, and a drain of the fifth switching transistor is opposite to the first a capacitor is connected to the common connection between the second capacitor;
  • a fourth switching transistor is disposed between the data signal terminal and the common connection end of the second switching transistor and the first capacitor, and a gate of the fourth switching transistor is connected to the second control signal a drain of the fourth switching transistor is connected to one end of the first capacitor, and a source of the fourth switching transistor is connected to a data signal;
  • the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, and the fifth switching transistor are all turned on;
  • the first switching transistor, the fourth switching transistor, and the fifth switching transistor are turned on, and the second switching transistor and the third switching transistor are turned off;
  • the first switching transistor, the fourth switching transistor, and the fifth switching transistor are turned off, and the second switching transistor and the third switching transistor are turned on.
  • the first control signal and the second control signal output a low level, and the data signal outputs a low level;
  • the first control signal outputs a high level, the second control signal outputs a low level, and the data signal outputs a high level;
  • the first control signal outputs a low level,
  • the second control signal outputs a high level, and the data signal outputs a low level.
  • Another aspect of the present invention provides a display device comprising the pixel circuit of any of the above. At least one of the above technical solutions according to an exemplary embodiment of the present invention has the following beneficial effects:
  • the pixel circuit controls the input first control signal and the second control signal, and the driving transistor for driving the light emitting device to emit light has different states at different stages, so that the threshold voltage Vth of the driving transistor can pass through the gate of the driving transistor
  • the voltage at point A reflects that the threshold voltage Vth of the driving transistor is compensated by the second capacitor C2 when the light emitting device emits light, thereby ensuring the uniformity of the luminance of the light emitting device.
  • DRAWINGS Figure 1 is a schematic view showing the connection of a prior art pixel circuit
  • FIG. 2 is a schematic diagram showing an implementation structure of a pixel circuit according to an exemplary embodiment of the present invention
  • FIG. 3 is a timing chart showing a pixel circuit of an exemplary embodiment of the present invention.
  • FIG. 4 is an equivalent circuit diagram of a pixel circuit of an exemplary embodiment of the present invention in a first stage.
  • FIG. 5 is an equivalent circuit diagram of a pixel circuit of an exemplary embodiment of the present invention in a second stage.
  • FIG. 6 is a view showing an exemplary embodiment of the present invention.
  • Equivalent Circuit Diagram of Pixel Circuit in Third Stage FIG. 7 is a schematic diagram showing the principle of a pixel circuit of an exemplary embodiment of the present invention. detailed description
  • a pixel circuit of an exemplary embodiment of the present invention includes a light emitting device OLED connected in series between a first voltage signal terminal V DD and a second voltage signal terminal V ss and a driving transistor for driving the light emitting device
  • the DTFT, the pixel circuit further includes an illumination control module and a compensation module.
  • the input end of the illuminating control module is connected to the first control signal, and the output end is respectively connected to the source and the drain of the driving transistor DTFT, and the illuminating control module is configured to control the driving transistor DTFT in response to the first control signal
  • the state is such that the light emitting device OLED is illuminated or turned off.
  • the input end of the compensation module is connected to the second control signal, and the output end is respectively connected to the gate and the source of the driving transistor DTFT and the illumination control module, and the compensation module is configured to respond to the second control signal.
  • the connection between the gate and the source of the driving transistor DTFT is turned on or turned on, so that the voltage at the gate of the driving transistor DTFT compensates for the threshold voltage of the driving transistor DTFT when the light emitting device OLED emits light.
  • the lighting control module may include:
  • a gate of the second switching transistor is connected to the first control signal, and a source is connected to a drain of the driving transistor DTFT;
  • a gate of the third switching transistor is connected to the first control signal, for disconnecting or turning on a connection between the driving transistor DTFT and the light emitting device OLED in response to the first control signal,
  • the drain of the third switching transistor is connected to the source of the driving transistor DTFT, and the source of the third switching transistor is connected to the light emitting device OLED.
  • the compensation module may include:
  • a first switching transistor disposed between a gate and a source of the driving transistor DTFT, a gate of the first switching transistor being coupled to the second control signal, configured to be turned off or in response to the second control signal Turning on a connection between a gate and a source of the driving transistor DTFT;
  • a gate of the fifth switching transistor is connected to the second control signal, a source of the fifth switching transistor is connected to a reference voltage, and a drain of the fifth switching transistor is opposite to the first a capacitor is connected to a common connection between the second capacitor;
  • a fourth switching transistor disposed between the data signal terminal and the common connection end of the second switching transistor and the first capacitor, and a gate of the fourth switching transistor is connected to the second control signal
  • the drain of the fourth switching transistor is connected to one end of the first capacitor, and the source of the fourth switching transistor is connected to a data signal.
  • a pixel circuit by sequentially connecting a second switching transistor, a first capacitor, and a second capacitor between the first voltage signal terminal and the gate of the driving transistor DTFT in series, a gate of the second switching transistor is coupled to the first control signal for disconnecting or turning on a connection between a gate and a drain of the driving transistor DTFT in response to the first control signal; a third switching transistor between the voltage signal terminal and the source of the driving transistor DTFT, the gate of the third switching transistor being connected to the first control signal for disconnecting or guiding in response to the first control signal Connecting the driving transistor DTFT to the light emitting device OLED;
  • a first switching transistor disposed between a gate and a source of the driving transistor DTFT, the gate of the first switching transistor being coupled to the second control signal for disconnecting or guiding in response to the second control signal A connection between the gate and the source of the driving transistor DTFT.
  • the pixel circuit controls the input first control signal and the second control signal, and the driving transistor DTFT used to drive the light emitting device OLED emits light has different states at different stages, so that the threshold voltage Vth of the driving transistor DTFT can pass the driving transistor
  • the voltage at point A of the gate of the DTFT reflects that the threshold voltage Vth of the driving transistor is compensated by the second capacitor C2 when the light emitting device OLED is illuminated, thereby ensuring the uniformity of the luminance of the light emitting device.
  • the third reference voltage is grounded.
  • the light emitting device OLED is connected in series between the second voltage signal terminal and the third switching transistor.
  • FIG. 2 is a schematic structural diagram of a pixel circuit according to an exemplary embodiment of the present invention.
  • the pixel circuit structure of this embodiment includes six TFTs (Thin Film Transistors) and two capacitors C1 and C2, wherein all of the six TFTs are P-channel transistors, wherein T1 ⁇ T5 are switches.
  • Transistor, DTFT is a driving transistor.
  • the source and drain of the reference current flow direction define the inflow pole of the current as the drain and the outflow pole as the source.
  • the present embodiment uses two control signals, namely, a first control signal and a second control signal, a data signal V DATA , and three voltage signals V DD , V SS , VRE F .
  • a light emitting device OLED and a driving transistor DTFT for driving the light emitting device OLED are connected in series between the first voltage signal terminal V DD and the second voltage signal terminal V ss .
  • a switching transistor T2 capacitors C1 and C2 are sequentially connected in series between the first voltage signal terminal V DD and the gate of the DTFT, and a switching transistor T1 is connected in series between the gate and the source of the DTFT, in the source of the OLED and the DTFT
  • a switching transistor T3 is connected in series between the poles, and a switching transistor T4 is connected in series between the common connection terminal of the switching transistor T2 and the capacitor C1 and the data signal V data , and the common connection terminal of the capacitors C1 and C2 and the reference voltage ⁇
  • a switching transistor T5 is connected in series.
  • the gates of the switching transistors ⁇ 2, ⁇ 3 are respectively used to receive the first control signal, and are turned off or turned on in response to the first control signal; the gates of the switching transistors T1, ⁇ 4 and ⁇ 5 are respectively used to receive the second control signal Responding to the second control signal, turning off or conducting.
  • the switching transistors ⁇ 4 and ⁇ 5 are connected to the gate and simultaneously connected to the second control signal.
  • Pixel reset phase The first phase shown in the timing diagram is the pixel reset phase. In this phase, the first control signal is at a low level, the second control signal is at a low level, and the data signal Vdata is at a low level.
  • the switching transistors T1 to T5 are both turned on.
  • the DTFT is in a diode-connected state.
  • the drain voltage of the DTFT is V DD +Vth.
  • the potential at point A reaches V DD +V th
  • the potential at point B is VRE F
  • the potential at point C is V dd .
  • the third voltage signal terminal VRE F is connected to ground, and thus VRE F is zero.
  • Data write phase The second phase shown in the timing diagram is the data write phase. At this time, the first control signal is at a high level, the second control signal is at a low level, and the data signal Vdata is at a high level.
  • the switching transistors T1, T4 and ⁇ 5 are turned on, and ⁇ 2 and ⁇ 3 are turned off. Since the switching transistor T1 connected in series between the gate and the source of the DTFT is turned on, The DTFT continues to maintain the diode connection state, and the potential at point A remains unchanged; since the switching transistor T5 is turned on, the potential VRE F at the common connection terminal B of the capacitors C1 and C2 is zero; since the switching transistor T2 is turned off, the switching transistor T4 Turning on, therefore, the potential at the common connection terminal C of the switching transistor T2 and the capacitor C1 is V data , and the capacitors C1 and C2 are both in a charged state.
  • Illumination phase The third phase shown in the timing diagram is the illumination phase. At this time, the first control signal is at a low level, the second control signal is at a high level, and the data signal Vdata is at a low level.
  • the switching transistors T1, ⁇ 4, and ⁇ 5 are turned off, and ⁇ 2 and ⁇ 3 are turned on. Since the switching transistor ⁇ 2 is turned on, the potential at the common connection terminal C of the switching transistor ⁇ 2 and the capacitor C1 becomes V DD . Since the switching transistor T5 is turned off, the capacitors C1 and C2 share one electrode, the potential at point B is increased to VRE F +V DD -V DATA , and the potential at point A is increased to 2V DD +Vth-V data .
  • the ⁇ ⁇ information of the driving transistor DTFT is fed back to the potential of the A point at the gate of the DTFT, and the V th difference of the DTFT is compensated by the storage mode of the capacitor C2 so that the driving currents I and Vth of the driving transistor are made. Irrelevant, the drive current is stabilized, and the uniformity of the panel brightness is improved.
  • Another aspect of the present invention also provides a method for driving a pixel circuit as described above, the method comprising:
  • the illumination control module is responsive to the first control signal
  • the compensation module is responsive to the second control signal to connect the gate and the drain of the driving transistor DTFT
  • the illumination control module is responsive to the first control signal
  • the compensation module is responsive to the second control signal to maintain a connection between the gate and the drain of the driving transistor DTFT;
  • the illumination control module is responsive to the first control signal
  • the compensation module is responsive to the second control signal to saturate the drive transistor DTFT, and the illumination device OLED emits light.
  • the illumination control module can include:
  • a gate of the second switching transistor is connected to the first control signal, and a source is connected to a drain of the driving transistor DTFT;
  • the gate of the third switching transistor is connected to the first control signal, for disconnecting or turning on the connection of the driving transistor DTFT and the light emitting device OLED in response to the first control signal, the drain of the third switching transistor a source of the driving transistor DTFT is connected, and a source of the third switching transistor is connected to the light emitting device OLED;
  • the compensation module can include:
  • a first switching transistor disposed between the gate and the source of the driving transistor DTFT, the gate of the first switching transistor being connected to the second control signal for disconnecting or turning on the gate of the driving transistor in response to the second control signal The connection between the pole and the source;
  • a gate of the fifth switching transistor is connected to the second control signal, a source of the fifth switching transistor is connected to the reference voltage, a drain of the fifth switching transistor is common to the first capacitor and the second capacitor Connection connection;
  • a fourth switching transistor is disposed between the data signal terminal and the common connection end of the second switching transistor and the first capacitor, and the gate of the fourth switching transistor is connected to the second control signal, and the drain of the fourth switching transistor is One end of the capacitor is connected, and the source of the fourth switching transistor is connected to the data signal; in an exemplary embodiment, in the first stage, the first switching transistor, the second switching transistor, the third switching transistor, and the fourth switching transistor And the fifth switching transistor are both turned on;
  • the first switching transistor, the fourth switching transistor, and the fifth switching transistor are turned on, and the second switching transistor and the third switching transistor are turned off;
  • the first switching transistor, the fourth switching transistor, and the fifth switching transistor are turned off, and the second switching transistor and the third switching transistor are turned on.
  • the first control signal and the second control signal output a low level, and the data signal outputs a low level; in the second stage, the first control signal outputs a high level, and the second control signal outputs a low level. Level, the data signal outputs a high level; In the third stage, the first control signal outputs a low level, the second control signal outputs a high level, and the data signal outputs a low level.
  • the above method controls the input first control signal and the second control signal, and the driving transistor used for driving the light emitting device to emit light has different states at different stages, so that the threshold voltage of the driving transistor is made.
  • Vth can be reflected by the voltage at point A of the gate of the driving transistor.
  • the threshold voltage ⁇ ⁇ of the driving transistor is compensated by the second capacitor C2, thereby ensuring the uniformity of the luminance of the light emitting device.

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Abstract

本发明涉及显示器制造领域。提供一种像素电路及其驱动方法、显示装置。所述像素电路包括在第一电压信号端子和第二电压信号端子之间串联的发光器件和驱动晶体管，还包括发光控制模块和补偿模块；发光控制模块的输入端与第一控制信号连接，输出端分别与驱动晶体管的源极和漏极连接，用于响应第一控制信号，控制驱动晶体管的状态，使发光器件发光或关闭；补偿模块的输入端与第二控制信号连接，输出端分别与驱动晶体管的栅极、源极和发光控制模块连接，用于响应第二控制信号，断开或导通驱动晶体管的栅极与源极之间的连接，使发光器件发光时驱动晶体管的栅极处的电压补偿驱动晶体管的阈值电压。通过以上方案能够解决发光二极管发光亮度均匀性差的问题。

Description

像素电路及其驱动方法、 显示装置 技术领域
本发明涉及显示器制造领域， 尤其涉及一种像素电路及其驱动方法、显示 装置。 背景技术
有源矩阵有机发光二极管 （AMOLED )显示作为新型的显示技术， 与场 效应薄膜晶体管 （TFT )液晶显示器（LCD )相比， AMOLED 不管在视角范 围、画质、效能及成本上都有很多优势，在显示器制造领域有巨大的发展潜力。
AMOLED能够发光是由驱动 TFT在饱和状态时产生的电流所驱动， 因为 输入相同的灰阶电压时， 不同的临界电压会产生不同的驱动电流，造成电流的 一致性很差， 亮度均匀性一直很差。
如图 1所示的传统的 2T1C电路，该电路只包含两个 TFT, T1为开关管， DTFT为像素驱动的驱动管。 扫描线 Scan开启开关管 T1 ,数据电压 Data对存 储电容器 C充电， 发光期间开关管 T1关闭， 电容器上的存储的电压使驱动管 DTFT保持导通， 导通电流使 OLED发光。要实现稳定显示， 就要为 OLED提 供稳定电流。 电压控制电路的优点是结构筒单、 电容充电速度快， 但是缺点是 驱动电流的线性控制困难， 原因是 LTPS (低温多晶硅）制程（process )上使 DTFT的 νώ (阈值电压 ) 的均匀性非常差， 同时 νώ (阈值电压 )也有漂移， 即便是同样工艺参数制造出来的不同 TFT的 Vth (阈值电压 )也有较大差异， 造成驱动发光电路的发光亮度均匀性很差和亮度衰减的问题。 发明内容
据此， 本公开旨在提供一种像素电路及其驱动方法、 显示装置， 用于对像 素电路中的驱动管进行 Vth均勾度的补偿，解决发光二极管发光亮度均勾性差 的问题。
根据本发明的一个方面，提供一种像素电路， 包括在第一电压信号端子和 第二电压信号端子之间串联的发光器件和用于驱动所述发光器件的驱动晶体 管， 所述像素电路还包括发光控制模块和补偿模块， 其中：
所述发光控制模块的输入端与第一控制信号连接，输出端分别与所述驱动 晶体管的源极和漏极连接， 所述发光控制模块用于响应所述第一控制信号，控 制所述驱动晶体管的状态， 使所述发光器件发光或关闭；
所述补偿模块的输入端与第二控制信号连接，输出端分别与所述驱动晶体 管的栅极、 源极和所述发光控制模块连接， 所述补偿模块用于响应所述第二控 制信号， 断开或导通所述驱动晶体管的栅极与源极之间的连接，使所述发光器 件发光时所述驱动晶体管的栅极处的电压补偿所述驱动晶体管的阈值电压。
可选地， 所述发光控制模块包括：
第二开关晶体管， 所述第二开关晶体管的栅极与所述第一控制信号连接 , 源极与所述驱动晶体管的漏极连接；
第三开关晶体管， 所述第三开关晶体管的栅极与所述第一控制信号连接, 用于响应所述第一控制信号，断开或导通所述驱动晶体管与所述发光器件的连 接， 所述第三开关晶体管的漏极与所述驱动晶体管的源极连接， 所述第三开关 晶体管的源极与所述发光器件连接；
所述补偿模块包括：
串联设置在所述第二开关晶体管的漏极和所述驱动晶体管的栅极之间的 第一电容器和第二电容器；
第一开关晶体管，设置在所述驱动晶体管的栅极与源极之间， 所述第一开 关晶体管的栅极与所述第二控制信号连接， 用于响应所述第二控制信号， 断开 或导通所述驱动晶体管的栅极与源极之间的连接。
可选地， 所述补偿模块还包括：
第五开关晶体管， 所述第五开关晶体管的栅极与所述第二控制信号连接 , 所述第五开关晶体管的源极与参考电压连接，所述第五开关晶体管的漏极与所 述第一电容与所述第二电容之间的公共连接端连接。
可选地， 所述补偿模块还包括：
第四开关晶体管，设置于数据信号端子和所述第二开关晶体管与所述第一 电容的公共连接端之间，且所述第四开关晶体管的栅极与所述第二控制信号连 接， 所述第四开关晶体管的漏极与所述第一电容的一端连接， 所述第四开关晶 体管的源极与数据信号连接。
可选地， 所述参考电压接地连接。
可选地， 上述所述的像素电路：
在第一阶段， 所述第一控制信号和所述第二控制信号输出低电平，使所述 第一开关晶体管、所述第二开关晶体管和所述第三开关晶体管均导通， 所述驱 动晶体管的栅极与漏极连接；
在第二阶段， 所述第一控制信号输出高电平， 所述第二控制信号输出低电 平，使所述第一开关晶体管导通， 所述第二开关晶体管和所述第三开关晶体管 断开， 所述驱动晶体管的栅极与漏极保持连接；
在第三阶段， 所述第一控制信号输出低电平， 所述第二控制信号输出高电 平，使所述第一开关晶体管断开， 所述第二开关晶体管和所述第三开关晶体管 导通， 所述驱动晶体管的栅极与漏极断开， 所述驱动晶体管饱和， 所述发光器 件发光。
本发明另一方面还提供一种用于驱动如上所述像素电路的方法，所述方法 包括：
在第一阶段，施加所述第一控制信号和所述第二控制信号， 所述发光控制 模块响应所述第一控制信号， 所述补偿模块响应所述第二控制信号，使所述驱 动晶体管的栅极与漏极连接；
在第二阶段，施加所述第一控制信号和所述第二控制信号， 所述发光控制 模块响应所述第一控制信号， 所述补偿模块响应所述第二控制信号，使所述驱 动晶体管的栅极与漏极保持连接；
在第三阶段，施加所述第一控制信号和所述第二控制信号， 所述发光控制 模块响应所述第一控制信号， 所述补偿模块响应所述第二控制信号，使所述驱 动晶体管饱和， 所述发光器件发光。
可选地， 上述所述的方法中：
所述发光控制模块具体包括：
第二开关晶体管， 所述第二开关晶体管的栅极与所述第一控制信号连接 , 源极与所述驱动晶体管的漏极连接；
第三开关晶体管， 所述第三开关晶体管的栅极与所述第一控制信号连接, 用于响应所述第一控制信号，断开或导通所述驱动晶体管与所述发光器件的连 接， 所述第三开关晶体管的漏极与所述驱动晶体管的源极连接， 所述第三开关 晶体管的源极与所述发光器件连接；
所述补偿模块包括：
串联设置在所述第二开关晶体管的漏极和所述驱动晶体管的栅极之间的 第一电容和第二电容； 第一开关晶体管，设置在所述驱动晶体管的栅极与源极之间， 所述第一开 关晶体管的栅极与所述第二控制信号连接， 用于响应所述第二控制信号， 断开 或导通所述驱动晶体管的栅极与源极之间的连接；
第五开关晶体管， 所述第五开关晶体管的栅极与所述第二控制信号连接 , 所述第五开关晶体管的源极与参考电压连接，所述第五开关晶体管的漏极与所 述第一电容与所述第二电容之间的公共连接端连接；
第四开关晶体管，设置于数据信号端子和所述第二开关晶体管与所述第一 电容的公共连接端之间，且所述第四开关晶体管的栅极与所述第二控制信号连 接， 所述第四开关晶体管的漏极与所述第一电容的一端连接， 所述第四开关晶 体管的源极与数据信号连接；
其中， 在所述第一阶段， 所述第一开关晶体管、 所述第二开关晶体管、 所 述第三开关晶体管、 所述第四开关晶体管和所述第五开关晶体管均导通；
在所述第二阶段， 所述第一开关晶体管、所述第四开关晶体管和所述第五 开关晶体管导通， 所述第二开关晶体管和所述第三开关晶体管断开；
在所述第三阶段， 所述第一开关晶体管、所述第四开关晶体管和所述第五 开关晶体管断开， 所述第二开关晶体管和所述第三开关晶体管导通。
可选地， 上述所述的方法， 在所述第一阶段， 所述第一控制信号和所述第 二控制信号输出低电平， 所述数据信号输出低电平； 在所述第二阶段， 所述第 一控制信号输出高电平， 所述第二控制信号输出低电平， 所述数据信号输出高 电平； 在所述第三阶段， 所述第一控制信号输出低电平， 所述第二控制信号输 出高电平， 所述数据信号输出低电平。
本发明另一方面还提供一种显示装置， 包括如上任一项所述的像素电路。 按照本发明示例性实施例的上述技术方案中的至少一个具有以下有益效 果：
所述像素电路通过控制所输入的第一控制信号和第二控制信号，使用于驱 动发光器件发光的驱动晶体管在不同阶段具有不同状态，使驱动晶体管的阈值 电压 Vth能够通过驱动晶体管的栅极处的 A点电压反映，在发光器件的发光时， 采用第二电容器 C2补偿驱动晶体管的阈值电压 Vth, 从而保证发光器件发光 亮度的均匀性。 附图说明 图 1表示现有技术像素电路的连接示意图；
图 2表示本发明示例性实施例的像素电路的实现结构示意图；
图 3表示本发明示例性实施例的像素电路的时序图；
图 4表示本发明示例性实施例的像素电路在第一阶段的等效电路图 图 5表示本发明示例性实施例的像素电路在第二阶段的等效电路图 图 6表示本发明示例性实施例的像素电路在第三阶段的等效电路图 图 7表示本发明示例性实施例的像素电路的原理示意图。 具体实施方式
为使本发明的目的、技术方案和优点更加清楚， 下面将结合附图及具体实 施例对本发明进行详细描述。
如图 7 所示， 本发明示例性实施例的像素电路， 包括第一电压信号端子 VDD和第二电压信号端子 Vss之间串联的发光器件 OLED和用于驱动所述发光 器件的驱动晶体管 DTFT, 该像素电路还包括发光控制模块和补偿模块。
所述发光控制模块的输入端与第一控制信号连接，输出端分别与驱动晶体 管 DTFT的源极和漏极连接， 所述发光控制模块用于响应所述第一控制信号， 控制驱动晶体管 DTFT的状态， 使发光器件 OLED发光或关闭。
所述补偿模块的输入端与第二控制信号连接， 输出端分别与驱动晶体管 DTFT的栅极、 源极和所述发光控制模块连接， 所述补偿模块用于响应所述第 二控制信号， 断开或导通驱动晶体管 DTFT的栅极与源极之间的连接，使发光 器件 OLED发光时驱动晶体管 DTFT 的栅极处的电压补偿所述驱动晶体管 DTFT的阈值电压。
在一个示例性实施例中， 所述发光控制模块可包括：
第二开关晶体管， 所述第二开关晶体管的栅极与所述第一控制信号连接 , 源极与驱动晶体管 DTFT的漏极连接；
第三开关晶体管， 所述第三开关晶体管的栅极与所述第一控制信号连接, 用于响应所述第一控制信号，断开或导通驱动晶体管 DTFT与发光器件 OLED 的连接， 所述第三开关晶体管的漏极与驱动晶体管 DTFT的源极连接， 所述第 三开关晶体管的源极与发光器件 OLED连接。
在一个示例性实施例中， 所述补偿模块可包括：
串联设置在所述第二开关晶体管的漏极和驱动晶体管 DTFT 的栅极之间 的第一电容器和第二电容器；
第一开关晶体管，设置在驱动晶体管 DTFT的栅极与源极之间， 所述第一 开关晶体管的栅极与所述第二控制信号连接， 用于响应所述第二控制信号， 断 开或导通驱动晶体管 DTFT的栅极与源极之间的连接；
第五开关晶体管， 所述第五开关晶体管的栅极与所述第二控制信号连接 , 所述第五开关晶体管的源极与参考电压连接，所述第五开关晶体管的漏极与所 述第一电容器与所述第二电容器之间的公共连接端连接；
第四开关晶体管，设置于数据信号端子和所述第二开关晶体管与所述第一 电容器的公共连接端之间，且所述第四开关晶体管的栅极与所述第二控制信号 连接， 所述第四开关晶体管的漏极与所述第一电容器的一端连接， 所述第四开 关晶体管的源极与数据信号连接。
根据本发明示例性实施例的一种像素电路，通过依次串联设置在所述第一 电压信号端子和驱动晶体管 DTFT的栅极之间的第二开关晶体管、第一电容器 和第二电容器， 所述第二开关晶体管的栅极与第一控制信号连接， 用于响应所 述第一控制信号， 断开或导通驱动晶体管 DTFT的栅极与漏极之间的连接； 通过设置在所述第二电压信号端子和驱动晶体管 DTFT 的源极之间的第 三开关晶体管， 所述第三开关晶体管的栅极与所述第一控制信号连接， 用于响 应所述第一控制信号， 断开或导通驱动晶体管 DTFT与发光器件 OLED的连 接；
通过设置在驱动晶体管 DTFT的栅极与源极之间的第一开关晶体管，所述 第一开关晶体管的栅极与第二控制信号连接， 用于响应所述第二控制信号， 断 开或导通驱动晶体管 DTFT的栅极与源极之间的连接。
所述像素电路通过控制所输入的第一控制信号和第二控制信号，使用于驱 动发光器件 OLED发光的驱动晶体管 DTFT在不同阶段具有不同状态， 使驱 动晶体管 DTFT的阈值电压 Vth能够通过驱动晶体管 DTFT的栅极处的 A点电 压反映， 在发光器件 OLED的发光时， 采用第二电容器 C2补偿驱动晶体管的 阈值电压 Vth, 从而保证发光器件发光亮度的均匀性。
可选择地， 所述第三参考电压接地连接。
此夕卜，发光器件 OLED串接在第二电压信号端子与第三开关晶体管之间。 以下将对本发明实施例的像素电路的具体结构进行详细描述。
如图 2 所示为本发明示例性实施例的像素电路的结构示意图。 参阅图 2 所示， 本实施例的像素电路结构含有 6个 TFT ( Thin Film Transistor, 薄膜场 效应晶体管 )和 2个电容器 C1和 C2, 其中， 6个 TFT皆为 P沟道晶体管， 其中 T1~T5为开关晶体管， DTFT为驱动晶体管。 以下说明中， 对于 T1至 Τ5 以及驱动晶体管来说， 参考电流的流动方向定义源、 漏极， 电流的流入极作为 漏极， 流出极作为源极。 此外， 本实施例使用了两个控制信号， 即， 第一控制 信号和第二控制信号， 一个数据信号 VDATA, 三个电压信号 VDD、 VSS、 VREF。
如图 2所示，在第一电压信号端子 VDD和第二电压信号端子 Vss之间串联 发光器件 OLED和用于驱动发光器件 OLED的驱动晶体管 DTFT。在第一电压 信号端子 VDD和 DTFT的栅极之间依次串接开关晶体管 T2、电容器 C1和 C2, 在 DTFT的栅极和源极之间串接有开关晶体管 T1 , 在 OLED和 DTFT的源极 之间串接有开关晶体管 T3, 在开关晶体管 T2与电容器 C1的公共连接端与数 据信号 Vdata之间串接有开关晶体管 T4,在电容器 C1与 C2的公共连接端与参 考电压 ^^之间串接有开关晶体管 T5。 其中， 开关晶体管 Τ2、 Τ3的栅极分 别用于接收第一控制信号， 响应该第一控制信号， 断开或导通； 开关晶体管 Tl、 Τ4和 Τ5的栅极分别用于接收第二控制信号， 响应该第二控制信号， 断开 或导通。在本发明的一个示例性实施例中，开关晶体管 Τ4和 Τ5的栅极连接， 并同时与第二控制信号连接。
下面结合图 3所示的时序图，对图 2所示的像素电路结构的工作流程进行 详细介绍：
1)像素复位阶段：时序图所示的第①阶段，为像素复位阶段。在该阶段中， 中， 第一控制信号为低电平， 第二控制信号为低电平， 数据信号 Vdata为低电 平。
参阅图 4所示该第①阶段此时的等效电路， 此时开关晶体管 T1至 T5均 导通。 此时由于开关晶体管 T1导通， DTFT处于二极管连接状态。 此时 DTFT 的漏极电压为 VDD+Vth。 在第①阶段最后， A点电位达到 VDD+Vth, B点电位 为 VREF, C点电位为 Vdd。 在本发明的一个示例性实施例中， 第三电压信号端 子 VREF接地连接， 因此 VREF为零。
2) 数据写入阶段： 时序图所示的第②阶段， 为数据写入阶段。 此时， 第 一控制信号处于高电平、第二控制信号处于低电平、数据信号 Vdata为高电平。
参阅图 5所示第②阶段的等效电路，此时开关晶体管 Tl、 T4和 Τ5导通， Τ2、 Τ3断开。 由于串接于 DTFT的栅极与源极之间的开关晶体管 T1导通， 因 此 DTFT继续保持二极管连接状态， A点电位保持不变； 由于开关晶体管 T5 导通， 因此电容器 C1与 C2的公共连接端 B处的电位 VREF为零； 由于开关晶 体管 T2断开， 开关晶体管 T4导通， 因此开关晶体管 T2与电容器 C1的公共 连接端 C处的电位为 Vdata, 电容器 C1和 C2均处于充电状态。
3)发光阶段： 时序图所示的第③阶段， 为发光阶段。 此时， 第一控制信 号处于低电平、 第二控制信号处于高电平， 数据信号 Vdata为低电平。
参阅图 6所示的该第③阶段的等效电路图，此时开关晶体管 Tl、 Τ4和 Τ5 断开， Τ2和 Τ3导通。 由于开关晶体管 Τ2导通， 因此开关晶体管 Τ2与电容 器 C1的公共连接端 C处的电位变为 VDD。 由于开关晶体管 T5断开， 电容器 C1和 C2共用一个电极， B点电位提高至 VREF+VDD-VDATA, 同时 A点电位提高 至 2VDD+Vth-Vdata。 此时， 对于 DTFT 而言， 栅极与源极之间的电压差 s = VDD+ Vth- Vdata, DTFT此时处于饱和状态， 为发光器件 OLED充电， 所输出电 流为：
I = 2 ^ (v9s - vt = 2 ^VDD + Vth - DATA - vth)2 = ^(層 - DATA)2 因此， 此时发光器件 OLED上的电流与 DTFT的阈值电压 Vth无关， 这样 OLED的驱动电流可以保持稳定， 从而改善面板亮度的均匀性。
按照本发明示例性实施例的像素电路， 将驱动晶体管 DTFT的 νώ信息反 馈为 DTFT栅极处 A点电位，使用电容器 C2存储方式补偿 DTFT的 Vth差异， 使得驱动晶体管的驱动电流 I和 Vth无关， 达到驱动电流的稳定， 改善了面板 亮度的均匀性。
本发明另一方面还提供一种用于驱动如上所述像素电路的方法，所述方法 包括：
在第一阶段，施加第一控制信号和第二控制信号，发光控制模块响应第一 控制信号， 补偿模块响应第二控制信号，使驱动晶体管 DTFT的栅极与漏极连 接；
在第二阶段，施加第一控制信号和第二控制信号，发光控制模块响应第一 控制信号， 补偿模块响应所述第二控制信号，使驱动晶体管 DTFT的栅极与漏 极保持连接；
在第三阶段，施加第一控制信号和第二控制信号，发光控制模块响应第一 控制信号， 补偿模块响应第二控制信号， 使驱动晶体管 DTFT饱和， 发光器件 OLED发光。 发光控制模块可包括：
第二开关晶体管， 第二开关晶体管的栅极与第一控制信号连接， 源极与驱 动晶体管 DTFT的漏极连接；
第三开关晶体管， 第三开关晶体管的栅极与第一控制信号连接， 用于响应 第一控制信号， 断开或导通驱动晶体管 DTFT与发光器件 OLED的连接， 第 三开关晶体管的漏极与驱动晶体管 DTFT的源极连接，第三开关晶体管的源极 与发光器件 OLED连接；
补偿模块可包括：
串联设置在第二开关晶体管的漏极和驱动晶体管 DTFT 的栅极之间的第 一电容器和第二电容器；
第一开关晶体管，设置在驱动晶体管 DTFT的栅极与源极之间， 第一开关 晶体管的栅极与第二控制信号连接， 用于响应第二控制信号， 断开或导通驱动 晶体管的栅极与源极之间的连接；
第五开关晶体管， 第五开关晶体管的栅极与第二控制信号连接， 第五开关 晶体管的源极与参考电压连接，第五开关晶体管的漏极与第一电容器与第二电 容器之间的公共连接端连接；
第四开关晶体管，设置于数据信号端子和第二开关晶体管与第一电容器的 公共连接端之间，且第四开关晶体管的栅极与第二控制信号连接， 第四开关晶 体管的漏极与第一电容器的一端连接，第四开关晶体管的源极与数据信号连接; 在一个示例性实施例中，在第一阶段，第一开关晶体管、第二开关晶体管、 第三开关晶体管、 第四开关晶体管和第五开关晶体管均导通；
在第二阶段， 第一开关晶体管、 第四开关晶体管和第五开关晶体管导通， 第二开关晶体管和第三开关晶体管断开；
在第三阶段， 第一开关晶体管、 第四开关晶体管和第五开关晶体管断开， 第二开关晶体管和第三开关晶体管导通。
可选择地， 在第一阶段， 第一控制信号和第二控制信号输出低电平， 数据 信号输出低电平； 在第二阶段， 第一控制信号输出高电平， 第二控制信号输出 低电平， 数据信号输出高电平； 在第三阶段， 第一控制信号输出低电平， 第二 控制信号输出高电平， 数据信号输出低电平。
上述方法通过控制所输入的第一控制信号和第二控制信号，使用于驱动发 光器件发光的驱动晶体管在不同阶段具有不同状态，使驱动晶体管的阈值电压 Vth能够通过驱动晶体管的栅极处的 A点电压反映， 在发光器件发光时， 采用 第二电容器 C2补偿驱动晶体管的阈值电压 νώ, 从而保证发光器件发光亮度 的均匀性。
以上所述仅是本发明的优选实施方式。应当指出，对于本技术领域的普通 技术人员来说， 在不脱离本发明原理的前提下， 还可以做出若干改进和润饰， 这些改进和润饰也应视为本发明的保护范围。

Claims

权 利 要 求 书
1. 一种像素电路， 包括在第一电压信号端子和第二电压信号端子之间串 联的发光器件和用于驱动所述发光器件的驱动晶体管，所述像素电路还包括发 光控制模块和补偿模块， 其中：
所述发光控制模块的输入端与第一控制信号连接，输出端分别与所述驱动 晶体管的源极和漏极连接， 所述发光控制模块用于响应所述第一控制信号，控 制所述驱动晶体管的状态， 使所述发光器件发光或关闭；
所述补偿模块的输入端与第二控制信号连接，输出端分别与所述驱动晶体 管的栅极、 源极和所述发光控制模块连接， 所述补偿模块用于响应所述第二控 制信号， 断开或导通所述驱动晶体管的栅极与源极之间的连接，使所述发光器 件发光时所述驱动晶体管的栅极处的电压补偿所述驱动晶体管的阈值电压。
2. 如权利要求 1所述的像素电路， 其中， 所述发光控制模块包括： 第二开关晶体管， 所述第二开关晶体管的栅极与所述第一控制信号连接 , 源极与所述驱动晶体管的漏极连接；
第三开关晶体管， 所述第三开关晶体管的栅极与所述第一控制信号连接, 用于响应所述第一控制信号，断开或导通所述驱动晶体管与所述发光器件的连 接， 所述第三开关晶体管的漏极与所述驱动晶体管的源极连接， 所述第三开关 晶体管的源极与所述发光器件连接；
所述补偿模块包括：
串联设置在所述第二开关晶体管的漏极和所述驱动晶体管的栅极之间的 第一电容器和第二电容器；
第一开关晶体管，设置在所述驱动晶体管的栅极与源极之间， 所述第一开 关晶体管的栅极与所述第二控制信号连接， 用于响应所述第二控制信号， 断开 或导通所述驱动晶体管的栅极与源极之间的连接。
3. 如权利要求 2所述的像素电路， 其中， 所述补偿模块还包括： 第五开关晶体管， 所述第五开关晶体管的栅极与所述第二控制信号连接 , 所述第五开关晶体管的源极与参考电压连接，所述第五开关晶体管的漏极与所 述第一电容器与所述第二电容器之间的公共连接端连接。
4. 如权利要求 3所述的像素电路， 其中， 所述补偿模块还包括： 第四开关晶体管，设置于数据信号端子和所述第二开关晶体管与所述第一 电容器的公共连接端之间，且所述第四开关晶体管的栅极与所述第二控制信号 连接， 所述第四开关晶体管的漏极与所述第一电容器的一端连接， 所述第四开 关晶体管的源极与数据信号连接。
5. 如权利要求 3所述的像素电路， 其中， 所述参考电压接地连接。
6如权利要求 2所述的像素电路， 其中：
在第一阶段， 所述第一控制信号和所述第二控制信号输出低电平，使所述 第一开关晶体管、所述第二开关晶体管和所述第三开关晶体管均导通， 所述驱 动晶体管的栅极与漏极连接；
在第二阶段， 所述第一控制信号输出高电平， 所述第二控制信号输出低电 平，使所述第一开关晶体管导通， 所述第二开关晶体管和所述第三开关晶体管 断开， 所述驱动晶体管的栅极与漏极保持连接；
在第三阶段， 所述第一控制信号输出低电平， 所述第二控制信号输出高电 平，使所述第一开关晶体管断开， 所述第二开关晶体管和所述第三开关晶体管 导通， 所述驱动晶体管的栅极与漏极断开， 所述驱动晶体管饱和， 所述发光器 件发光。
7. 一种用于驱动如权利要求 1所述像素电路的方法， 包括：
在第一阶段，施加第一控制信号和第二控制信号， 所述发光控制模块响应 所述第一控制信号， 所述补偿模块响应所述第二控制信号，使所述驱动晶体管 的栅极与漏极连接；
在第二阶段，施加所述第一控制信号和所述第二控制信号， 所述发光控制 模块响应所述第一控制信号， 所述补偿模块响应所述第二控制信号，使所述驱 动晶体管的栅极与漏极保持连接；
在第三阶段，施加所述第一控制信号和所述第二控制信号， 所述发光控制 模块响应所述第一控制信号， 所述补偿模块响应所述第二控制信号，使所述驱 动晶体管饱和， 所述发光器件发光。
8. 如权利要求 7所述的方法， 其中：
所述发光控制模块包括：
第二开关晶体管， 所述第二开关晶体管的栅极与所述第一控制信号连接 , 源极与所述驱动晶体管的漏极连接；
第三开关晶体管， 所述第三开关晶体管的栅极与所述第一控制信号连接, 用于响应所述第一控制信号，断开或导通所述驱动晶体管与所述发光器件的连 接， 所述第三开关晶体管的漏极与所述驱动晶体管的源极连接， 所述第三开关 晶体管的源极与所述发光器件连接；
所述补偿模块包括：
串联设置在所述第二开关晶体管的漏极和所述驱动晶体管的栅极之间的 第一电容器和第二电容器；
第一开关晶体管，设置在所述驱动晶体管的栅极与源极之间， 所述第一开 关晶体管的栅极与所述第二控制信号连接， 用于响应所述第二控制信号， 断开 或导通所述驱动晶体管的栅极与源极之间的连接；
第五开关晶体管， 所述第五开关晶体管的栅极与所述第二控制信号连接 , 所述第五开关晶体管的源极与参考电压连接，所述第五开关晶体管的漏极与所 述第一电容器与所述第二电容器之间的公共连接端连接；
第四开关晶体管，设置于数据信号端子和所述第二开关晶体管与所述第一 电容器的公共连接端之间，且所述第四开关晶体管的栅极与所述第二控制信号 连接， 所述第四开关晶体管的漏极与所述第一电容器的一端连接， 所述第四开 关晶体管的源极与数据信号连接；
其中， 在所述第一阶段， 所述第一开关晶体管、 所述第二开关晶体管、 所 述第三开关晶体管、 所述第四开关晶体管和所述第五开关晶体管均导通；
在所述第二阶段， 所述第一开关晶体管、所述第四开关晶体管和所述第五 开关晶体管导通， 所述第二开关晶体管和所述第三开关晶体管断开；
在所述第三阶段， 所述第一开关晶体管、所述第四开关晶体管和所述第五 开关晶体管断开， 所述第二开关晶体管和所述第三开关晶体管导通。
9. 如权利要求 8所述的方法， 其中， 在所述第一阶段， 所述第一控制信 号和所述第二控制信号输出低电平， 所述数据信号输出低电平； 在所述第二阶 段， 所述第一控制信号输出高电平， 所述第二控制信号输出低电平， 所述数据 信号输出高电平； 在所述第三阶段， 所述第一控制信号输出低电平， 所述第二 控制信号输出高电平， 所述数据信号输出低电平。
10. 一种显示装置， 包括如权利要求 1至 6任一项所述的像素电路。
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