WO2014119434A1 - 実装方法および実装装置 - Google Patents
実装方法および実装装置 Download PDFInfo
- Publication number
- WO2014119434A1 WO2014119434A1 PCT/JP2014/051169 JP2014051169W WO2014119434A1 WO 2014119434 A1 WO2014119434 A1 WO 2014119434A1 JP 2014051169 W JP2014051169 W JP 2014051169W WO 2014119434 A1 WO2014119434 A1 WO 2014119434A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- substrate
- mounting
- holding stage
- substrate holding
- chip component
- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/04—Mounting of components, e.g. of leadless components
- H05K13/046—Surface mounting
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/08—Monitoring manufacture of assemblages
- H05K13/089—Calibration, teaching or correction of mechanical systems, e.g. of the mounting head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75753—Means for optical alignment, e.g. sensors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/759—Means for monitoring the connection process
- H01L2224/75901—Means for monitoring the connection process using a computer, e.g. fully- or semi-automatic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/8113—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/81132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
Definitions
- the present invention relates to a mounting method and a mounting apparatus for mounting a chip component such as an electronic component on a predetermined position of a substrate made of ceramics, resin, glass or the like placed on a substrate holding stage.
- a mounting apparatus for mounting a chip component such as an electronic component on a substrate includes, for example, a bonding head that vacuum-holds the chip component, a mechanism that moves the bonding head in a vertical direction, a substrate holding stage that sucks and holds the substrate, A mechanism for moving the substrate holding stage in the horizontal direction and the rotation direction, and a two-field camera provided in a space between the bonding head and the substrate holding stage so as to be capable of moving back and forth and capable of simultaneously imaging the bonding head side and the substrate holding stage side.
- a two-view camera is entered into the space, and the alignment mark written on the chip component held by the bonding head and the alignment mark written on the substrate are simultaneously read, and the chip component is based on the read information. Is aligned with the mounting position on the board. Then, after retracting the two-view camera, the head is lowered to join the chip component to the mounting position on the substrate (for example, Patent Document 1).
- the size of the substrate holding stage has been increasing for the purpose of increasing the production efficiency, or because there is a tendency to place many substrates on the substrate holding stage.
- the increase in the size of the substrate holding stage there is an increasing demand for high-accuracy mounting such that the allowable range of positional deviation is 1 ⁇ m or less, even though the mounting range becomes large.
- the present invention has been made in view of such circumstances, and a mounting method in which an offset is obtained if a position in a substrate holding stage surface on which a chip component is mounted and a pressurizing condition at the time of mounting are determined, and this An object of the present invention is to provide a mounting apparatus having a function of performing a mounting method.
- the invention according to claim 1 is directed to pressurizing the chip component after the alignment mark of the chip component and the alignment mark of the substrate are recognized by the image recognition means and the chip component and the substrate are aligned.
- the mounting offset that offsets the amount of misalignment that occurs when the chip components are pressed and mounted after alignment is a function of the position within the surface of the board holding stage that holds the board and the pressure applied during bonding. It is the mounting method characterized by setting as.
- Invention of Claim 2 is the mounting method of Claim 1, Comprising: The position shift amount with respect to the pressurizing force of several conditions in several positions in a board
- a mounting method is characterized by deriving a function representing a relationship between a position within a holding stage surface and a pressure applied during bonding and a positional deviation amount.
- the invention according to claim 3 is the mounting method according to claim 2, wherein an alignment mark is written when obtaining a positional shift amount with respect to a plurality of conditions of applied pressure at a plurality of positions in the substrate holding stage surface.
- the mounting method is characterized by using a transparent chip component.
- the bonding head for sucking and holding the chip components, the mechanism for moving the bonding head in the vertical direction, the substrate holding stage for mounting and holding the substrate, and the bonding head and the substrate holding stage are relative to each other.
- Mounting mechanism having a mechanism for moving the bonding head and the substrate holding stage in a horizontal direction and a rotational direction, and a two-field recognition means capable of moving forward and backward in the space between the bonding head and the substrate holding stage and capable of simultaneously imaging the bonding head side and the substrate holding stage side.
- it is a mounting apparatus provided with the function to perform the mounting method in any one of Claims 1-3.
- Example 1 of this invention It is a figure explaining the structure of the board
- FIG. 1 is a front view of an essential part for explaining basic functions of the mounting apparatus.
- This apparatus is a flip chip mounting apparatus 1 that joins the protruding electrodes 3 of the chip component 2 and the electrodes 5 of the substrate 4.
- the chip component 2 is mounted at a plurality of locations on the substrate 4.
- the main part of this mounting apparatus is composed of a bonding head 6 that sucks and holds the chip component 2, a substrate holding stage 7 that sucks and holds the substrate 4, and a two-view camera 8 that is a recognition means.
- the holding stage 7 and the two-field camera 8 function according to instructions from the control unit 12.
- the bonding head 6 can be moved up and down, the substrate holding stage 7 is movable in the X, Y, and ⁇ directions, and the substrate 4 is disposed below the bonding head 6 where the chip component 2 is to be mounted.
- the two-field camera 8 is configured to be able to advance and retract so that it can be inserted between the bonding head 6 and the substrate stage 7, and alignment marks are respectively provided on the protruding electrode forming surface of the chip component 2 and the electrode forming surface of the substrate. Both alignment marks are read by the two-field camera 8, and either or both of the bonding head 6 and the substrate holding stage 7 are moved to perform precise alignment.
- the bonding head 6 is lowered and pressurized and heated as necessary to join the protruding electrode 3 of the chip component 2 and the electrode 5 of the substrate 4, but before the bonding head 6 is lowered. Further, the position of the substrate holding stage 7 is finely adjusted by an offset amount obtained as a function of the position in the surface of the substrate holding stage 7 and the applied pressure. A method for deriving the function for obtaining the offset will be described later.
- the bonding head 6 is raised, and a new chip component 2 is transported to the bonding head 6 by a chip suction reversing tool (not shown), and the substrate holding stage 7 is moved, Next, the location of the substrate on which the chip component is to be mounted is placed under the bonding head. Thereafter, as in the previous description, a series of operations from alignment to joining using a two-field camera is performed.
- the suction holding by the substrate holding stage 7 is released, and the substrate after the mounting is completed by a substrate transport tool (not shown). 4 is unloaded and a new substrate 4 is loaded and sucked and held by the substrate holding stage 7.
- FIG. 3 shows the alignment mark MC used to grasp the amount of positional deviation that occurs during pressurization at a plurality of locations (A1, A2,..., D7, D8 in FIG. 4) on the surface of the substrate holding stage 7.
- the alignment mark MC of the simulated chip component 20 and the simulated substrate 40 alignment mark MB are used at any position of the plurality of locations using the two-view camera 8.
- a predetermined pressure is applied, and the simulated chip component 20 and the simulated substrate 40 are bonded together using a transparent adhesive. Thereafter, the amount of positional deviation between the alignment mark MC of the simulated chip component 20 and the alignment mark MB of the simulated substrate 40 in the bonded state is measured using a recognition unit.
- the simulated chip component 20 is transparent to visible light. Even if the simulated chip component 20 is made of silicon or the like that is opaque to visible light, it is possible to recognize the alignment mark after bonding by using X-rays or infrared rays. Because it is necessary to do so, the device becomes a large scale. On the other hand, if the simulated chip component 20 is transparent to visible light, the alignment mark after bonding can be recognized from above even with a visible light camera, and high resolution can be obtained even with a general-purpose camera. Further, since the two-field camera 8 can be diverted, the apparatus cost can be suppressed.
- the actually measured deviation amount is obtained as a deviation amount ⁇ X in the X direction and a deviation amount ⁇ 2 direction component in the Y direction, and the relationship between the position (x, y) on the substrate stage surface and the applied pressure, respectively.
- Record as data The above data acquisition / recording is performed at a plurality of locations (A1, A2,..., D7, D8 in FIG. 4) on the surface of the substrate holding stage 7, and the same contents are obtained by changing the pressure at the same plurality of locations. Is performed using a new simulated substrate 40 to obtain and record data, and obtain a data group as shown in FIG.
- the amount of positional deviation is obtained by an approximate expression using the position and pressure force on the surface of the substrate holding stage 7 as variables, so that at any position and arbitrary pressure force on the surface of the substrate holding stage 7. Can be predicted. Therefore, since the offset cancels out this positional shift amount, an arbitrary position of the substrate holding stage 7 and an offset amount of an arbitrary applied pressure can be obtained. That is, the offset can be set as a function of the position in the surface of the substrate holding stage 7 and the pressure applied during bonding.
- FIG. 7 A flowchart relating to the above offset calculation is shown in FIG. 7, but it is also possible to incorporate a function for automatically performing this series of operations and calculations into the control unit 12.
- the interval be in the range of about the same as the size of the chip component to be mounted by the target mounting apparatus to about three times. Since the actual mounting work interval is never smaller than the chip component, it is less necessary to make the interval smaller than the chip component, and if the interval is too large, an appropriate offset cannot be obtained due to a decrease in the accuracy of the approximate expression. Because.
- FIG. 8 shows the structure of the substrate holding stage 7 used in the first embodiment.
- a substrate holding stage 7 for sucking and holding the substrate 4 is disposed on a stage heater 9 for heating the substrate, and a copying mechanism 10 is provided between the stage heater 9 and the gantry 11.
- the movement of the substrate holding stage 7 in the XY directions is performed by moving the gantry 11.
- the size of each element in the X direction ⁇ Y direction is 260 mm ⁇ 130 mm for the stage heater 9 and 250 mm ⁇ 120 mm for the substrate holding stage 7, and the copying mechanism 10 has a diameter of 114 mm.
- FIG. 9 shows the simulated substrate 40 used at that time, and the size is 240 mm ⁇ 64 mm. However, since the positional deviation amount does not change due to the difference in the Y-direction position of the substrate holding stage 7, FIG. Only the positional deviation amount for each position is obtained.
- the position No. 6 is the center in the X direction of the substrate holding stage. With this point as zero, the amount of misalignment between the simulated chip component 20 and the simulated substrate 40 is measured at intervals of 20 mm of 100 mm on each side. Went.
- the simulated chip component 20 and the simulated substrate 40 are made of transparent glass so that both the alignment mark MC of the simulated chip component 20 and the alignment mark MB of the simulated substrate 40 can be easily recognized.
- the center misalignment between the alignment marks was set to 0.1 ⁇ m or less.
- the applied pressure was measured under three conditions of 50 (N), 100 (N), and 150 (N). As a result, the obtained result is as shown in FIG. From the result of FIG. 10, the amount of positional deviation when the applied pressure was changed in the range of 50 (N) to 150 (N) was obtained by an approximate expression, and FIG. 11 was obtained.
- the offset is set from the positional deviation amount at the time of the applied pressure 120 (N) obtained from FIG. 11 and bonding is performed using the simulated chip component 20 and the simulated substrate 40, the positional deviation amount is obtained at all points. It was confirmed that the thickness was 0.5 ⁇ m or less.
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Abstract
Description
図8は本実施例1に用いた基板保持ステージ7の構造を示すものである。基板4を吸着保持する基板保持ステージ7は基板を加熱するためのステージヒータ9の上に配置されており、ステージヒータ9と架台11の間には倣い機構10を設けてある。基板保持ステージ7のXY方向への移動は、架台11が移動することによって成される。ここで、各要素のX方向×Y方向のサイズは、ステージヒータ9が260mm×130mm、基板保持ステージ7が250mm×120mmのサイズとなっており、倣い機構10は直径が114mmとなっている。この基板保持ステージ7を用いた実装では、Y方向での位置の違いによる位置ズレの違いはなく、ΔYは殆どゼロであるのに対して、X方向の位置によっては位置ズレΔXが生じることが判っていたものであり、量産前には試行錯誤によりX方向の位置毎に、X方向のオフセットを求めていたものである。そこで、この基板保持ステージ7のオフセットを関数化することを試みた。
2 チップ部品
3 突起電極
4 基板
5 電極
6 ボンディングヘッド
7 基板保持ステージ
8 2視野カメラ
9 ステージヒータ
10 倣い機構
11 架台
12 制御部
20 模擬チップ部品
40 模擬基板
MB 模擬基板のアライメントマーク
MC 模擬チップ部品のアライメントマーク
Claims (4)
- チップ部品のアライメントマークと基板のアライメントマークを画像認識手段で認識してチップ部品と基板のアライメントを行った後にチップ部品を加圧して基板に実装する実装方法において、
アライメント後にチップ部品を加圧して実装する時に生じる位置ズレ量を相殺する実装オフセットを、基板を保持する基板保持ステージ面内の位置および接合時の加圧力の関数として設定することを特徴とする実装方法。 - 請求項1に記載の実装方法であって、基板保持ステージ面内の複数の位置における複数条件の加圧力に対する位置ズレ量を求め、その結果を基に、基板保持ステージ面内の位置および接合時の加圧力と位置ズレ量の関係を表す関数を導出することを特徴とする実装方法。
- 請求項2に記載の実装方法であって、基板保持ステージ面内の複数の位置における複数条件の加圧力に対する位置ズレ量を求めるに際して、アライメントマークが記された、透明なチップ部品を用いることを特徴とする実装方法。
- チップ部品を吸着保持するボンディングヘッドと、ボンディングヘッドを上下方向に移動させる機構と、基板を載置保持する基板保持ステージと、ボンディングヘッドと基板保持ステージが相対的に水平方向及び回転方向に移動させる機構と、ボンディングヘッドと基板保持ステージとの空間に進退可能に設けられ且つヘッド側と基板保持ステージ側とを同時に撮像可能な2視野認識手段を有する実装装置であって、
請求項1から3の何れかに記載の実装方法を行う機能を備えた実装装置。
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KR1020157023462A KR102129648B1 (ko) | 2013-01-31 | 2014-01-22 | 실장 방법 및 실장 장치 |
JP2014559639A JP6291426B2 (ja) | 2013-01-31 | 2014-01-22 | 実装方法および実装装置 |
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Cited By (1)
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EP3171685B1 (en) * | 2014-07-18 | 2023-03-15 | FUJI Corporation | Component mounting device |
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JP6307730B1 (ja) * | 2016-09-29 | 2018-04-11 | 株式会社新川 | 半導体装置の製造方法、及び実装装置 |
CN108206154B (zh) * | 2016-12-19 | 2020-06-19 | 技鼎股份有限公司 | 应用在扇出制程的晶粒定位方法及生产设备 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH11274794A (ja) * | 1998-03-25 | 1999-10-08 | Yamaha Motor Co Ltd | 実装機の部品搭載状態検査方法及び部品搭載状態検査用ツール |
JP2005159110A (ja) * | 2003-11-27 | 2005-06-16 | Matsushita Electric Ind Co Ltd | 部品実装方法及び装置 |
JP2007027300A (ja) * | 2005-07-14 | 2007-02-01 | Matsushita Electric Ind Co Ltd | 部品実装装置および部品実装方法 |
JP2008041712A (ja) * | 2006-08-01 | 2008-02-21 | Juki Corp | 電子部品実装方法及び装置 |
JP2008251588A (ja) * | 2007-03-29 | 2008-10-16 | Matsushita Electric Ind Co Ltd | 部品搭載装置および部品搭載装置における搭載位置精度測定方法 |
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JP3838561B2 (ja) | 2002-06-19 | 2006-10-25 | 東レエンジニアリング株式会社 | 実装装置および実装方法 |
EP2539776A1 (en) * | 2010-02-26 | 2013-01-02 | Micronic Mydata AB | Method and apparatus for performing pattern alignment |
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- 2014-01-22 KR KR1020157023462A patent/KR102129648B1/ko active IP Right Grant
- 2014-01-22 WO PCT/JP2014/051169 patent/WO2014119434A1/ja active Application Filing
- 2014-01-22 JP JP2014559639A patent/JP6291426B2/ja active Active
- 2014-01-29 TW TW103103665A patent/TWI605537B/zh active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH11274794A (ja) * | 1998-03-25 | 1999-10-08 | Yamaha Motor Co Ltd | 実装機の部品搭載状態検査方法及び部品搭載状態検査用ツール |
JP2005159110A (ja) * | 2003-11-27 | 2005-06-16 | Matsushita Electric Ind Co Ltd | 部品実装方法及び装置 |
JP2007027300A (ja) * | 2005-07-14 | 2007-02-01 | Matsushita Electric Ind Co Ltd | 部品実装装置および部品実装方法 |
JP2008041712A (ja) * | 2006-08-01 | 2008-02-21 | Juki Corp | 電子部品実装方法及び装置 |
JP2008251588A (ja) * | 2007-03-29 | 2008-10-16 | Matsushita Electric Ind Co Ltd | 部品搭載装置および部品搭載装置における搭載位置精度測定方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3171685B1 (en) * | 2014-07-18 | 2023-03-15 | FUJI Corporation | Component mounting device |
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TWI605537B (zh) | 2017-11-11 |
JPWO2014119434A1 (ja) | 2017-01-26 |
KR20150113130A (ko) | 2015-10-07 |
JP6291426B2 (ja) | 2018-03-14 |
KR102129648B1 (ko) | 2020-07-02 |
TW201444016A (zh) | 2014-11-16 |
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