WO2013097308A1 - 一种多路非对称Doherty放大器 - Google Patents

一种多路非对称Doherty放大器 Download PDF

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Publication number
WO2013097308A1
WO2013097308A1 PCT/CN2012/070446 CN2012070446W WO2013097308A1 WO 2013097308 A1 WO2013097308 A1 WO 2013097308A1 CN 2012070446 W CN2012070446 W CN 2012070446W WO 2013097308 A1 WO2013097308 A1 WO 2013097308A1
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amplifier
power
peak
carrier
network circuit
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PCT/CN2012/070446
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English (en)
French (fr)
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孟庆南
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武汉正维电子技术有限公司
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Publication of WO2013097308A1 publication Critical patent/WO2013097308A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0288—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/405—Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising more than three power stages

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  • the invention belongs to the technical field of base station power amplifiers, and in particular relates to a multi-channel asymmetric Doherty amplifier structure used in a multi-carrier base station system.
  • the RF power amplifier is a key component of the wireless communication base station system. Most of the energy consumption of the base station system is consumed by the RF power amplifier. With the emphasis on green environmental protection, the efficiency of the RF power amplifier is becoming higher and higher in the wireless communication field.
  • Doherty amplifier is the most widely used high-efficiency technology in current wireless communication systems.
  • the principle of the traditional Doherty amplifier circuit is shown in Figure 1. It is composed of input power divider 1, carrier amplifier 3, and peak amplifier.
  • the /impedance conversion network circuit 5 is composed, and the input power splitter 1 is connected to the load 2.
  • the peaking amplifier 4 is in the off state, and the output of the carrier amplifier 3 is pulled to a certain load by the power combining/impedance converting network circuit 5, so that the carrier amplifier 3 operates in a high efficiency state, with the input signal being electrically
  • the peak amplifier 4 is gradually turned on by the off state, and the output load of the carrier amplifier 3 and the peak amplifier 4 varies with the output power.
  • the input signal level reaches the maximum value
  • both the carrier amplifier 3 and the peak amplifier 4 are changed. It reaches saturation and works in a high efficiency state.
  • the traditional Doherty amplifier circuit can achieve the best efficiency of about 50% when the signal peak-to-average ratio is 5-7dB. After being applied to the RF power amplifier, the efficiency is only about 43%. It is difficult to further improve.
  • the bandwidth requirements of signals are becoming wider and wider, and the peak-to-average ratio of signals is getting higher and higher, which requires higher efficiency of power amplifiers. Therefore, how to further effectively improve the efficiency of the RF power amplifier, especially under peak-to-average ratio conditions, is a subject worthy of in-depth study in the field of RF power amplifiers.
  • the technical problem to be solved by the present invention is to provide a multi-channel asymmetric Doherty amplifier capable of improving efficiency in the case of peak-to-average ratio back-off.
  • a multi-channel asymmetric Doherty amplifier which is characterized in that it comprises a multi-channel power distribution network circuit, a carrier amplifier, at least two peak amplifiers, and output power.
  • a synthesis and impedance transformation network circuit an input end of the carrier amplifier and the peak amplifier are respectively connected to the multiple power distribution network circuit, and an output end of the carrier amplifier and the peak amplifier are respectively connected to the output power synthesis and impedance conversion network circuit;
  • the power of the first peak amplifier is 0.7 to 1.3 times the power of the carrier amplifier, and the power of the remaining peak amplifiers is doubled step by step, and the doubling coefficient is 1.5 to 2.5, and the definition is as described.
  • the power of the carrier amplifier is P c
  • the multi-channel power distribution network circuit is composed of one or more components of a hybrid coupler, a microstrip line splitter, a strip line splitter, and a coaxial cable splitter, and is used for The input signal is distributed into at least three powers.
  • the power synthesis and impedance transformation network circuit is composed of one or more of a separate coupling, a microstrip line, a strip line, a coaxial cable, and a microwave capacitor, and is used for all peak amplifiers and carriers.
  • the RF signal output by the amplifier is output after power synthesis and impedance transformation.
  • each of the carrier amplifier and the peak amplifier are respectively connected in series with a delay phase shifting amplitude modulation network circuit for introducing group delay, insertion phase and insertion loss, so that the amplification path is in the working frequency band.
  • the delay, insertion phase, and gain parameter characteristics are consistent.
  • the delay phase shift amplitude modulation network circuit comprises an element of at least one of a microstrip line, a strip line, a surface mount component, and a coaxial cable.
  • the amplifier is composed of independent components, or a plurality of amplifier tubes and corresponding auxiliary components are integrated into a single chip by a semiconductor fabrication process to form a single-chip integrated circuit.
  • the principle of operation of the present invention is that the design of the RF amplifier circuit employs at least three asymmetric topologies.
  • a peak-to-average ratio signal is input at the input end.
  • the peak amplifier is turned off, and the output of the carrier amplifier is pulled by the power synthesis and impedance conversion network circuit to a certain load, so that the carrier amplifier works.
  • the peak amplifier is gradually turned on by the off state, and the output load of the carrier amplifier and the peak amplifier varies with the output power; when the input signal level reaches the maximum peak, the carrier The amplifier's peak amplifiers are saturated and operate in a high efficiency state.
  • the efficiency of the GSM multi-carrier signal with 7dB peak-to-average ratio can be more than 56% when the three-way asymmetric Doherty amplifier circuit implemented by the asymmetric Doherty amplifier is back-off 7dB.
  • the asymmetric Doherty amplifier The circuit is applied to the power amplifier with driver stage and output isolator.
  • the efficiency of the power amplifier back-off 7dB can reach 48%-50%, output GSM 6-carrier intermodulation suppression can be achieved ⁇ -63dBc, output GSM Intermodulation suppression of 4 carriers can achieve ⁇ -65dBc.
  • the four-way asymmetric Doherty amplifier circuit implemented by the asymmetric Doherty amplifier is applied to a power amplifier with a driver stage and an output isolator.
  • the efficiency of the power amplifier back-off 7dB can reach 50%-52%. As the number of peak amplifier stages increases, higher peak-to-average ratios and efficiency requirements can be met.
  • This design adopts multi-channel asymmetric Doherty topology structure, which has higher efficiency in the case of amplification peak-to-average ratio signal, and can achieve better linearity when combined with additional DPD (digital pre-distortion) compensation circuit; It can also achieve lower cost and reliable and stable work.
  • DPD digital pre-distortion
  • Figure 1 is a block diagram of the circuit of a conventional Doherty amplifier.
  • FIG. 2 is a block diagram of a circuit according to an embodiment of the present invention.
  • FIG. 3 is an example of an application of an embodiment of the present invention.
  • FIG. 4 is a block diagram of a circuit according to still another embodiment of the present invention.
  • FIG. 2 is a circuit block diagram of an embodiment of the present invention, which includes a multi-channel power distribution network circuit, a carrier amplifier C1, at least two peak amplifiers P1-Pn, and an output power synthesis and impedance transformation network circuit; a carrier amplifier and The input terminals of the peak amplifier are respectively connected to the multiple power distribution network circuits, and the output terminals of the carrier amplifier and the peak amplifier are respectively connected to the output power synthesis and impedance conversion network circuit.
  • the power of the first peak amplifier is 0.7 to 1.3 times the power of the carrier amplifier, and the power of the remaining peak amplifiers is doubled step by step, and the doubling coefficient is 1.5 to 2.5, and the definition is as described.
  • the power of the carrier amplifier is P c
  • the multi-channel power distribution network circuit performs multi-channel power distribution on the input signal; the power synthesis and impedance transformation network circuit performs power synthesis and impedance transformation on the RF signals output by all the amplifier circuits, and outputs the signals.
  • This multi-channel asymmetric Doherty amplifier structure uses the above-mentioned ratio of peak amplifiers to meet the high signal peak-to-average ratio requirements and achieve high efficiency. Among them, a suitable peak amplifier is selected according to the doubling coefficient.
  • the multi-channel power distribution network circuit may be composed of one or more components of a hybrid coupler, a microstrip line splitter, a strip line splitter, and a coaxial cable splitter, and the implementation thereof inputs
  • the signal is distributed into at least three channels of power.
  • the power synthesis and impedance transformation network circuit can be composed of one or more of separate coupling, microstrip line, strip line, coaxial cable, microwave capacitor, etc., to realize multi-channel signal Combine the road.
  • FIG. 3 is an example of application of an embodiment of the present invention. In this embodiment, two peak amplifiers P1 and P2 are selected.
  • the multi-channel power distribution network circuit includes a first coupler 101, a second coupler 103, a first absorption load 102, and a second absorption load 104.
  • the isolation port of the first coupler 101 is grounded by connecting the first absorption load 102 through a microstrip line; the -90° port of the first coupler 101 is connected to the input end of the second coupler 103 through a microstrip line; the second coupling The isolation port of the device 103 is connected to the second absorption load 104 through the microstrip line and grounded; the -90° output port of the second coupler 103 is connected to the input end of the carrier amplifier C1 through the microstrip line; 0° of the second coupler 103 The output port is connected to the input terminal of the first peaking amplifier P1 through the microstrip line; the 0° output port of the first coupler 101 is connected to the input port of the second peaking amplifier P2 through the microstrip line.
  • the function of the multiple power distribution network circuit is to perform one-way three-way power distribution, the first coupler 101 can select a general 3dB coupler or a 5dB coupler, and the second coupler 104 can select a common 3dB coupler or 5dB coupling.
  • the positions of the carrier amplifier, the first peak amplifier, and the second peak amplifier are not limited, and the position can be arbitrarily changed according to actual needs, as long as the power ratio is ensured.
  • the power synthesis and impedance transformation network circuit is coupled with the output terminals of the carrier amplifier C1 and the peak amplifiers P1 and P2, and the output signal of the amplifier circuit is internally subjected to power synthesis and impedance transformation, and the carrier amplifier and the peak amplifier operate in the operating frequency band.
  • the power synthesis and impedance transformation network circuit includes a first microstrip line 201, a second microstrip line 202, a third microstrip line 203, and a fourth microstrip line 204; an output end of the first peak amplifier and the first microstrip The line 201 is connected; the output of the carrier amplifier is connected to the second microstrip line 202; the output of the second peaking amplifier is connected to the third microstrip line 203.
  • the characteristic impedance of the first microstrip line 201, the second microstrip line 202, the third microstrip line 203, and the fourth microstrip line 204 is a value between 10 ⁇ and 200 ⁇ , and the first, second, third, and fourth micro
  • the impedance of the strip lines is not necessarily the same, and the electrical lengths are not necessarily the same.
  • Input a signal with a peak-to-average ratio at the input.
  • the input signal is a signal below the mean and the mean
  • the first peak amplifier and the second peak amplifier are in a closed state, and the output of the carrier amplifier is integrated in the power synthesis and impedance conversion network circuit.
  • the four microstrip lines 204 and the second microstrip line 202 are pulled to a certain load, so that the carrier amplifier operates in a high efficiency state; as the input signal level increases, the first peak amplifier and the second peak amplifier are gradually turned on from the off state.
  • the output load of the carrier amplifier and the peak amplifier varies with the output power; when the input signal level reaches the maximum peak, the carrier amplifier, the first peak amplifier, and the second peak amplifier are saturated and operate at high efficiency. status.
  • the invention can be widely applied to a multi-carrier, high-efficiency power amplifier in a wireless communication system, and FIG. 3 shows an example of a power amplifier of the present invention.
  • the technical requirements of a GSM power amplifier are as follows: operating frequency 925-960MHZ, output power 110W, input signal peak-to-average ratio 7dB, gain 58dB, efficiency 46%, multi-carrier intermodulation suppression less than or equal to -63dBc.
  • the application of the present invention to complete the development of the power amplifier includes the following steps:
  • Step 1 considering the above technical specifications and the existing device conditions, it is decided to adopt a four-stage amplifying circuit, wherein the final amplifying circuit adopts a three-way asymmetric Doherty amplifier structure, as shown in FIG.
  • Step 2 Select each amplifier model.
  • the first small signal amplifier 302 selects the MMG3014NT1 of Freescale
  • the second small signal amplifier 304 selects the BGA7027 of the NXP company, and the driver stage amplifier 305.
  • Freescale's 40W power amplifier tube MRF8P9040N was selected.
  • Carrier amplifier C1 selected Freescale's 120W power amplifier tube MRF8S9120N.
  • the first peak amplifier P1 selected Freescale's 120W power amplifier tube MRF8S9120N, and the second peak amplifier P2 selected Freescale.
  • the 200W power amplifier tube MRF8S9200N so that the power of the first peak amplifier is the same as the power of the carrier amplifier, and the power of the second peak amplifier is 1.7 times that of the first peak amplifier, which satisfies the design requirements.
  • Step 3 Select the other components such as the temperature compensation attenuator, the interstage attenuation network, the isolator, and the power supply circuit according to the requirements of the indicator.
  • Step 4 Determine the impedance and electrical length of the four microstrip lines of the power synthesis/impedance conversion network according to the output matching impedance and the open circuit characteristic of the final stage carrier amplifier and the peak amplifier.
  • Step 5 Design a suitable multi-channel power distribution network circuit, which is implemented using two hybrid couplers.
  • Step 6 Complete the schematic diagram, PCB, and structural design of the entire power amplifier.
  • Step 7 Complete the debugging test of the entire power amplifier.
  • the amplifier includes: input RF connector Q1, small signal amplifier circuit, driver stage amplifier, final stage amplifier circuit, 5.6V to 5V and temperature sensor circuit, output isolator 306, output RF connector Q2, temperature reporting and amplifier Can interface D1, 30V/5.6V power supply interface D2.
  • the final amplifier circuit is the amplifier of the present invention.
  • the small signal amplifying circuit comprises a temperature-compensated attenuator 301, a first small signal amplifier 302, a ⁇ -type attenuator 303 and a second small-signal amplifier 304, and the output of the second small-signal amplifier 304 is connected to the driving stage amplifier 305.
  • the input end of the driver stage amplifier 305 is connected to the input end of the first coupler 101 in the final stage amplifier circuit, the output of the final stage amplifier circuit is connected to the input end of the output isolator 306, and the output end of the output isolator 306 is connected to the output.
  • RF connector Q2 is connected to the input end of the first coupler 101 in the final stage amplifier circuit
  • the output of the final stage amplifier circuit is connected to the input end of the output isolator 306, and the output end of the output isolator 306 is connected to the output.
  • the output power is coupled to the forward power coupling output port Q3 through the forward coupling circuit, and the reflection port of the output isolator 306 is connected to the reverse power coupling output port Q4.
  • the 30V power input to the power amplifier is connected to the power amplifier through the 30V/5.6V power supply interface D2.
  • the 5.6V conversion circuit converts the input 5.6V voltage into 5V voltage to supply power to the small signal amplifier, the driver stage amplifier and the last three-stage amplifier.
  • the amplifier is enabled.
  • the signal controls the output of 5V by controlling the 5.6V to 5V voltage converter. When it is high, there is no 5V output. When it is low or when it is floating, it outputs 5V normally.
  • the temperature sensor reports the temperature value to the system through the IIC interface.
  • the GSM power amplifier designed and implemented by the invention can fully meet the technical index requirements and has a certain margin, and is suitable for mass production.
  • the amplifier is composed of independent components, or a plurality of amplifier tubes and corresponding auxiliary components are integrated into a single chip by a semiconductor fabrication process to form a single-chip integrated circuit.
  • the present embodiment is substantially the same as the first embodiment, as shown in FIG. 4.
  • the difference is that a delay phase shift amplitude modulation network circuit is connected in series before each carrier amplifier and peak amplifier for introducing a group delay.
  • the insertion phase and the insertion loss are such that the group delay, the insertion phase, and the gain parameter characteristics of the amplification path in the operating band are consistent.
  • the time delay phase shifting network circuit comprises an element of at least one of a microstrip line, a strip line, a surface mount component, and a coaxial cable.
  • the delay phase shifting amplitude modulation network circuit introduces parameter features such as delay, insertion phase, insertion loss or gain, and works in combination with the carrier amplifier and the peak amplifier, and cooperates with the power distribution network circuit, power synthesis and impedance change network circuit.
  • the parameter characteristics such as delay, insertion phase, insertion loss or gain of the plurality of amplification paths in the working frequency band are consistent, so that the power synthesis of the multi-path signals reaches a maximum value. In this way, higher efficiency can be achieved, and the peak-to-average ratio can be met.

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Abstract

一种多路非对称Doherty放大器，包括多路功率分配网络电路、载波放大器、至少2个峰值放大器、输出功率合成及阻抗变换网络电路。载波放大器和峰值放大器的输入端分别与多路功率分配网络电路连接，载波放大器和峰值放大器的输出端分别与输出功率合成及阻抗变换网络电路连接。至少2个峰值放大器中，第一峰值放大器的功率是载波放大器的功率的0.7〜1.3倍，其余峰值放大器的功率逐级翻倍，且翻倍系数为1.5〜2.5。采用本放大器的三路非对称Doherty放大器电路回退7dB时输出7dB峰均比的GSM多载波信号情况下，效率可达56%以上，且随着峰值放大器级数的增加，可以满足更高的峰均比及效率要求。

Description

一种多路非对称Doherty放大器 技术领域
本发明属于基站功率放大器技术领域，具体涉及一种用于多载波基站***中的多路非对称Doherty放大器结构。
 背景技术
射频功率放大器是无线通信基站***的关键部件，基站***的能耗大部分都由射频功率放大器消耗，随着人类对绿色环保的重视，无线通信领域对射频功率放大器的效率要求越来越高。
Doherty放大器是在目前的无线通信***中应用最为广泛的一种高效率技术，传统Doherty放大器电路的原理如附图1所示，由输入功分器1、载波放大器3、峰值放大器4.功率合成/阻抗变换网络电路5组成，输入功分器1与负载2连接。在小信号电平输入时，峰值放大器4处于关闭状态，载波放大器3的输出被功率合成/阻抗变换网络电路5牵引到了一定的负载，使得载波放大器3工作在高效率状态，随着输入信号电平的提高，峰值放大器4由关闭状态逐渐开启，载波放大器3以及峰值放大器4的输出负载随着输出功率的变化而变化，当输入信号电平达到最大值时，载波放大器3和峰值放大器4都达到了饱和状态而工作在高效率状态。
目前传统的Doherty放大器电路在信号峰均比为5～7dB的情况下可达到最好效率在50%左右，应用到射频功率放大器整机中后，效率最高也只能做到43%左右，很难进一步提高，然而随着无线宽带网络的进一步发展，信号的带宽要求越来越宽，信号峰均比也越来越高，要求功放效率也越来越高。因此如何进一步有效提高射频功率放大器的效率特别是在高峰均比条件下的效率是射频功率放大器领域的一个值得深入研究的课题。
 技术问题
本发明要解决的技术问题是：提供一种多路非对称Doherty放大器，在高峰均比回退的情况下能够提高效率。
 技术解决方案
本发明为解决上述技术问题所采取的技术方案为：一种多路非对称Doherty放大器，其特征在于：它包括多路功率分配网络电路、1个载波放大器、至少2个峰值放大器、以及输出功率合成及阻抗变换网络电路；载波放大器和峰值放大器的输入端分别与所述多路功率分配网络电路连接，载波放大器和峰值放大器的输出端分别与所述输出功率合成及阻抗变换网络电路连接；
所述至少2个峰值放大器中，第一峰值放大器的功率是所述载波放大器的功率的0.7～1.3倍，其余峰值放大器的功率逐级翻倍，且翻倍系数为1.5～2.5，定义所述载波放大器的功率为Pc，所述峰值放大器的功率逐级为Pp1、Pp2…Pp（n-1）、Ppn，则Pp1=（0.7～1.3）Pc、Pp2=（1.5～2.5）Pp1、…、Ppn=（1.5～2.5）Pp（n-1），其中n为峰值放大器个数。
按上述方案，所述多路功率分配网络电路由混合耦合器、微带线功分器、带状线功分器、同轴电缆功分器中的一种或几种元件构成，用于将输入信号分配成至少三路功率。
按上述方案，所述功率合成及阻抗变换网络电路由分离式的耦合、微带线、带状线、同轴电缆、微波电容中的一种或几种构成，用于将所有峰值放大器和载波放大器输出的射频信号进行功率合成及阻抗变换后输出。
按上述方案，所述的每个载波放大器和峰值放大器前分别串联一个延时移相调幅网络电路，用于引入群时延、***相位和***损耗，使得放大路径在所述工作频带内的群时延、***相位、以及增益参数特征一致。
按上述方案，所述的延时移相调幅网络电路包括微带线、带状线、表面安装元件、同轴电缆中的至少之一的元件。
按上述方案，本放大器由独立元件构成，或由多颗放大管管芯及相应的辅助元件采用半导体制作工艺集成在单芯片中构成单芯片集成电路。
 有益效果
本发明的工作原理是射频放大器电路的设计采用了至少三路的非对称的拓扑结构。在输入端输入一个高峰均比的信号，在输入信号为均值及均值以下信号时，峰值放大器处于关闭状态，载波放大器的输出被功率合成及阻抗变换网络电路牵引到了一定的负载，使得载波放大器工作在高效率状态；随着输入信号电平的提高，峰值放大器由关闭状态逐渐开启，载波放大器以及峰值放大器的输出负载随着输出功率的变化而变化；当输入信号电平达到最大峰值时，载波放大器峰值放大器都达到了饱和状态而工作在高效率状态。
本发明的有益效果为：
1、实验证明，采用本非对称Doherty放大器实现的三路非对称Doherty放大器电路回退7dB时输出7dB峰均比的GSM多载波信号情况下，效率可以达到56%以上，将该非对称Doherty放大器的电路应用到具有驱动级和输出隔离器的功放整机中，功放整机回退7dB的效率可以达到48%-50%以上，输出GSM 6载波的互调抑制可以做到≤-63dBc，输出GSM 4载波的互调抑制可以做到≤-65dBc。采用本非对称Doherty放大器实现的四路非对称Doherty放大器电路应用到具有驱动级和输出隔离器的功放整机中，功放整机回退7dB的效率可以达到50%-52%。随着峰值放大器级数的增加，则可以满足更高的峰均比及效率要求。
2、本设计通过采用了多路非对称的Doherty拓扑结构，在放大高峰均比信号情况下有更高的效率，配合外加的DPD（数字预失真）补偿电路时能够达到较好的线性；同时又能做到较低成本且工作可靠、稳定。
3、在每个放大器前分别引入一个简单的延时移相调幅网络电路，来抵消不同放大器之间的群时延、***相位、增益等参数差异，使得放大路径在所述工作频带内的群时延、***相位、增益等参数特征一致，从而使输出射频信号的功率合成达到最大值，这样即可以达到较高的效率，也可以满足高峰均比的需求。
 附图说明
图1为传统Doherty放大器的电路原理框图。
图2为本发明一实施例的电路原理框图。
图3为本发明一实施例应用的实例。
图4为本发明又一实施例的电路原理框图。
为了使本发明的目的、技术方案、工作原理和优点能够更加清晰明白，下面会结合附图对本发明进行详细的说明。
 本发明的最佳实施方式
图2为本发明一实施例的电路原理框图，它包括多路功率分配网络电路、1个载波放大器C1、至少2个峰值放大器P1-Pn、以及输出功率合成及阻抗变换网络电路；载波放大器和峰值放大器的输入端分别与所述多路功率分配网络电路连接，载波放大器和峰值放大器的输出端分别与所述输出功率合成及阻抗变换网络电路连接。
所述至少2个峰值放大器中，第一峰值放大器的功率是所述载波放大器的功率的0.7～1.3倍，其余峰值放大器的功率逐级翻倍，且翻倍系数为1.5～2.5，定义所述载波放大器的功率为Pc，所述峰值放大器的功率逐级为Pp1、Pp2…Pp（n-1）、Ppn，则Pp1=（0.7～1.3）Pc、Pp2=（1.5～2.5）Pp1、…、Ppn=（1.5～2.5）Pp（n-1），其中n为峰值放大器个数。
多路功率分配网络电路将输入信号进行多路功率分配；功率合成及阻抗变换网络电路将所有放大器电路输出的射频信号进行功率合成及阻抗变换后输出。这种多路非对称Doherty放大器结构采用了上述比例的峰值放大器，既可以满足高信号峰均比的要求，又能达到很高的效率。其中根据翻倍系数来选择合适的峰值放大器。
其中，所述多路功率分配网络电路可以由混合耦合器、微带线功分器、带状线功分器、同轴电缆功分器中的一种或几种元件构成，其实现将输入的信号分配成至少三路功率。
其中，所述功率合成及阻抗变换网络电路可以由分离式的耦合、微带线、带状线、同轴电缆中、微波电容等元件中的一种或几种构成，实现对多路信号的合路。
图3为本发明一实施例应用的实例，本实施例选用2个峰值放大器P1和P2。
其中，多路功率分配网络电路包括第一耦合器101、第二耦合器103、第一吸收负载102、第二吸收负载104。第一耦合器101的隔离端口通过微带线连接所述第一吸收负载102后接地；第一耦合器101的-90°端口通过微带线连接第二耦合器103的输入端；第二耦合器103的隔离端口通过微带线连接第二吸收负载104后接地；第二耦合器103的-90°输出端口通过微带线与载波放大器C1的输入端连接；第二耦合器103的0°输出端口通过微带线与第一峰值放大器P1的输入端连接；第一耦合器101的0°输出端口通过微带线与第二峰值放大器P2的输入端口连接。多路功率分配网络电路的功能为进行一路分三路的功率分配，第一耦合器101可选择通用的3dB耦合器或5dB耦合器，第二耦合器104可选择通用的3dB耦合器或5dB耦合器。其中，所述载波放大器、所述第一峰值放大器和所述第二峰值放大器的位置不受限制，可以根据实际需要任意调换位置，只要保证功率比例即可。
功率合成及阻抗变换网络电路与载波放大器C1和峰值放大器P1、P2的输出端耦合，将放大器电路的输出信号在内部进行功率合成及阻抗变换后进行输出，载波放大器和峰值放大器工作在工作频带内。所述功率合成及阻抗变换网络电路包括第一微带线201、第二微带线202、第三微带线203、第四微带线204；第一峰值放大器的输出端与第一微带线201相连；载波放大器的输出端与第二微带线202相连；第二峰值放大器的输出端与第三微带线203相连。第一微带线201、第二微带线202、第三微带线203、第四微带线204的特性阻抗为10Ω至200Ω之间的一个值，且第一、二、三、四微带线的阻抗不一定是相同的，其电长度也不一定是相同的。
在输入端输入一个高峰均比的信号，在输入信号为均值及均值以下信号时，第一峰值放大器和第二峰值放大器处于关闭状态，载波放大器的输出被功率合成及阻抗变换网络电路中的第四微带线204和第二微带线202牵引到了一定的负载，使得载波放大器工作在高效率状态；随着输入信号电平的提高，第一峰值放大器和第二峰值放大器由关闭状态逐渐开启，载波放大器以及峰值放大器的输出负载随着输出功率的变化而变化；当输入信号电平达到最大峰值时，载波放大器、第一峰值放大器和第二峰值放大器都达到了饱和状态而工作在高效率状态。
本发明可广泛应用于无线通信***中的多载波、高效率功率放大器上，图3所示为本发明的功放实例。
某GSM功放技术指标要求如下：工作频率925-960MHZ，输出功率110W，输入信号峰均比7dB，增益58dB，效率46%，多载波互调抑制小于等于-63dBc。
应用本发明完成该功放的开发包括如下步骤：
步骤1，综合考虑上述技术指标要求及现有器件状况，决定采用四级放大电路，其中末级放大电路采用三路非对称Doherty放大器结构，如图3所示。
步骤2，选定各个放大器型号，根据链路增益及功率、效率指标要求，第一小信号放大器302选定Freescale公司的MMG3014NT1，第二小信号放大器304选定NXP公司的BGA7027，驱动级放大器305选定Freescale公司的40W的功放管MRF8P9040N，载波放大器C1选定Freescale公司的120W的功放管MRF8S9120N，第一峰值放大器P1选定Freescale公司的120W的功放管MRF8S9120N，第二峰值放大器P2选定Freescale公司的200W的功放管MRF8S9200N，这样第一峰值放大器的功率同载波放大器的功率一致，第二峰值放大器的功率是第一峰值放大器的功率的1.7倍，满足设计要求。
步骤3，根据指标要求选定温补衰减器、级间衰减网络、隔离器、供电电路等其余器件。
步骤4，根据末级的载波放大器和峰值放大器的输出匹配阻抗及开路特性，确定功率合成/阻抗变换网络的四个微带线的阻抗及电长度。
步骤5，设计合适的多路功率分配网络电路，此处使用了两个混合耦合器来实现。
步骤6，完成整个功放的原理图、PCB、结构设计。
步骤7，完成整个功放的调试测试。
该放大器包括：输入射频连接器Q1，小信号放大器电路，驱动级放大器，末级放大器电路，5.6V转5V及温度传感器电路，输出隔离器306，输出射频接连接器Q2，温度上报及功放使能接口D1，30V/5.6V供电接口D2。末级放大器电路即本发明放大器。
其中小信号放大电路包括顺次连接的温补衰减器301，第一小信号放大器302，∏型衰减器303和第二小信号放大器304，第二小信号放大器304的输出端连接驱动级放大器305的输入端，驱动级放大器305的输出端连接末级放大器电路中第一耦合器101的输入端，末级放大器电路的输出接输出隔离器306的输入端，输出隔离器306的输出端接输出射频连接器Q2。输出功率通过前向耦合电路耦合一部分到前向功率耦合输出口Q3，输出隔离器306的反射端口接反向功率耦合输出口Q4。输入到功放的30V电源通过30V/5.6V供电接口D2连接到功放，5.6V转换电路将输入5.6V电压转换成5V电压给小信号放大器、驱动级放大器和末级三路放大器供电，功放使能信号通过控制5.6V转5V电压转换器来控制5V电压的输出，为高电平时没有5V输出，为低电平或悬空时正常输出5V，温度传感器通过IIC接口将温度值上报到***。
应用本发明设计完成的该GSM功放能够完全满足技术指标要求并有一定的余量，适合批量生产。本放大器由独立元件构成，或由多颗放大管管芯及相应的辅助元件采用半导体制作工艺集成在单芯片中构成单芯片集成电路。
 本发明的实施方式
本实施例如图4所示，结构、原理与实施例一基本相同，其不同之处在于：在每个载波放大器和峰值放大器前分别串联一个延时移相调幅网络电路，用于引入群时延、***相位和***损耗，使得放大路径在所述工作频带内的群时延、***相位、以及增益参数特征一致。延时移相调幅网络电路包括微带线、带状线、表面安装元件、同轴电缆中的至少之一的元件。
延时移相调幅网络电路引入延时、***相位、***损耗或增益等参数特征，与所述载波放大器和峰值放大器组合进行工作，再配合所述功率分配网络电路、功率合成及阻抗变化网络电路，使得多个放大路径在所述工作频带内的时延、***相位、***损耗或增益等参数特征一致，从而使多路信号的功率合成达到最大值。这样即可以达到较高的效率，也可以满足高峰均比的需求。
上述仅为本发明较佳的具体的实现方式的举例，本发明的保护范围并不局限于这里所描述的实施例，任何熟悉本领域的基本技术人员基于本发明揭露的技术范围内，可轻易想到的替换或修改，都应包含在所附权利要求书所限定的范围之内。

Claims (6)

1、一种多路非对称Doherty放大器，其特征在于：它包括多路功率分配网络电路、1个载波放大器、至少2个峰值放大器、以及输出功率合成及阻抗变换网络电路；载波放大器和峰值放大器的输入端分别与所述多路功率分配网络电路连接，载波放大器和峰值放大器的输出端分别与所述输出功率合成及阻抗变换网络电路连接；
所述至少2个峰值放大器中，第一峰值放大器的功率是所述载波放大器的功率的0.7～1.3倍，其余峰值放大器的功率逐级翻倍，且翻倍系数为1.5～2.5，定义所述载波放大器的功率为Pc，所述峰值放大器的功率逐级为Pp1、Pp2…Pp（n-1）、Ppn，则Pp1=（0.7～1.3）Pc、Pp2=（1.5～2.5）Pp1、…、Ppn=（1.5～2.5）Pp（n-1），其中n为峰值放大器个数。
2、根据权利要求1所述的多路非对称Doherty放大器，其特征在于：所述多路功率分配网络电路由混合耦合器、微带线功分器、带状线功分器、同轴电缆功分器中的一种或几种元件构成，用于将输入信号分配成至少三路功率。
3、根据权利要求1所述的多路非对称Doherty放大器，其特征在于：所述功率合成及阻抗变换网络电路由分离式的耦合、微带线、带状线、同轴电缆、微波电容中的一种或几种构成，用于将所有峰值放大器和载波放大器输出的射频信号进行功率合成及阻抗变换后输出。
4、根据权利要求1至3中任意一项所述的多路非对称Doherty放大器，其特征在于：所述的每个载波放大器和峰值放大器前分别串联一个延时移相调幅网络电路，用于引入群时延、***相位和***损耗，使得放大路径在所述工作频带内的群时延、***相位、以及增益参数特征一致。
5、根据权利要求4所述的多路非对称Doherty放大器，其特征在于：所述的延时移相调幅网络电路包括微带线、带状线、表面安装元件、同轴电缆中的至少之一的元件。
6、根据权利要求1至3中任意一项所述的多路非对称Doherty放大器，其特征在于：本放大器由独立元件构成，或由多颗放大管管芯及相应的辅助元件采用半导体制作工艺集成在单芯片中构成单芯片集成电路。
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CN113258881B (zh) * 2021-05-17 2024-03-26 大连海事大学 一种基于大功率回退的非对称Doherty功率放大器
CN116418313A (zh) * 2023-06-09 2023-07-11 四川中久防务科技有限公司 一种功率放大的数字化功率分配器及方法
CN116418313B (zh) * 2023-06-09 2023-08-18 四川中久防务科技有限公司 一种功率放大的数字化功率分配器及方法

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