WO2013012195A3 - 기판의 제조방법 및 이를 이용한 전자소자의 제조방법 - Google Patents

기판의 제조방법 및 이를 이용한 전자소자의 제조방법 Download PDF

Info

Publication number
WO2013012195A3
WO2013012195A3 PCT/KR2012/005466 KR2012005466W WO2013012195A3 WO 2013012195 A3 WO2013012195 A3 WO 2013012195A3 KR 2012005466 W KR2012005466 W KR 2012005466W WO 2013012195 A3 WO2013012195 A3 WO 2013012195A3
Authority
WO
WIPO (PCT)
Prior art keywords
forming
metal layer
manufacturing
substrate
electronic device
Prior art date
Application number
PCT/KR2012/005466
Other languages
English (en)
French (fr)
Other versions
WO2013012195A2 (ko
Inventor
이종람
유철종
김기수
손준호
Original Assignee
포항공과대학교 산학협력단
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 포항공과대학교 산학협력단 filed Critical 포항공과대학교 산학협력단
Publication of WO2013012195A2 publication Critical patent/WO2013012195A2/ko
Publication of WO2013012195A3 publication Critical patent/WO2013012195A3/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/80—Etching
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G03F7/2041—Exposure; Apparatus therefor in the presence of a fluid, e.g. immersion; using fluid cooling means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes

Abstract

본 발명은 저비용으로 패터닝된 금속층에 선택적으로 나노 딤플을 형성할 수 있어 전자소자용 기판의 제조비용을 크게 절감할 수 있는 방법에 관한 것이다. 본 발명에 따른 방법은, (a) 기판에 금속층을 형성하는 단계; (b) 상기 금속층 상에 소정의 패턴이 형성된 마스크 층을 형성하는 단계; (c) 상기 기판을 산 용액에 침지하고 전압을 인가하여, 노출된 금속층에 자가정렬 나노 홀을 갖는 금속 산화물을 형성하는 단계; 및 (d) 상기 금속 산화물을 식각하여 제거함으로써, 상기 금속층에 나노 딤플이 형성되도록 하는 단계;를 포함하는 것을 특징으로 한다.
PCT/KR2012/005466 2011-07-19 2012-07-10 기판의 제조방법 및 이를 이용한 전자소자의 제조방법 WO2013012195A2 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20110071331A KR101243635B1 (ko) 2011-07-19 2011-07-19 기판의 제조방법 및 이를 이용한 전자소자의 제조방법
KR10-2011-0071331 2011-07-19

Publications (2)

Publication Number Publication Date
WO2013012195A2 WO2013012195A2 (ko) 2013-01-24
WO2013012195A3 true WO2013012195A3 (ko) 2013-03-14

Family

ID=47558573

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2012/005466 WO2013012195A2 (ko) 2011-07-19 2012-07-10 기판의 제조방법 및 이를 이용한 전자소자의 제조방법

Country Status (2)

Country Link
KR (1) KR101243635B1 (ko)
WO (1) WO2013012195A2 (ko)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10767143B2 (en) * 2014-03-06 2020-09-08 Sage Electrochromics, Inc. Particle removal from electrochromic films using non-aqueous fluids
KR101585788B1 (ko) * 2014-08-28 2016-01-15 주식회사 포스코 전자소자용 기판의 제조방법 및 박막형 태양전지의 제조방법
KR101651341B1 (ko) * 2014-12-02 2016-08-26 한양대학교 에리카산학협력단 초발수성 금속 구조물의 제조 방법
KR101683796B1 (ko) * 2015-06-11 2016-12-08 한국과학기술연구원 백색광 펄스를 이용하여 고분자를 경화시키는 방법 및 이를 이용한 유기 박막 트랜지스터의 제조 방법
KR101785468B1 (ko) * 2016-02-05 2017-10-16 호서대학교 산학협력단 반도체 박막트랜지스터의 제조방법 및 이에 의해 제조된 반도체 박막트랜지스터
US20180363125A1 (en) * 2017-06-20 2018-12-20 Board Of Trustees Of The University Of Arkansas Method of forming high surface area metal oxide nanostructures and applications of same
CN107622974A (zh) * 2017-08-28 2018-01-23 武汉华星光电半导体显示技术有限公司 Tft基板的制作方法及tft显示装置的制作方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080110709A (ko) * 2007-06-16 2008-12-19 고려대학교 산학협력단 하이브리드 나노임프린트 마스크의 제조방법 및 이를이용한 전자소자의 제조방법
KR20090005889A (ko) * 2007-07-10 2009-01-14 호서대학교 산학협력단 나노 입자의 제조방법
KR20100002486A (ko) * 2008-06-30 2010-01-07 서울옵토디바이스주식회사 패턴된 기판 및 질화물 반도체층 제조방법
KR20110034710A (ko) * 2009-09-29 2011-04-06 광주과학기술원 패턴 형성방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080110709A (ko) * 2007-06-16 2008-12-19 고려대학교 산학협력단 하이브리드 나노임프린트 마스크의 제조방법 및 이를이용한 전자소자의 제조방법
KR20090005889A (ko) * 2007-07-10 2009-01-14 호서대학교 산학협력단 나노 입자의 제조방법
KR20100002486A (ko) * 2008-06-30 2010-01-07 서울옵토디바이스주식회사 패턴된 기판 및 질화물 반도체층 제조방법
KR20110034710A (ko) * 2009-09-29 2011-04-06 광주과학기술원 패턴 형성방법

Also Published As

Publication number Publication date
KR101243635B1 (ko) 2013-03-15
KR20130010603A (ko) 2013-01-29
WO2013012195A2 (ko) 2013-01-24

Similar Documents

Publication Publication Date Title
WO2013012195A3 (ko) 기판의 제조방법 및 이를 이용한 전자소자의 제조방법
WO2013093504A3 (en) Etched silicon structures, method of forming etched silicon structures and uses thereof
WO2013140177A3 (en) Etched silicon structures, method of forming etched silicon structures and uses thereof
WO2014102222A9 (fr) Procédé microélectronique de gravure d'une couche
WO2012173768A3 (en) Water soluble mask for substrate dicing by laser and plasma etch
WO2013031554A9 (ja) エッチング液組成物およびエッチング方法
WO2012057467A3 (ko) 구리 함유 금속막 식각액 조성물 및 이를 이용한 식각 방법
MY171887A (en) Hdd patterning using flowable cvd film
WO2012047042A3 (ko) 미세 패턴 형성 방법 및 이를 이용한 미세 채널 트랜지스터 및 미세 채널 발광트랜지스터의 형성방법
WO2012173758A3 (en) Multi-layer mask for substrate dicing by laser by laser and plasma etch
WO2012173759A3 (en) In-situ deposited mask layer for device singulation by laser scribing and plasma etch
WO2013096031A3 (en) Highly selective spacer etch process with reduced sidewall spacer slimming
WO2011156028A3 (en) Porous and non-porous nanostructures
WO2013009505A3 (en) Methods of manufacturing thin film transistor devices
WO2011049326A3 (en) Patterned retardation film and method for manufacturing the same
TW201129497A (en) silicon substrate having nanostructures and method for producing the same and application thereof
WO2014035528A3 (en) Paint-on approach for fabrication of electrically active structures
MY165866A (en) Method for manufacturing integrated circuit devices, optical devices, micromachines and mechanical precision devices having patterned material layers with line-space dimensions of 50 nm and less
WO2014049052A3 (de) Optoelektronisches bauelement und verfahren zum herstellen eines optoelektronischen bauelements
WO2013036806A3 (en) Methods for manufacturing integrated circuit devices having features with reduced edge curvature
WO2012162185A3 (en) Method for etching gate stack
WO2012148862A3 (en) Eddy current monitoring of metal residue or metal pillars
EP2674969A4 (en) Substrate having etching mask and method for producing same
WO2012067444A3 (ko) 산화막이 형성된 도전성 필름 및 그 제조방법
FR2974194B1 (fr) Procede de lithographie

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 12815091

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 12815091

Country of ref document: EP

Kind code of ref document: A2