WO2011158360A1 - Amplificateur de transimpédance en mode rafale - Google Patents

Amplificateur de transimpédance en mode rafale Download PDF

Info

Publication number
WO2011158360A1
WO2011158360A1 PCT/JP2010/060279 JP2010060279W WO2011158360A1 WO 2011158360 A1 WO2011158360 A1 WO 2011158360A1 JP 2010060279 W JP2010060279 W JP 2010060279W WO 2011158360 A1 WO2011158360 A1 WO 2011158360A1
Authority
WO
WIPO (PCT)
Prior art keywords
amplifier
signal
burst
detection circuit
equalization
Prior art date
Application number
PCT/JP2010/060279
Other languages
English (en)
Japanese (ja)
Inventor
聡 吉間
雅樹 野田
正道 野上
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP2012520218A priority Critical patent/JP5456162B2/ja
Priority to PCT/JP2010/060279 priority patent/WO2011158360A1/fr
Publication of WO2011158360A1 publication Critical patent/WO2011158360A1/fr

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/4508—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using bipolar transistors as the active amplifying circuit
    • H03F3/45085—Long tailed pairs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/42—Modifications of amplifiers to extend the bandwidth
    • H03F1/48—Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers
    • H03F1/486—Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers with IC amplifier blocks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
    • H03F3/08—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
    • H03F3/087—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light with IC amplifier blocks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/39—Different band amplifiers are coupled in parallel to broadband the whole amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/435—A peak detection being used in a signal measuring circuit in a controlling circuit of an amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45372—Indexing scheme relating to differential amplifiers the AAC comprising one or more potentiometers

Definitions

  • the present invention relates to a burst equalization amplifier that realizes a stable frequency response characteristic for a signal of any input optical power level.
  • Non-Patent Document 1 the amplifier connected to the subsequent stage of the preamplifier always maintains a constant gain and bandwidth, amplifies the analog amplitude input signal from the preamplifier to a constant amplitude, and passes it to the subsequent circuit.
  • the identification sensitivity of the subsequent amplifier can also affect the identification sensitivity of the entire receiver. There is sex. However, since the conventional amplifier has a constant gain and band for any signal, there is a possibility that reception sensitivity is deteriorated.
  • the present invention has been made to solve the above-described problems, and realizes a frequency response characteristic having a flat and the same band in the entire receiver for a signal of any input optical power level.
  • an object of the present invention is to obtain a burst equalization amplifier that realizes a wide band in the entire receiver and does not cause deterioration in reception sensitivity.
  • a burst equalizing amplifier adjusts the amplification amount of a specific frequency band based on a level detector that detects a signal amplitude level of an input signal and a signal amplitude level detected by the level detector, An amplifier with an equalizing function for outputting the amplified signal, an amplifier for amplifying the amplitude of the input signal to a desired amplitude based on the signal amplitude level detected by the level detector, and outputting a second amplified signal, etc.
  • a mixer that generates an output signal that compensates for the high frequency band of the input signal by mixing the first amplified signal output from the amplifier with the conversion function and the second amplified signal output from the amplifier It is.
  • the high frequency gain of the amplifier connected to the subsequent stage of the preamplifier is instantaneously increased as compared with other frequency bands in accordance with the input signal amplitude, and the preamplifier.
  • the entire receiver has a frequency response characteristic that is flat and has the same bandwidth, It is possible to obtain a burst equalization amplifier that realizes a wide band in the entire receiver and does not cause deterioration in reception sensitivity.
  • Embodiment 1 of this invention It is a block diagram of the burst equalization amplifier in Embodiment 1 of this invention. It is a block diagram of the high frequency gain variable amplifier in Embodiment 1 of this invention. It is a block diagram of the circuit relevant to the variable peaking amplifier in Embodiment 1 of this invention. It is a block diagram of the peak detection circuit in Embodiment 1 of this invention. It is a block diagram of the bottom detection circuit in Embodiment 1 of this invention. It is a conceptual diagram of the frequency response characteristic of each part in the receiver to which the burst equalizing amplifier according to Embodiment 1 of the present invention is applied. It is a block diagram of the circuit relevant to the variable peaking amplifier in Embodiment 2 of this invention.
  • Embodiment 3 of this invention It is a block diagram of the circuit relevant to the variable peaking amplifier in Embodiment 3 of this invention. It is a block diagram of the circuit relevant to the variable peaking amplifier in Embodiment 4 of this invention. It is a block diagram of the circuit relevant to the variable peaking amplifier in Embodiment 5 of this invention. It is a block diagram of the average value detection circuit in Embodiment 5 of this invention.
  • FIG. 1 is a configuration diagram of a burst equalization amplifier according to Embodiment 1 of the present invention.
  • the burst equalization amplifier 1 includes a high frequency gain variable amplifier 11, a multistage amplifier 12, an output amplifier 13, and an amplitude detection circuit 14. Note that the number of connection stages of the multistage amplifier 12 is not limited to that shown in FIG. 1, and the characteristics of the burst equalizing amplifier are not lost even if the number of dependent connection stages is increased.
  • the multistage amplifier 12 is not present and the high-frequency gain variable amplifier 11 is directly connected to the output amplifier 13 may be employed. Further, the multistage amplifier 12 and the output amplifier 13 may not exist, and the output from the high frequency gain variable amplifier 11 may be the output of the burst equalization amplifier circuit. Further, the amplitude detection circuit 14 may be configured to detect amplitude from a single-phase signal.
  • FIG. 2 is a configuration diagram of the high-frequency gain variable amplifier 11 according to the first embodiment of the present invention.
  • the high-frequency gain variable amplifier 11 includes a variable peaking amplifier 100, an amplifier 200, and a mixer 300.
  • the variable peaking amplifier 100 is an amplifier that can change the peaking amount of the frequency characteristic in accordance with the input signal amplitude.
  • the peaking frequency is f BW
  • f BW uses a frequency of about 0.6 to 1.0 times the baud rate.
  • the amplifier 200 is an amplifier that maintains a low frequency gain and has a bandwidth of about f BW .
  • a differential pair can be used.
  • the mixer 300 for example, two differential pairs having a common load resistance can be used.
  • FIG. 3 is a configuration diagram of a circuit related to the variable peaking amplifier 100 according to the first embodiment of the present invention.
  • the circuit including the variable peaking amplifier 100 of the first embodiment in FIG. 3 includes a peak detection circuit 101, a bottom detection circuit 102, a current source control circuit 103, load resistors 104a and 104b, a load inductor 105, a differential pair transistor 106a, 106b, and a variable current source 107.
  • the peak detection circuit 101 and the bottom detection circuit 102 correspond to the amplitude detection circuit 14 in FIG.
  • the peak detection circuit 101 is a circuit that can instantaneously hold the mark side voltage of the input voltage signal.
  • the bottom detection circuit 102 is a circuit that can instantaneously hold the space-side voltage of the input voltage signal.
  • FIG. 4 is a configuration diagram of the peak detection circuit 101 according to the first embodiment of the present invention.
  • the peak detection circuit 101 includes a diode 101a, a capacitor 101b that holds a voltage, and a MOS switch 101c that can discharge the charge of the capacitor 101b by an external reset signal.
  • FIG. 5 is a configuration diagram of the bottom detection circuit 102 according to Embodiment 1 of the present invention.
  • the bottom detection circuit 102 includes a diode 102a, a capacitor 102b that holds a voltage, and a MOS switch 102c that can discharge the charge of the capacitor 102b by an external reset signal.
  • the current source control circuit 103 shown in FIG. 3 controls the current value of the variable current source 107 according to the input signal amplitude value determined from the peak detection circuit 101 and the bottom detection circuit 102. More specifically, the current source control circuit 103 increases the current value of the variable current source 107 when the input signal amplitude is small, and decreases the current value of the variable current source 107 when the input signal amplitude is large. Thus, the peaking amount of the frequency characteristic can be changed.
  • the peak detection circuit 101 and the bottom detection circuit 102 are capable of a high-speed response of several ns to several hundreds ns, the response in the overhead part of each upstream packet signal in the one-to-multiple optical communication system to which the time division multiplexing method is applied. It is possible enough. Further, by releasing the charges held in the capacitors 101b and 102b of the peak detection circuit 101 and the bottom detection circuit 102 for each upstream packet signal by an external reset signal, upstream packet signals having different input optical powers are received. Even in such a case, an optimum receiver frequency characteristic can be obtained.
  • FIG. 6 is a conceptual diagram of the frequency response characteristics of each part in the receiver to which the burst equalizing amplifier according to Embodiment 1 of the present invention is applied. As shown in FIG. 6, since the preamplifier operates at a high gain when low optical power is input, the frequency band decreases. On the other hand, at the time of high power input, since the low gain operation is performed by suppressing the distortion amount of the output signal, the frequency band increases.
  • the high-frequency gain of the amplifier connected to the subsequent stage of the preamplifier is changed to the input signal amplitude. Accordingly, the gain is instantaneously increased as compared with other frequency bands, and the band that cannot be secured by the preamplifier can be compensated by the subsequent amplifier.
  • the entire receiver has a frequency response characteristic that is flat and has the same bandwidth, and the entire receiver has a wider bandwidth, resulting in poor reception sensitivity. It is possible to obtain a burst equalizing amplifier that does not cause the problem.
  • Embodiment 2 FIG. In the first embodiment, as shown in FIG. 3, the case where the peaking amount of the variable peaking amplifier 100 is changed by changing the current value of the variable current source 107 according to the input signal voltage amplitude has been described. . On the other hand, in the second embodiment, a case where the peaking amount is changed by changing the emitter resistance value connected to the differential pair transistors 106a and 106b in the variable peaking amplifier 100 will be described.
  • FIG. 7 is a configuration diagram of a circuit related to the variable peaking amplifier 100 according to the second embodiment of the present invention.
  • the circuit including the variable peaking amplifier 100 of the second embodiment in FIG. 7 includes a peak detection circuit 101, a bottom detection circuit 102, an emitter resistance control circuit 108, load resistors 104a and 104b, a load inductor 105, a differential pair transistor 106a, 106 b, variable emitter resistors 109 a and 109 b, and a current source 110.
  • the peak detection circuit 101 and the bottom detection circuit 102 correspond to the amplitude detection circuit 14 in FIG.
  • variable emitter resistors 109a and 109b for example, MOS transistors can be used.
  • the input to the amplifier is performed by the peak detection circuit 101 and the bottom detection circuit 102 as in the variable peaking amplifier 100 of the first embodiment.
  • the signal amplitude can be detected.
  • the emitter resistance control circuit 108 can change the peaking amount by changing the emitter resistance value according to the input signal amplitude value determined from the peak detection circuit 101 and the bottom detection circuit 102. More specifically, the emitter resistance control circuit 108 sets the emitter resistance to a high resistance, thereby reducing the gain of the variable peaking amplifier and reducing the peaking amount. On the other hand, by setting the emitter resistance to a low resistance by the emitter resistance control circuit 108, the gain of the variable peaking amplifier can be increased and the peaking amount can be increased.
  • the peak detection circuit 101 and the bottom detection circuit 102 can respond at a high speed of several ns to several hundreds ns. For this reason, in the one-to-many optical communication system to which the time division multiplexing system is applied, the emitter resistance change response in the overhead part of each uplink packet signal is sufficiently possible.
  • the high-frequency gain of the amplifier connected to the subsequent stage of the preamplifier is set according to the input signal amplitude.
  • the gain is increased instantaneously, and the band that cannot be secured by the preamplifier can be compensated for by the subsequent amplifier.
  • the entire receiver has a frequency response characteristic that is flat and has the same bandwidth, and the entire receiver has a wider bandwidth, resulting in poor reception sensitivity. It is possible to obtain a burst equalizing amplifier that does not cause the problem.
  • Embodiment 3 FIG.
  • the current source control circuit 103 uses the variable peaking amplifier 100 according to the input signal amplitude values detected by the peak detection circuit 101 and the bottom detection circuit 102. The case where the peaking amount is changed has been described.
  • the third embodiment instead of using the peak detection circuit 101, the bottom detection circuit 102, and the current source control circuit 103, a case where the peaking amount of the variable peaking amplifier 100 is changed by another configuration will be described. To do.
  • FIG. 8 is a configuration diagram of a circuit related to the variable peaking amplifier 100 according to the third embodiment of the present invention.
  • the circuit including the variable peaking amplifier 100 according to the third embodiment in FIG. 8 includes an amplitude detection circuit 111, a hysteresis comparator 112, load resistors 104a and 104b, a load inductor 105, differential pair transistors 106a and 106b, and a variable current source 107. It is configured with.
  • the amplitude detection circuit 111 corresponds to the amplitude detection circuit 14 in FIG.
  • the amplitude detection circuit 111 for example, the peak detection circuit 101 as shown in FIG. 4 can be used.
  • variable peaking amplifier 100 of the third embodiment having such a configuration, instead of using the peak detection circuit 101, the bottom detection circuit 102, and the current source control circuit 103, an amplitude detection circuit 111 and a hysteresis comparator 112 are provided.
  • a variable peaking amplifier is configured to vary the peaking amount.
  • the hysteresis comparator 112 sets the current value of the variable current source 107 so as to perform peaking when the amplitude of the input signal to the variable peaking amplifier 100 exceeds the reference voltage input from the outside. increase.
  • the hysteresis comparator 112 operates the variable peaking amplifier so as to decrease the current value so as not to perform peaking. As a result, a constant frequency response characteristic can be obtained as a receiver even if the input optical power changes.
  • the hysteresis comparator 112 it is possible to suppress the transition between the peaking operation and the peaking avoidance operation of the variable peaking amplifier 100 even when the power suddenly changes during the packet.
  • the amplitude detection circuit 111 is capable of a high-speed response of several ns to several hundreds ns. For this reason, in the one-to-many optical communication system to which the time division multiplexing system is applied, a response in the overhead part of each uplink packet signal is sufficiently possible.
  • the current value of the variable current source is changed in accordance with the input signal voltage amplitude, so that the high frequency of the amplifier connected to the subsequent stage of the preamplifier.
  • the gain is instantaneously increased in comparison with other frequency bands in accordance with the input signal amplitude, and a band that cannot be secured by the preamplifier can be compensated for in the subsequent amplifier.
  • the entire receiver has a frequency response characteristic that is flat and has the same band, and the entire receiver has a wider bandwidth, resulting in poor reception sensitivity. It is possible to obtain a burst equalizing amplifier that does not cause the problem.
  • Embodiment 4 FIG.
  • the case where the peaking amount of the variable peaking amplifier is determined by one hysteresis comparator 112 has been described.
  • the fourth embodiment a case where the peaking amount can be finely adjusted using a plurality of hysteresis comparators will be described.
  • FIG. 9 is a configuration diagram of a circuit related to the variable peaking amplifier 100 according to the fourth embodiment of the present invention.
  • the circuit including the variable peaking amplifier 100 of the fourth embodiment in FIG. 9 includes an amplitude detection circuit 111, n hysteresis comparators 112 (1) to 112 (n), load resistors 104a and 104b, load inductor 105, differential A pair of transistors 106a and 106b and a variable current source 107 are provided.
  • the amplitude detection circuit 111 corresponds to the amplitude detection circuit 14 in FIG.
  • the amplitude detection circuit 111 for example, the peak detection circuit 101 as shown in FIG. 4 can be used.
  • variable peaking amplifier 100 of the third embodiment having such a configuration, a plurality of different voltages are held as reference voltages of the hysteresis comparators 112 (1) to 112 (n) prepared in advance. Thereby, a plurality of threshold values of the input signal amplitude can be provided.
  • a plurality of threshold values of the input signal amplitude can be provided.
  • the transition between the peaking operation and the peaking avoidance operation of the variable peaking amplifier 100 can be suppressed even when the power suddenly changes during the packet. It becomes possible.
  • the amplitude detection circuit 111 can respond at a high speed of several ns to several hundreds ns. For this reason, in the one-to-many optical communication system to which the time division multiplexing method is applied, a response in the overhead part of each uplink packet signal is sufficiently possible.
  • the fourth embodiment by providing a plurality of hysteresis comparators, it becomes possible to finely adjust the peaking amount as compared with the case of using one hysteresis comparator.
  • Embodiment 5 FIG.
  • the case where the peaking amount of the variable peaking amplifier 100 is determined using the peak detection circuit 101 or the amplitude detection circuit 111 has been described.
  • the peaking amount is made variable by detecting the average value of the input signal and detecting the signal amplitude based on the difference from the signal off-level voltage input from the outside will be described. To do.
  • FIG. 10 is a configuration diagram of a circuit related to the variable peaking amplifier 100 according to the fifth embodiment of the present invention.
  • the circuit including the variable peaking amplifier 100 of the fifth embodiment in FIG. 10 includes an average value detection circuit 113, a current source control circuit 103, load resistors 104a and 104b, a load inductor 105, a differential pair transistors 106a and 106b, and a variable A current source 107 is provided.
  • the average value detection circuit 113 corresponds to the amplitude detection circuit 14 in FIG.
  • FIG. 11 is a configuration diagram of the average value detection circuit 113 according to the fifth embodiment of the present invention.
  • the average value detection circuit 113 shown in FIG. 11 includes a resistor 113a and a capacitor 113b, and can output an average voltage of an input signal by taking the form of an LPF.
  • the average value of the input signal is detected using the average value detection circuit 113, and the input signal amplitude value is detected from the difference between the detected average value and the signal off-level voltage input from the outside.
  • the average value detection circuit 113 always continues to detect the average value of the input signal. For this reason, the peaking amount of the amplifier can be continuously changed, and an operation can be performed for any signal amplitude without an external reset signal.
  • the average value detection circuit 113 is capable of high-speed response of several hundred ns. For this reason, in the one-to-many optical communication system to which the time division multiplexing method is applied, a response in the overhead part of each uplink packet signal is sufficiently possible.
  • the input signal amplitude value is constantly calculated using the average value detection circuit.
  • the peaking amount of the amplifier can be continuously changed, and a burst equalizing amplifier that can operate for any signal amplitude without an external reset signal can be obtained.
  • the peaking amount of the variable peaking amplifier 100 is changed by changing the current value of the variable current source 107 in accordance with the input signal voltage amplitude, as in the first embodiment.
  • the peaking is obtained by changing the emitter resistance values connected to the differential pair transistors 106a and 106b in the variable peaking amplifier 100 as in the second embodiment. The amount can be changed, and the same effect can be obtained.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

L'invention concerne un amplificateur de transimpédance en mode rafale qui assure des caractéristiques de réponse plates en fréquence sur la même bande sur un récepteur pour un signal quelconque, quel que soit le niveau de puissance de l'entrée optique, qui élargit la plage de fréquence du récepteur et qui ne provoque pas une dégradation de la sensibilité de réception. Ceci peut être obtenu en dotant l'amplificateur de transimpédance en mode rafale de : un détecteur de niveau (14) qui détecte le niveau d'amplitude de signal d'un signal d'entrée ; un amplificateur (100) doté d'une fonction d'égalisation, qui ajuste le niveau d'amplification dans une bande spécifique de fréquences et qui délivre en sortie un premier signal amplifié sur la base du niveau d'amplitude du signal détecté par le détecteur de niveau ; un amplificateur (200) qui amplifie le signal d'amplitude pour le porter à une amplitude voulue et qui délivre en sortie un second signal amplifié sur la base du signal d'amplitude de signal détecté par le détecteur de niveau ; et un mélangeur (300) qui délivre un signal de sortie obtenu en corrigeant la bande de hautes fréquences du signal d'entrée, en mélangeant un premier signal amplifié délivré par l'amplificateur doté d'une fonction d'égalisation et un second signal amplifié délivré par l'amplificateur.
PCT/JP2010/060279 2010-06-17 2010-06-17 Amplificateur de transimpédance en mode rafale WO2011158360A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2012520218A JP5456162B2 (ja) 2010-06-17 2010-06-17 バースト等化増幅器
PCT/JP2010/060279 WO2011158360A1 (fr) 2010-06-17 2010-06-17 Amplificateur de transimpédance en mode rafale

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2010/060279 WO2011158360A1 (fr) 2010-06-17 2010-06-17 Amplificateur de transimpédance en mode rafale

Publications (1)

Publication Number Publication Date
WO2011158360A1 true WO2011158360A1 (fr) 2011-12-22

Family

ID=45347781

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2010/060279 WO2011158360A1 (fr) 2010-06-17 2010-06-17 Amplificateur de transimpédance en mode rafale

Country Status (2)

Country Link
JP (1) JP5456162B2 (fr)
WO (1) WO2011158360A1 (fr)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63175510A (ja) * 1987-01-16 1988-07-19 Hitachi Ltd 半導体回路
JPH0983270A (ja) * 1995-09-13 1997-03-28 Nec Corp 帯域分割増幅回路
JP2003152649A (ja) * 2001-11-16 2003-05-23 Sony Corp 光受信装置
JP2004032002A (ja) * 2002-06-21 2004-01-29 Matsushita Electric Ind Co Ltd 増幅器
JP2004186842A (ja) * 2002-12-02 2004-07-02 Nec Engineering Ltd 差動増幅回路
JP2008236455A (ja) * 2007-03-22 2008-10-02 Nippon Telegr & Teleph Corp <Ntt> トランスインピーダンスアンプ及びトランスインピーダンスアンプの制御方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3576874B2 (ja) * 1999-07-15 2004-10-13 シャープ株式会社 バースト伝送対応光受信器
JP2010136030A (ja) * 2008-12-03 2010-06-17 Panasonic Corp 受光増幅回路および光ディスク装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63175510A (ja) * 1987-01-16 1988-07-19 Hitachi Ltd 半導体回路
JPH0983270A (ja) * 1995-09-13 1997-03-28 Nec Corp 帯域分割増幅回路
JP2003152649A (ja) * 2001-11-16 2003-05-23 Sony Corp 光受信装置
JP2004032002A (ja) * 2002-06-21 2004-01-29 Matsushita Electric Ind Co Ltd 増幅器
JP2004186842A (ja) * 2002-12-02 2004-07-02 Nec Engineering Ltd 差動増幅回路
JP2008236455A (ja) * 2007-03-22 2008-10-02 Nippon Telegr & Teleph Corp <Ntt> トランスインピーダンスアンプ及びトランスインピーダンスアンプの制御方法

Also Published As

Publication number Publication date
JPWO2011158360A1 (ja) 2013-08-15
JP5456162B2 (ja) 2014-03-26

Similar Documents

Publication Publication Date Title
JP4870806B2 (ja) トランスインピーダンスアンプ
US8908795B2 (en) Apparatus and method for calibration of supply modulation in transmitter
US6587004B2 (en) Signal amplifier and optical signal receiver using the same
US10454441B2 (en) Automatic gain control loop
US9762186B2 (en) Regulated cascode (RGC)-type burst mode optic pre-amplifier having extended linear input range
JP5630325B2 (ja) 利得可変差動増幅回路
US10958230B2 (en) Reconfigurable optical receivers with extended dynamic range
US9178474B2 (en) Feedback amplifier
US9525386B2 (en) Receiver circuit
US11309845B2 (en) Reconfigurable optical receivers for extended maximum input signals
US9787272B2 (en) Linearizing and reducing peaking simultaneously in single-to-differential wideband radio frequency variable gain trans-impedance amplifier (TIA) for optical communication
JP5161189B2 (ja) トランスインピーダンスアンプ
US20120313708A1 (en) Method and apparatus for automatically adjusting the bandwidth of an electronic amplifier
JP2019036817A (ja) トランスインピーダンス増幅回路、及び利得可変増幅器
JP5456162B2 (ja) バースト等化増幅器
US8665019B2 (en) Power amplifier
WO2015052803A1 (fr) Amplificateur de puissance
WO2015053165A1 (fr) Circuit amplificateur limiteur et circuit d&#39;attaque
JP6534187B2 (ja) トランスインピーダンスアンプ回路
JP2010258858A (ja) フィードフォワード型ａｇｃ回路
JP3906693B2 (ja) 光受信差動回路および光受信装置
KR20200129804A (ko) 펄스진폭변조를 위한 선형 광 수신기 및 방법
JP2022171076A (ja) トランスインピーダンス増幅回路
KR20130076061A (ko) 단일 출력 증폭기 및 이를 포함하는 적외선 리모콘 수신기
JP2008236506A (ja) 増幅装置及び光受信装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 10853241

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2012520218

Country of ref document: JP

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 10853241

Country of ref document: EP

Kind code of ref document: A1