WO2009041044A1 - 半導体モジュール、半導体モジュールの製造方法および携帯機器 - Google Patents

半導体モジュール、半導体モジュールの製造方法および携帯機器 Download PDF

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Publication number
WO2009041044A1
WO2009041044A1 PCT/JP2008/002663 JP2008002663W WO2009041044A1 WO 2009041044 A1 WO2009041044 A1 WO 2009041044A1 JP 2008002663 W JP2008002663 W JP 2008002663W WO 2009041044 A1 WO2009041044 A1 WO 2009041044A1
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WIPO (PCT)
Prior art keywords
semiconductor module
portable device
electrode
insulating resin
manufacturing
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PCT/JP2008/002663
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English (en)
French (fr)
Inventor
Yasuyuki Yanase
Yoshio Okayama
Ryosuke Usui
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Sanyo Electric Co., Ltd.
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Publication date
Application filed by Sanyo Electric Co., Ltd. filed Critical Sanyo Electric Co., Ltd.
Priority to US12/679,595 priority Critical patent/US8362611B2/en
Publication of WO2009041044A1 publication Critical patent/WO2009041044A1/ja

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    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
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    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
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Abstract

 半導体モジュール10は、配線層20、絶縁樹脂層30、半導体素子40がこの順で圧着により積層された構造を備える。配線層20には、半導体素子40の各素子電極42と対応する位置に、基部24と先端部26とを有する突起電極22が設けられる。突起電極22は絶縁樹脂層30を貫通して、対応する素子電極42と電気的に接続している。
PCT/JP2008/002663 2007-09-26 2008-09-25 半導体モジュール、半導体モジュールの製造方法および携帯機器 WO2009041044A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US12/679,595 US8362611B2 (en) 2007-09-26 2008-09-25 Semiconductor module, method for manufacturing semiconductor module, and portable device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-250216 2007-09-26
JP2007250216A JP5134899B2 (ja) 2007-09-26 2007-09-26 半導体モジュール、半導体モジュールの製造方法および携帯機器

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WO2009041044A1 true WO2009041044A1 (ja) 2009-04-02

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PCT/JP2008/002663 WO2009041044A1 (ja) 2007-09-26 2008-09-25 半導体モジュール、半導体モジュールの製造方法および携帯機器

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US (1) US8362611B2 (ja)
JP (1) JP5134899B2 (ja)
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120196407A1 (en) * 2011-01-28 2012-08-02 Shiann-Ming Liou Single layer bga substrate process

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7977160B2 (en) * 2009-08-10 2011-07-12 GlobalFoundries, Inc. Semiconductor devices having stress relief layers and methods for fabricating the same
JP5002633B2 (ja) * 2009-09-30 2012-08-15 三洋電機株式会社 半導体モジュールおよび携帯機器
US8970046B2 (en) * 2011-07-18 2015-03-03 Samsung Electronics Co., Ltd. Semiconductor packages and methods of forming the same
TWM433634U (en) * 2012-03-23 2012-07-11 Unimicron Technology Corp Semiconductor substrate

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000058594A (ja) * 1998-08-04 2000-02-25 Nec Corp 半導体装置とその製造方法
JP2000114302A (ja) * 1998-10-08 2000-04-21 Fuji Electric Co Ltd 半導体装置
JP2001257229A (ja) * 2000-03-10 2001-09-21 Denso Corp バンプを有する電子部品及びその実装方法
JP2004063808A (ja) * 2002-07-29 2004-02-26 Matsushita Electric Works Ltd 半導体装置のパッケージ構造とその製造方法
JP2005503660A (ja) * 2001-02-27 2005-02-03 チップパック,インク. フリップチップ用の自己平面保持バンプの形状
JP2007157795A (ja) * 2005-11-30 2007-06-21 Sanyo Electric Co Ltd 回路装置および回路装置の製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004193297A (ja) 2002-12-11 2004-07-08 Dainippon Printing Co Ltd ウェハレベルパッケージおよびその製造方法
JP4802491B2 (ja) * 2004-12-17 2011-10-26 大日本印刷株式会社 センサーモジュールおよびこれを用いたカメラモジュール
JP2008135719A (ja) * 2006-10-31 2008-06-12 Sanyo Electric Co Ltd 半導体モジュール、半導体モジュールの製造方法および携帯機器

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000058594A (ja) * 1998-08-04 2000-02-25 Nec Corp 半導体装置とその製造方法
JP2000114302A (ja) * 1998-10-08 2000-04-21 Fuji Electric Co Ltd 半導体装置
JP2001257229A (ja) * 2000-03-10 2001-09-21 Denso Corp バンプを有する電子部品及びその実装方法
JP2005503660A (ja) * 2001-02-27 2005-02-03 チップパック,インク. フリップチップ用の自己平面保持バンプの形状
JP2004063808A (ja) * 2002-07-29 2004-02-26 Matsushita Electric Works Ltd 半導体装置のパッケージ構造とその製造方法
JP2007157795A (ja) * 2005-11-30 2007-06-21 Sanyo Electric Co Ltd 回路装置および回路装置の製造方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120196407A1 (en) * 2011-01-28 2012-08-02 Shiann-Ming Liou Single layer bga substrate process
CN103339716A (zh) * 2011-01-28 2013-10-02 马维尔国际贸易有限公司 单层bga基板工艺
US8673689B2 (en) * 2011-01-28 2014-03-18 Marvell World Trade Ltd. Single layer BGA substrate process
KR20140038944A (ko) * 2011-01-28 2014-03-31 마벨 월드 트레이드 리미티드 단일 레이어 bga 기판 공정
US8940585B2 (en) 2011-01-28 2015-01-27 Marvell World Trade Ltd. Single layer BGA substrate process
TWI583267B (zh) * 2011-01-28 2017-05-11 馬維爾國際貿易有限公司 單層球形柵格陣列基材製程方法
KR101938344B1 (ko) 2011-01-28 2019-01-14 마벨 월드 트레이드 리미티드 단일 레이어 bga 기판 공정

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JP5134899B2 (ja) 2013-01-30
JP2009081310A (ja) 2009-04-16
US20100207270A1 (en) 2010-08-19
US8362611B2 (en) 2013-01-29

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