WO2008123020A1 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- WO2008123020A1 WO2008123020A1 PCT/JP2008/051884 JP2008051884W WO2008123020A1 WO 2008123020 A1 WO2008123020 A1 WO 2008123020A1 JP 2008051884 W JP2008051884 W JP 2008051884W WO 2008123020 A1 WO2008123020 A1 WO 2008123020A1
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- Prior art keywords
- substrate
- light emitting
- semiconductor device
- emitting element
- conductivity type
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 211
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 58
- 238000000034 method Methods 0.000 title claims abstract description 56
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- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/12—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto
- H01L31/14—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the light source or sources being controlled by the semiconductor device sensitive to radiation, e.g. image converters, image amplifiers or image storage devices
- H01L31/147—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the light source or sources being controlled by the semiconductor device sensitive to radiation, e.g. image converters, image amplifiers or image storage devices the light sources and the devices sensitive to radiation all being semiconductor devices characterised by potential barriers
- H01L31/153—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the light source or sources being controlled by the semiconductor device sensitive to radiation, e.g. image converters, image amplifiers or image storage devices the light sources and the devices sensitive to radiation all being semiconductor devices characterised by potential barriers formed in, or on, a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
Definitions
- the present invention relates to a semiconductor device including a light emitting element and a manufacturing method thereof.
- LEDs Light emitting diodes
- a conventional semiconductor device including a light emitting element will be described with reference to FIGS. 26 and 27.
- FIG. 26 and 27 A conventional semiconductor device including a light emitting element will be described with reference to FIGS. 26 and 27.
- the conventional semiconductor device 100 includes a first lead 10 0 1 (force sword) and a light emitting element (LED chip 1 0) arranged on the first lead 1 0 1. 2) and a second lead 10 04 (anode) electrically connected to the surface electrode of the LED chip 10 2 through the bonding wire 103.
- the portion of the first lead 10 1 where the LED chip 10 2 is disposed is processed into a concave shape.
- This concave surface portion 10 5 is subjected to, for example, silver plating treatment. Therefore, the concave surface portion 105 functions as a light reflecting surface, and the brightness of the light emitted from the LED chip 10 2 is improved.
- each configuration described above is sealed with a transparent resin 106.
- Such control of light emission and extinction of the semiconductor device 100 is performed by a predetermined drive from the driving device (not shown) different from the semiconductor device 100 to the first lead 1001 and the second lead 104. This is done by supplying voltage.
- a conventional photo coupler will be described as a semiconductor device including a light emitting element.
- a photo power bra is a semiconductor device consisting of a light-emitting element and a light-receiving element, which converts the input electrical signal into light by the light-emitting element and realizes signal transmission by conducting the light-receiving element with the light. Device.
- the conventional photocoupler 110 has an LED chip 1 1 1 as a light emitting element and a PD (Photo Diode) chip 1 1 2 as a light receiving element.
- the LED chip 1 1 1 and the PD chip 1 1 2 are arranged to face each other and are electrically connected to the leads 1 1 4 through the bonding wires 1 1 3.
- the 0 chip 1 1 2 is sealed with a transparent resin 1 1 5 and further sealed with a mold resin 1 1 6 that blocks light.
- the LED chip 1 1 1 and the PD chip 1 1 2 are not electrically connected. In such a photocoupler 1 1 0, the input electrical signal is converted into an optical signal by the LED chip 1 1 1, and the signal is transmitted by conducting the PD chip 1 1 2 with the light. .
- the LED chip 1 1 1 and the PD chip 1 1 2 are arranged opposite to each other on the lead 1 1 4 or the LED chip 1 1 1 and PD chip 1 1 2 need to connect bonding wires 1 1 3 to each other, which makes it difficult to reduce the overall size and the manufacturing process is complicated There was a problem.
- the conventional semiconductor device including the light emitting element cannot be reduced in size and thickness as a whole, and the manufacturing cost increases.
- an object of the present invention is to provide a smaller semiconductor device with a low manufacturing cost, high reliability, and a manufacturing method thereof.
- a semiconductor device of the present invention includes a first substrate, first and second pad electrodes formed on the surface of the first substrate, a first conductivity type region and a second surface on a first surface.
- a light-emitting element having a conductive region, wherein the first surface is formed to face the surface of the first substrate, and an adhesive layer formed between the light-emitting element and the first substrate;
- a first conductive material formed between the light-emitting element and the first substrate and having an electrical connection between the first conductivity type region and the first pad electrode; the light-emitting element and the first substrate;
- a second conductive material interposed between the second conductivity type region and the second pad electrode. The second conductive material is interposed between the second conductive type region and the second pad electrode.
- the semiconductor device of the present invention includes a first substrate, first and second pad electrodes formed on the surface of the first substrate, and a first conductivity type region on the first surface.
- the second surface has a second conductivity type region, and the first surface is formed to face the surface of the first substrate.
- a wafer-shaped first substrate on which a first pad electrode and a second pad electrode are formed is prepared, and a first conductive material and a second conductive material are provided on the surface of the first substrate.
- the method for manufacturing a semiconductor device of the present invention also provides a wafer-like first substrate having a first pad electrode and a second pad electrode formed on the surface, and a first conductivity type on the first surface.
- a light-emitting element having a region and a second conductivity type region on a second surface, wherein the first surface faces the surface of the first substrate so that the first surface faces the surface of the first substrate.
- Forming the first pad electrode and the first conductivity type region electrically through a first conductive material, and forming the second pad electrode and the first conductive region through an adhesive layer. Electrically connecting the second conductivity type region to the second conductive material via the second conductive material; cutting the first substrate along a predetermined line; and It has the process of dividing
- the chip is integrated from the time of the woofer state.
- each element can be formed finely. Therefore, a thinner and smaller semiconductor device can be realized.
- FIG. 1 is a sectional view for explaining a semiconductor device and a manufacturing method thereof according to the first embodiment of the present invention
- FIG. 2 is a semiconductor device and a manufacturing method thereof according to the first embodiment of the present invention
- FIG. 3 is a cross-sectional view illustrating a semiconductor device and a manufacturing method thereof according to the first embodiment of the present invention
- FIG. 4 is a first embodiment of the present invention
- FIG. 5 is a plan view for explaining the semiconductor device and the manufacturing method thereof according to the first embodiment of the present invention
- FIG. 6 is a sectional view for explaining the semiconductor device and the manufacturing method thereof according to FIG.
- FIG. 7 is a cross-sectional view illustrating a semiconductor device and a manufacturing method thereof according to the first embodiment of the present invention
- FIG. 1 is a sectional view for explaining a semiconductor device and a manufacturing method thereof according to the first embodiment of the present invention
- FIG. 2 is a semiconductor device and a manufacturing method thereof according to the first embodiment of the present invention
- FIG. 3 is
- FIG. 7 is a cross-sectional view illustrating a semiconductor device and a manufacturing method thereof according to the first embodiment of the present invention.
- FIG. 8 illustrates the semiconductor device and the manufacturing method thereof according to the first embodiment of the present invention.
- FIG. 9 is a plan view illustrating the semiconductor device and the manufacturing method thereof according to the first embodiment of the present invention.
- FIG. 10 is a plan view illustrating the semiconductor device according to the first embodiment of the present invention.
- Semiconductor device and its FIG. 11 is a plan view illustrating a manufacturing method
- FIG. 11 is a cross-sectional view illustrating a semiconductor device and a manufacturing method thereof according to a first embodiment of the present invention
- FIG. 12 is a second view of the present invention.
- FIG. 13 is a cross-sectional view illustrating a semiconductor device and a manufacturing method thereof according to the embodiment, and FIG. 13 is a cross-sectional view illustrating a semiconductor device and a manufacturing method thereof according to the second embodiment of the present invention.
- FIG. 15 is a cross-sectional view illustrating a semiconductor device according to a second embodiment of the present invention and a method for manufacturing the semiconductor device.
- FIG. 15 illustrates a semiconductor device according to a second embodiment of the present invention and a method for manufacturing the same.
- FIG. 16 is a plan view for explaining the semiconductor device and the manufacturing method thereof according to the second embodiment of the present invention, and FIG. 17 is the second embodiment of the present invention.
- FIG. 18 is a cross-sectional view illustrating the semiconductor device according to FIG. FIG.
- FIG. 19 is a cross-sectional view illustrating a semiconductor device and a manufacturing method thereof according to the embodiment, and FIG. 19 is a cross-sectional view illustrating a semiconductor device and a manufacturing method thereof according to the third embodiment of the present invention.
- FIG. 0 is a plan view illustrating a semiconductor device and a manufacturing method thereof according to the third embodiment of the present invention
- FIG. 21 illustrates a semiconductor device and a manufacturing method thereof according to the second embodiment of the present invention.
- FIG. 22 is a sectional view for explaining a semiconductor device and a manufacturing method thereof according to the second embodiment of the present invention.
- FIG. 23 is a sectional view of the third embodiment of the present invention.
- FIG. 24 is a cross-sectional view illustrating a semiconductor device according to a modified example of the present invention
- FIG. 25 is a semiconductor according to a modified example of the present invention
- FIG. 26 is a sectional view for explaining a conventional semiconductor device.
- a drawing, a second FIG. 7 is a cross-sectional view illustrating a conventional semiconductor device.
- FIG. 9 is a cross-sectional view showing the respective manufacturing steps.
- an N-type semiconductor substrate 1 made of gallium arsenide (G a As), gallium nitride (G a N), or the like is prepared.
- the material of the semiconductor substrate 1 can be appropriately changed according to the intended color of light emission.
- the N-type semiconductor layer 2 and the P-type semiconductor layer 3 are sequentially formed on the surface of the semiconductor substrate 1 by an epitaxial crystal growth method.
- the N-type impurities added to the semiconductor substrate 1 and the N-type semiconductor layer 2 are, for example, sulfur (S), selenium (S e), tellurium (T e), and the like.
- the P-type impurity added to the P-type semiconductor layer 3 is, for example, zinc (Zn).
- LED chip 4 has both exposed P-type region (P-type semiconductor layer 3) and N-type region (N-type semiconductor layer 2) on one side, so power can be supplied to each layer from the same plane side. It is. Note that the above description is an example of a method for manufacturing a light-emitting element, and the manufacturing process varies depending on required characteristics (for example, color of light emission).
- electrodes are formed on the N-type semiconductor layer 2 and the P-type semiconductor layer 3 before dividing the semiconductor substrate 1 into the LED chips 4.
- a metal layer such as aluminum (A 1) or copper (Cu) is formed by a thin film formation technique such as sputtering, and then the metal layer is selectively etched using a resist layer (not shown) as a mask.
- a resist layer not shown
- a wafer-like semiconductor substrate 6 made of, for example, silicon (S i) having device elements 5 formed on the surface is prepared.
- Device element 5 is There is no limitation on the type and function of the child, and it is preferable to include, for example, a drive element that controls light emission and extinction of the LED chip 4. Further, the device element 5 may be a light receiving element having a function of converting light into an electric signal such as a photo diode or a photo transistor, and according to such a configuration, the device element 5 is small as described later. Can be realized.
- the thickness of the semiconductor substrate 6 is, for example, about 3 00 / m to 70 0 ⁇ m.
- a first insulating film 7 (for example, a silicon oxide film formed by a thermal oxidation method, a CVD method, or the like) is formed on the surface of the semiconductor substrate 6 to a thickness of 2 m, for example.
- a metal layer such as aluminum (A 1), aluminum alloy, or copper (Cu) is formed by sputtering or other deposition methods, and then the metal layer is selectively etched.
- a plurality of pad electrodes 8 a, 8 b, 8 c are formed on the first insulating film 7 with a film thickness of 1 ⁇ m, for example.
- the pad electrodes 8a and 8b are external connection electrodes that are electrically connected to the LED chip 4 as described later.
- the pad electrode 8c is shown in FIG.
- pad electrodes 8 a, 8 b, 8 c are arranged on both sides of the device element 5, but their positions are not limited, and they can be arranged on the device element 5.
- an insulating adhesive layer 9 made of, for example, epoxy resin, polyimide (for example, photosensitive polyimide), resist, acrylic, or the like is formed on the surface of the semiconductor substrate 6. Then, a conductive paste 10 0 a, 10 0 b formed by mixing a conductive substance such as silver (A g) and an adhesive material such as epoxy resin is selectively applied on the semiconductor substrate 6. Cloth.
- the adhesive layer 9 mainly serves to bond the LED chip 4 and the semiconductor substrate 6 together. Have. Further, when manufacturing the photobra, the adhesive layer 9 is a path for the light emitted from the LED chip 4, and therefore it is preferable that the adhesive layer 9 is made of a material that is transparent and can transmit light.
- the conductive pastes 10 a and 10 b are mainly formed between the P-type region (P-type semiconductor layer 3) and the N-type region (N-type semiconductor layer 2) of the LED chip 4 and the pad electrodes 8 a and 8. It has a role of interposing electrical connection. As shown in FIG. 5, the conductive pastes 10 a and 10 b are applied so as to cover at least a part of the pad electrodes 8 a and 8 b, and the adhesive layer 9 is applied to other regions.
- 5 is a schematic plan view for explaining the formation region of the adhesive layer 9 and the conductive pastes 10a, 10b, and FIG. 4 is taken along the line XX in FIG. It corresponds to a sectional view.
- the P-type semiconductor layer 3 and the conductive paste 10 a are connected, and the N-type semiconductor layer 2 and the conductive paste 10 b are connected. Bond the ED chip 4 onto the semiconductor substrate 6.
- the LED chip 4 is fixed on the semiconductor substrate 6 by the adhesiveness of the adhesive layer 9 and the conductive pastes 10 a and 10 b.
- a protective layer 12 having an opening 11 is formed at a position corresponding to each pad electrode 8 a, 8 b, 8 c (not shown).
- the protective layer 12 is made of an organic material such as polyimide resin or solder resist, and is transparent and has a property of transmitting light.
- the protective layer 12 is formed as follows. First, an organic material with good light transmittance is applied to the entire surface (for example, spin coating) by a coating / coating method, followed by heat treatment (pre-bake). Next, the applied organic material is exposed to light and developed to form the conductive paste 10a, 10b and the opening 11 that exposes the adhesive layer 9, and then heat treated (post-beta). Apply. Subsequently, the conductive paste 10 a, 10 b and the adhesive layer 9 exposed at the bottom of the opening 11 are etched to form pad electrodes 8 a, 8 b, 8 Expose c.
- the electrode connection layer 13 is formed on the pad electrodes 8 a, 8 b, 8 c in the opening 11.
- the electrode connection layer 13 is formed because the pad electrodes 8a, 8b and 8c made of aluminum or the like and the conductive terminal 14 made of solder or the like which will be described later are difficult to join. This is because it prevents the material from flowing into the pad electrodes 8a, 8b, 8c.
- the electrode connection layer 13 is formed by, for example, a rib-off method or a plating method in which a resist layer is used as a mask and a metal layer such as a nickel (N i) layer and a gold (A u) layer is sequentially sputtered and then the resist layer is removed. Can be formed.
- a conductive material for example, solder
- the LED chip 4 is electrically connected through the electrode connection layer 13 and the conductive pastes 10 a and 10 b, and the device element is connected through the electrode connection layer 13 and the pad electrode 8 c.
- a conductive terminal 14 electrically connected to 5 is formed.
- FIG. 8 only shows that the LED chip 4 and the conductive terminal 14 are electrically connected, the device element 5 is connected to the conductive terminal 14 in another region.
- the conductive terminal 14 is formed to be slightly higher than the height of the protective layer 12, and is an electrode protruding in the thickness direction from the surface of the protective layer 12.
- the method for forming the conductive terminals 14 is not limited to the above, but may be formed by an electrolytic plating method or a so-called dispensing method (coating method) in which solder is applied to a predetermined region using a dispenser. You can also.
- the conductive terminal 14 may be made of gold, copper, or nickel, and the material is not particularly limited.
- the protective layer 12 and the semiconductor substrate 6 are cut along a predetermined dicing line DL, and the wafer-like semiconductor substrate 6 is divided into individual chips. As a method of dividing into individual chips, there are a dicing method, an etching method, a laser cutting method and the like.
- FIG. 9 is a schematic plan view of the semiconductor device 20 as viewed from the LED chip 4 side, and FIG. 8 corresponds to a cross-sectional view taken along line Y—Y in FIG.
- the semiconductor device 20 according to the present embodiment is not separated into each component (LED chip, lead, bonding wire) as in the conventional structure (see FIG. 26), and the semiconductor substrate 6 is in the woofer state. Since it is integrated as a chip. In addition, since the constituent elements of the semiconductor device are formed by a wafer process, each element can be formed finer than the conventional structure. In addition, the LED chip 4 is configured so that power can be supplied from the surface facing the semiconductor substrate 6, and a thin conductive material (conductive paste 100a, It is connected to external connection electrodes (pad electrodes 8a and 8b, conductive terminals 14) through 10b). Therefore, a thinner and smaller semiconductor device can be realized.
- a plurality of parts are manufactured separately and completed through subsequent assembly work.
- Power According to the present embodiment, a single chip is completed when it is divided into individual semiconductor devices. Therefore, it is possible to omit the assembly work (the process of placing the LED chip on the lead, the process of connecting the LED chip and the lead with a bonding wire, the process of sealing the whole with a transparent resin, etc.) A half with a light emitting element The workability and productivity of the conductor device can be improved.
- the device element 5 is formed separately from the light emitting element (LED chip 4) on the semiconductor substrate 6, a large number of elements can be efficiently mixed in one chip. Can be obtained.
- the device element 5 includes a drive element that controls the light emission and extinction of the LED chip 4, both the light emission function and the control function can be realized by a single chip. Therefore, it is not necessary to provide a driving device separately from the semiconductor device as in the prior art (Fig. 26).
- the LED chip 4 and the device element 5 are connected by forming a wiring layer when forming the pad electrodes 8 a, 8 b, 8 c or by providing wiring on the mounting substrate side. Can be connected electrically.
- the semiconductor device 20 can be used as a photocoupler.
- the conventional photocoupler see Fig. 27
- two chips LED chip and PD chip
- the structure is integrated as a chip from the wafer state.
- Each element of the photobra is formed by a wafer process.
- the space between the LED chip 4 and the device element 5 is very thin compared to the conventional structure. Therefore, a thinner and smaller photocabra can be realized.
- the conventional assembly work (such as the process of placing the light-emitting element and the light-receiving element facing each other on the lead and the process of filling the transparent resin between the chips) can be omitted.
- the workability and productivity of the photopower bra can be improved. In this case, it is not necessary to electrically connect the light receiving element and the LED chip 4.
- the wafer-like semiconductor substrate 1 is divided into individual LED chips 4 and then the LED chips 4 are arranged on the semiconductor substrate 6.
- the following manufacturing process may be adopted. it can. First, as shown in FIG. 2, a wafer-like semiconductor substrate 1 is prepared in which the P-type semiconductor layer 3 is selectively removed and a part of the N-type semiconductor layer 2 is exposed. Next, as shown in FIG.
- the semiconductor substrate 1 and the semiconductor substrate 6 are bonded together through the conductive bases 10 a and 10 b and the adhesive layer 9 in the same manner as described above.
- the semiconductor substrate 1 is selectively etched from the back side, and the wafer-like semiconductor substrate 1 is divided into individual LED chips 4.
- the semiconductor substrate 6 serves as a support, and the process of grinding the entire back surface of the semiconductor substrate 1 (back grinding process) can be easily performed. Therefore, there is an advantage that the LED chip 4 can be made thinner.
- FIGS. 11 to 16 are cross-sectional views shown in the order of manufacturing steps. The description of the same configuration and manufacturing process as in the first embodiment will be omitted or simplified.
- the semiconductor substrate 1 and the semiconductor substrate 6 are bonded together with an adhesive layer 9 so that the P-type semiconductor layer 3 faces the surface of the semiconductor substrate 6.
- the entire back surface of the semiconductor substrate 1 is ground using a back surface grinding device (grinder), and the semiconductor substrate 1 is thinned to a predetermined thickness.
- the grinding process may be an etching process or a combination of a grinder and an etching process.
- the end product application and specifications, prepared semiconductor may not be required.
- a wet etching process may be performed as a step for obtaining a flat surface after the grinding step.
- predetermined regions of the semiconductor substrate 1 and the N-type semiconductor layer 2 are selectively etched from the back side of the semiconductor substrate 1, and a P-type semiconductor as shown in FIG. An opening 21 that exposes a part of the layer 3 is formed.
- the semiconductor substrate 1, the N-type semiconductor layer 2, the P-type semiconductor layer 3, and the adhesive layer 9 are selectively etched, and the pad electrode 8 as shown in FIG. a, 8 b and 8 c are exposed.
- the P-type semiconductor layer 3 exposed by forming the opening 21 is not etched.
- the wafer-like semiconductor substrate 1 is divided into individual chips (hereinafter referred to as LED chips 22).
- the LED chip 22 has both the exposed P-type region (P-type semiconductor layer 3) and N-type region (semiconductor substrate 1) on the side not facing the semiconductor substrate 6.
- the LED chip 22 is different from the configuration of the LED chip 4 in the first embodiment in this respect.
- the N-type region (semiconductor substrate 1) and the pad electrode 8 a of the LED chip 22, and the P-type region (P-type semiconductor layer 3) of the LED chip 22 And the node electrode 8b are electrically connected by bonding wires 23 made of gold or the like.
- a protective layer 12 is formed to cover a part of the top electrodes 8 a and 8 b.
- the protective layer 12 has openings 11 at positions corresponding to the pad electrodes 8a, 8b, 8c (not shown) as in the first embodiment. This is the same as the embodiment.
- an electrode connection layer 13 is formed on the substrate.
- the conductive terminal 14 is formed on the electrode connection layer 13 by using, for example, a screen printing method.
- the conductive terminal 14 is electrically connected to the LED chip 22 through the electrode connection layer 13 and the bonding wire 23, and is electrically connected to the device element 5 through the electrode connection layer 13 and the pad electrode 8c.
- the protective layer 12, the semiconductor substrate 6 and the like are cut along a predetermined dicing line DL and divided into individual chips.
- FIGS. 15 and 16 are schematic plan views of the semiconductor device 25 as viewed from the LED chip 22 side.
- FIG. 15 corresponds to a cross-sectional view taken along the line ZZ of FIG.
- a thinner and smaller semiconductor device can be realized as in the first embodiment, and workability and productivity of a semiconductor device having a light emitting element can be improved.
- power is supplied to the LED chip 22 through the bonding wire 23 from the surface not facing the semiconductor substrate 6, compared to a structure in which power is supplied using a conductive paste.
- a very small device compared to the conventional structure (Fig. 26, Fig. 27).
- the wafer-like semiconductor substrate 1 is bonded to the semiconductor substrate 6, and then the LED chip 22 is formed through a selective etching process.
- the following manufacturing process can also be adopted. First, a chip-like LED chip 22 is manufactured in a separate process. Next, the LED chip 22 is connected to the As shown in FIG. 4, the semiconductor substrate 6 is mounted via the adhesive layer 26. The subsequent steps are the same as described above, and will be omitted.
- FIGS. 18 to 23 are cross-sectional views shown in the order of the manufacturing steps. The description of the same configuration and manufacturing process as those in the first and second embodiments will be omitted or simplified.
- a wafer-like semiconductor substrate 31 made of silicon (S i) or the like having a light receiving element 30 formed on its surface is prepared.
- the light receiving element 30 is an element having a function of converting light into an electric signal, including a known photo diode or a photo transistor.
- the semiconductor substrate 31 is selectively etched using a resist layer (not shown) as a mask to form a recess 32 having a step difference on the surface of the semiconductor substrate 31.
- the recess 32 is large enough to accommodate a later-described LED chip 41 and has a depth of, for example, about 50 ⁇ m.
- a first insulating film 33 (for example, a silicon oxide film formed by a thermal oxidation method, a CVD method, or the like) is formed on the surface of the semiconductor substrate 31.
- a metal layer such as aluminum (A 1), aluminum alloy, or copper (C u) is formed by sputtering method or other deposition method, and then the metal layer is selectively etched.
- FIGS. 19 and 20 on the first insulating film 33 a plurality of pad electrodes 3 4, 3 5 a, 3 5, wiring layers 3 6, 3 7, reflective layer 3 8 The wiring layer 39 is formed.
- FIG. 20 is a schematic plan view showing the surface of the semiconductor substrate 31.
- FIG. 19 corresponds to a cross-sectional view taken along the line AA in FIG.
- the pad electrode 3 4 is electrically connected to the light receiving element 30 through the wiring layer 39.
- the pad electrodes 3 5 a and 3 5 b are electrically connected to the LED chip 4 1, which will be described later, via wiring layers 3 6 and 3 7 formed along the inner wall of the recess 3 2 from the surface of the semiconductor substrate 3 1. It is an electrode for external connection connected to.
- the wiring layer 37 is formed at the bottom of the recess 3 2 as shown in FIG. 20, and includes an extended region 40 that allows the LED chip 41 to be described later to be disposed.
- the reflection layer 38 is formed along the inner wall of the recess 32 as shown in FIGS. 19 and 20 and functions as a light reflection surface.
- the material of the semiconductor substrate 31 is, for example, silicon
- the semiconductor substrate 31 has a function of reflecting light. Therefore, it is not always necessary to form the reflective layer 38.
- a chip-like light emitting element (LED chip 4 1) having a P-type region (not shown) on one side and an N-type region (not shown) on the other side is prepared.
- the LED chip 41 is mounted in the recess 32 so that the N-type region and the extended region 40 of the wiring layer 37 are connected.
- a conductive paste for example, silver paste
- the patterning may be performed after the LED chip 41 is mounted.
- one surface (P-type region) of the LED chip 41 and the wiring layer 36 are electrically connected by a bonding wire 42 made of gold or the like.
- the surface of the semiconductor substrate 3 1 including the LED chip 4 1 and the bonding wire 4 2 is covered to correspond to the pad electrodes 3 4, 3 5 a, 3 5 b
- a protective layer 44 having an opening 43 is formed at a position where The protective layer 44 is made of a solder resist or the like, and is transparent and has a property of transmitting light.
- an electrode connection layer 45 made of a laminate of a nickel layer and a gold layer is formed on the pad electrodes 34, 35a, 35b in the opening 43.
- a metal layer such as aluminum (AI), an aluminum alloy, or copper (Cu) is formed by a film forming method such as sputtering, and then the metal layer is selectively etched to protect it.
- a reflective layer 46 as shown in FIG. 23 is formed on the layer 44.
- the reflection layer 46 is a layer for reflecting the light emitted from the LED chip 41 toward the light receiving element 30 as indicated by an arrow.
- a conductive terminal 47 made of solder or the like is formed on the electrode connection layer 45 in the opening 43.
- the light receiving element 30 is electrically connected to the conductive terminal 47 via the pad electrode 34
- the LED chip 41 is electrically connected to the conductive terminal 47 via the pad electrodes 35a and 35b.
- the protective layer 44, the semiconductor substrate 31 and the like are cut along a predetermined dicing line D L and divided into individual chips.
- the light receiving element is formed on the surface of the semiconductor substrate 31 as shown in FIG.
- a chip size package type semiconductor device 50 including 30 and a light emitting element (LED chip 41) is completed.
- a light receiving element 30 and a reflective layer 46 are formed separately from the LED chip 41. Therefore, the semiconductor device 50 can be used as a photopower bra.
- a semiconductor device 50 according to the third embodiment includes a recess 3 on a substrate (semiconductor substrate 3 1).
- a light emitting element (LED chip 4 1) is formed in the recess 3 2.
- a layer that reflects light such as the wiring layers 3 6 and 3 7 and the reflective layer 3 8, is formed on the inner periphery of the recess 3 2.
- the inner peripheral portion of the recess 3 2 functions as a reflecting surface, and the directivity and brightness of the light emitted from the LED chip 4 1 can be improved.
- the manufacturing process includes a step of mounting a chip-like light emitting element (LED chip 4, 2 2) on the semiconductor substrate 6, a similar recess is formed, A light emitting element can also be formed inside.
- a light emitting element (LED chip 4 1) and a light receiving element (3 0) are formed at positions spaced apart from each other in plan view, and the light emitted from the light emitting element is reflected to the light receiving element side.
- layers 4-6 According to such a configuration, it is possible to form the photo force plastic in a planar manner, and it is possible to realize a thinner and smaller photo force bra.
- a semiconductor device can be configured as shown in FIG.
- the same components as those already described are indicated by the same reference numerals, and the description thereof is omitted.
- the semiconductor substrate 6 at positions corresponding to the pad electrodes 8a, 8b, 8c (not shown) is cut from the back side by, for example, a dry etching method or the like.
- a second insulating film 61 made of a silicon oxide film, a silicon nitride film, or the like is formed on the side surface and the back surface of the semiconductor substrate 6.
- a wiring layer 62 made of aluminum or the like electrically connected to the pad electrodes 8a, 8b, 8c is formed along the side surface and the back surface of the semiconductor substrate 6.
- an electrode connection layer 63 that covers the wiring layer 62 is formed.
- the electrode connection layer 63 is a layer in which, for example, a nickel (N i) layer and a gold (A u) layer are sequentially laminated, as with the electrode connection layer 13 described above. In addition, the electrode connection layer 63, the back surface of the semiconductor substrate 6, etc. are covered to protect it from solder resist, etc. Layer 64 is formed. An opening is formed in a predetermined region of the protective layer 64 on the electrode connection layer 63, and a conductive terminal 65 is formed in the opening.
- power is supplied from the surface side of the semiconductor substrate 6 to the elements (LED chips 4, 22, device element 5, light receiving element 30, etc.) via the conductive terminals (14, 47).
- the conductive terminals 14, 47.
- the light emitted from the LED chip 4 is not blocked by the conductive terminals, so that the light can be effectively irradiated to the outside.
- a semiconductor device can be configured as shown in FIG.
- the semiconductor device 70 shown in FIG. 25 is formed with a protective layer 71 that opens at positions corresponding to the pads 8 a, 8 b, and 8 c (not shown) and covers the side and back surfaces of the semiconductor substrate 6.
- An electrode connection layer 63 is formed on the pad electrodes 8 a, 8 b, 8 c at the opening positions of the protective layer 71.
- a conductive terminal 72 made of solder or the like is formed.
- the conductive terminal 72 can be formed so as to be adjacent to the electrode. According to such a configuration, a process for forming the second insulating film 61 and the wiring layer 62 is not required as compared with the semiconductor device 60, and thus the manufacturing cost can be kept low. Further, since the conductive terminal 72 is formed adjacent to the side wall of the semiconductor substrate 6, the semiconductor device can be made thin. Since the etched portion of the semiconductor substrate 6 can be changed as appropriate, the conductive terminal 72 is formed so as to be embedded in the side wall of the semiconductor substrate 6, and the conductive terminal 72 is exposed from the side surface of the semiconductor device 70. It is also possible not to let it. In this way, the method of feeding power to the element can be changed as appropriate. In FIGS.
- the modified example of the first embodiment has been described.
- similar modifications may be made to the second and third embodiments.
- a BGA type semiconductor device having ball-like conductive terminals has been described.
- the present invention may be applied to an LGA (Land Grid Array) type semiconductor device.
- the present invention can be widely applied as a technique for sealing a semiconductor device having a light emitting element in a small size.
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Abstract
Description
Claims
Priority Applications (2)
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US12/527,990 US7855425B2 (en) | 2007-03-09 | 2008-01-30 | Semiconductor device and method of manufacturing the same |
JP2009508943A JPWO2008123020A1 (ja) | 2007-03-09 | 2008-01-30 | 半導体装置及びその製造方法 |
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JP2007-060206 | 2007-03-09 | ||
JP2007060206 | 2007-03-09 |
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JP2012060133A (ja) * | 2010-09-10 | 2012-03-22 | Samsung Led Co Ltd | 発光デバイス、照明装置およびバックライト |
KR101448588B1 (ko) | 2012-12-14 | 2014-10-08 | 주식회사 네패스 | 발광 다이오드 패키지 및 그 제조 방법 |
WO2017208321A1 (ja) * | 2016-05-31 | 2017-12-07 | サンケン電気株式会社 | 発光装置 |
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WO2008093880A1 (ja) | 2007-02-02 | 2008-08-07 | Sanyo Electric Co., Ltd. | 半導体装置及びその製造方法 |
FR2977715A1 (fr) | 2011-07-08 | 2013-01-11 | St Microelectronics Grenoble 2 | Boitier electronique optique |
TWI469231B (zh) * | 2011-09-09 | 2015-01-11 | Dawning Leading Technology Inc | 晶片封裝結構之製造方法 |
FR2988519A1 (fr) | 2012-03-22 | 2013-09-27 | St Microelectronics Grenoble 2 | Boitier electronique optique |
DE102012212968A1 (de) | 2012-07-24 | 2014-01-30 | Osram Opto Semiconductors Gmbh | Optoelektronisches halbleiterbauteil mit elektrisch isolierendem element |
TW201511347A (zh) * | 2013-09-10 | 2015-03-16 | Lingsen Precision Ind Ltd | 發光二極體封裝結構及其製造方法 |
JP2017175004A (ja) * | 2016-03-24 | 2017-09-28 | ソニー株式会社 | チップサイズパッケージ、製造方法、電子機器、および内視鏡 |
US10651103B2 (en) * | 2016-10-28 | 2020-05-12 | Qorvo Us, Inc. | Environmental protection for wafer level and package level applications |
WO2020122037A1 (ja) * | 2018-12-11 | 2020-06-18 | ソニーセミコンダクタソリューションズ株式会社 | 半導体装置及び電子機器 |
US11152553B2 (en) * | 2019-01-15 | 2021-10-19 | Seoul Viosys Co., Ltd. | Light emitting device package and display device having the same |
US11877505B2 (en) | 2020-10-15 | 2024-01-16 | Qorvo Us, Inc. | Fluorinated polymers with low dielectric loss for environmental protection in semiconductor devices |
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Also Published As
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US20100096659A1 (en) | 2010-04-22 |
JPWO2008123020A1 (ja) | 2010-07-15 |
US7855425B2 (en) | 2010-12-21 |
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