WO2008047422A1 - Wiring pattern inspecting method and wiring pattern inspecting system - Google Patents

Wiring pattern inspecting method and wiring pattern inspecting system Download PDF

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Publication number
WO2008047422A1
WO2008047422A1 PCT/JP2006/320723 JP2006320723W WO2008047422A1 WO 2008047422 A1 WO2008047422 A1 WO 2008047422A1 JP 2006320723 W JP2006320723 W JP 2006320723W WO 2008047422 A1 WO2008047422 A1 WO 2008047422A1
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WO
WIPO (PCT)
Prior art keywords
wiring pattern
state
resist
etching
conductor
Prior art date
Application number
PCT/JP2006/320723
Other languages
French (fr)
Japanese (ja)
Inventor
Masami Hiramoto
Tetsuo Oohori
Original Assignee
Casio Micronics Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Micronics Co., Ltd. filed Critical Casio Micronics Co., Ltd.
Priority to PCT/JP2006/320723 priority Critical patent/WO2008047422A1/en
Publication of WO2008047422A1 publication Critical patent/WO2008047422A1/en

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • H05K1/0269Marks, test patterns or identification means for visual or optical inspection
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0548Masks
    • H05K2203/056Using an artwork, i.e. a photomask for exposing photosensitive layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16Inspection; Monitoring; Aligning
    • H05K2203/162Testing a finished product, e.g. heat cycle testing of solder joints
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0005Apparatus or processes for manufacturing printed circuits for designing circuits by computer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • H05K3/064Photoresists

Definitions

  • the present invention relates to a wiring pattern inspection method and a wiring pattern inspection system for inspecting the appearance of a wiring pattern to determine whether the wiring pattern is good or bad.
  • a base material in which a conductor 2 is laminated on a base film 1 is prepared.
  • a resist 3 is applied onto the conductor 2 of the base material, and a glass mask 4 designed and manufactured in advance is placed above the resist 3 and exposed.
  • the exposed portion in the resist 3 is removed with a developer, and a resist pattern 5 is formed from the remaining resist 3.
  • a resist pattern 5 as an etching mask, unnecessary portions of the conductor 2 are removed by wet etching, and the resist 3 on the conductor 2 is removed to form a wiring pattern 6 of the conductor 2.
  • a flexible sprocket 8 can be manufactured by forming sprocket holes 7 for conveyance on the left and right sides of the base film 1.
  • the manufactured flexible substrate 8 is measured by the AOI (Automated Optical Inspection) and!, Inspection equipment, and the appearance of the wiring pattern 6 is measured.
  • the product design data is verified, and the result of the verification is checked for the presence or absence of defects in the wiring pattern 6 (see, for example, Patent Documents 1 and 2).
  • Patent Document 1 JP-A-11 132723 (paragraph numbers 0033 to 0049)
  • Patent Document 2 Japanese Patent Laid-Open No. 2000-199709 (see paragraph numbers 0041-0052) Disclosure of the Invention
  • Patent Documents 1 and 2 it is possible to improve the image processing speed and perform inspection regardless of the wiring pattern material and process type.
  • the conventional inspection method has a big problem at its essential point. The conventional inspection method will be described below together with the inspection system.
  • the conventional inspection system 200 mainly includes a PC (Personal Computer) 10, a design device 20, a server 30 and an inspection device 40, and these devices are connected via an in-house LAN 50. So that they can communicate with each other.
  • An external LAN 60 is connected to the internal LAN 50, and communication between an external PC (not shown) and the PC 10 is possible.
  • step Tl when a product specification is first obtained from a customer as product specification data, or the product specification is a document, Is converted into data on PC10 and used as product specification data (step Tl). After that, the product is designed by the design device 20 based on the product specification data, product design data is created, and the product design data is stored in the server 30 (step ⁇ 2, refer to the first stage in FIG. 15).
  • a pseudo mask correction value obtained from experience based on the product design data is set in the design device 20, and then the pseudo mask is designed in the design device 20 based on the pseudo mask correction value and the product design data.
  • mask data (Step ⁇ 3, ⁇ 4).
  • a glass mask 4 is manufactured based on the mask data
  • a wiring pattern 6 is prototyped using the glass mask 4, and the wiring pattern 6 is measured by the inspection device 40 to obtain first measurement data (step). ⁇ 6 ⁇ ⁇ 8).
  • the product design data and the first measurement data are collated to determine whether or not they match (step T9).
  • the design device 20 also changes the pseudo-mask correction value for the first measurement data force (Steps T10, T11) Repeat steps ⁇ 3 to T11 until the product design data matches the first measurement data.
  • Step ⁇ ⁇ 3 to Step T11 As a result of repeating each process from Step ⁇ ⁇ 3 to Step T11, if the product design data and the first measurement data match, as shown in FIG. 14, the matrix that is the basis of the first measurement data.
  • the mask data is stored in the server 30 as optimum mask data, and a glass mask 4 for mass production is manufactured based on the optimum mask data.
  • a wiring pattern 6 is formed using the glass mask 4, and the wiring pattern 6 Is measured by the inspection device 40 and the second measurement data is obtained (see steps ⁇ 12 to ⁇ 16, second stage in Fig. 15).
  • the wiring pattern 6 is formed by wet etching in the process of step T14, the surrounding conditions such as the planar shape and pattern density, variation in etching conditions, and non-uniformity in the flow of the etching solution As shown in the square frame in FIG. 16, the etching is performed in a curved state (in a rounded state) at a specific portion such as a bent portion as shown in the square frame of FIG. This is expressed in the measurement data of 2.
  • the product design data is downloaded from the server 30 by the PC 10, converted into data that can be handled by the inspection apparatus 40, and transferred to the inspection apparatus 40.
  • the inspection device 40 compares the product design data with the second measurement data to determine whether or not they match (step T17, see the third stage in FIG. 15).
  • the product design data is used as a criterion for determining the quality of the wiring pattern 6, and the consistency with the second measurement data is determined.
  • the line width and position of the wiring pattern 6, the planar shape top The bottom line width, lead length, lead line width, lead chip, lead protrusion, etc. are included as representative criteria criteria.
  • step T17 If the product design data and the second measurement data coincide with each other as a result of the process in step T17, the wiring pattern 6 subjected to the inspection is determined to be a non-defective product and the inspection is terminated (step T18). Conversely, if it is determined that the product design data and the second measurement data do not match, The provided wiring pattern 6 is determined to be defective, and the inspection is completed by marking the flexible substrate 8 with a defective marking or making a hole with the inspection device 40 (steps T19 and T20).
  • product design data in which a specific part such as a bent portion of the wiring pattern 6 is expressed in a rectangular shape is used as a criterion for determining whether the wiring pattern 6 is good or bad.
  • the product design data and the second measurement data are transferred between specific parts such as the bent part of the wiring pattern 6 in the process of Step T17. If the wiring pattern 6 used for the inspection is judged as a defective product, it will be inconvenient.
  • the wet etching state is taken into consideration, and the quality of the wiring pattern 6 is determined based on the product design data as a criterion. Unlike the fact, the wiring pattern 6 to be made is judged as a defective product. In other words, the product design data itself is a factor that lowers the inspection accuracy of the wiring pattern 6 that originally meets the criteria.
  • An object of the present invention is to improve the inspection accuracy of a wiring pattern.
  • the first invention is a first invention.
  • the second invention is:
  • the resist With the conductor and resist laminated on the substrate, the resist is exposed and developed to form a resist pattern, and then the conductor is etched to form a wiring pattern.
  • An etching simulation step for predicting a state of the wiring pattern after etching before etching based on a prediction result of the exposure and development simulation step; a measurement step for measuring the state of the wiring pattern;
  • the third invention provides
  • a measurement step for measuring the state of the wiring pattern for both the top and bottom, and using the prediction result of the simulation step as a determination criterion for the quality of the wiring pattern, the determination criterion and the measurement result of the measurement step A matching process for matching each part of the top and bottom of the wiring pattern;
  • the fourth invention is:
  • Etching predicts the state of the wiring pattern after etching before etching for both top and bottom based on the prediction result of the exposure and development simulation process Simulation process
  • a measurement process for measuring the state of the wiring pattern for both the top and the bottom, and using the prediction result of the etching simulation process as a determination criterion for the quality of the wiring pattern, the determination criterion and the measurement result of the measurement process A collation process for collating each part of the top and bottom of the wiring pattern;
  • the fifth invention provides
  • a wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor.
  • An inspection device that measures the state of the wiring pattern and uses the prediction result of the simulator as a determination criterion for the quality of the wiring pattern, and compares the determination criterion with the measurement result.
  • the sixth invention provides:
  • a wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor.
  • a simulator that predicts the state of the resist pattern after exposure and development before exposure and development, and predicts the state of the wiring pattern after etching before etching based on the prediction result;
  • An inspection device that measures the state of the wiring pattern and uses the prediction result of the simulator as a determination criterion for the quality of the wiring pattern, and compares the determination criterion with the measurement result.
  • the seventh invention provides
  • a wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor.
  • the simulator that predicts the state of the wiring pattern for both the top and the bottom, the state of the wiring pattern is measured for both the top and the bottom, and the prediction result of the simulator is measured for the wiring pattern.
  • an inspection device that collates the determination criterion and the measurement result for each of the top and bottom portions of the wiring pattern;
  • the eighth invention provides
  • a wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor.
  • a simulator that predicts the state of the resist pattern after exposure and development before exposure and development, and predicts the state of the wiring pattern after etching for both top and bottom before etching based on the prediction result;
  • the state of the wiring pattern is measured at both the top and the bottom, and the prediction result of the simulator is used as a determination criterion for the quality of the wiring pattern, and the determination criterion and the measurement result are used as the wiring pattern.
  • An inspection device that checks each part of both the top and bottom of
  • the prediction result of the state of the wiring pattern after etching is used as a determination criterion, not the product design data, the measurement result of the wiring pattern and the determination criterion are within the approximate range. Therefore, it is possible to improve the inspection accuracy of the wiring pattern by checking the quality of the wiring pattern.
  • the predicted result of the resist pattern state after exposure and development is also considered as a basis for the judgment criteria, and therefore the range in which the measurement result of the wiring pattern and the judgment criteria are extremely approximated. Therefore, it is possible to reliably improve the inspection accuracy of the wiring pattern by strictly checking the wiring pattern.
  • both the top and bottom portions of the wiring pattern are considered as the basis of the judgment standard, so that the measurement result of the wiring pattern and the judgment standard are within a very approximate range. Strict collation is performed to determine the quality of the wiring pattern, and the accuracy of wiring pattern detection can be improved reliably.
  • both the top and bottom portions of the wiring pattern are considered as the basis of the judgment criteria.
  • the wiring pattern inspection accuracy can be reliably improved by closely collating the measurement results and the determination criteria within a very approximate range, and the wiring pattern inspection accuracy can be reliably improved.
  • FIG. 1 is a drawing showing a schematic configuration of a wiring pattern inspection system.
  • FIG. 2 is a plan view showing a schematic configuration of a carrier tape.
  • FIG. 3 is a plan view showing a schematic configuration of a flexible substrate.
  • FIG. 4 is a drawing for explaining an example of the internal configuration of the inspection apparatus.
  • FIG. 5 is a drawing for explaining another example of the internal configuration of the inspection apparatus.
  • FIG. 6 is a flowchart showing a wiring pattern inspection method over time.
  • FIG. 7 is a flowchart showing a step subsequent to FIG.
  • FIG. 8 is a drawing schematically explaining the processing of FIGS. 6 and 7.
  • FIG. 9 is a drawing for explaining the design principle of a glass mask.
  • FIG. 10 is a view showing a modified example of the flexible substrate.
  • FIG. 11 is a drawing for explaining a method of manufacturing a flexible substrate.
  • FIG. 12 is a drawing showing a schematic configuration of a conventional inspection system.
  • FIG. 13 is a flowchart showing a conventional inspection method over time.
  • FIG. 14 is a flowchart showing a step subsequent to that in FIG.
  • FIG. 15 is a drawing schematically explaining the processes of FIGS. 13 and 14.
  • FIG. 16 is a drawing for explaining a conventional problem.
  • a wiring pattern inspection system 100 has a configuration in which a plurality of inspection devices 40 and a simulator 70 are added to a conventional inspection system 200. These devices are used to check the quality of each wiring pattern 6 in the carrier tape 9 of FIG.
  • the carrier tape 9 has a configuration in which a large number of wiring patterns 6 are formed on a base film 1 as a substrate having a wide and long reel shape. .
  • one flexible substrate 8 is configured for each wiring pattern 6, and one flexible substrate 8 is one piece of the carrier tape 9.
  • the flexible substrate 8 is a wiring substrate having the form shown in FIG. 3, and has a configuration in which one wiring pattern 6 is formed on a rectangular base film 1.
  • a large number of flexible substrates 8 are arranged over three tracks in the carrier tape 9, and each flexible substrate 8 is arranged along the length direction of the base film 3 for each track. ing.
  • the carrier tape 9 has sprocket holes 7 for each track. The sprocket hole 7 is used for transporting the base film 1 when the wiring pattern 6 is formed or the inspection is performed.
  • the PC 10 controls the operation of the whole or part of the wiring pattern inspection system 100, converts the file format of data created by the design device 20, the simulator 70, etc., and transfers the data to other devices. It is a device that executes processing that can be handled.
  • the design device 20 is a CAD (Computer Aided design) device that designs products such as a pseudo mask of the glass mask 4 and a finished product of the wiring pattern 6.
  • CAD Computer Aided design
  • the server 30 is a device that accumulates data created by the design device 20, the simulator 70, and the like and provides the data to other devices.
  • the inspection device 40 is an AOI device that automatically inspects the appearance of each wiring pattern 6 in the carrier tape 9 and determines whether the wiring pattern 6 is acceptable.
  • a plurality of inspection devices 40 are connected to the LAN 50, and the plurality of inspection devices 40 can inspect the appearance of the wiring pattern 6 at the same time.
  • the inspection device 40 Inside the inspection device 40, light emission such as a laser diode or LED (Light Emitting Diode) is provided. An element 41 and a light receiving element 42 such as a photosensor are arranged (see FIGS. 4 and 5). In the inspection apparatus 40, the light emitting element 41 emits light, and the light receiving element 42 receives the light. The state of is measured. “The state of wiring pattern 6” mainly means the appearance of wiring pattern 6. The wiring pattern 6 has a line width and position, a planar shape (top 6a line width, bottom 6b line width, lead length, Including lead line width, lead chip, lead protrusion, etc.).
  • the inspection device 40 As the inspection device 40, a type using incident light and a type using transmitted light are mainly applicable.
  • each light receiving element 42 receives the light emitted from each light emitting element 41 and reflected by the wiring pattern 6, so that the state of the wiring pattern 6 can be measured. ing.
  • two sets of movable light-emitting elements 41 and light-receiving elements 42 are arranged symmetrically above and below the flexible substrate 8. Yes.
  • the light receiving elements 42 receive the light emitted from the light emitting elements 41 and transmitted through the base film 1, so that the state of the wiring pattern 6 can be measured. Become.
  • a small camera such as a CCD (Charge Coupled Device) is provided above and below the flexible substrate 8 in place of the light emitting element 41 and the light receiving element 42, and the wiring pattern 6 is imaged by the small camera.
  • the configuration is such that the state of the wiring pattern 6 including the line width of the top 6a and the line width of the bottom 6b is measured.
  • the simulator 70 is a device that predicts the state of the wiring pattern 6 after the wet etching before actually forming the wiring pattern 6 on the base film 1.
  • the product specification showing the state of wiring pattern 6 requested by the customer If the customer's ability to obtain the product specifications as “product specification data” or the product specification is a document, it is converted to “product specification data” by the PC 10 (see step S1, first row in FIG. 8).
  • step S1 When the processing of step S1 is completed, the product is designed by the design device 20 based on the product specification data to create “product design data”, and the product design data is stored in the server 30 (step S2, FIG. (See the second row of 8).
  • step S2 When the processing of step S2 is completed, an etching correction value obtained by experience in the design apparatus 20 is set, and thereafter, the wiring pattern 6 according to the product specification is formed. Based on the etching correction value and the product design data, the design apparatus 20 designs a pseudo mask to create “mask data” (steps S3 and S4).
  • the pseudo mask is designed by setting an etching correction value in consideration of the side etching amount of the conductor 2 (see the blank portion A surrounded by the dotted line portion).
  • step S4 the mask data is converted into data that can be handled by the simulator 70 by the PC 10 (step S5).
  • simulator 70 performs the post-wet etching process based on the mask data after data conversion and the wet etching conditions such as the type of etchant, the type and thickness of conductor 2, the processing temperature, and the processing pressure.
  • the state of the wiring pattern 6 is predicted (step S6), and the prediction result is acquired as “simulation data” (step S7).
  • the process of step S6 corresponds to a simulation process (etching simulation process).
  • the line width of the wiring pattern 6 is specified only for the top 6a in the product specification, the line width of the wiring pattern 6 is predicted only for the top 6a, and the wiring pattern is determined in the product specification.
  • the line width of 6 is specified only for the bottom 6b, the line width of the wiring pattern 6 is predicted only for the bottom 6b.
  • the wiring width of wiring pattern 6 is measured for both the top 6a and bottom 6b. Predict.
  • product design data is stored on PC10.
  • Product design data that can be handled by the simulator 70 is obtained by data conversion, and transferred to the simulator 70 (steps S8 and S9).
  • step S7 and step S9 the product design data after the data conversion and the simulation data are collated by the simulator 70 to determine whether the product design data and the simulation data match each other.
  • Judge Step S10 Specifically, the product design data and simulation data transferred from the PC 10 by the simulator 70 are collated, and the product design data is compared with the product design data in terms of whether the simulation data is within a certain standard range of the product design data. Determine consistency with simulation data.
  • step S10 If the product design data and the simulation data match as a result of the processing in step S10, it is determined that the requirements of the product specification are satisfied, and the subsequent processing in step S13 and step S18 is performed. Migrate (see Figure 7).
  • step S10 Conversely, if the product design data and the simulation data do not match as a result of the processing in step S10, it is recognized that the requirements of the product specification are satisfied and the design device 20 A pseudo mask correction value is calculated based on the simulation data subjected to the processing of S10, and the pseudo mask correction value is set in the design apparatus 20 (steps Sl1, S12). After that, based on the pseudo mask correction value and the product design data, the design device 20 redesigns the pseudo mask, performs simulation again, and steps S4 to S7, S10 until the data satisfies the requirements of the product specifications. Repeat each process of ⁇ S12 many times.
  • step S13 using the PC 10, the mask data that is the basis of the simulation data that matches the product design data is stored in the server 30 as “optimal mask data” (FIG. 8). (Refer to the left side of the middle 3rd stage) [0058]
  • step S13 a glass mask 4 for mass production is manufactured based on the optimum mask data stored in the server 30, and the wiring pattern 6 is formed on the base film 1 using the glass mask 4.
  • step S15 the wiring pattern 6 is formed as described with reference to FIG.
  • the processes in steps S14 and S15 are performed by a known pattern forming apparatus (not shown).
  • step S15 After the processing in step S15 is completed, the carrier tape 9 on which the wiring pattern 6 is formed is supplied to the inspection device 40, and the state of each wiring pattern 6 is measured by the inspection device 40 (step S16).
  • the measurement result is acquired as “measurement data” (see the left side of the fourth stage in FIG. 8 in step S17).
  • the process of step S16 corresponds to a measurement process.
  • step S18 separately from the processes of step S13 to step S17, using PC10, the simulation data that matches the product design data is stored in the server 30 as "optimum simulation data”. (See step S18, right side of 3rd stage in Fig. 8).
  • step S18 the PC 10 is used to convert the optimal simulation data stored in the server 30 into data that can be handled by the inspection device 40, and the optimal simulation data after the data conversion is referred to as "determination reference data". Is stored in a library corresponding to the data storage section of the inspection device 40 (steps S19 and S20).
  • the inspection apparatus 40 stores the determination standard data corresponding to the line widths of the top 6a and the bottom 6b of the actually formed wiring pattern 6 in the library based on the measurement data. Select from among them (Step S21, see the right side of the fourth row in Fig. 8).
  • the selection criterion data may be manually selected by an operator or automatically selected by the detection device 40.
  • the determination reference data may be arbitrarily or periodically selected manually or manually by the operator or automatically by the inspection apparatus 40. For example, for each flexible substrate 8 of the carrier tape 9, it may be possible to select the same one, selectable for each track, or select for each piece. If possible, and selectable for each specific area in the piece.
  • step S21 the inspection device 40 is used to collate the measurement data with the criterion data, and determine whether the measurement data and the criterion data match each other (step S21).
  • step S22 refer to the fifth row in Fig. 8). Specifically, the measurement data and the judgment reference data are collated, and the consistency between the measurement data and the judgment reference data is judged from the viewpoint of whether or not the measurement data is within a certain standard range of the judgment reference data. To do.
  • step S22 corresponds to a verification process.
  • step S22 If the measurement data and the judgment reference data match as a result of the process of step S22, it is recognized that the actually formed wiring pattern 6 satisfies the product specification, and the wiring pattern is determined. 6 is judged as “non-defective” and the inspection is finished (step S23).
  • step S22 determines whether the measurement data does not match the judgment reference data as a result of the process in step S22. If the measurement data does not match the judgment reference data as a result of the process in step S22, it is determined that the actually formed wiring pattern 6 does not satisfy the product specification. Te, it is determined that the wiring pattern 6 as a "defective", and or a hole or subjected to defect marking inspection apparatus 40 to the flexible substrate 8, the inspection process ends (step S24, S25) 0
  • the result of predicting the state of the wiring pattern 6 after etching before the etching is not performed, in which the product design data is not used as a criterion for the quality of the wiring pattern 6 as in the conventional inspection method (optimum Since the measurement data of wiring pattern 6 and the judgment reference data are collated using (simulation data) as judgment criteria, the measurement result of wiring pattern 6 and the judgment criteria are collated within the approximate range, and pass / fail of wiring pattern 6 is confirmed. Can be determined. [0070] In particular, when the line width of the wiring pattern 6 is specified for both the top 6a and the bottom 6b in the product specification! /, The line width of the measurement data and the reference data should be verified. Since both the top 6a and bottom 6b are performed for each part, it is possible to judge the quality of the wiring pattern 6 by closely collating the measurement result of the wiring pattern 6 and its judgment criteria within a very approximate range. it can.
  • the inspection accuracy of the wiring pattern 6 can be improved, and as a result, the yield (ratio of non-defective products to all products) in mass production of the flexible substrate 8 can be prevented.
  • step S2 As one improvement 'design change item, exposure is performed between the processes of step S2 and step S3.
  • an exposure / development simulation process may be provided to predict the state of the resist pattern 5 after development (the line width and position of the resist pattern 5, the planar shape, etc.) with the simulator 70!
  • the design apparatus 20 reflects the prediction result of the exposure / development simulation process in the etching correction value so that the simulator 70 predicts the state of the wiring pattern 6 based on the prediction result.
  • the inspection apparatus 40 may be configured to reflect the prediction result of the exposure / development simulation process as it is in the criterion data.
  • the photolithography condition of the resist 3 affects the etching condition of the conductor 2.
  • the line width of the wiring pattern 6 is affected. Therefore, it is less than the minimum standard value of the line width of wiring pattern 6 in the product specification, and it is not preferable to deviate from the standard value of the product specification.
  • the resist pattern 5 is wider than the target, a portion (not shown) corresponding to the tip of the lead in the wiring pattern 6 is undesirably thickened by under-etching. For this reason, it is effective to provide the exposure / development simulation step to avoid these disadvantages.
  • step S6 the occupied area of the wiring pattern 6 occupied on the base film 1, the planar shape of the wiring pattern 6, the expansion and contraction of the base film 1, etc. It may be the basis of
  • the state of the wiring pattern 6 is predicted for each track of the carrier tape 9 in the process of step S6, and each predicted result for each track is determined for the track in the process of step S22.
  • the measurement data and the determination reference data may be collated for each track of the carrier tape 9. In this case, even if the etching conditions such as the flow of the etching solution and the pressure vary from track to track, the variation can be handled from track to track.
  • a TEG (Test Element Group) mark 80 is provided in an area other than the wiring pattern 6 of the flexible substrate 8 as shown in FIG. 10, and the TEG mark is processed in step S21. Even if it is configured to select the judgment reference data based on 80 measurement data.
  • the TEG mark 80 is composed of a plurality of linear conductors 2 having a predetermined pitch width (for example, 25 ⁇ m), and is formed through the same process as the wiring pattern 6.
  • the wiring pattern inspection system 100 and its inspection method are applied to a wiring board other than the flexible board 8, that is, a rigid board such as a metal board, a glass board, a ceramic board, and a glass epoxy board. You may apply.
  • the wiring pattern inspection method and inspection system according to the present invention are useful for determining the quality of the wiring pattern formed on the substrate, and in particular, the determination criteria for the quality of the wiring pattern and the wiring Suitable for comparing pattern measurement results.

Abstract

Inspection accuracy of a wiring pattern is improved. A wiring pattern inspecting system (100) is provided for inspecting a wiring pattern which is formed by forming a resist pattern by exposing and developing a resist in a status where a conductive body and the resist are laminated on a substrate and then by etching the conductive body by etching. The wiring pattern inspecting system is provided with a simulator (70) for estimating the status of the wiring pattern, and an inspecting apparatus (40), which measures the status of the wiring pattern and compares the measurement results with judgment criteria by having the estimated results obtained from the simulator as the conformity judgment criteria for the wiring pattern.

Description

明 細 書  Specification
配線パターンの検査方法及び配線パターンの検査システム  Wiring pattern inspection method and wiring pattern inspection system
技術分野  Technical field
[0001] 本発明は、配線パターンの外観を検査して当該配線パターンの良否を判定する配 線パターンの検査方法及び配線パターンの検査システムに関する。  The present invention relates to a wiring pattern inspection method and a wiring pattern inspection system for inspecting the appearance of a wiring pattern to determine whether the wiring pattern is good or bad.
背景技術  Background art
[0002] 従来から、ポリイミド等の電気絶縁体を素材としたベースフィルムに対し銅箔等の導 電体の配線パターンをプリントしたフレキシブル基板が量産されて 、る。フレキシブル 基板は、ベースフィルムが極めて柔軟性に優れるという特性力も折曲げ可能であり、 半導体部品の実装スペースが制限される携帯電話やデジタルカメラ等の小型電子 製品に多用されている。  Conventionally, flexible substrates in which a wiring pattern of a conductor such as a copper foil is printed on a base film made of an electrical insulator such as polyimide have been mass-produced. The flexible substrate can bend the characteristic strength that the base film is extremely flexible, and is often used in small electronic products such as mobile phones and digital cameras where the mounting space for semiconductor components is limited.
[0003] フレキシブル基板の製造工程を簡単に説明する。  [0003] A manufacturing process of a flexible substrate will be briefly described.
図 11に示す通り、始めに、ベースフィルム 1上に導電体 2を積層した基材を用意す る。この基材の導電体 2上にレジスト 3を塗布し、レジスト 3の上方に予め設計'製作さ れたガラスマスク 4を配置して露光する。その後、現像液でレジスト 3中の露光部位を 除去し、残留したレジスト 3によるレジストパターン 5を形成する。そのレジストパターン 5をエッチングマスクとしてウエットエッチングにより導電体 2の不要部位を除去すると ともに導電体 2上のレジスト 3を除去し、導電体 2による配線パターン 6を形成する。最 後に、ベースフィルム 1の左右側部に搬送用のスプロケットホール 7を形成し、フレキ シブル基板 8を製造することができる。  As shown in FIG. 11, first, a base material in which a conductor 2 is laminated on a base film 1 is prepared. A resist 3 is applied onto the conductor 2 of the base material, and a glass mask 4 designed and manufactured in advance is placed above the resist 3 and exposed. Thereafter, the exposed portion in the resist 3 is removed with a developer, and a resist pattern 5 is formed from the remaining resist 3. Using the resist pattern 5 as an etching mask, unnecessary portions of the conductor 2 are removed by wet etching, and the resist 3 on the conductor 2 is removed to form a wiring pattern 6 of the conductor 2. Finally, a flexible sprocket 8 can be manufactured by forming sprocket holes 7 for conveyance on the left and right sides of the base film 1.
[0004] 製造されたフレキシブル基板 8は、 AOI (Automated Optical Inspection)と!、う検査 装置において、配線パターン 6の外観が計測され、画像処理技術により、当該計測 データが製品仕様書から設計'作成した製品設計データと照合され、その照合結果 力 配線パターン 6の欠陥の有無が検査されるようになっている(例えば特許文献 1, 2参照)。  [0004] The manufactured flexible substrate 8 is measured by the AOI (Automated Optical Inspection) and!, Inspection equipment, and the appearance of the wiring pattern 6 is measured. The product design data is verified, and the result of the verification is checked for the presence or absence of defects in the wiring pattern 6 (see, for example, Patent Documents 1 and 2).
[0005] 特に、特許文献 1に開示された技術では、高い寸法精度や仕上がり状態を必要と する配線パターンの特徴部分についてのみ計測データと製品設計データとを照合し て、画像処理で取り扱う情報量を削減し画像処理速度の向上を図っている。他方、 特許文献 2に開示された技術では、計測データ力 算出した疑似多値ィ匕パラメータ を用いて製品設計データをデータ変換し、計測データとデータ変換後の製品設計デ 一タとを照合して、配線パターンの材料やプロセスの種類に関わらな ヽ検査を行える ようにしている。 [0005] In particular, in the technique disclosed in Patent Document 1, measurement data and product design data are collated only for a characteristic portion of a wiring pattern that requires high dimensional accuracy and a finished state. Thus, the amount of information handled in image processing is reduced to improve the image processing speed. On the other hand, in the technique disclosed in Patent Document 2, product design data is converted using the pseudo-multi-value parameter calculated by the measured data force, and the measured data is compared with the product design data after the data conversion. Therefore, it is possible to perform flaw inspection regardless of the material of the wiring pattern and the type of process.
特許文献 1:特開平 11 132723号公報 (段落番号 0033〜0049)  Patent Document 1: JP-A-11 132723 (paragraph numbers 0033 to 0049)
特許文献 2:特開平 2000— 199709号公報 (段落番号 0041〜0052参照) 発明の開示  Patent Document 2: Japanese Patent Laid-Open No. 2000-199709 (see paragraph numbers 0041-0052) Disclosure of the Invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0006] し力しながら、特許文献 1, 2に開示されたように、いくら画像処理速度を向上させた り配線パターンの材料やプロセスの種類に関わらない検査を行えたりすることができ たとしても、従来の検査方法ではその本質的なところで大きな課題を有している。以 下、従来の検査方法をその検査システムと併せて説明する。  [0006] However, as disclosed in Patent Documents 1 and 2, it is possible to improve the image processing speed and perform inspection regardless of the wiring pattern material and process type. However, the conventional inspection method has a big problem at its essential point. The conventional inspection method will be described below together with the inspection system.
[0007] 図 12に示す通り、従来の検査システム 200は主には PC (Personal Computer) 10、 設計装置 20、サーバー 30及び検査装置 40を有しており、これら各装置が社内 LAN 50を介して互いに通信可能に構成されている。社内 LAN50には社外 LAN60が接 続されており、社外の PC (図示略)等と PC10等との通信も可能となって 、る。  As shown in FIG. 12, the conventional inspection system 200 mainly includes a PC (Personal Computer) 10, a design device 20, a server 30 and an inspection device 40, and these devices are connected via an in-house LAN 50. So that they can communicate with each other. An external LAN 60 is connected to the internal LAN 50, and communication between an external PC (not shown) and the PC 10 is possible.
[0008] 当該検査システム 200を用いた検査方法では、図 13に示す通り、始めに、顧客か ら製品仕様書を製品仕様データとして入手するか、又はその製品仕様書が書類であ る場合には PC10でデータ化して製品仕様データとする (ステップ Tl)。その後、製 品仕様データに基づき設計装置 20で製品設計して製品設計データを作成し、その 製品設計データをサーバー 30に格納する (ステップ Τ2,図 15中 1段目参照)。  [0008] In the inspection method using the inspection system 200, as shown in FIG. 13, when a product specification is first obtained from a customer as product specification data, or the product specification is a document, Is converted into data on PC10 and used as product specification data (step Tl). After that, the product is designed by the design device 20 based on the product specification data, product design data is created, and the product design data is stored in the server 30 (step Τ2, refer to the first stage in FIG. 15).
[0009] その後、設計装置 20において製品設計データに基づき経験上得られている擬似 マスク補正値を設定し、その後は擬似マスク補正値と製品設計データとに基づき設 計装置 20で擬似マスクを設計してマスクデータを作成する (ステップ Τ3, Τ4)。その 後、マスクデータに基づきガラスマスク 4を製作し、そのガラスマスク 4を用いて配線パ ターン 6を試作し、当該配線パターン 6を検査装置 40で計測し第 1の計測データを取 得する(ステップ Τ6〜Τ8)。 [0010] その後、製品設計データと第 1の計測データとを照合して一致する力否かを判断す る (ステップ T9)。その結果、製品設計データと第 1の計測データとがー致しな力つた ら、設計装置 20でその第 1の計測データ力も擬似マスク補正値を算出'変更し (ステ ップ T10, T11)、製品設計データと第 1の計測データとがー致するまでステップ Τ3 〜ステップ T11の各処理を繰り返し行う。 [0009] After that, a pseudo mask correction value obtained from experience based on the product design data is set in the design device 20, and then the pseudo mask is designed in the design device 20 based on the pseudo mask correction value and the product design data. To create mask data (Step Τ3, Τ4). After that, a glass mask 4 is manufactured based on the mask data, a wiring pattern 6 is prototyped using the glass mask 4, and the wiring pattern 6 is measured by the inspection device 40 to obtain first measurement data (step). Τ6 ~ Τ8). [0010] After that, the product design data and the first measurement data are collated to determine whether or not they match (step T9). As a result, if the product design data and the first measurement data match, the design device 20 also changes the pseudo-mask correction value for the first measurement data force (Steps T10, T11) Repeat steps Τ3 to T11 until the product design data matches the first measurement data.
[0011] ステップ Τ3〜ステップ T11の各処理を繰り返した結果、製品設計データと第 1の計 測データとがー致したら、図 14に示す通り、その第 1の計測データの基礎となったマ スクデータを最適マスクデータとしてサーバー 30に格納するとともに、最適マスクデ ータに基づき量産用のガラスマスク 4を製作し、そのガラスマスク 4を用いて配線パタ ーン 6を形成し、当該配線パターン 6を検査装置 40で計測し第 2の計測データを取 得する(ステップ Τ12〜Τ16,図 15中 2段目参照)。  [0011] As a result of repeating each process from Step 致 し 3 to Step T11, if the product design data and the first measurement data match, as shown in FIG. 14, the matrix that is the basis of the first measurement data. The mask data is stored in the server 30 as optimum mask data, and a glass mask 4 for mass production is manufactured based on the optimum mask data. A wiring pattern 6 is formed using the glass mask 4, and the wiring pattern 6 Is measured by the inspection device 40 and the second measurement data is obtained (see steps Τ12 to Τ16, second stage in Fig. 15).
[0012] なお、当該配線パターン 6は、ステップ T14の処理でウエットエッチングにより形成さ れるため、平面形状やパターン密度等の周囲の状況,エッチング条件のバラツキ,ェ ツチング液の流れ方の不均一性を含むエッチング状況等の影響で、図 16四角枠に 示す通り、屈曲部分等の特定部位にぉ 、て湾曲した状態で (丸みを帯びた状態で) エッチングされ、ステップ T16の処理で取得する第 2の計測データ上ではそのように 表現されている。  [0012] Since the wiring pattern 6 is formed by wet etching in the process of step T14, the surrounding conditions such as the planar shape and pattern density, variation in etching conditions, and non-uniformity in the flow of the etching solution As shown in the square frame in FIG. 16, the etching is performed in a curved state (in a rounded state) at a specific portion such as a bent portion as shown in the square frame of FIG. This is expressed in the measurement data of 2.
[0013] その後、 PC10でサーバー 30から製品設計データをダウンロードして検査装置 40 で扱えるデータにデータ変換し、検査装置 40に転送する。その後、検査装置 40で製 品設計データと第 2の計測データとを照合して一致する力否かを判断する (ステップ T17,図 15中 3段目参照)。当該処理は、製品設計データを配線パターン 6の良否 の判定基準として第 2の計測データとの一致性を判断するもので、特に配線パターン 6の線幅や位置、平面形状(トップの線幅,ボトムの線幅,リードの長さ,リードの線幅 ,リードの欠け,リードの突起を含む。)等を代表的な判定基準項目として判断するよ うになつている。  [0013] Thereafter, the product design data is downloaded from the server 30 by the PC 10, converted into data that can be handled by the inspection apparatus 40, and transferred to the inspection apparatus 40. Thereafter, the inspection device 40 compares the product design data with the second measurement data to determine whether or not they match (step T17, see the third stage in FIG. 15). In this process, the product design data is used as a criterion for determining the quality of the wiring pattern 6, and the consistency with the second measurement data is determined. In particular, the line width and position of the wiring pattern 6, the planar shape (top The bottom line width, lead length, lead line width, lead chip, lead protrusion, etc.) are included as representative criteria criteria.
[0014] ステップ T17の処理の結果、製品設計データと第 2の計測データとがー致したら、 その検査に供した配線パターン 6を良品と判定して検査を終了する (ステップ T18)。 逆に、製品設計データと第 2の計測データとがー致しないと判断したら、その検査に 供した配線パターン 6を不良品と判定し、当該フレキシブル基板 8に対し検査装置 40 で不良マーキングを施したり孔をあけたりして検査を終了する(ステップ T19, T20)。 If the product design data and the second measurement data coincide with each other as a result of the process in step T17, the wiring pattern 6 subjected to the inspection is determined to be a non-defective product and the inspection is terminated (step T18). Conversely, if it is determined that the product design data and the second measurement data do not match, The provided wiring pattern 6 is determined to be defective, and the inspection is completed by marking the flexible substrate 8 with a defective marking or making a hole with the inspection device 40 (steps T19 and T20).
[0015] 以上の従来の検査方法では、配線パターン 6の良否の判定基準として、配線パタ ーン 6の屈曲部分等の特定部位が矩形状を呈した状態で表現されて 、る製品設計 データ(図 16中点線部参照)を使用するため、ステップ T17の処理では、図 16四角 枠で示す通り、配線パターン 6の屈曲部分等の特定部位同士で製品設計データと第 2の計測データとがー致しないと判断され、その検査に供した配線パターン 6は不良 品と判定されてしまうと 、う不都合が生じて 、る。  [0015] In the above conventional inspection method, product design data (in which a specific part such as a bent portion of the wiring pattern 6 is expressed in a rectangular shape is used as a criterion for determining whether the wiring pattern 6 is good or bad. As shown in the square frame in Fig. 16, the product design data and the second measurement data are transferred between specific parts such as the bent part of the wiring pattern 6 in the process of Step T17. If the wiring pattern 6 used for the inspection is judged as a defective product, it will be inconvenient.
[0016] このように、従来の検査方法では、ウエットエッチングの状態が考慮されて 、な 、製 品設計データを判定基準として配線パターン 6の良否を判定しており、本来的には 良品と判定されるべき配線パターン 6が事実とは異なり不良品と判定されている。す なわち、製品設計データそのものがもともと判定基準にふさわしくなぐ配線パターン 6の検査精度を低下させる要因となって 、る。  As described above, in the conventional inspection method, the wet etching state is taken into consideration, and the quality of the wiring pattern 6 is determined based on the product design data as a criterion. Unlike the fact, the wiring pattern 6 to be made is judged as a defective product. In other words, the product design data itself is a factor that lowers the inspection accuracy of the wiring pattern 6 that originally meets the criteria.
本発明の目的は配線パターンの検査精度を向上させることである。  An object of the present invention is to improve the inspection accuracy of a wiring pattern.
課題を解決するための手段  Means for solving the problem
[0017] 上記課題を解決するため、 [0017] In order to solve the above problems,
第 1の発明は、  The first invention is
基板上に導電体とレジストとを積層した状態で、前記レジストを露光 ·現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査方法であって、  A method for inspecting a wiring pattern formed by exposing and developing the resist to form a resist pattern in a state in which a conductor and a resist are laminated on a substrate, and then etching the conductor.
前記配線パターンの状態を予測するシミュレーション工程と、  A simulation step of predicting the state of the wiring pattern;
前記配線パターンの状態を計測する計測工程と、  A measuring step for measuring the state of the wiring pattern;
前記シミュレーション工程の予測結果を前記配線パターンの良否の判定基準として 、前記判定基準と前記計測工程の計測結果とを照合する照合工程と、  A collation step for collating the determination criterion and the measurement result of the measurement step, using the prediction result of the simulation step as a determination criterion for the quality of the wiring pattern,
を備えることを特徴として 、る。  It is characterized by comprising.
[0018] 第 2の発明は、 [0018] The second invention is:
基板上に導電体とレジストとを積層した状態で、前記レジストを露光 ·現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査方法であって、 With the conductor and resist laminated on the substrate, the resist is exposed and developed to form a resist pattern, and then the conductor is etched to form a wiring pattern. The inspection method of
露光 ·現像前に露光 ·現像後の前記レジストパターンの状態を予測する露光 ·現像 シミュレーション工程と、  Exposure · exposure before development · exposure to predict the state of the resist pattern after development · development simulation process;
前記露光'現像シミュレーション工程の予測結果に基づき、エッチング前にエツチン グ後の前記配線パターンの状態を予測するエッチングシミュレーション工程と、 前記配線パターンの状態を計測する計測工程と、  An etching simulation step for predicting a state of the wiring pattern after etching before etching based on a prediction result of the exposure and development simulation step; a measurement step for measuring the state of the wiring pattern;
前記エッチングシミュレーション工程の予測結果を前記配線パターンの良否の判定 基準として、前記判定基準と前記計測工程の計測結果とを照合する照合工程と、 を備えることを特徴として 、る。  And a collation step of collating the determination criterion with the measurement result of the measurement step, using the prediction result of the etching simulation step as a criterion for determining the quality of the wiring pattern.
[0019] 第 3の発明は、  [0019] The third invention provides
基板上に導電体とレジストとを積層した状態で、前記レジストを露光 ·現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査方法であって、  A method for inspecting a wiring pattern formed by exposing and developing the resist to form a resist pattern in a state in which a conductor and a resist are laminated on a substrate, and then etching the conductor.
前記配線パターンの状態をトップとボトムとの両部について予測するシミュレーショ ン工程と、  A simulation process for predicting the state of the wiring pattern for both the top and the bottom;
前記配線パターンの状態をトップとボトムとの両部について計測する計測工程と、 前記シミュレーション工程の予測結果を前記配線パターンの良否の判定基準として 、前記判定基準と前記計測工程の計測結果とを前記配線パターンのトップとボトムと の両部につ 、て各部ごとに照合する照合工程と、  A measurement step for measuring the state of the wiring pattern for both the top and bottom, and using the prediction result of the simulation step as a determination criterion for the quality of the wiring pattern, the determination criterion and the measurement result of the measurement step A matching process for matching each part of the top and bottom of the wiring pattern;
を備えることを特徴として 、る。  It is characterized by comprising.
[0020] 第 4の発明は、 [0020] The fourth invention is:
基板上に導電体とレジストとを積層した状態で、前記レジストを露光 ·現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査方法であって、  A method for inspecting a wiring pattern formed by exposing and developing the resist to form a resist pattern in a state in which a conductor and a resist are laminated on a substrate, and then etching the conductor.
露光 ·現像前に露光 ·現像後の前記レジストパターンの状態を予測する露光 ·現像 シミュレーション工程と、  Exposure · exposure before development · exposure to predict the state of the resist pattern after development · development simulation process;
前記露光'現像シミュレーション工程の予測結果に基づき、エッチング前にエツチン グ後の前記配線パターンの状態をトップとボトムとの両部について予測するエツチン グシミュレーション工程と、 Etching predicts the state of the wiring pattern after etching before etching for both top and bottom based on the prediction result of the exposure and development simulation process Simulation process,
前記配線パターンの状態をトップとボトムとの両部について計測する計測工程と、 前記エッチングシミュレーション工程の予測結果を前記配線パターンの良否の判定 基準として、前記判定基準と前記計測工程の計測結果とを前記配線パターンのトツ プとボトムとの両部について各部ごとに照合する照合工程と、  A measurement process for measuring the state of the wiring pattern for both the top and the bottom, and using the prediction result of the etching simulation process as a determination criterion for the quality of the wiring pattern, the determination criterion and the measurement result of the measurement process A collation process for collating each part of the top and bottom of the wiring pattern;
を備えることを特徴として 、る。  It is characterized by comprising.
[0021] 第 5の発明は、  [0021] The fifth invention provides
基板上に導電体とレジストとを積層した状態で、前記レジストを露光 ·現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査システムであって、  A wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor.
前記配線パターンの状態を予測するシミュレータと、  A simulator for predicting the state of the wiring pattern;
前記配線パターンの状態を計測し、前記シミュレータの予測結果を前記配線バタ ーンの良否の判定基準として、前記判定基準と計測結果とを照合する検査装置と、 を備えることを特徴として 、る。  An inspection device that measures the state of the wiring pattern and uses the prediction result of the simulator as a determination criterion for the quality of the wiring pattern, and compares the determination criterion with the measurement result.
[0022] 第 6の発明は、 [0022] The sixth invention provides:
基板上に導電体とレジストとを積層した状態で、前記レジストを露光 ·現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査システムであって、  A wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor.
露光 ·現像前に露光 ·現像後の前記レジストパターンの状態を予測し、その予測結 果に基づき、エッチング前にエッチング後の前記配線パターンの状態を予測するシミ ユレータと、  A simulator that predicts the state of the resist pattern after exposure and development before exposure and development, and predicts the state of the wiring pattern after etching before etching based on the prediction result;
前記配線パターンの状態を計測し、前記シミュレータの予測結果を前記配線バタ ーンの良否の判定基準として、前記判定基準と計測結果とを照合する検査装置と、 を備えることを特徴として 、る。  An inspection device that measures the state of the wiring pattern and uses the prediction result of the simulator as a determination criterion for the quality of the wiring pattern, and compares the determination criterion with the measurement result.
[0023] 第 7の発明は、 [0023] The seventh invention provides
基板上に導電体とレジストとを積層した状態で、前記レジストを露光 ·現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査システムであって、 前記配線パターンの状態をトップとボトムとの両部について予測するシミュレータと 前記配線パターンの状態をトップとボトムとの両部にっ 、て計測し、前記シミュレ一 タの予測結果を前記配線パターンの良否の判定基準として、前記判定基準と計測結 果とを前記配線パターンのトップとボトムとの両部について各部ごとに照合する検査 装置と、 A wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor. The simulator that predicts the state of the wiring pattern for both the top and the bottom, the state of the wiring pattern is measured for both the top and the bottom, and the prediction result of the simulator is measured for the wiring pattern. As an acceptance criterion, an inspection device that collates the determination criterion and the measurement result for each of the top and bottom portions of the wiring pattern;
を備えることを特徴として 、る。  It is characterized by comprising.
[0024] 第 8の発明は、  [0024] The eighth invention provides
基板上に導電体とレジストとを積層した状態で、前記レジストを露光 ·現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査システムであって、  A wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor.
露光 ·現像前に露光 ·現像後の前記レジストパターンの状態を予測し、その予測結 果に基づき、エッチング前にエッチング後の前記配線パターンの状態をトップとボトム との両部について予測するシミュレータと、  A simulator that predicts the state of the resist pattern after exposure and development before exposure and development, and predicts the state of the wiring pattern after etching for both top and bottom before etching based on the prediction result; ,
前記配線パターンの状態をトップとボトムとの両部にっ 、て計測し、前記シミュレ一 タの予測結果を前記配線パターンの良否の判定基準として、前記判定基準と計測結 果とを前記配線パターンのトップとボトムとの両部について各部ごとに照合する検査 装置と、  The state of the wiring pattern is measured at both the top and the bottom, and the prediction result of the simulator is used as a determination criterion for the quality of the wiring pattern, and the determination criterion and the measurement result are used as the wiring pattern. An inspection device that checks each part of both the top and bottom of
を備えることを特徴として 、る。  It is characterized by comprising.
発明の効果  The invention's effect
[0025] 第 1,第 5の発明では、製品設計データではなくエッチング後の配線パターンの状 態の予測結果を判定基準とするため、配線パターンの計測結果とその判定基準とを 近似した範囲内で照合して配線パターンの良否を判定することになり、配線パターン の検査精度を向上させることができる。  [0025] In the first and fifth inventions, since the prediction result of the state of the wiring pattern after etching is used as a determination criterion, not the product design data, the measurement result of the wiring pattern and the determination criterion are within the approximate range. Therefore, it is possible to improve the inspection accuracy of the wiring pattern by checking the quality of the wiring pattern.
[0026] 第 2,第 6の発明では、露光'現像後のレジストパターンの状態の予測結果も判定 基準の基礎として考慮するから、配線パターンの計測結果とその判定基準とを極め て近似した範囲内で厳密に照合して配線パターンの良否を判定することになり、配 線パターンの検査精度を確実に向上させることができる。 [0027] 第 3,第 7の発明では、配線パターンのトップとボトムとの両部も判定基準の基礎とし て考慮するから、配線パターンの計測結果とその判定基準とを極めて近似した範囲 内で厳密に照合して配線パターンの良否を判定することになり、配線パターンの検 查精度を確実に向上させることができる。 [0026] In the second and sixth inventions, the predicted result of the resist pattern state after exposure and development is also considered as a basis for the judgment criteria, and therefore the range in which the measurement result of the wiring pattern and the judgment criteria are extremely approximated. Therefore, it is possible to reliably improve the inspection accuracy of the wiring pattern by strictly checking the wiring pattern. [0027] In the third and seventh inventions, both the top and bottom portions of the wiring pattern are considered as the basis of the judgment standard, so that the measurement result of the wiring pattern and the judgment standard are within a very approximate range. Strict collation is performed to determine the quality of the wiring pattern, and the accuracy of wiring pattern detection can be improved reliably.
[0028] 第 4,第 8の発明では、露光 ·現像後のレジストパターンの状態の予測結果に加えて 配線パターンのトップとボトムとの両部も判定基準の基礎として考慮するから、配線パ ターンの計測結果とその判定基準とを極めて近似した範囲内で厳密に照合して配線 ノターンの良否を判定することになり、配線パターンの検査精度を確実に向上させる ことができる。  [0028] In the fourth and eighth inventions, in addition to the prediction result of the resist pattern state after exposure and development, both the top and bottom portions of the wiring pattern are considered as the basis of the judgment criteria. As a result, the wiring pattern inspection accuracy can be reliably improved by closely collating the measurement results and the determination criteria within a very approximate range, and the wiring pattern inspection accuracy can be reliably improved.
図面の簡単な説明  Brief Description of Drawings
[0029] [図 1]配線パターンの検査システムの概略構成を示す図面である。 FIG. 1 is a drawing showing a schematic configuration of a wiring pattern inspection system.
[図 2]キャリアテープの概略構成を示す平面図である。  FIG. 2 is a plan view showing a schematic configuration of a carrier tape.
[図 3]フレキシブル基板の概略構成を示す平面図である。  FIG. 3 is a plan view showing a schematic configuration of a flexible substrate.
[図 4]検査装置の内部構成の一例を説明するための図面である。  FIG. 4 is a drawing for explaining an example of the internal configuration of the inspection apparatus.
[図 5]検査装置の内部構成の他例を説明するための図面である。  FIG. 5 is a drawing for explaining another example of the internal configuration of the inspection apparatus.
[図 6]配線パターンの検査方法を経時的に示すフローチャートである。  FIG. 6 is a flowchart showing a wiring pattern inspection method over time.
[図 7]図 6の後続の工程を示すフローチャートである。  FIG. 7 is a flowchart showing a step subsequent to FIG.
[図 8]図 6,図 7の処理を模式的に説明する図面である。  FIG. 8 is a drawing schematically explaining the processing of FIGS. 6 and 7.
[図 9]ガラスマスクの設計原理を説明するための図面である。  FIG. 9 is a drawing for explaining the design principle of a glass mask.
[図 10]フレキシブル基板の変形例を示す図面である。  FIG. 10 is a view showing a modified example of the flexible substrate.
[図 11]フレキシブル基板の製造方法を説明した図面である。  FIG. 11 is a drawing for explaining a method of manufacturing a flexible substrate.
[図 12]従来の検査システムの概略構成を示す図面である。  FIG. 12 is a drawing showing a schematic configuration of a conventional inspection system.
[図 13]従来の検査方法を経時的に示すフローチャートである。  FIG. 13 is a flowchart showing a conventional inspection method over time.
[図 14]図 13の後続の工程を示すフローチャートである。  FIG. 14 is a flowchart showing a step subsequent to that in FIG.
[図 15]図 13,図 14の処理を模式的に説明する図面である。  FIG. 15 is a drawing schematically explaining the processes of FIGS. 13 and 14.
[図 16]従来の課題を説明するための図面である。  FIG. 16 is a drawing for explaining a conventional problem.
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0030] 以下、図面を参照しながら本発明を実施するための最良の形態について説明する 。ただし、発明の範囲は図示例に限定されない。 Hereinafter, the best mode for carrying out the present invention will be described with reference to the drawings. . However, the scope of the invention is not limited to the illustrated examples.
[0031] 図 1に示す通り、本発明に係る配線パターンの検査システム 100は、従来の検査シ ステム 200に対し複数台の検査装置 40とシミュレータ 70とを付加した構成を有して おり、上記の各装置を用いて図 2のキャリアテープ 9中の各配線パターン 6の良否を 検査するようになっている。  As shown in FIG. 1, a wiring pattern inspection system 100 according to the present invention has a configuration in which a plurality of inspection devices 40 and a simulator 70 are added to a conventional inspection system 200. These devices are used to check the quality of each wiring pattern 6 in the carrier tape 9 of FIG.
[0032] 図 2に示す通り、キャリアテープ 9は、幅広でかつ長尺なリール状を呈した基板とし てのベースフィルム 1に対し多数の配線パターン 6が形成された構成を有して 、る。 キャリアテープ 9中では配線パターン 6ごとに 1枚のフレキシブル基板 8が構成される ようになっており、 1枚のフレキシブル基板 8がキャリアテープ 9の 1ピースとなっている 。フレキシブル基板 8は図 3に示す態様を有する配線基板であり、矩形状のベースフ イルム 1上に 1つの配線パターン 6が形成された構成を有している。  As shown in FIG. 2, the carrier tape 9 has a configuration in which a large number of wiring patterns 6 are formed on a base film 1 as a substrate having a wide and long reel shape. . In the carrier tape 9, one flexible substrate 8 is configured for each wiring pattern 6, and one flexible substrate 8 is one piece of the carrier tape 9. The flexible substrate 8 is a wiring substrate having the form shown in FIG. 3, and has a configuration in which one wiring pattern 6 is formed on a rectangular base film 1.
[0033] 図 2に示す通り、多数のフレキシブル基板 8はキャリアテープ 9中では 3トラックにわ たって配置されており、各フレキシブル基板 8がトラックごとにベースフィルム 3の長さ 方向に沿って配置されている。キャリアテープ 9にはトラックごとにスプロケットホール 7 が形成されている。スプロケットホール 7は、配線パターン 6を形成する場合やその検 查を行う場合等において、ベースフィルム 1を搬送するのに利用される。  [0033] As shown in FIG. 2, a large number of flexible substrates 8 are arranged over three tracks in the carrier tape 9, and each flexible substrate 8 is arranged along the length direction of the base film 3 for each track. ing. The carrier tape 9 has sprocket holes 7 for each track. The sprocket hole 7 is used for transporting the base film 1 when the wiring pattern 6 is formed or the inspection is performed.
[0034] PC10は、配線パターンの検査システム 100の全体又は各部の動作を制御したり、 設計装置 20やシミュレータ 70等で作成したデータのファイル形式を変換してそのデ ータを他の装置でも扱えるような処理を実行したりする装置である。  [0034] The PC 10 controls the operation of the whole or part of the wiring pattern inspection system 100, converts the file format of data created by the design device 20, the simulator 70, etc., and transfers the data to other devices. It is a device that executes processing that can be handled.
[0035] 設計装置 20は、ガラスマスク 4の擬似マスクや配線パターン 6の完成品である製品 等を設計する CAD (Computer Aided design)装置である。  The design device 20 is a CAD (Computer Aided design) device that designs products such as a pseudo mask of the glass mask 4 and a finished product of the wiring pattern 6.
[0036] サーバー 30は、設計装置 20やシミュレータ 70等で作成したデータを蓄積してその データを他の装置に提供する装置である。  [0036] The server 30 is a device that accumulates data created by the design device 20, the simulator 70, and the like and provides the data to other devices.
[0037] 検査装置 40は、キャリアテープ 9中の各配線パターン 6の外観を自動で検査して当 該配線パターン 6の良否を判定する AOI装置である。配線パターンの検査システム 1 00では、複数台の検査装置 40が LAN50に接続されており、複数台の検査装置 40 で同時に配線パターン 6の外観を検査することができるようになつている。  The inspection device 40 is an AOI device that automatically inspects the appearance of each wiring pattern 6 in the carrier tape 9 and determines whether the wiring pattern 6 is acceptable. In the wiring pattern inspection system 100, a plurality of inspection devices 40 are connected to the LAN 50, and the plurality of inspection devices 40 can inspect the appearance of the wiring pattern 6 at the same time.
[0038] 検査装置 40の内部にはレーザダイオードや LED (Light Emitting Diode)等の発光 素子 41とフォトセンサ等の受光素子 42とが配されており(図 4,図 5参照)、検査装置 40は発光素子 41が光を発して受光素子 42がその光を受光し、配線パターン 6の状 態を計測するようになっている。「配線パターン 6の状態」とは、主には配線パターン 6 の外観をいい、配線パターン 6の線幅や位置、平面形状(トップ 6aの線幅,ボトム 6b の線幅,リードの長さ,リードの線幅,リードの欠け,リードの突起を含む。)等を含む。 [0038] Inside the inspection device 40, light emission such as a laser diode or LED (Light Emitting Diode) is provided. An element 41 and a light receiving element 42 such as a photosensor are arranged (see FIGS. 4 and 5). In the inspection apparatus 40, the light emitting element 41 emits light, and the light receiving element 42 receives the light. The state of is measured. “The state of wiring pattern 6” mainly means the appearance of wiring pattern 6. The wiring pattern 6 has a line width and position, a planar shape (top 6a line width, bottom 6b line width, lead length, Including lead line width, lead chip, lead protrusion, etc.).
[0039] 検査装置 40としては、落射光を利用する形式のものと透過光を利用する形式のも のとが主に適用可能である。  [0039] As the inspection device 40, a type using incident light and a type using transmitted light are mainly applicable.
[0040] 落射光を発する形式の検査装置 40では、図 4に示す通り、可動式の発光素子 41, 受光素子 42がフレキシブル基板 8の上方と下方とに配置されている。当該検査装置 40では、各発光素子 41から発された光であって配線パターン 6で反射したものを各 受光素子 42が受光することにより、配線パターン 6の状態を計測することができるよう になっている。  In the inspection apparatus 40 that emits incident light, movable light-emitting elements 41 and light-receiving elements 42 are disposed above and below the flexible substrate 8 as shown in FIG. In the inspection device 40, each light receiving element 42 receives the light emitted from each light emitting element 41 and reflected by the wiring pattern 6, so that the state of the wiring pattern 6 can be measured. ing.
[0041] 他方、透過光を発する形式の検査装置 40では、図 5に示す通り、 2組の可動式の 発光素子 41 ,受光素子 42がフレキシブル基板 8の上方と下方とに対称に配置され ている。当該検査装置 40では、各発光素子 41から発された光であってベースフィル ム 1を透過したものを各受光素子 42が受光することにより、配線パターン 6の状態を 計測することができるようになって 、る。  On the other hand, in the inspection apparatus 40 that emits transmitted light, as shown in FIG. 5, two sets of movable light-emitting elements 41 and light-receiving elements 42 are arranged symmetrically above and below the flexible substrate 8. Yes. In the inspection device 40, the light receiving elements 42 receive the light emitted from the light emitting elements 41 and transmitted through the base film 1, so that the state of the wiring pattern 6 can be measured. Become.
[0042] 特に、検査装置 40では、上記の通り、発光素子 41,受光素子 42がフレキシブル基 板 8の上方と下方とに配置されているから、トップ 6aとボトム 6bとの両部の線幅を計測 することができるようになって!/、る。  [0042] In particular, in the inspection apparatus 40, as described above, since the light emitting element 41 and the light receiving element 42 are disposed above and below the flexible substrate 8, the line widths of both the top 6a and the bottom 6b. Now you can measure!
[0043] なお、発光素子 41,受光素子 42に代えて CCD (Charge Coupled Device)等の小 型カメラをフレキシブル基板 8の上方と下方とに設け、その小型カメラで配線パターン 6を撮像することにより、トップ 6aの線幅とボトム 6bの線幅とを含む配線パターン 6の 状態を計測するような構成としてもょ 、。  [0043] A small camera such as a CCD (Charge Coupled Device) is provided above and below the flexible substrate 8 in place of the light emitting element 41 and the light receiving element 42, and the wiring pattern 6 is imaged by the small camera. The configuration is such that the state of the wiring pattern 6 including the line width of the top 6a and the line width of the bottom 6b is measured.
[0044] シミュレータ 70は、実際にベースフィルム 1上に配線パターン 6を形成する前に、ゥ エツトエッチング後の配線パターン 6の状態を予測する装置である。  The simulator 70 is a device that predicts the state of the wiring pattern 6 after the wet etching before actually forming the wiring pattern 6 on the base film 1.
[0045] 続、て、本発明に係る配線パターンの検査方法にっ 、て説明する。  Next, the wiring pattern inspection method according to the present invention will be described.
[0046] 図 6に示す通り、顧客が要求している配線パターン 6の状態が示された製品仕様書 を「製品仕様データ」としてその顧客力 入手する力 又はその製品仕様書が文書で ある場合には PC10でデータ化して「製品仕様データ」とする (ステップ S1,図 8中 1 段目参照)。 [0046] As shown in FIG. 6, the product specification showing the state of wiring pattern 6 requested by the customer If the customer's ability to obtain the product specifications as “product specification data” or the product specification is a document, it is converted to “product specification data” by the PC 10 (see step S1, first row in FIG. 8).
[0047] ステップ S1の処理を終えたら、製品仕様データに基づき設計装置 20で製品設計し て「製品設計データ」を作成し、その製品設計データをサーバー 30に格納する (ステ ップ S2,図 8中 2段目参照)。  [0047] When the processing of step S1 is completed, the product is designed by the design device 20 based on the product specification data to create “product design data”, and the product design data is stored in the server 30 (step S2, FIG. (See the second row of 8).
[0048] ステップ S2の処理を終えたら、設計装置 20にお 、て経験上得られて 、るエツチン グ補正値を設定し、その後は製品仕様書通りの配線パターン 6が形成されるように、 エッチング補正値と製品設計データとに基づき設計装置 20で擬似マスクを設計して 「マスクデータ」を作成する(ステップ S3, S4)。  [0048] When the processing of step S2 is completed, an etching correction value obtained by experience in the design apparatus 20 is set, and thereafter, the wiring pattern 6 according to the product specification is formed. Based on the etching correction value and the product design data, the design apparatus 20 designs a pseudo mask to create “mask data” (steps S3 and S4).
[0049] なお、図 9に示す通り、配線パターン 6を形成する際には、ウエットエッチングにより 導電体 2がサイドエッチングされ製品仕様書に示す幅より幅狭となるから、当該ステツ プ S4の処理では、導電体 2のサイドエッチング量 (点線部で囲んだ空白部 A参照)を 考慮したエッチング補正値を設定して擬似マスクを設計している。  Note that, as shown in FIG. 9, when the wiring pattern 6 is formed, the conductor 2 is side-etched by wet etching and becomes narrower than the width shown in the product specification. Then, the pseudo mask is designed by setting an etching correction value in consideration of the side etching amount of the conductor 2 (see the blank portion A surrounded by the dotted line portion).
[0050] ステップ S4の処理を終えたら、マスクデータを PC10でデータ変換してシミュレータ 70で扱えるデータにする(ステップ S5)。ステップ S5の処理を終えたら、データ変換 後のマスクデータとエッチング液の種類,導電体 2の種類や厚み,処理温度,処理圧 力等のウエットエッチング条件とに基づき、シミュレータ 70でウエットエッチング後の配 線パターン 6の状態を予測し (ステップ S6)、その予測結果を「シミュレーションデータ 」として取得する(ステップ S 7)。このステップ S6の工程がシミュレーション工程(エツ チングシミュレーション工程)に相当する。  [0050] When the processing of step S4 is completed, the mask data is converted into data that can be handled by the simulator 70 by the PC 10 (step S5). When the processing of step S5 is completed, simulator 70 performs the post-wet etching process based on the mask data after data conversion and the wet etching conditions such as the type of etchant, the type and thickness of conductor 2, the processing temperature, and the processing pressure. The state of the wiring pattern 6 is predicted (step S6), and the prediction result is acquired as “simulation data” (step S7). The process of step S6 corresponds to a simulation process (etching simulation process).
[0051] なお、製品仕様書で配線パターン 6の線幅をトップ 6aについてのみ規定していると きには、トップ 6aについてのみ配線パターン 6の線幅を予測し、製品仕様書で配線パ ターン 6の線幅をボトム 6bについてのみ規定しているときには、ボトム 6bについての み配線パターン 6の線幅を予測する。他方、製品仕様書で配線パターン 6の線幅をト ップ 6aとボトム 6bとの両部について規定しているときには、トップ 6aとボトム 6bとの両 部につ 、て配線パターン 6の線幅を予測する。  [0051] When the line width of the wiring pattern 6 is specified only for the top 6a in the product specification, the line width of the wiring pattern 6 is predicted only for the top 6a, and the wiring pattern is determined in the product specification. When the line width of 6 is specified only for the bottom 6b, the line width of the wiring pattern 6 is predicted only for the bottom 6b. On the other hand, when the line width of wiring pattern 6 is specified for both the top 6a and bottom 6b in the product specification, the wiring width of wiring pattern 6 is measured for both the top 6a and bottom 6b. Predict.
[0052] また、上記ステップ S3〜ステップ S7の処理とは別に、製品設計データを PC10で データ変換してシミュレータ 70で扱える製品設計データを取得し、シミュレータ 70に 転送する(ステップ S 8, S9)。 [0052] In addition to the processing in steps S3 to S7, product design data is stored on PC10. Product design data that can be handled by the simulator 70 is obtained by data conversion, and transferred to the simulator 70 (steps S8 and S9).
[0053] ステップ S7とステップ S9との各処理を終えたら、シミュレータ 70でデータ変換後の 製品設計データとシミュレーションデータとを照合し、製品設計データとシミュレーショ ンデータとがー致する力否かを判断する (ステップ S10)。詳しくは、シミュレータ 70で PC 10から転送された製品設計データとシミュレーションデータとを照合し、シミュレ一 シヨンデータが製品設計データの一定の規格範囲に収まっているか否かという観点 で、製品設計データとシミュレーションデータとの一致性を判断する。  [0053] When the processes in step S7 and step S9 are completed, the product design data after the data conversion and the simulation data are collated by the simulator 70 to determine whether the product design data and the simulation data match each other. Judge (Step S10). Specifically, the product design data and simulation data transferred from the PC 10 by the simulator 70 are collated, and the product design data is compared with the product design data in terms of whether the simulation data is within a certain standard range of the product design data. Determine consistency with simulation data.
[0054] この場合に、製品仕様書で配線パターン 6の線幅をトップ 6aについてのみ規定して いるときには、製品設計データとシミュレーションデータとの線幅の照合をトップ 6aに つ ヽて行 、、製品仕様書で配線パターン 6の線幅をボトム 6bにつ 、てのみ規定して いるときには、製品設計データとシミュレーションデータとの線幅の照合をボトム 6bに ついて行う。他方、製品仕様書で配線パターン 6の線幅をトップ 6aとボトム 6bとの両 部について規定しているときには、製品設計データとシミュレーションデータとの線幅 の照合をトップ 6aとボトム 6bとの両部について各部ごとに行う。  [0054] In this case, when the line width of the wiring pattern 6 is specified only for the top 6a in the product specification, the line width of the product design data and the simulation data is checked against the top 6a, When the line width of wiring pattern 6 is specified only for bottom 6b in the product specification, the line width of product design data and simulation data is checked for bottom 6b. On the other hand, when the line width of the wiring pattern 6 is specified for both the top 6a and the bottom 6b in the product specification, the line width comparison between the product design data and the simulation data is performed for both the top 6a and the bottom 6b. This is done for each part.
[0055] ステップ S 10の処理の結果、製品設計データとシミュレーションデータとがー致した 場合は、製品仕様書の要求を満足したと認定して、後続のステップ S 13,ステップ S1 8の処理に移行する(図 7参照)。  [0055] If the product design data and the simulation data match as a result of the processing in step S10, it is determined that the requirements of the product specification are satisfied, and the subsequent processing in step S13 and step S18 is performed. Migrate (see Figure 7).
[0056] 逆に、ステップ S 10の処理の結果、製品設計データとシミュレーションデータとが不 一致であった場合は、製品仕様書の要求を満足しな力 たと認定して、設計装置 20 でステップ S10の処理に供したシミュレーションデータに基づき擬似マスク補正値を 算出し、設計装置 20においてその擬似マスク補正値を設定する (ステップ Sl l, S12 )。その後は、擬似マスク補正値と製品設計データとに基づき設計装置 20で再度擬 似マスクを設計し直し、再びシミュレーションを行 、そのデータが製品仕様書の要求 を満足するまでステップ S4〜S7, S10〜S 12の各処理を何度も繰り返し行う。  [0056] Conversely, if the product design data and the simulation data do not match as a result of the processing in step S10, it is recognized that the requirements of the product specification are satisfied and the design device 20 A pseudo mask correction value is calculated based on the simulation data subjected to the processing of S10, and the pseudo mask correction value is set in the design apparatus 20 (steps Sl1, S12). After that, based on the pseudo mask correction value and the product design data, the design device 20 redesigns the pseudo mask, performs simulation again, and steps S4 to S7, S10 until the data satisfies the requirements of the product specifications. Repeat each process of ~ S12 many times.
[0057] 図 7に示す通り、ステップ S13の処理では、 PC10を用いて、製品設計データと一致 したシミュレーションデータの基礎となったマスクデータを「最適マスクデータ」として サーバー 30に格納する(図 8中 3段目左側参照)。 [0058] ステップ S13の処理を終えたら、サーバー 30に格納済みの最適マスクデータに基 づき量産用のガラスマスク 4を製作し、そのガラスマスク 4を用 、てベースフィルム 1上 に配線パターン 6を形成する(ステップ S 14, S15)。ステップ S15の処理では、図 11 を用いて説明した通りに配線パターン 6を形成する。これらステップ S14, S15の工程 の処理は公知のパターン形成装置(図示略)で行われる。 [0057] As shown in FIG. 7, in the process of step S13, using the PC 10, the mask data that is the basis of the simulation data that matches the product design data is stored in the server 30 as “optimal mask data” (FIG. 8). (Refer to the left side of the middle 3rd stage) [0058] When the processing of step S13 is completed, a glass mask 4 for mass production is manufactured based on the optimum mask data stored in the server 30, and the wiring pattern 6 is formed on the base film 1 using the glass mask 4. Form (steps S14 and S15). In step S15, the wiring pattern 6 is formed as described with reference to FIG. The processes in steps S14 and S15 are performed by a known pattern forming apparatus (not shown).
[0059] ステップ S 15の処理を終えたら、配線パターン 6を形成したキャリアテープ 9を検査 装置 40に供給して当該検査装置 40で各配線パターン 6の状態を計測し (ステップ S 16)、その計測結果を「計測データ」として取得する (ステップ S17,図 8中 4段目左側 参照)。このステップ S16の工程が計測工程に相当する。  [0059] After the processing in step S15 is completed, the carrier tape 9 on which the wiring pattern 6 is formed is supplied to the inspection device 40, and the state of each wiring pattern 6 is measured by the inspection device 40 (step S16). The measurement result is acquired as “measurement data” (see the left side of the fourth stage in FIG. 8 in step S17). The process of step S16 corresponds to a measurement process.
[0060] なお、製品仕様書で配線パターン 6の線幅をトップ 6aについてのみ規定していると きには、トップ 6aについて配線パターン 6の状態を計測し、製品仕様書で配線パター ン 6の線幅をボトム 6bにつ!/、てのみ規定して!/、るときには、ボトム 6bにつ!/、て配線パ ターン 6の状態を計測すればょ 、。  [0060] When the line width of the wiring pattern 6 is specified only for the top 6a in the product specification, the state of the wiring pattern 6 is measured for the top 6a, and the wiring pattern 6 of the product specification is measured. If you specify the line width to the bottom 6b! /, Only measure the state of the wiring pattern 6!
[0061] ステップ S18の処理では、上記ステップ S 13〜ステップ S 17の処理とは別に、 PC1 0を用いて、製品設計データと一致したシミュレーションデータを「最適シミュレーショ ンデータ」としてサーバー 30に格納する (ステップ S18,図 8中 3段目右側参照)。  [0061] In the process of step S18, separately from the processes of step S13 to step S17, using PC10, the simulation data that matches the product design data is stored in the server 30 as "optimum simulation data". (See step S18, right side of 3rd stage in Fig. 8).
[0062] ステップ S18の処理を終えたら、 PC10を用いて、サーバー 30に格納済みの最適 シミュレーションデータをデータ変換し検査装置 40で扱えるデータとし、データ変換 後の最適シミュレーションデータを「判定基準データ」として検査装置 40のデータ蓄 積部に相当するライブラリーに格納する (ステップ S19, S20)。  [0062] When the processing of step S18 is completed, the PC 10 is used to convert the optimal simulation data stored in the server 30 into data that can be handled by the inspection device 40, and the optimal simulation data after the data conversion is referred to as "determination reference data". Is stored in a library corresponding to the data storage section of the inspection device 40 (steps S19 and S20).
[0063] ステップ S20の処理を終えたら、検査装置 40において、上記計測データに基づき、 実際に形成された配線パターン 6のトップ 6aとボトム 6bとの各線幅に対応する判定基 準データをライブラリ一中から選択する (ステップ S21,図 8中 4段目右側参照)。  [0063] After the processing of step S20 is completed, the inspection apparatus 40 stores the determination standard data corresponding to the line widths of the top 6a and the bottom 6b of the actually formed wiring pattern 6 in the library based on the measurement data. Select from among them (Step S21, see the right side of the fourth row in Fig. 8).
[0064] なお、判定基準データの選択は、オペレータによる手動選択であってもよいし、検 查装置 40による自動選択であってもよい。当該判定基準データは、オペレータによ る手動で又は検査装置 40による自動で任意に又は定期的に選択し直せる構成とし てもよい。例えばキャリアテープ 9の各フレキシブル基板 8に対して、すべて同じもの を選択可能としてもよいし、トラックごとに選択可能としてもよいし、ピースごとに選択 可能としてもょ 、し、ピース中の一定領域ごとに選択可能としてもょ 、。 It should be noted that the selection criterion data may be manually selected by an operator or automatically selected by the detection device 40. The determination reference data may be arbitrarily or periodically selected manually or manually by the operator or automatically by the inspection apparatus 40. For example, for each flexible substrate 8 of the carrier tape 9, it may be possible to select the same one, selectable for each track, or select for each piece. If possible, and selectable for each specific area in the piece.
[0065] ステップ S21の処理を終えたら、検査装置 40を用いて、計測データと判定基準デ 一タとを照合し、計測データと判定基準データとがー致する力否かを判断する (ステ ップ S22,図 8中 5段目参照)。詳しくは、計測データと判定基準データとを照合し、 当該計測データが判定基準データの一定の規格範囲に収まっている力否かという観 点で、計測データと判定基準データとの一致性を判断する。  [0065] After the process of step S21 is completed, the inspection device 40 is used to collate the measurement data with the criterion data, and determine whether the measurement data and the criterion data match each other (step S21). S22, refer to the fifth row in Fig. 8). Specifically, the measurement data and the judgment reference data are collated, and the consistency between the measurement data and the judgment reference data is judged from the viewpoint of whether or not the measurement data is within a certain standard range of the judgment reference data. To do.
[0066] この場合に、製品仕様書で配線パターン 6の線幅をトップ 6aについてのみ規定して いるときには、計測データと判定基準データとの線幅の照合はトップ 6aについてのみ 行 、、製品仕様書で配線パターン 6の線幅をボトム 6bにつ 、てのみ規定して 、るとき には、計測データと判定基準データとの線幅の照合はボトム 6bについてのみ行う。 他方、製品仕様書で配線パターン 6の線幅をトップ 6aとボトム 6bとの両部について規 定しているときには、計測データと判定基準データとの線幅の照合はトップ 6aとボトム 6bとの両部について各部ごとに行う。このステップ S22の工程が照合工程に相当す る。  [0066] In this case, if the line width of the wiring pattern 6 is specified only for the top 6a in the product specification, the line width of the measurement data and the judgment reference data is checked only for the top 6a. When the line width of the wiring pattern 6 is specified only in the bottom 6b, the line width of the measurement data and the judgment reference data is collated only for the bottom 6b. On the other hand, when the line width of the wiring pattern 6 is specified for both the top 6a and the bottom 6b in the product specification, the line width comparison between the measurement data and the judgment reference data is performed between the top 6a and the bottom 6b. Perform both parts for each part. The process of step S22 corresponds to a verification process.
[0067] ステップ S22の処理の結果、計測データと判定基準データとがー致した場合は、実 際に形成された配線パターン 6が製品仕様書を満足したと認定して、その配線バタ ーン 6を「良品」と判定し検査を終了する (ステップ S23)。  [0067] If the measurement data and the judgment reference data match as a result of the process of step S22, it is recognized that the actually formed wiring pattern 6 satisfies the product specification, and the wiring pattern is determined. 6 is judged as “non-defective” and the inspection is finished (step S23).
[0068] 逆に、ステップ S22の処理の結果、計測データと判定基準データとが不一致であつ た場合は、実際に形成された配線パターン 6が製品仕様書を満足しなカゝつたと認定 して、その配線パターン 6を「不良品」と判定し、当該フレキシブル基板 8に対し検査 装置 40で不良マーキングを施したり孔をあけたりして、検査を終了する (ステップ S24 , S25) 0 [0068] Conversely, if the measurement data does not match the judgment reference data as a result of the process in step S22, it is determined that the actually formed wiring pattern 6 does not satisfy the product specification. Te, it is determined that the wiring pattern 6 as a "defective", and or a hole or subjected to defect marking inspection apparatus 40 to the flexible substrate 8, the inspection process ends (step S24, S25) 0
[0069] 以上の実施形態では、従来の検査方法のように製品設計データを配線パターン 6 の良否の判定基準とするのではなぐエッチング前にエッチング後の配線パターン 6 の状態を予測した結果 (最適シミュレーションデータ)を判定基準として、配線パター ン 6の計測データと判定基準データとを照合するから、配線パターン 6の計測結果と その判定基準とを近似した範囲内で照合して配線パターン 6の良否を判定すること ができる。 [0070] 特に、製品仕様書で配線パターン 6の線幅をトップ 6aとボトム 6bとの両部について 規定して!/、る場合には、計測データと判定基準データとの線幅の照合をトップ 6aとボ トム 6bとの両部について各部ごとに行うから、配線パターン 6の計測結果とその判定 基準とを極めて近似した範囲内で厳密に照合して配線パターン 6の良否を判定する ことができる。 [0069] In the above embodiment, the result of predicting the state of the wiring pattern 6 after etching before the etching is not performed, in which the product design data is not used as a criterion for the quality of the wiring pattern 6 as in the conventional inspection method (optimum Since the measurement data of wiring pattern 6 and the judgment reference data are collated using (simulation data) as judgment criteria, the measurement result of wiring pattern 6 and the judgment criteria are collated within the approximate range, and pass / fail of wiring pattern 6 is confirmed. Can be determined. [0070] In particular, when the line width of the wiring pattern 6 is specified for both the top 6a and the bottom 6b in the product specification! /, The line width of the measurement data and the reference data should be verified. Since both the top 6a and bottom 6b are performed for each part, it is possible to judge the quality of the wiring pattern 6 by closely collating the measurement result of the wiring pattern 6 and its judgment criteria within a very approximate range. it can.
[0071] 以上から、配線パターン 6の検査精度を向上させることができ、ひいてはフレキシブ ル基板 8の量産において歩留まり(すべての生産品に対する良品の割合)の低下をも 防止することができる。  As described above, the inspection accuracy of the wiring pattern 6 can be improved, and as a result, the yield (ratio of non-defective products to all products) in mass production of the flexible substrate 8 can be prevented.
[0072] なお、本発明は上記実施形態に限定されることなぐ本発明の主旨を逸脱しない範 囲にお 、て種々の改良及び設計変更をおこなってもよ!/、。  [0072] It should be noted that the present invention is not limited to the above embodiments, and various improvements and design changes may be made without departing from the spirit of the present invention! /.
[0073] 一の改良'設計変更事項として、ステップ S2とステップ S3との各処理の間に、露光  [0073] As one improvement 'design change item, exposure is performed between the processes of step S2 and step S3.
'現像後のレジストパターン 5の状態(レジストパターン 5の線幅や位置、平面形状等) をシミュレータ 70で予測する露光 ·現像シミュレーション工程を設けてもよ!、。この場 合、設計装置 20が露光'現像シミュレーション工程の予測結果をエッチング補正値 に反映させることでシミュレータ 70がその予測結果に基づき配線パターン 6の状態を 予測するような構成としてもょ 、し、検査装置 40が露光 ·現像シミュレーション工程の 予測結果をそのまま判定基準データに反映させるような構成としてもよい。  'An exposure / development simulation process may be provided to predict the state of the resist pattern 5 after development (the line width and position of the resist pattern 5, the planar shape, etc.) with the simulator 70! In this case, the design apparatus 20 reflects the prediction result of the exposure / development simulation process in the etching correction value so that the simulator 70 predicts the state of the wiring pattern 6 based on the prediction result. The inspection apparatus 40 may be configured to reflect the prediction result of the exposure / development simulation process as it is in the criterion data.
[0074] これは、レジスト 3のフォトリソグラフィー具合が導電体 2のエッチングの具合に影響 するからであり、例えば、レジストパターン 5が目標より幅狭であれば、配線パターン 6 の線幅に影響して、製品仕様書における配線パターン 6の線幅の最小規格値を下回 り製品仕様書の規格値から外れ好ましくない。逆に、レジストパターン 5が目標より幅 広であれば、配線パターン 6中のリードの先端部に相当するような部分(図示略)がァ ンダーエッチングを受けて太くなり好ましくない。そのため、当該露光'現像シミュレ一 シヨン工程を設けて、これら不都合を未然に回避するのが有効である。  [0074] This is because the photolithography condition of the resist 3 affects the etching condition of the conductor 2. For example, if the resist pattern 5 is narrower than the target, the line width of the wiring pattern 6 is affected. Therefore, it is less than the minimum standard value of the line width of wiring pattern 6 in the product specification, and it is not preferable to deviate from the standard value of the product specification. On the contrary, if the resist pattern 5 is wider than the target, a portion (not shown) corresponding to the tip of the lead in the wiring pattern 6 is undesirably thickened by under-etching. For this reason, it is effective to provide the exposure / development simulation step to avoid these disadvantages.
[0075] また、露光 ·現像シミュレーション工程を設ければ、その予測結果も配線パターン 6 の良否の判定基準の基礎として考慮されるから、配線パターン 6の計測結果とその判 定基準とを極めて近似した範囲内で厳密に照合して配線パターン 6の良否を判定す ることになり、配線パターン 6の検査精度を確実に向上させることができる。 [0076] 他の改良'設計変更事項として、ステップ S6の処理では、ベースフィルム 1上に占 める配線パターン 6の占有面積や配線パターン 6の平面形状、ベースフィルム 1の伸 縮等も当該処理の基礎としてもよい。 [0075] If an exposure / development simulation process is provided, the prediction result is also considered as the basis of the judgment criteria for the quality of the wiring pattern 6. Therefore, the measurement result of the wiring pattern 6 and the judgment criteria are extremely approximated. Therefore, the quality of the wiring pattern 6 is judged by checking strictly within the range, and the inspection accuracy of the wiring pattern 6 can be improved with certainty. [0076] As other improvements and design changes, in the process of step S6, the occupied area of the wiring pattern 6 occupied on the base film 1, the planar shape of the wiring pattern 6, the expansion and contraction of the base film 1, etc. It may be the basis of
[0077] 他の改良'設計変更事項として、ステップ S6の処理でキャリアテープ 9のトラックごと に配線パターン 6の状態を予測し、ステップ S22の処理でそれらトラックごとの各予測 結果をトラック専用の判定基準として計測データと判定基準データとをキャリアテープ 9のトラックごとに照合してもよい。この場合、エッチング液の流れ方や圧力等のエツ チング条件がトラックごとに変動しても、その変動に対しトラックごとに対応することが できる。  [0077] As another improvement 'design change, the state of the wiring pattern 6 is predicted for each track of the carrier tape 9 in the process of step S6, and each predicted result for each track is determined for the track in the process of step S22. As a reference, the measurement data and the determination reference data may be collated for each track of the carrier tape 9. In this case, even if the etching conditions such as the flow of the etching solution and the pressure vary from track to track, the variation can be handled from track to track.
[0078] 他の改良'設計変更事項として、図 10に示す通り、フレキシブル基板 8の配線パタ ーン 6以外の領域に TEG (Test Element Group)マーク 80を設け、ステップ S21の処 理において TEGマーク 80の計測データに基づき判定基準データを選択する構成と してもょ 、。 TEGマーク 80とは、所定のピッチ幅(例えば 25 μ m)を有した複数本の 線状の導電体 2から構成され、配線パターン 6と同様の工程を経て形成されるもので ある。  [0078] As another design modification, a TEG (Test Element Group) mark 80 is provided in an area other than the wiring pattern 6 of the flexible substrate 8 as shown in FIG. 10, and the TEG mark is processed in step S21. Even if it is configured to select the judgment reference data based on 80 measurement data. The TEG mark 80 is composed of a plurality of linear conductors 2 having a predetermined pitch width (for example, 25 μm), and is formed through the same process as the wiring pattern 6.
[0079] 他の改良'設計変更事項として、配線パターンの検査システム 100とその検査方法 をフレキシブル基板 8以外の配線基板、すなわち金属基板、ガラス基板、セラミック基 板、ガラスエポキシ基板等のリジッド基板に適用してもよい。 産業上の利用可能性  [0079] As another improvement and design change, the wiring pattern inspection system 100 and its inspection method are applied to a wiring board other than the flexible board 8, that is, a rigid board such as a metal board, a glass board, a ceramic board, and a glass epoxy board. You may apply. Industrial applicability
[0080] 以上のように、本発明に係る配線パターンの検査方法及び検査システムは、基板 に形成された配線パターンの良否を判定するのに有用であり、特に配線パターンの 良否の判定基準と配線パターンの計測結果とを比較するのに適して 、る。 As described above, the wiring pattern inspection method and inspection system according to the present invention are useful for determining the quality of the wiring pattern formed on the substrate, and in particular, the determination criteria for the quality of the wiring pattern and the wiring Suitable for comparing pattern measurement results.

Claims

請求の範囲 The scope of the claims
[1] 基板上に導電体とレジストとを積層した状態で、前記レジストを露光'現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査方法であって、  [1] A method for inspecting a wiring pattern formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor. And
前記配線パターンの状態を予測するシミュレーション工程と、  A simulation step of predicting the state of the wiring pattern;
前記配線パターンの状態を計測する計測工程と、  A measuring step for measuring the state of the wiring pattern;
前記シミュレーション工程の予測結果を前記配線パターンの良否の判定基準として 、前記判定基準と前記計測工程の計測結果とを照合する照合工程と、  A collation step for collating the determination criterion and the measurement result of the measurement step, using the prediction result of the simulation step as a determination criterion for the quality of the wiring pattern,
を備える配線パターンの検査方法。  Wiring pattern inspection method comprising:
[2] 請求の範囲第 1項に記載の配線パターンの検査方法において、  [2] In the wiring pattern inspection method according to claim 1,
前記シミュレーション工程ではエッチング前にエッチング後の前記配線パターンの 状態を予測する配線パターンの検査方法。  A wiring pattern inspection method for predicting a state of the wiring pattern after etching before etching in the simulation step.
[3] 請求の範囲第 1項に記載の配線パターンの検査方法において、 [3] In the wiring pattern inspection method according to claim 1,
前記配線パターンが前記基板上で複数のトラックにわたって設けられており、 前記シミュレーション工程では前記配線パターンの状態をトラックごとに予測し、 前記照合工程では前記シミュレーション工程でのトラックごとの各予測結果をトラッ ク専用の判定基準として、前記判定基準と前記計測工程の計測結果とをトラックごと に照合する配線パターンの検査方法。  The wiring pattern is provided over a plurality of tracks on the substrate, the state of the wiring pattern is predicted for each track in the simulation step, and each prediction result for each track in the simulation step is tracked in the verification step. A wiring pattern inspection method in which the determination criterion and the measurement result of the measurement process are collated for each track as a dedicated determination criterion.
[4] 基板上に導電体とレジストとを積層した状態で、前記レジストを露光'現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査方法であって、 [4] A method for inspecting a wiring pattern formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are laminated on a substrate, and then etching the conductor. And
露光 ·現像前に露光 ·現像後の前記レジストパターンの状態を予測する露光 ·現像 シミュレーション工程と、  Exposure · exposure before development · exposure to predict the state of the resist pattern after development · development simulation process;
前記露光'現像シミュレーション工程の予測結果に基づき、エッチング前にエツチン グ後の前記配線パターンの状態を予測するエッチングシミュレーション工程と、 前記配線パターンの状態を計測する計測工程と、  An etching simulation step for predicting a state of the wiring pattern after etching before etching based on a prediction result of the exposure and development simulation step; a measurement step for measuring the state of the wiring pattern;
前記エッチングシミュレーション工程の予測結果を前記配線パターンの良否の判定 基準として、前記判定基準と前記計測工程の計測結果とを照合する照合工程と、 を備える配線パターンの検査方法。 Using the prediction result of the etching simulation process as a determination criterion for the quality of the wiring pattern, a verification process for verifying the determination criterion and the measurement result of the measurement process, Wiring pattern inspection method comprising:
[5] 基板上に導電体とレジストとを積層した状態で、前記レジストを露光 '現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査方法であって、 [5] A method of inspecting a wiring pattern formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are laminated on a substrate, and then etching the conductor. And
前記配線パターンの状態をトップとボトムとの両部について予測するシミュレーショ ン工程と、  A simulation process for predicting the state of the wiring pattern for both the top and the bottom;
前記配線パターンの状態をトップとボトムとの両部について計測する計測工程と、 前記シミュレーション工程の予測結果を前記配線パターンの良否の判定基準として A measurement process for measuring the state of the wiring pattern for both the top and the bottom, and a prediction result of the simulation process as a determination criterion for the quality of the wiring pattern
、前記判定基準と前記計測工程の計測結果とを前記配線パターンのトップとボトムと の両部につ 、て各部ごとに照合する照合工程と、 A collation step for collating the determination criteria and the measurement result of the measurement step for each of the top and bottom portions of the wiring pattern;
を備える配線パターンの検査方法。  Wiring pattern inspection method comprising:
[6] 請求の範囲第 5項に記載の配線パターンの検査方法にぉ 、て、 [6] According to the wiring pattern inspection method described in claim 5,
前記シミュレーション工程ではエッチング前にエッチング後の前記配線パターンの 状態を予測する配線パターンの検査方法。  A wiring pattern inspection method for predicting a state of the wiring pattern after etching before etching in the simulation step.
[7] 請求の範囲第 5項に記載の配線パターンの検査方法にぉ 、て、 [7] In accordance with the wiring pattern inspection method according to claim 5,
前記配線パターンが前記基板上で複数のトラックにわたって設けられており、 前記シミュレーション工程では前記配線パターンの状態をトラックごとに予測し、 前記照合工程では前記シミュレーション工程でのトラックごとの各予測結果をトラッ ク専用の判定基準として、前記判定基準と前記計測工程の計測結果とをトラックごと に照合する配線パターンの検査方法。  The wiring pattern is provided over a plurality of tracks on the substrate, the state of the wiring pattern is predicted for each track in the simulation step, and each prediction result for each track in the simulation step is tracked in the verification step. A wiring pattern inspection method in which the determination criterion and the measurement result of the measurement process are collated for each track as a dedicated determination criterion.
[8] 基板上に導電体とレジストとを積層した状態で、前記レジストを露光 '現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査方法であって、 [8] A method of inspecting a wiring pattern formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are laminated on a substrate, and then etching the conductor. And
露光 ·現像前に露光 ·現像後の前記レジストパターンの状態を予測する露光 ·現像 シミュレーション工程と、  Exposure · exposure before development · exposure to predict the state of the resist pattern after development · development simulation process;
前記露光'現像シミュレーション工程の予測結果に基づき、エッチング前にエツチン グ後の前記配線パターンの状態をトップとボトムとの両部について予測するエツチン グシミュレーション工程と、 前記配線パターンの状態をトップとボトムとの両部について計測する計測工程と、 前記エッチングシミュレーション工程の予測結果を前記配線パターンの良否の判定 基準として、前記判定基準と前記計測工程の計測結果とを前記配線パターンのトツ プとボトムとの両部について各部ごとに照合する照合工程と、 An etching simulation process for predicting the state of the wiring pattern after etching before etching for both the top and the bottom based on the prediction result of the exposure and development simulation process; A measurement process for measuring the state of the wiring pattern for both the top and the bottom, and using the prediction result of the etching simulation process as a determination criterion for the quality of the wiring pattern, the determination criterion and the measurement result of the measurement process A collation process for collating each part of the top and bottom of the wiring pattern;
を備える配線パターンの検査方法。  Wiring pattern inspection method comprising:
[9] 基板上に導電体とレジストとを積層した状態で、前記レジストを露光'現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査システムであって、  [9] A wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are laminated on a substrate, and then etching the conductor. And
前記配線パターンの状態を予測するシミュレータと、  A simulator for predicting the state of the wiring pattern;
前記配線パターンの状態を計測し、前記シミュレータの予測結果を前記配線バタ ーンの良否の判定基準として、前記判定基準と計測結果とを照合する検査装置と、 を備える配線パターンの検査システム。  A wiring pattern inspection system comprising: an inspection device that measures the state of the wiring pattern and uses the prediction result of the simulator as a determination criterion for the quality of the wiring pattern, and compares the determination criterion with the measurement result.
[10] 請求の範囲第 9項に記載の配線パターンの検査システムにおいて、 [10] In the wiring pattern inspection system according to claim 9,
前記シミュレータがエッチング前にエッチング後の前記配線パターンの状態を予測 する配線パターンの検査システム。  A wiring pattern inspection system in which the simulator predicts the state of the wiring pattern after etching before etching.
[11] 請求の範囲第 9項に記載の配線パターンの検査システムにおいて、 [11] In the wiring pattern inspection system according to claim 9,
前記配線パターンが前記基板上で複数のトラックにわたって設けられており、 前記シミュレータが前記配線パターンの状態をトラックごとに予測し、  The wiring pattern is provided over a plurality of tracks on the substrate, and the simulator predicts the state of the wiring pattern for each track,
前記検査装置が前記シミュレータでのトラックごとの各予測結果をトラック専用の判 定基準として、前記判定基準と計測結果とをトラックごとに照合する配線パターンの 検査システム。  A wiring pattern inspection system in which the inspection device uses each prediction result for each track in the simulator as a determination criterion for a track, and compares the determination criterion with a measurement result for each track.
[12] 基板上に導電体とレジストとを積層した状態で、前記レジストを露光'現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査システムであって、  [12] A wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are laminated on a substrate, and then etching the conductor. And
露光 ·現像前に露光 ·現像後の前記レジストパターンの状態を予測し、その予測結 果に基づき、エッチング前にエッチング後の前記配線パターンの状態を予測するシミ ユレータと、  A simulator that predicts the state of the resist pattern after exposure and development before exposure and development, and predicts the state of the wiring pattern after etching before etching based on the prediction result;
前記配線パターンの状態を計測し、前記シミュレータの予測結果を前記配線バタ ーンの良否の判定基準として、前記判定基準と計測結果とを照合する検査装置と、 を備える配線パターンの検査システム。 The wiring pattern state is measured, and the prediction result of the simulator is displayed as the wiring pattern. A wiring pattern inspection system comprising: an inspection device that collates the determination criterion with a measurement result as a determination criterion for the quality of a pattern.
[13] 基板上に導電体とレジストとを積層した状態で、前記レジストを露光'現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査システムであって、  [13] A wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor. And
前記配線パターンの状態をトップとボトムとの両部について予測するシミュレータと 前記配線パターンの状態をトップとボトムとの両部にっ 、て計測し、前記シミュレ一 タの予測結果を前記配線パターンの良否の判定基準として、前記判定基準と計測結 果とを前記配線パターンのトップとボトムとの両部について各部ごとに照合する検査 装置と、  The simulator that predicts the state of the wiring pattern for both the top and the bottom, the state of the wiring pattern is measured for both the top and the bottom, and the prediction result of the simulator is measured for the wiring pattern. As an acceptance criterion, an inspection device that collates the determination criterion and the measurement result for each of the top and bottom portions of the wiring pattern;
を備える配線パターンの検査システム。  Wiring pattern inspection system comprising:
[14] 請求の範囲第 13項に記載の配線パターンの検査システムにおいて、 [14] In the wiring pattern inspection system according to claim 13,
前記シミュレータがエッチング前にエッチング後の前記配線パターンの状態を予測 する配線パターンの検査システム。  A wiring pattern inspection system in which the simulator predicts the state of the wiring pattern after etching before etching.
[15] 請求の範囲第 13項に記載の配線パターンの検査システムにおいて、 [15] In the wiring pattern inspection system according to claim 13,
前記配線パターンが前記基板上で複数のトラックにわたって設けられており、 前記シミュレータが前記配線パターンの状態をトラックごとに予測し、  The wiring pattern is provided over a plurality of tracks on the substrate, and the simulator predicts the state of the wiring pattern for each track,
前記検査装置が前記シミュレータでのトラックごとの各予測結果をトラック専用の判 定基準として、前記判定基準と計測結果とをトラックごとに照合する配線パターンの 検査システム。  A wiring pattern inspection system in which the inspection device uses each prediction result for each track in the simulator as a determination criterion for a track, and compares the determination criterion with a measurement result for each track.
[16] 基板上に導電体とレジストとを積層した状態で、前記レジストを露光'現像してレジ ストパターンを形成し、その後に前記導電体をエッチングして形成した配線パターン の検査システムであって、  [16] A wiring pattern inspection system in which a resist pattern is formed by exposing and developing the resist in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor. And
露光 ·現像前に露光 ·現像後の前記レジストパターンの状態を予測し、その予測結 果に基づき、エッチング前にエッチング後の前記配線パターンの状態をトップとボトム との両部について予測するシミュレータと、  A simulator that predicts the state of the resist pattern after exposure and development before exposure and development, and predicts the state of the wiring pattern after etching for both top and bottom before etching based on the prediction result; ,
前記配線パターンの状態をトップとボトムとの両部にっ 、て計測し、前記シミュレ一 タの予測結果を前記配線パターンの良否の判定基準として、前記判定基準と計測結 果とを前記配線パターンのトップとボトムとの両部について各部ごとに照合する検査 装置と、 The state of the wiring pattern is measured at both the top and bottom, and the simulation is performed. An inspection device that collates the judgment criteria and the measurement results for each part of the top and bottom of the wiring pattern, using the prediction result of the data as a judgment criterion for the quality of the wiring pattern;
を備える配線パターンの検査システム。  Wiring pattern inspection system comprising:
PCT/JP2006/320723 2006-10-18 2006-10-18 Wiring pattern inspecting method and wiring pattern inspecting system WO2008047422A1 (en)

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CN103454286A (en) * 2012-05-31 2013-12-18 大日本网屏制造株式会社 Apparatus for and method of inspecting substrate

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JP2000199709A (en) * 1999-01-06 2000-07-18 Dainippon Screen Mfg Co Ltd Method and device for inspecting pattern
JP2001215113A (en) * 2000-02-02 2001-08-10 Ibiden Co Ltd Pattern inspecting instrument and master data generation method for pattern inspection
JP2003068803A (en) * 2001-08-29 2003-03-07 Hitachi Cable Ltd Tape carrier for semiconductor device and semiconductor device using the same
JP2004056068A (en) * 2002-05-28 2004-02-19 Shinko Electric Ind Co Ltd System and method for forming wiring

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JPH06213821A (en) * 1993-01-21 1994-08-05 Hitachi Ltd Foreign-matter inspecting apparatus for semiconductor wafer
JP2000088762A (en) * 1998-09-11 2000-03-31 Fujitsu Ltd Visual inspection apparatus
JP2000199709A (en) * 1999-01-06 2000-07-18 Dainippon Screen Mfg Co Ltd Method and device for inspecting pattern
JP2001215113A (en) * 2000-02-02 2001-08-10 Ibiden Co Ltd Pattern inspecting instrument and master data generation method for pattern inspection
JP2003068803A (en) * 2001-08-29 2003-03-07 Hitachi Cable Ltd Tape carrier for semiconductor device and semiconductor device using the same
JP2004056068A (en) * 2002-05-28 2004-02-19 Shinko Electric Ind Co Ltd System and method for forming wiring

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103454286A (en) * 2012-05-31 2013-12-18 大日本网屏制造株式会社 Apparatus for and method of inspecting substrate

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