WO2006129367A1 - 不揮発性メモリ - Google Patents
不揮発性メモリ Download PDFInfo
- Publication number
- WO2006129367A1 WO2006129367A1 PCT/JP2005/010190 JP2005010190W WO2006129367A1 WO 2006129367 A1 WO2006129367 A1 WO 2006129367A1 JP 2005010190 W JP2005010190 W JP 2005010190W WO 2006129367 A1 WO2006129367 A1 WO 2006129367A1
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- WIPO (PCT)
- Prior art keywords
- oxide film
- metal oxide
- nanohole
- memory
- containing metal
- Prior art date
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- 230000015654 memory Effects 0.000 title claims abstract description 123
- 238000005192 partition Methods 0.000 claims abstract description 46
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 44
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 44
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 229910052751 metal Inorganic materials 0.000 claims abstract description 26
- 239000002184 metal Substances 0.000 claims abstract description 26
- 230000004888 barrier function Effects 0.000 claims description 44
- 229910052782 aluminium Inorganic materials 0.000 claims description 20
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 20
- 238000007743 anodising Methods 0.000 claims description 10
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- 239000010936 titanium Substances 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims 1
- 230000010354 integration Effects 0.000 abstract description 5
- 230000009977 dual effect Effects 0.000 abstract 1
- MUBZPKHOEPUJKR-UHFFFAOYSA-N Oxalic acid Chemical compound OC(=O)C(O)=O MUBZPKHOEPUJKR-UHFFFAOYSA-N 0.000 description 18
- 230000008859 change Effects 0.000 description 8
- 230000000694 effects Effects 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 6
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 6
- 239000002253 acid Substances 0.000 description 6
- 238000007667 floating Methods 0.000 description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 6
- 229910052737 gold Inorganic materials 0.000 description 6
- 239000010931 gold Substances 0.000 description 6
- 235000006408 oxalic acid Nutrition 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 239000002784 hot electron Substances 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 239000003792 electrolyte Substances 0.000 description 3
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- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 3
- 239000011148 porous material Substances 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 150000004645 aluminates Chemical class 0.000 description 2
- 238000002048 anodisation reaction Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- VLTRZXGMWDSKGL-UHFFFAOYSA-N perchloric acid Chemical compound OCl(=O)(=O)=O VLTRZXGMWDSKGL-UHFFFAOYSA-N 0.000 description 2
- 235000011007 phosphoric acid Nutrition 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 238000003917 TEM image Methods 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000010407 anodic oxide Substances 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- ZCLVNIZJEKLGFA-UHFFFAOYSA-H bis(4,5-dioxo-1,3,2-dioxalumolan-2-yl) oxalate Chemical compound [Al+3].[Al+3].[O-]C(=O)C([O-])=O.[O-]C(=O)C([O-])=O.[O-]C(=O)C([O-])=O ZCLVNIZJEKLGFA-UHFFFAOYSA-H 0.000 description 1
- 230000003915 cell function Effects 0.000 description 1
- 150000004770 chalcogenides Chemical class 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- KRVSOGSZCMJSLX-UHFFFAOYSA-L chromic acid Substances O[Cr](O)(=O)=O KRVSOGSZCMJSLX-UHFFFAOYSA-L 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 239000008151 electrolyte solution Substances 0.000 description 1
- 238000010893 electron trap Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- AWJWCTOOIBYHON-UHFFFAOYSA-N furo[3,4-b]pyrazine-5,7-dione Chemical compound C1=CN=C2C(=O)OC(=O)C2=N1 AWJWCTOOIBYHON-UHFFFAOYSA-N 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000005610 quantum mechanics Effects 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000001338 self-assembly Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 230000005476 size effect Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000003756 stirring Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 239000011135 tin Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/102—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components
- H01L27/1021—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components including diodes only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8616—Charge trapping diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/10—Resistive cells; Technology aspects
- G11C2213/15—Current-voltage curve
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/32—Material having simple binary metal oxide structure
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/34—Material includes an oxide or a nitride
Definitions
- the present invention relates to a non-silicon nonvolatile memory. Specifically, the present invention relates to a nonvolatile memory that uses an interface state formed on a partition wall of a nanohole-containing metal oxide film as a charge holder of the memory.
- SRAM Static RAM: Anytime read / write memory that does not require memory retention (refresh) operation
- DRAM Dynamic RAM: Anytime that requires refresh operation
- Read / write memory and flash memory (non-volatile semiconductor memory that combines the features of RAM and ROM that can retain data after power-off).
- SRAM In addition to the disadvantage of being volatile, SRAM cannot be increased in capacity because it is difficult to achieve high integration, but it is used for cache memory, etc. because it can be accessed at high speed. DRAM is also volatile, and because it is a data destructive read type, it requires a refresh operation at the time of reading. Yes.
- flash memory is widely used as a nonvolatile memory that does not lose its memory even when the power is turned off. Flash memory is 1000 nanoseconds, which is 200 times longer than DRAM, but it is used for storing relatively small amounts of data due to its integration and non-volatile characteristics.
- so-called universal 'memory which is not satisfactory with conventional memory in the ubiquitous' computing era, high-speed processing era' when information devices are no longer only PCs, has the advantages of SRAM, DRAM, and flash memory. It has been a long time since I was waiting for.
- FeRAM solves the volatility that is a drawback of DRAM by adopting a ferroelectric capacitor, and achieves a low voltage by reducing the write time to 50 nanoseconds. However, since it is a data destruction read type memory, the read time becomes longer due to the rewrite operation. In addition, the power of 2-transistor 2-capacitor type memory cells has been put to practical use, and because of the complex structure, there is a limit to large capacity.
- MRAM uses a change in the force magnetic field that is suitable for high-speed access, so the manufacturing process is special and expensive. In addition, it is necessary to reduce the size of the sense amplifier in order to achieve a large capacity, so that the problem of reducing the write current remains.
- OUM uses a new storage medium, a chalcogenide alloy, and utilizes the phenomenon that electrical resistance decreases when it is heated to 600 ° C and crystallized, and returns to high resistance when rapidly cooled and crystallized. Therefore, it is expected to be a non-volatile memory that can replace the flash memory because of its simple structure with two electrodes.
- reliability is a concern because writing is performed by current heating, and a long voltage application time during writing becomes an obstacle to high-speed operation, and the timing for practical use is undecided.
- MOSFET Metal Oxide-Semiconductor Field Effect Transistor
- Figure 1 shows a conventional MOSFET memory.
- the MOSFET type memory has three electrodes: a gate electrode 21, a source electrode 29, and a drain electrode 25.
- the floating gate 24, the oxide film 23, the control gate 22, and the drain junction region 26 and the source junction region 28 provided in the substrate 27 are sequentially connected via the tunnel oxide film 30. Yes. Then, by trapping electrons in the floating gate 24 and extracting the electrons through the tunnel oxide film 30, when the voltage is applied to the gate electrode, it conducts to the upper surface of the substrate 27.
- the conventional MOSFET-type memory has a two-stage control method, and the floating gate is electrically charged.
- the tunnel effect is only used to move the child in and out, and the tunnel effect is not directly used in the memory current circuit. Therefore, there is a limit to speeding up and voltage reduction.
- a nonvolatile memory using a Schottky barrier is provided with a silicon silicide film and a metal silicide film that forms a Schottky barrier diode (see Patent Document 1), and a non-volatile memory using a tunnel effect is quantum mechanics.
- Patent Document 1 a silicon silicide film and a metal silicide film that forms a Schottky barrier diode
- Patent Document 2 an insulating layer that can directly tunnel electrons
- Patent Document 3 A structure that emits a tunnel (see Patent Document 3) has been proposed.
- Patent Documents 1 to 3 are technologies that use the tunnel effect to put electrons into and out of the floating gate of the MOSFET-type nonvolatile memory through the insulating film. Inverted channel formation is used. In other words, since the tunnel effect is not directly used to turn on / off the memory current, the current on / off ratio cannot be significantly improved, and there is a limit to speeding up and lowering the voltage.
- Patent Document 1 Japanese Patent No. 2913752
- Patent Document 2 JP 2002-289709 A
- Patent Document 3 Japanese Patent Laid-Open No. 2003-68893
- the present invention realizes a high-speed access equivalent to that of SRAM, enables integration exceeding DRAM, and can be driven by a small battery, and can be driven by a small battery and has a low voltage and low power consumption. Is intended to provide.
- the present inventors have found that when a nanohole-containing metal oxide film is formed in a honeycomb shape, interface states exist in the partition walls at a high density. It was found that the trap charge due to the electrons trapped at the interface state can be used as the storage charge at the same time as the control charge that directly turns on and off the memory current if is placed in the Schottky junction state. .
- Harcom type FET-RAM Honeycomb-type FET-Random Access Memory; HoFET-RAM
- a nanohole-containing metal oxide film having a thickness of 0.05 to 5 m having a Hercom structure is placed in a Schottky junction state between a pair of metal electrodes, thereby forming the nanohole-containing metal oxide film.
- the nanohole-containing metal oxide film has a structure in which a plurality of double Schottky barriers are formed in parallel.
- the nonvolatile memory of the present invention stores information using trapped charges, and at the same time eliminates and restores the double Schottky barrier, so that the current on / off specific power is as high as 10 6 or more.
- the applied voltage during reading is 0.2 V or less, and the applied voltage during writing is Fowler-Nordnom
- the tunnel current (hereinafter referred to as “FN tunnel current”) is about IV, and the voltage at the time of erasure is about IV.
- FN tunnel current is about IV
- the voltage at the time of erasure is about IV.
- the electrons excited by the hot electrons of the FN tunnel current are used as a trigger at the time of writing, so the writing speed is faster than the conventional method of injecting electrons into the capacitor, and the switching is fast. Is possible.
- FIG. 1 is a cross-sectional view schematically showing a structure of a conventional MOSFET nonvolatile memory.
- FIG. 2 is a cross-sectional view schematically showing the structure (one cell) of the nonvolatile memory of the present invention.
- FIG. 3 is a graph showing changes in current-voltage characteristics in the nonvolatile memory of the present invention.
- FIG. 4 is a schematic diagram showing a change of a Schottky barrier due to an electron trap, schematically showing a cross section of two nanoholes and a partition wall in the nonvolatile memory of the present invention.
- a nanohole-containing metal oxide film having a 0.05 to 5 ⁇ m thick cam structure is disposed in a Schottky junction state between a pair of metal electrodes.
- the present invention also provides a metal electrode force that is Schottky bonded to the upper end of the partition wall of the substrate electrode, the nanohole-containing metal oxide film formed by anodizing the surface of the substrate electrode, and the nanohole-containing metal oxide film.
- the nanohole-containing metal oxide film has a structure in which a plurality of double Schottky barriers are formed in parallel.
- a normal Schottky diode is non-conductive at a voltage of about 0.3 V due to a Schottky barrier, but when a voltage higher than the Schottky barrier, for example, 5 V, is applied in the forward direction, a surge current flows beyond the Schottky barrier. When the applied voltage drops below the barrier, it returns to non-conduction. However, if there is an interface state at the Schottky junction, it acts as a trap level or recombination center, and abnormal phenomena such as leakage current and hysteresis other than normal current appear. It is necessary to make it as small as possible. Not limited to the above example, the common state of semiconductors is that interface states become uncontrollable disturbances, so eliminating them as much as possible is considered the best policy, and charge retention is achieved by actively using interface states. In my body, my invention was never made.
- the interface state which is not controlling the interface state itself, is pushed into the three-dimensional nanostructure, thereby restricting the location where the interface state exists and substantially interfacial state. To control.
- the nonvolatile memory of the present invention has a honeycomb structure in which a metal oxide film having nanoholes is formed in a honeycomb-shaped structure because the Schottky electrode is planarly bonded as in the prior art (see FIG. 1).
- An upper end of the partition wall having a cross-sectional shape and a metal electrode are arranged in a Schottky junction state (see Fig. 2).
- Nanohole-containing metal oxide film barrier (corresponding to n-type semiconductor)
- the force electrode in the presence of an interface state due to lattice defects of 10 16 / cm 3 or more formed during anodization is formed at the upper end of the hard-came partition wall, for example, the upper end protrusion of the partition wall with a width of 20 nm.
- the interface state existing at the Schottky electrode junction is about 1Z10 or less.
- the remaining interface states of about 9Z10 are aligned perpendicular to the electrode direction without being in contact with the electrode, and exist facing both surfaces of the partition wall. For this reason, the interface state existing in the vertical partition wall does not disturb the current flowing through the Schottky electrode.
- an FN tunnel current flows through the double Schottky barrier when a voltage of about IV is applied, and the electrons excited by the hot electrons are transferred between the oxide film and the partition wall. It becomes trapped at the interface state and becomes a metastable trap charge.
- the local electric field lowers the potential of the central layer of the partition wall, and double-shock barrier (49a in Fig. 4 (a)) force S tunnel state (Fig. 4 (b) 49b).
- This conduction state is a metastable state, and even when the power is turned off, trapped electrons remain in the interface state as they are, and the conduction state is maintained until the trapped electrons are extracted to the lower electrode by a reverse voltage.
- the present invention switches the conduction state and the non-conduction state by erasing or restoring the shot barrier by putting trap electrons into and out of the interface state formed in the partition wall of the nanohole-containing metal oxide film.
- the information of “0” and “1” is stored and held.
- the nonvolatile memory of the present invention directly controls the memory current by the trap charge, so that neither a gate electrode nor an attached capacitor structure is required. That is, the present invention has realized a nonvolatile memory including one extremely simple transistor having two electrodes (a metal electrode 42 that is Schottky-bonded with a substrate electrode 44).
- the lattice defect density of the partition walls of the nanohole-containing metal oxide film is preferably 10 16 Zcm 3 or more, and more preferably 10 18 / cm 3 or more.
- the density of the lattice defects is less than 10 14 Zcm 3 , trapped charges are insufficient, and the Schottky barrier may not be sufficiently thin and may not be in a conductive state.
- the thickness of the nanohole-containing metal oxide film is in the range of 0.05 to 5 111, preferably in the range of 0.1 to 1 / ⁇ ⁇ . Leakage current increases when the thickness of the nanohole-containing metal oxide film is less than 0.05 / zm, and FN tunneling current is less likely to occur when the thickness is 5 m or more.
- the nanohole-containing metal oxide film can be obtained by anodizing the surface of a metal such as aluminum or titanium.
- the electrolytic solution for example, in the presence of an acid having a concentration of 1 to 5%, the temperature is preferably adjusted to 0 ° C. to 50 ° C., and the voltage is preferably controlled within a range of 10V to 150V.
- a high-purity aluminum such as 1000 series having a purity of 99.0% or more, preferably 99.5% or more, and having a smooth surface is used. It is preferable to use it.
- the diameter of the nanohole formed in the metal oxide film by self-assembly is preferably 10 to 150 nm, more preferably 30 to 60 nm.
- the diameter is less than lOnm, it becomes difficult to make it conductive.
- the reason for this is thought to be that since the partition wall thickness is reduced in proportion to the nanohole diameter, the interface state that forms the charge holding body and the channel layer at the center of the partition wall overlap, making the channel layer thinner, and the channel current does not flow. .
- the partition wall thickness increases proportionally, so the charge retaining layer at the interface state and the channel layer in the center of the partition wall are too far apart, and the size effect of the local electric field becomes insufficient. .
- the trap charge at the interface state does not sufficiently lower the potential at the center of the partition wall, so that the tunnel effect due to thinning of the Schottky barrier is less likely to occur, and it becomes difficult to make the conductive state.
- the diameter of the nanohole can be controlled by adjusting the type of acid used in the anodizing electrolyte.
- sulfuric acid is used as the electrolyte
- the diameter of the nanoholes is the smallest, and the diameter of the nanoholes increases in the order of the mixture of oxalic acid and phosphoric acid, oxalic acid, and phosphoric acid.
- nanoholes made with 2-4% electrolyte of oxalic acid are preferred because they have a diameter force of S30-60nm and are perpendicular to the surface! /.
- a metal such as gold, aluminum, nickel, titanium, tin, or tungsten is Schottky bonded to the upper end of the partition wall of the nanohole-containing metal oxide film by vapor deposition or sputtering.
- One metal electrode is used, and the other metal is a metal such as aluminum or titanium.
- Gold or aluminum is preferred as the metal to be Schottky bonded. With this configuration, there is an advantage that the operating voltage is stabilized.
- the two-dimensional array of nanoholes formed in the metal oxide film is provided every two or three or more. By dividing it into a single memory cell by dividing it into insulating grooves, the two-dimensional array of nanoholes can be used as it is as a memory cell array
- FIG. 2 is a cross-sectional view schematically showing the structure of the nonvolatile memory of the present invention.
- Figure 2 is a diagram in which one memory cell is composed of five nanoholes among the many nanoholes that exist in the form of a honeycomb in the metal oxide film containing nanoholes.
- the substrate electrode 14 is also made of aluminum, and the other surface of the substrate electrode 14 has a nanohole-containing metal oxide film 13 formed by anodizing the substrate electrode 14, and the upper end of the partition wall. Is provided with a Schottky electrode 12 formed by vapor deposition, sputtering or the like, and a lead electrode 11 is connected to the Schottky electrode 12. Since there are Schottky barriers between the partition walls of the nanohole-containing metal oxide film 13 and the Schottky electrode 12 and the substrate electrode 14, the electrodes are blocked by the double Schottky barrier.
- the Schottky electrode 12 and the substrate electrode 14 When gold is used for the Schottky electrode, when a low voltage, for example, 0.2 V, is applied between the Schottky electrode 12 and the substrate electrode 14, the Schottky electrode 12 and nanoholes are included. Due to the Schottky barrier formed at the junction surface of the metal oxide film 13 with the partition wall, no current flows between the Schottky electrode 12 and the substrate electrode 14. However, when a slightly higher voltage, such as IV, is applied, an FN tunnel current flows through the Schottky barrier, and the electrons excited by the hot electrons flow into the nanohole-containing metal oxide film / wall.
- a slightly higher voltage such as IV
- the trapped charge When trapped at the interface state, the trapped charge lowers the potential of the nanohole partition wall 47, and the Schottky barrier between the Schottky electrode 12 and the substrate electrode 14 is thinned and becomes a tunnel state. However, a current of more than 10 mA flows at a voltage of 0.2V. This conduction state is a metastable state and is maintained even when the applied voltage is zero.
- FIG. 3 is a graph showing changes in current-voltage characteristics of the nonvolatile memory of the present invention.
- memory is written by applying IV between the Schottky electrode 12 and the substrate electrode 14 as shown in Fig. 3 (point B).
- Memory is erased by applying IV to (E point).
- IV When 0.2V is applied between the same electrodes and a current of about 17mA flows, it is set to "0" ON state (C point), and when no current flows, the state is set to "1" OFF state (A point)
- the stored contents can be read out.
- the same characteristics are basically exhibited when aluminum is used as the metal for the metal electrode.
- the present invention can directly turn on / off the memory current and store information at the same time by eliminating or reviving the double Schottky barrier between the electrodes only by taking in and out trapped electrons. Therefore, the response is quick with few control factors.
- FIG. 4 is a schematic cross-sectional view when one memory cell is composed of two nanoholes, and a schematic view showing changes in trap electrons and Schottky barriers.
- FIG. 4 (a) shows the state of the memory element (“1” off state) at point A in FIG.
- nanoholes 45 having a diameter of 10 to 150 nm, preferably 30 to 60 nm, are arranged substantially perpendicular to the upper electrode.
- the nanohole barrier ribs 47 in which the interface states for trapping electrons are formed are arranged in parallel to the electrode direction, as if two fine capacitors were arranged opposite to each other. It becomes a state.
- the tip convex portion of the nanohole partition wall 47 and the Schottky electrode 42 are in a non-conductive state due to the Schottky barrier.
- the nanohole-containing metal oxide film 43 is formed on the substrate electrode 44 by anodizing aluminum or the like of the substrate electrode 44. Similarly, the nanohole partition wall 47 and the substrate electrode 44 are not electrically connected by the Schottky barrier. State. That is, the electrode 42 and the electrode 44 are electrically disconnected by the double Schottky barrier 49a, and the point A in FIG. 3 is non-conductive between the electrode 42 and the electrode 44 at an applied voltage of 0.2V. Show that it is in a state.
- FIG. 4 shows an example in which three pairs of double Schottky barriers are formed in parallel.
- the aluminum anodic oxide film manufactured by the method shown in Example 1 has a diameter force Onm of about nanoholes 45 as shown in FIG. 5, and all the nanoholes 45 are almost perpendicular to the substrate electrode 44. Is formed.
- the nanohole partition wall 47 is also substantially vertical and has a uniform wall thickness, which shows that the microstructural requirements for using the nanohole partition wall 47 for charge carriers and channels are met.
- the thickness of the Schottky barrier is reduced, and a tunnel state is established and a conduction (ON) state is established.
- the state in Fig. 4 (b) is metastable, and trapped electrons continue to exist at the interface state even when the applied voltage is zero, so that the conduction state is maintained. In other words, it moves on the metastable line that connects point C and point D of the hysteresis curve in Fig. 3 through the origin.
- Point C in Fig. 3 is an ON state with 0.2 V applied in the presence of trapped electrons, and the memory contents are determined by the difference in the current values at points A and C.
- a detection current of more than 10 mA flows at about 0.2 V, and trapped electrons are not extracted at an applied voltage of about 0.2 V, so the on-state does not change depending on the reading operation! /.
- the detection current is in an off state of several tens of pA or less, and trapped electrons are not generated at an applied voltage of about 0.2 V, so the off state does not change with the read operation.
- the voltage at point E should be sufficient to pull out trapped electrons.
- trapped electrons are extracted to the lower electrode, the trap charge disappears, the Schottky barrier thickness returns to the original state, and the device is turned off. This state is a stable state.
- one memory cell can be composed of three or more nanoholes. In that case, the number of channels of one memory cell increases, and the on-current increases proportionally.
- a single memory cell functions as long as there is a single channel, so the minimum size of the memory cell is twice the nanohole spacing (0.1 l) and the calculated minimum cell area Becomes 0.04 m 2 .
- FIG. 1 shows a cross-sectional view of one cell of the memory cell fabricated above.
- the thickness of the aluminum oxide nanoholes was 0.
- the nanohole diameter was 35 nm.
- the thickness of the gold electrode is LOOnm, cell area was 4 ⁇ m 2.
- Figure 5 shows a photograph of the cross section of the aluminum oxide film obtained in Example 1 observed with a transmission electron microscope. (Rate: 300,000 times). Figure 5 shows that it has a regular nanohole barrier.
- Example 1 instead of an aluminum substrate, a silicon substrate was thermally oxidized to obtain SiO
- the change in resistance value of the memory element obtained in Example 1 was measured with a high-speed oscilloscope.
- Figure 7 shows the data of resistance change. As shown in Figure 7, the time lag was taken into account because the shift time from high resistance (22 M ⁇ ) to low resistance (2 ⁇ ) when applying IV between the electrodes was 0.02 s (20 ns). Even so, it can be seen that the write time is less than 50ns.
- FIG. 8 is an example of a 4 ⁇ 4 memory basic circuit using the nonvolatile memory of the present invention.
- the transistor 'switch 3 for switching between IV, 0.2V and IV with signals corresponding to each operation It becomes a simple circuit composed of pieces.
- Table 1 summarizes the characteristic comparison between the nonvolatile memory of the present invention and the conventional memory device. From Table 1, it can be seen that the nonvolatile memory of the present invention solves all the above-mentioned problems required for universal memories.
- Nonvolatile memory Volatile memory Flash memory of the present invention
- nonvolatile memory of the present invention directly controls the memory current, high-speed switching is possible and power consumption is low. As a result, according to the present invention, it is possible to provide a non-volatile memory that can perform high-speed access, high integration, small battery drive, low voltage, and low power consumption.
- the nonvolatile memory of the present invention is a simple bipolar element having no gate electrode, and the aluminum substrate can be used as it is for the lower electrode wiring, so that the memory wiring becomes very simple and can be easily miniaturized. Furthermore, since the aluminum material that is widely used in the silicon semiconductor process is used, the conventional manufacturing equipment can be used as it is.
- the nanohole array regularly and two-dimensionally arranged at equal intervals formed on the anodized aluminum film can be used as a memory cell array in the state where it is arranged.
- the memory manufacturing of the present invention has an advantage that the productivity can be increased because most of the complicated microfabrication can be replaced by self-organization.
- the doping technology required for conventional silicon semiconductors is no longer necessary, and the materials are aluminum, general-purpose electrode materials, insulating materials, radio wave shielding materials, etc., and rare elements such as compound semiconductors are required. There are advantages to not.
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Abstract
Description
Claims
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PCT/JP2005/010190 WO2006129367A1 (ja) | 2005-06-02 | 2005-06-02 | 不揮発性メモリ |
US11/916,335 US20080197440A1 (en) | 2005-06-02 | 2005-06-02 | Nonvolatile Memory |
JP2007518839A JPWO2006129367A1 (ja) | 2005-06-02 | 2005-06-02 | 不揮発性メモリ |
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JP2011077465A (ja) * | 2009-10-02 | 2011-04-14 | Nec Corp | 記憶装置、及び記憶装置の動作方法 |
JP2013222784A (ja) * | 2012-04-16 | 2013-10-28 | Nihon Univ | 抵抗変化型不揮発性メモリおよびその製造方法 |
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JP2004507104A (ja) * | 2000-08-22 | 2004-03-04 | プレジデント・アンド・フェローズ・オブ・ハーバード・カレッジ | ドープされた細長い半導体、そのような半導体の成長、そのような半導体を含んだデバイス、およびそのようなデバイスの製造 |
JP2004193423A (ja) * | 2002-12-12 | 2004-07-08 | Nichicon Corp | 電解コンデンサの駆動用電解液 |
JP2004207739A (ja) * | 2002-12-23 | 2004-07-22 | Samsung Electronics Co Ltd | ナノドットを有するメモリ製造方法 |
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US5303182A (en) * | 1991-11-08 | 1994-04-12 | Rohm Co., Ltd. | Nonvolatile semiconductor memory utilizing a ferroelectric film |
US5731608A (en) * | 1997-03-07 | 1998-03-24 | Sharp Microelectronics Technology, Inc. | One transistor ferroelectric memory cell and method of making the same |
WO1998044567A1 (fr) * | 1997-03-28 | 1998-10-08 | Hitachi, Ltd. | Dispositif de memoire remanente a semi-conducteur, dispositif a semi-conducteur et procedes de fabrication associes de ceux-ci |
US6512263B1 (en) * | 2000-09-22 | 2003-01-28 | Sandisk Corporation | Non-volatile memory cell array having discontinuous source and drain diffusions contacted by continuous bit line conductors and methods of forming |
WO2003078685A1 (fr) * | 2002-03-15 | 2003-09-25 | Canon Kabushiki Kaisha | Dispositif fonctionnel et procede de fabrication du dispositif, support d'enregistrement magnetique vertical, dispositif d'enregistrement et de lecture magnetique, et dispositif de traitement d'information |
US6858482B2 (en) * | 2002-04-10 | 2005-02-22 | Micron Technology, Inc. | Method of manufacture of programmable switching circuits and memory cells employing a glass layer |
JP4428921B2 (ja) * | 2002-12-13 | 2010-03-10 | キヤノン株式会社 | ナノ構造体、電子デバイス、及びその製造方法 |
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- 2005-06-02 WO PCT/JP2005/010190 patent/WO2006129367A1/ja active Application Filing
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JP2004507104A (ja) * | 2000-08-22 | 2004-03-04 | プレジデント・アンド・フェローズ・オブ・ハーバード・カレッジ | ドープされた細長い半導体、そのような半導体の成長、そのような半導体を含んだデバイス、およびそのようなデバイスの製造 |
JP2004193423A (ja) * | 2002-12-12 | 2004-07-08 | Nichicon Corp | 電解コンデンサの駆動用電解液 |
JP2004207739A (ja) * | 2002-12-23 | 2004-07-22 | Samsung Electronics Co Ltd | ナノドットを有するメモリ製造方法 |
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JP2011077465A (ja) * | 2009-10-02 | 2011-04-14 | Nec Corp | 記憶装置、及び記憶装置の動作方法 |
JP2013222784A (ja) * | 2012-04-16 | 2013-10-28 | Nihon Univ | 抵抗変化型不揮発性メモリおよびその製造方法 |
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JPWO2006129367A1 (ja) | 2008-12-25 |
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