WO2006008736A1 - Fabrication de composants et de circuits electriques par depot electrophoretique selectif (s-epd) et transfert - Google Patents

Fabrication de composants et de circuits electriques par depot electrophoretique selectif (s-epd) et transfert Download PDF

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Publication number
WO2006008736A1
WO2006008736A1 PCT/IL2005/000763 IL2005000763W WO2006008736A1 WO 2006008736 A1 WO2006008736 A1 WO 2006008736A1 IL 2005000763 W IL2005000763 W IL 2005000763W WO 2006008736 A1 WO2006008736 A1 WO 2006008736A1
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WIPO (PCT)
Prior art keywords
film
dielectric
produced
conductive
green
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PCT/IL2005/000763
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English (en)
Inventor
Assaf Thon
Martin Zarbov
Liat Shemesh
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Cerel (Ceramic Technologies) Ltd.
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Publication of WO2006008736A1 publication Critical patent/WO2006008736A1/fr

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    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D13/00—Electrophoretic coating characterised by the process
    • C25D13/02—Electrophoretic coating characterised by the process with inorganic material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/207—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a prefabricated paste pattern, ink pattern or powder pattern
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/01—Manufacture or treatment
    • H10N30/07—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base
    • H10N30/074—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing
    • H10N30/077—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing by liquid phase deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/01—Manufacture or treatment
    • H10N30/08—Shaping or machining of piezoelectric or electrostrictive bodies
    • H10N30/081—Shaping or machining of piezoelectric or electrostrictive bodies by coating or depositing using masks, e.g. lift-off
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/10—Inductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20—Resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1333—Deposition techniques, e.g. coating
    • H05K2203/135—Electrophoretic deposition of insulating material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60—Forming conductive regions or layers, e.g. electrodes

Definitions

  • the present invention relates to methods of manufacturing high density interconnects, electrical passive components (such as resistors, capacitors, transmission lines and inductors) and circuits on dielectric carriers. More particularly, the present invention relates to the manufacture of electrical components and circuits by electrophoretic deposition (EPD). Moreover, the invention relates to devices using such electrical passive components manufactured totally or partially by EPD, and to methods of making such electrical passive components and circuits using EPD with dielectric carriers.
  • EPD electrophoretic deposition
  • Functional systems or subsystems based on electronics usually include several semiconductor Integrated Circuits (ICs, or "chips").
  • ICs semiconductor Integrated Circuits
  • electronic systems include electrical connections between the ICs, transmission lines, antennae, and additional passive elements, such as resistors, capacitors, and inductors. Some or all of these components, have to be mounted on an insulating board, or integrated on a dielectric substrate.
  • additional passive elements such as resistors, capacitors, and inductors.
  • the printed wiring boards are constructed from reinforced organic dielectric sheets, with copper metallization.
  • the copper metal film is patterned by photolithographic methods. Copper-dielectric layers are then stacked and laminated under heat and pressure. Holes are then drilled in the laminated composite and plated to produce a thin copper film in the hole walls.
  • the copper plated into the holes serve as electrical contacts to copper traces on the inner layers of the laminate, and also provide for an access to various levels of metal interconnects. Additional treatments make the whole composite assembly suitable for soldering the pins of ICs, and the contacting wires of individual passive electrical components.
  • Hybrid electronic packages using printed wiring boards are often referred to as chip-on-board (COB) assemblies or laminated multi-chip modules (MCM-L).
  • COB chip-on-board
  • MCM-L laminated multi-chip modules
  • LTCC Low Temperature Co-fired Ceramic
  • LTCC based technology individual layers of metals or insulators are deposited on a green LTCC tape by screen printing. These layers will be referred to as functional layers, being the constituents of the electrical components.
  • the material to be printed to form the functional layers is referred to as an ink or paste.
  • the ink contains three components: a functional phase which determines the electrical properties of the fired film, a binder which provides adhesion between the fired film and the substrate, and the solvent or dispersion medium that serves as the vehicle which establishes the printing characteristics.
  • the functional phase may be gold, silver, copper, palladium- silver, platinum-silver, or other suitable metals.
  • Dielectric pastes may be applied by screen printing, but screen printed parallel capacitors are not widely used.
  • the pattern definition is achieved by pressing a thin metal screen against the tape.
  • the screen has a pattern of open and filled holes which correspond to the pattern of ink that is to be printed on the tape.
  • the screen is brought into close proximity with the substrate, and the paste is applied on the screen.
  • a rubber squeegee then forces the paste to flow into the open holes in the screen.
  • the paste sticks to the surface, fills the openings in the screen, and passes through the mesh to cover the substrate only in the regions of open holes.
  • the screen is then separated from the substrate leaving the paste adhering to the substrate in a pattern pre-defined by the screen.
  • Another method to deposit thick films onto a ceramic substrate is by Ink-jet printing.
  • ink-jet printing denominated the "drop-on- demand mode"
  • the fluid containing the material to be deposited is confined in a dispenser, and a volumetric change in the fluid is produced either by a piezoelectric displacement, by heating, or by other methods.
  • the dispenser has a small orifice.
  • the volumetric change produces a pressure transient causing a drop of ink to be ejected through the orifice.
  • the drop is created only when desired and has a lateral dimension comparable to the diameter of the orifice.
  • Available ink-jet printing technology can produce drops as small as 50 micrometers in diameter, and by using certain fluids in specific cases, down to 20 micrometer. The drops are dispensed serially, but an array of dispensers can be used to increase the printing speed.
  • ceramic green tape After several layers of ceramic green tape have been covered by functional layers, they may be stacked together, pressed, and fired at elevated temperatures to form a multi-layer laminate.
  • Via-holes are formed by mechanically punching holes in the tape which are then filled with a particular paste.
  • This paste contains a powder that forms an electrical connection when sintered, or an embedded capacitor between two layers of the laminate.
  • Cost reduction and increases in functionality of electronic packages are strong motives driving current trends towards reduction in size of the assembly.
  • a further motivation for size reduction is the desire to produce electrical circuits operating at high radio frequencies, in the range of 2 to 5 GHz, and above 5 GHz.
  • This reduction in the size of the electronic package is achieved by reducing the minimal size of the patterns, primarily the thickness and lateral width of the conducting lines, and the spacing between vicinal parallel lines.
  • the narrowest lines and minimal spacing between the lines are in the range of 100 micrometers, or more, although in certain cases, 50 micrometer wide lines have been demonstrated.
  • Some alternative technologies such as laser direct write of the functional layers, or photolithographic patterning on the green tape have been proposed and demonstrated, these methods can provide a better resolution but their use may compromise the cost-effectiveness of fabrication.
  • the present invention makes possible an alternative method to form a green film in the form of fine lines and passive electrical elements and circuits on a dielectric tape, and in particular, on a ceramic tape such as the LTCC.
  • This alternative method according to the present invention, has the capability to produce features of smaller dimensions (and therefore improved resolution) cost effectively and with improved uniformity in the properties of said green film.
  • This said alternative method is based on electrophoretic deposition (EPD).
  • EPD is used to form thin or thick films on the surface of a conducting substrate, by depositing material from a suspension of particles in the size range between 4 micrometer and a few nanometer (the EPD suspension or dispersion) in a specially prepared "liquid medium” (the EPD medium).
  • the particles in the suspension are electrically charged (positively or negatively), and the suspension placed between a pair of electrical plates (the electrodes), to which an electrical voltage is applied by an external electrical circuit.
  • the potential difference between the electrodes causes charged particles in the medium to migrate towards the electrode of opposite polarity.
  • the deposited film can be dense, or porous, with the option to control the packing density by adjusting the EPD parameters.
  • This specific processing technique relates to the teaching of, for example, U.S. Patents Nos. 5,919,347, 6,059,949, 6,127,283, 6,410,086, and 6,479,406, the entire disclosures of which are hereby incorporated by reference.
  • EPD Electrophoretic Deposition - A Review
  • M.S.J. Gani published in “Industrial Ceramics” Vol. 14, pages 163-174 (1994)
  • An additional article describing the mechanisms involved in EPD is "Electrophoretic Deposition, Mechanics, Kinetics, and Applications to Ceramics", by P. Sarkar and P.S. Nicholson, published in "Journal of American Ceramics Society” Vol. 79, pages 1987-2002 (1996).
  • One feature of the EPD process, important for the realization of the present invention is that in the process of packing the charged particles in the deposited film at the deposition electrode, they neutralize their charge at the surface of the electrode, and an electrical current is established. The electrical current flows locally at the surface of the electrode, so if a certain portion of the surface is blocked by an insulating film, then current can not be established in this blocked portion, and EPD will not occur in this region.
  • the EPD films In electronic printed board applications the EPD films have to be provided on an insulating substrate, such as a ceramic or plastic tape where they constitute passive electronic components, such as conductive wires, or capacitors (metal-dielectric-metal composites), or inductors (conducting coils).
  • an insulating substrate such as a ceramic or plastic tape where they constitute passive electronic components, such as conductive wires, or capacitors (metal-dielectric-metal composites), or inductors (conducting coils).
  • the product considered is an EPD film having a certain geometrical shape (lines, squares, circles, spirals, etc), in which the minimum lateral dimension is in the range of 5 to 100 micrometers, and more specifically between 10 and 50 micrometers, with minimum thickness in the range of about 1 micrometer but typical thickness in the range of 5 to 25 micrometers.
  • the present invention is related to methods in which the pattern definition is performed simultaneously with the EPD process. This process, will be referred to hereinafter as "Selective EPD”. Subsequent to the deposition of a selective EPD film on a conductive substrate, the green patterned film might be transferred to a dielectric substrate.
  • the present invention contemplates, in accordance with at least one presently preferred embodiment, a method to perform electrophoretic deposition on a conductive substrate that has been previously prepared in such a way that electrochemical deposition is possible only on selected areas of said conductive substrate.
  • the method is herein defined as selective- electrophoretic deposition.
  • the present invention also contemplates, in accordance with at least one presently preferred embodiment, a method to perform selective electrophoretic deposition by using a pre-patterned electrode.
  • the present invention also contemplates, in accordance with at least one presently preferred embodiment, a single or multiple component dielectric tape with a single or multiple green patterned films or layers deposited on it, produced by selective electrophoretic deposition.
  • the present invention also contemplates, in accordance with at least one presently preferred embodiment, a method to fabricate a pre-patterned electrode for electrophoretic deposition using conventional micro-fabrication methods.
  • the present invention also contemplates, in accordance with at least one presently preferred embodiment, a single or multiple component dielectric tape with a single or multiple films or layers deposited on it, where said films or layers were produced by selective electrophoretic deposition on a pre-patterned electrode and transferred to a dielectric tape.
  • the present invention also contemplates, in accordance with at least one presently preferred embodiment, a single or multiple component dielectric tape with electronic components produced by selective electrophoretic deposition and transfer.
  • the present invention also contemplates, in accordance with at least one presently preferred embodiment, a laminate of several tapes in which single or multiple component dielectric tapes with a single or multiple films or layers deposited on them were fabricated by selective electrophoretic deposition and transfer.
  • the present invention also contemplates, in accordance with at least one presently preferred embodiment, a laminate of several tapes in which a single or multiple films or layers deposited on them constitute electrical components or circuits, and were fabricated by selective electrophoretic deposition and transfer.
  • the invention provides a method for forming a green patterned film on the surface of a conductive or semiconducting substrate.
  • the method comprises the steps of:
  • the green patterned film formed according to the invention is selected from the following group:
  • a conductor including but not limited to silver, gold, aluminum, copper, platinum, titanium, or a conducting polymer
  • a dielectric including but not limited to barium titanate
  • the green film of the invention can be a multi-layer composed of conductors and dielectrics.
  • the conducting or semiconducting substrate can be a silicon substrate or a glass, quartz, or sapphire carrier covered with a thin conducting film.
  • the thin conducting film can be Indium Tin Oxide (ITO).
  • the invention provides a single or multiple -layer functional film deposited on a substrate, in which at least one layer of the functional film is in the form of a fine pattern, produced by the method of the invention.
  • the invention provides an electronic component formed by single or multiple films on the surface of a conductive or semiconducting substrate, produced by the method of the invention.
  • the electronic component is selected from:
  • the invention provides a radio-frequency (RF) component produced by the method of the invention and formed by single or multiple films on the surface of a conductive or semiconducting substrate.
  • the RF component is selected from: (a) Microstrip transmission lines (b) Couplers
  • the invention provides electrical interconnects between electronic components and a piezoelectric component both formed by single or multiple films on the surface of a conductive or semiconducting substrate produced by the method of the invention.
  • the piezoelectric component is selected from sensors or actuators.
  • the invention provides a functional electrical circuit or part of a functional electrical circuit formed by electronic components and electrical interconnects formed by single or multiple films on the surface of a conductive or semiconducting substrate produced by the method of claim 1.
  • the invention provides a method for preparing the surface of a conductive or semiconducting substrate for the selective electrochemical coating to form a green film in selected areas on said surface.
  • the method of the invention comprises the steps of:
  • the conducting or semiconducting substrate can be a silicon substrate
  • the insulating film can be a Silicon- dioxide layer formed by oxidation of the silicon surface
  • the etching is performed by:
  • the method of the invention for forming a green patterned film on the surface of a conductive or semiconducting substrate can further comprise the step of subsequently transferring the green patterned film to a dielectric tape.
  • the transfer method comprises the steps of:
  • Embodiments of the method of the invention containing the above additional step can further comprise the steps of:
  • the dielectric tape can be a green Low Temperature Cofired Ceramic tape or an organic polymer tape or a plastic sheet.
  • the Low Temperature Cofired Ceramic can be sintered.
  • the green patterned film can be selected from:
  • a conductor including but not limited to silver, gold, aluminum, copper, platinum, titanium, and a coducting polymer
  • a dielectric including but not limited to barium titanate
  • a multi-layer composed by a piezo-electric material and a conductor.
  • the conducting or semiconducting substrate can be a silicon wafer.
  • the invention provides a single or multiple green patterned film, produced by the method of the invention comprising the step of subsequently transferring the green patterned film to a dielectric tape and deposited on a dielectric tape, in which at least one deposited film is in the form of a fine pattern.
  • the invention provides a laminate of dielectric tapes, which includes a single or multiple green patterned film formed on one or on several of the constituent dielectric tapes, produced by the method of the invention comprising the step of subsequently transferring the green patterned film to a dielectric tape, in which at least one deposited film is in the form of a fine pattern.
  • the invention provides electronic components formed by single or multiple films on a dielectric tape produced by the method of the invention comprising the step of subsequently transferring the green patterned film to a dielectric tape.
  • the electronic components are selected from:
  • the invention provides Radio-frequency (RF) components formed by single or multiple films on a dielectric, produced by the method of the invention comprising the step of subsequently transferring the green patterned film to a dielectric tape.
  • RF components are selected from:
  • the invention provides Piezoelectric components formed by single or multiple films on a dielectric tape produced by the method of the invention comprising the step of subsequently transferring the green patterned film to a dielectric tape.
  • the piezoelectric components can be sensors or actuators.
  • the invention provides a laminate of dielectric tapes that includes electronic components formed by a single or multiple film deposited on a single or several of the constituent dielectric tapes, in which at least one deposited film is in the form of a fine pattern, produced by the method of the invention comprising the step of subsequently transferring the green patterned film to a dielectric tape.
  • the invention provides electrical interconnects between electronic components formed by single or multiple films on a dielectric tape produced by the method of the invention comprising the step of subsequently transferring the green patterned film to a dielectric tape,.
  • the invention provides a laminate of dielectric tapes with electrical interconnects formed by a single or multiple film deposited on one or on several of the constituent dielectric tapes, in which at least one deposited film is in the form of a fine pattern, produced by the method of the invention comprising the step of subsequently transferring the green patterned film to a dielectric tape.
  • the invention provides a functional electrical circuit, or part of a functional electrical circuit formed by electronic components and electrical interconnects formed by single or multiple films on a dielectric tape produced by the method of the invention comprising the step of subsequently transferring the green patterned film to a dielectric tape,.
  • the invention provides a laminate of dielectric tapes with a functional electrical circuit or part of a functional electrical circuit formed by a single or multiple film deposited on one or on several of the constituent dielectric tapes, including at least one deposited film in the form of a fine pattern, produced by the method of the invention comprising the step of subsequently transferring the green patterned film to a dielectric tape.
  • FIG. IA schematically illustrates a cross section of an exemplary electrophoretic deposition bath, for uniform cathodic deposition, according to the prior art.
  • FIG. IB illustrates a cross section of an exemplary electrophoretic deposition bath, for selective cathodic deposition, by the use of a cathode with a patterned insulating film.
  • FIG. 2A shows a cross section of a conducting or semiconducting electrode including regions on its surface covered with an insulating thin film, and other regions where the surface of the electrode is exposed for selective electrophoretic deposition, in accordance with the invention.
  • FIG. 2B is an isomeric view of an electrode for selective electrophoretic deposition with an exemplary patterned insulating film, in accordance with the invention.
  • FIG. 3 schematically shows an exemplary electrophoretic deposition bath designed for improved capability for control of the conditions of selective EPD.
  • FIG. 4 schematically shows an exemplary jig for transfer of the patterned green film from the pre-patterned electrode to a dielectric tape.
  • FIG. 5 illustrates a cross section of a dielectric laminate with
  • FIG. 6 is a micrograph of an exemplary implementation of a Silicon-
  • FIGS. 7A and 7B are micrographs of an exemplary implementation
  • FIG. 8 is a micrograph of an exemplary green patterned film formed
  • the present invention relates to the formation of films or layers by using the
  • EPD is a process in which electrostatically charged particles
  • positively charged particles are
  • a negatively charged electrode a Cathode
  • FIG. IA shows schematically a conventional EPD cell 10 where a container 11 contains the EPD suspension 20.
  • An electrical power supply 30
  • a negative electrode (the cathode) 31 is connected to a negative electrode (the cathode) 31 and a positive electrode
  • the two electrodes 31 and 32 are immersed in the EPD
  • FIG. IA depicts cathodic deposition, in
  • the cathode for EPD consists of a patterned conductive
  • EPD can be used to produce a continuous film or a patterned film where all
  • FIG IB by the use of a conducting electrode 31 on which an electrically
  • insulating film 50 was deposited to prevent the flow of current from the
  • FIG. 2A and FIG. 2B The insulating film 50 is patterned in such a way
  • the conducting electrode 31 can be a sheet
  • metal covered carrier such as, for example, but not limited to, a
  • insulating film 50 can be any dielectric applied by conventional coating
  • the conducting electrode 31 covered by an insulating film 50 in
  • the advantage of the use of a pre-patterned electrode for EDP is that such electrode can be produced with high perfection and high spatial resolution without compromising the cost-effectiveness of the EPD process.
  • An additional advantage is that the use of a pre-patterned electrode for EPD induces an electric current only in the exposed regions and avoids material waste by preventing deposition in undesired areas. The electrical potential of all the exposed areas is nearly the same, regardless of whether these areas spatially connected or disconnected.
  • a pre- patterned electrode fabricated by a microelectronic fabrication methodology is contemplated.
  • One possible implementation of said pre-patterned electrode fabricated by the microelectronic fabrication methodology is the following: a conducting or semiconducting substrate, or a non-conducting substrate covered by a thin conducting film, is covered with an insulating film such as silicon dioxide, silicon nitride, or silicon oxy-nitride.
  • the desired pattern for EPD is made on a photolithographic mask.
  • the substrate is coated uniformly with photo-resist by spin-coating.
  • the photo-resist coated substrate is pre-baked on a hot plate at a temperature of 90 0 C in order to evaporate the photo-resist solvent.
  • the photolithographic mask is then attached to the surface of the photo-resist covered substrate, and exposed to UV light for the period of time necessary to expose the complete thickness of the photo-resist.
  • the substrate is post-baked in a hot oven at a temperature of about 120 0 C, and developed in a developer.
  • the desired pattern on the photo-resist serves to protect the regions of the insulating film that will not be etched.
  • the substrate is subjected to an etching agent that etches away the insulating film only in the regions previously exposed in the photo ⁇ resist.
  • the photo-resist is removed by a suitable solvent.
  • Microelectronic fabrication technology is relatively expensive. If such an electrode were to be consumed for each patterned film to be made, the process would not be cost effective. However a single pre-patterned electrode can be used repetitively for the formation of many selective EPD films, as explained below, significantly reducing the impact of the cost of fabrication on the cost of the final product.
  • a method for selective EPD process is contemplated.
  • the method consists of immersing a pre-patterned electrode, and a counter electrode, in a bath filled with a suspension, better understood in conjunction with FIG IB.
  • the pre-patterned electrode 33 and the counter electrode 32 are parallel to each other.
  • the two electrodes are electrically connected to an electrical current supply 30 by electrical cables 29.
  • the suspension or dispersion of charged particles 40 is contained in the bath 20 and the charged particles can migrate by electrophoresis towards the electrode of opposite polarity.
  • FIG. IB the movement of the charged particles 40 is represented by arrows. When the charged particles reach the near proximity of the pre-patterned electrode 33, they aggregate to become part of the deposited film 42.
  • the bath 12 is herein defined as the EPD cell
  • the suspension 20 is defined as the EPD suspension
  • the material or composite to be deposited is defined as the EPD material
  • the deposited film 42 is defined as the EPD film.
  • the EPD material is usually a powder, whose size has to be at least five times smaller than the smallest feature to be created. For example, if the minimal feature has a lateral dimension of 10 micrometers, the EPD material has to be composed of particles not larger than 2 micrometers across. In order to reduce the surface roughness of the film, and to minimize thickness fluctuations, the EPD material to be used might be composed of sub-micron size particles, commonly called nano- powders.
  • a particular attribute of selective EPD is that the electrical current inside the EPD cell, and the associated electrical field are locally related to the concentration of the EPD material (usually called the "solid load" in the EPD suspension), and to the distance between the electrodes.
  • the distance between the electrodes will vary if the electrodes are not strictly parallel, so the electrodes must be kept parallel.
  • the concentration of the EPD material may also vary, as a result of slow sedimentation of the solid particles in the EPD medium due to gravitation.
  • One efficient way to control the concentration of the EPD material is to perform the EPD in a cell configuration with the electrodes horizontal and parallel to each other, the pre-patterned electrode being the upper one. In this configuration, the EPD charged particles migrate up, balancing the force of gravity and any tendency to sedimentation.
  • FIG. 3 schematically illustrates an exemplary EPD cell designed by the inventors to implement selective EPD using a pre- patterned cathode in accordance with at least one embodiment of the present invention.
  • a special electrode holder 125 made of a non-conducting material is inserted at the bottom of the cell 120 to hold the anode 132 horizontal and concentric within the cell 120.
  • the pre-patterned cathode 150 is held by a cathode holder 129 supported by supporting rods 128.
  • the cathode holder 129 and the supporting rods 128 are made of a non-conducting material.
  • the supporting rods 128 are secured to a cell cover 127 in such a way that the height of the pre-patterned cathode 150 can be adjusted at 3 points until the best conditions for selective EPD are found. Said best conditions are determined, among other factors, by the voltage supplied by the power supply 130 and by the separation distance between the anode 132 and the pre-patterned cathode 150.
  • a patterned film of some functional material such as a green film that is conducting after firing, can be produced on the pre-patterned electrode 150.
  • the EPD films In electronic printed board applications the EPD films have to be produced on a ceramic substrate where they constitute passive electronic components, such as conductive wires, or capacitors (metal-dielectric-metal composites).
  • passive electronic components such as conductive wires, or capacitors (metal-dielectric-metal composites).
  • the present invention also contemplates, in accordance with at least one presently preferred embodiment, a single or multiple component dielectric tape with a single or multiple film or layer deposited on it, where the film was produced by selective electrophoretic deposition on a pre-patterned electrode and transferred to a dielectric tape. Jn order to accomplish the process of transfer, it is recognized that the patterned film has to be detached from the pre-patterned electrode, and therefore, the adhesion of the film to the electrode has to be weak. To provide this requirement, the present invention contemplates pre-conditioning of the pre-patterned electrode with a thin sacrificial film to reduce the Van-der-Vaals binding forces between the electrode surface and the EPD film.
  • the film has to be thin enough to permit the EPD current to flow by electrical conduction, and to be resistant to the EPD medium.
  • This embodiment can be better understood in conjunction with FIG. 2A showing the thin film 56.
  • One such thin film is, for example, Pyralin PD PI-2721 or PI-2722, or PI-2723 produced and supplied by DuPont Electronics, Bartley Mill Plaza, POBox 80019, Wilmington, DE 19880-0019.
  • Pyralin can be applied to the surface of the pre-patterned electrode by spin-coating, to produce a film of several micrometers thickness. When a thinner film is needed, the Pyralin can be diluted with Pyraline Thinner Pl-2555 of the same supplier.
  • the inventors of the present invention produced a diluted mixture of Pyralin with Thinner with a ratio of 1 to 5, 1 to 10 and 1 to 30 in the process of implementing this invention. It was observed that the diluted Pyralin in the ratio 1 to 30 produced a film that does not inhibit formation of the EPD film, but that this film only adheres weakly to the pre- patterned cathode.
  • the pre-patterned cathode with the EPD film (the green tape) is brought into close proximity with a ceramic tape.
  • the surface coated with the green film has to be face to face with the surface of the tape onto which the green film has to be transferred.
  • the inventors of the present invention observed that the application of a uniform pressure on the composite, in the range of 500N/cm 2 to 10,000N/cm 2 caused the green film to remain attached to the surface of the ceramic tape, and completely detach from the electrode. In the process used to transfer the patterned film to the ceramic tape, there was no need to apply any heating to the tape or to the electrode.
  • FIG. 4 a schematic representation of an exemplary transfer jig 200 is depicted.
  • the transfer jig 200 is comprised of a lower cylinder 205 of which one surface 210 was previously machined to accommodate accurately the pre-patterned cathode 240 on which was the green patterned film 250.
  • the second part of the transfer jig 200 is a hollow cylinder 260 with internal cylindrical face 261 snuggly fitting the external cylindrical face 207 of the lower cylinder 205.
  • This provision is one possible implementation capable of ensuring strict parallelism between the internal circular base 262 of the hollow cylinder 260, and the upper circular base 210 of the lower cylinder 205.
  • a green dielectric tape 270 such as LTCC, Mylar, a flexible polymer, or any other dielectric tape, is inserted into the internal circular base 262, the lower cylinder 205 inserted into the hollow cylinder 260, until the dielectric tape 270 and the green patterned EPD film 250 approach each other. Then a force 290 is applied to produce a pressure on the internal base 262 and the upper base 210.
  • the magnitude of this pressure needed to cause the green patterned EPD film 250 be released from the cathode 240, and become attached to the dielectric tape 270 is a variable depending on the EPD film properties such as the EPD material, thickness, density, and minimal lateral dimensions of the pattern.
  • the magnitude of said pressure also depends on the dielectric tape onto which the green patterned EPD film is to be transferred. An optimal value of such pressure for each particular set of conditions can be found by experiment.
  • the advantages of this transfer process reside in the ability to perform the process while preserving the integrity of the pre-patterned electrode 240.
  • the pre-patterned electrode can thus be re-used as a template for additional selective EPD processes.
  • the patterned electrode can be fabricated with high resolution microfabrication methods without compromising the cost of the contemplated product.
  • the present invention also contemplates, in accordance with at least one presently preferred embodiment, a laminate of several tapes in which a single or multiple film deposited on the tapes constitute electrical components or circuits, and were fabricated by selective electrophoretic deposition and transfer.
  • This embodiment can be more readily understood in conjunction with the drawing depicted in FIG. 5 of a typical hybrid microelectronic assembly. It consists of a laminate of dielectric tapes 300, on which a packaged semiconductor integrated circuit (a chip) 310 has been mounted by surface mount soldering 311. Shown also schematically is an individual electrical passive component 320, mounted by surface mount soldering.
  • conducting features 330 formed on the surface of each layer of the dielectric tapes 300 constitute capacitors 350, inductors 360, and resistors 370, some of which are embedded in the laminate, others being on the surface.
  • electrical circuits are formed in conjunction with semiconductor integrated chips 310, and discrete surface mounted elements 320.
  • a pre-patterned cathode was prepared in the following way: A 2" n-type Silicon wafer was cleaned by immersing in a mixture of HFrEbO with a 1:50 ratio for 30seconds. Subsequently, the wafer was immersed in de-ionized water for 10 minutes and dried in a spinner. The clean wafer was oxidized in a dry oxidation furnace at 1050 0 C for two hours, to form a thin layer of thermal SiO 2 of about 0.7 micrometers thick.
  • a photolithographic mask containing patterns corresponding to long lines, inter-digitated electrodes, and coils, with line width/spacing of 20/20, 16/16, and 12/12 micrometer was designed.
  • Photo-resist (Kodak Z-2070) was spun on the wafers at a spinning rate of 5000 r.p.m. for 1 minute, and then pre-baked on a hot plate at 90 0 C for 3 minutes.
  • the wafer and the mask were inserted in a Mask Aligner
  • Resist removal was effected by immersing the wafer in a bath with Acetone and subjected to Ultrasonic shaking.
  • a micrograph of parts of the Silicon wafer with the patterned Si ⁇ 2 on it, constituting the exemplary implementation of a pre- patterned cathode is shown in FIG. 6.
  • the pre-patterned cathode of Example 1 was used for selective EPD of silver by the following procedure.
  • Silver-palladium powder 7102FG (purchased from Cermet Materials, Inc. 6 Meco Drive, Wilmington, DE 19804, USA) was used as the EPD material.
  • the powder was dispersed in ethyl alcohol.
  • the suspension was stabilized by the electrosteric additive poly-ethylene- imine.
  • a sonication treatment was carried out by dipping an ultrasonic head in the suspension bath. The ultrasonic head delivered 8000 Joule, and the
  • the electrodes was about 1 cm. A voltage of 30 V was supplied by the power
  • FIGS. 7A patterned cathode with the green patterned EPD film is shown in FIGS. 7A
  • the transferred green patterned EPD film is shown in FIG. 8.
  • the LTCC tape with the transferred green patterned EPD film was subsequently sintered at

Abstract

L'invention concerne un procédé de fabrication d'interconnexions à haute densité, des composants électriques passifs (par exemple résistances, condensateurs, lignes de transmission et inducteurs) et des circuits sur des supports diélectriques. Le procédé consiste à réaliser un dépôt électrophorétique (EPD) sur un substrat conducteur qui a été au préalable préparé de manière que le dépôt électrochimique ne soit possible que sur des zones choisies de ce substrat. L'invention concerne un procédé permettant de former un film cru sous la forme de lignes minces et d'éléments et de circuits électriques passifs sur la bande diélectrique et, plus précisément, sur une bande céramique telle que la céramique cocuite à basse température. Ce procédé permet de produire de manière économique des caractéristiques de plus petites dimensions (et, par conséquent, de meilleure résolution) et de meilleure uniformité au niveau des propriétés dudit film cru. L'invention concerne également des composants et circuits électriques passifs pouvant être entièrement ou partiellement fabriqués par dépôt électrophorétique sur des supports diélectriques et des dispositifs utilisant ces composants et circuits.
PCT/IL2005/000763 2004-07-22 2005-07-18 Fabrication de composants et de circuits electriques par depot electrophoretique selectif (s-epd) et transfert WO2006008736A1 (fr)

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EP1906716A2 (fr) * 2006-09-29 2008-04-02 Brother Kogyo Kabushiki Kaisha Procédé et appareil de formation de structure
WO2010052693A2 (fr) * 2008-11-05 2010-05-14 University Of Limerick Dépôt de matériaux
CN112466811A (zh) * 2020-12-28 2021-03-09 广州丝析科技有限公司 一种镀铜膜触摸屏制备方法
CN115925449A (zh) * 2022-12-30 2023-04-07 浙江朗德电子科技有限公司 一种尾气传感器芯片用功能电极的制备方法

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Cited By (10)

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Publication number Priority date Publication date Assignee Title
EP1906716A2 (fr) * 2006-09-29 2008-04-02 Brother Kogyo Kabushiki Kaisha Procédé et appareil de formation de structure
EP1906716A3 (fr) * 2006-09-29 2009-12-23 Brother Kogyo Kabushiki Kaisha Procédé et appareil de formation de structure
US8033648B2 (en) 2006-09-29 2011-10-11 Brother Kogyo Kabushiki Kaisha Pattern forming apparatus and pattern forming method
WO2010052693A2 (fr) * 2008-11-05 2010-05-14 University Of Limerick Dépôt de matériaux
WO2010052693A3 (fr) * 2008-11-05 2010-08-26 University Of Limerick Dépôt de matériaux
US8629422B2 (en) 2008-11-05 2014-01-14 University Of Limerick Deposition of materials
CN112466811A (zh) * 2020-12-28 2021-03-09 广州丝析科技有限公司 一种镀铜膜触摸屏制备方法
CN112466811B (zh) * 2020-12-28 2022-09-02 广州丝析科技有限公司 一种镀铜膜触摸屏制备方法
CN115925449A (zh) * 2022-12-30 2023-04-07 浙江朗德电子科技有限公司 一种尾气传感器芯片用功能电极的制备方法
CN115925449B (zh) * 2022-12-30 2023-11-07 浙江朗德电子科技有限公司 一种尾气传感器芯片用功能电极的制备方法

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