WO2005093796A1 - バイポーラ型半導体装置およびその製造方法 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 33
- 238000000034 method Methods 0.000 title claims description 20
- 230000008569 process Effects 0.000 title description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 113
- 239000000758 substrate Substances 0.000 claims abstract description 108
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 99
- 238000005530 etching Methods 0.000 claims abstract description 33
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 32
- 239000001257 hydrogen Substances 0.000 claims abstract description 30
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 30
- 238000005498 polishing Methods 0.000 claims abstract description 27
- 238000004519 manufacturing process Methods 0.000 claims abstract description 15
- 239000000126 substance Substances 0.000 claims abstract description 14
- 239000013078 crystal Substances 0.000 claims description 79
- 238000000407 epitaxy Methods 0.000 claims description 29
- 238000011282 treatment Methods 0.000 claims description 19
- 230000003746 surface roughness Effects 0.000 claims description 15
- 238000005229 chemical vapour deposition Methods 0.000 description 8
- 239000007789 gas Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 238000004854 X-ray topography Methods 0.000 description 6
- 239000006061 abrasive grain Substances 0.000 description 6
- 230000015556 catabolic process Effects 0.000 description 6
- 230000000052 comparative effect Effects 0.000 description 6
- 238000010438 heat treatment Methods 0.000 description 4
- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 230000007246 mechanism Effects 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 230000000644 propagated effect Effects 0.000 description 4
- 239000002002 slurry Substances 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 238000006731 degradation reaction Methods 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000002994 raw material Substances 0.000 description 3
- 238000005092 sublimation method Methods 0.000 description 3
- 238000004381 surface treatment Methods 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 241000652704 Balta Species 0.000 description 2
- ATUOYWHBWRKTHZ-UHFFFAOYSA-N Propane Chemical compound CCC ATUOYWHBWRKTHZ-UHFFFAOYSA-N 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 241000282693 Cercopithecidae Species 0.000 description 1
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- -1 aluminum ions Chemical class 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000008119 colloidal silica Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000002050 diffraction method Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 239000010419 fine particle Substances 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 1
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 102000054765 polymorphisms of proteins Human genes 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
- 239000001294 propane Substances 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000000859 sublimation Methods 0.000 description 1
- 230000008022 sublimation Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8613—Mesa PN junction diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02019—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02024—Mirror polishing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02378—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02433—Crystal orientation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02529—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
- H01L21/02661—In-situ cleaning
Definitions
- the present invention relates to a bipolar semiconductor device in which a region, such as a drift layer, where electrons and holes recombine when energized is formed by a silicon carbide epitaxial layer in which the surface force of a silicon carbide substrate is also grown.
- a region such as a drift layer
- the present invention relates to a technology for reducing the dislocation density of a basal plane in an epitaxial layer and improving forward voltage degradation over time.
- SiC Silicon carbide
- SiC has a dielectric breakdown field strength of about 10 times that of silicon (Si), and also has excellent physical properties such as thermal conductivity, electron mobility, and band gap. Because it is a semiconductor, it is expected to be a semiconductor material that achieves a dramatic improvement in performance compared to conventional s-related power semiconductor devices.
- SiC and 6H-SiC single crystal substrates up to 3 inches in diameter have been marketed, and Schottky barrier diodes (SBDs), high voltage pn diodes, which greatly exceed the performance limits of Si,
- SBDs Schottky barrier diodes
- MOSFETs MOSFETs have been reported one after another, and high-performance SiC devices are being developed.
- Bipolar devices include pn diodes, bipolar junction transistors (BJTs), thyristors, GTO thyristors, and IGBTs.
- This forward voltage degradation is due to the basal plane dislocation (basal plane dislocation), which is a type of crystal defect. plane dislocation) is thought to be a factor.
- Basal plane dislocation basal plane dislocation
- This basal plane dislocation force is converted into stacking faults by the recombination energy of electrons and holes generated during conduction, and the area of stacking faults increases with the increase in conduction time. Since the stacking fault region acts as a high-resistance region when energized, the forward voltage of the bipolar element increases as the stacking fault area increases. When the forward voltage increases, the loss of the element increases, which causes an increase in loss and a decrease in the reliability of power converters such as inverters using this element.
- polymorphisms such as 3C—SiC, 4H—SiC, and 6H—SiC in SiC single crystals, but in the development of power semiconductors, the anisotropy that increases dielectric breakdown strength and mobility is high. Relatively small 4H—SiC is mainly used.
- crystal planes on which epitaxial growth is performed include (0001) Si plane, (000-1) C plane, (11-20) plane, (01-10) plane, and (03-38) plane.
- a SiC single-crystal substrate on which an epitaxial single-crystal film is grown is obtained by slicing a barta crystal obtained by sublimation or chemical vapor deposition (CVD), and polishing the surface to, for example, the same strength as SiC. What is mechanically polished with a cannonball is used.
- the (0001) plane of the SiC single crystal substrate obtained by the sublimation method or the CVD method basal plane dislocation exists at high density.
- the C-axis force is in the [11-20] direction or is several degrees in the [01-10] direction (off-angle and
- a tilted crystal plane is used, a basal plane dislocation existing in the (000 1) plane in the SiC single crystal substrate appears on the surface of the SiC single crystal substrate.
- the basal plane dislocation density on the substrate surface is also affected by the crystal quality. According to Typically, it is 10 2 —10 4 pieces / cm 2 .
- the remaining Suretsu is converted into a threading edge dislocation 4 and propagates to the epitaxy layer 2.
- 5 is the (0001) Si plane
- 0 is the off angle.
- the region where basal plane dislocations are converted to stacking faults during energization is where electrons and holes are regenerated during energization. This is the area where bonding occurs. Most of the region where electrons and holes recombine is in the drift layer of the bipolar device, and part of the region leaks out to the injection layer side near the interface between the drift layer and the injection layer. In order to suppress the deterioration of the forward voltage due to energization, it is considered effective to reduce the basal plane dislocation density in these regions.
- Patent Document 1 International Publication WO03Z038876 pamphlet
- Non-Patent Document 1 "Materials Science Forum" 2002, Vol. 389-393, p. 1259-1264
- the present invention has been made in order to solve the above-mentioned problems in the prior art, and reduces the propagation of basal plane dislocations to a SiC single crystal substrate epitaxial layer.
- An object of the present invention is to provide a bipolar semiconductor device in which directional voltage deterioration is suppressed and a method for manufacturing the same.
- the inventor of the present invention performed hydrogen etching on the surface of the substrate under predetermined conditions before epitaxially growing SiC on the SiC single crystal substrate.
- the inventors have found that the basal plane dislocation is significantly reduced, and have completed the present invention.
- a substrate surface force having a surface roughness Rms of 0.1 to 0.6 nm by the above-described processing, and epitaxial growth is performed has very little basal plane dislocation.
- the bipolar semiconductor device of the present invention is a bipolar semiconductor device in which at least a part of a region where electrons and holes recombine when energized is formed by a silicon carbide epitaxial layer grown by the surface force of a silicon carbide substrate.
- a surface roughness Rms of a surface of the silicon carbide substrate on which epitaxial growth is performed is 0.1 to 0.6 nm.
- the bipolar semiconductor device of the present invention is characterized in that the off angle of the silicon carbide substrate is 114 °.
- the bipolar semiconductor device of the present invention is characterized in that the crystal plane of the silicon carbide substrate on which the epitaxial growth is performed is a (000-1) C plane and the off angle is 118 °.
- the method for manufacturing a bipolar semiconductor device according to the present invention is characterized in that at least a part of a region where electrons and holes recombine when energized is formed by a silicon carbide epitaxial layer grown from the surface of a silicon carbide substrate.
- a method for manufacturing a semiconductor device comprising:
- the epitaxy layer is formed by epitaxially growing silicon carbide from the treated surface.
- a method for manufacturing a semiconductor device comprising:
- the surface area of the treatment is also formed by epitaxially growing silicon carbide to form the epitaxy layer.
- the method of manufacturing a bipolar semiconductor device of the present invention is characterized in that the surface force of a silicon carbide substrate having an off angle of 114 ° is also epitaxially grown.
- a method of manufacturing a bipolar semiconductor device according to the present invention is characterized in that a (000-1) C surface force of a silicon carbide substrate having an off angle of 118 ° is also epitaxially grown.
- the bipolar semiconductor device of the present invention has very little basal plane dislocation in the epitaxial layer.
- FIG. 1 is a diagram for explaining how a basal plane dislocation propagates a SiC single crystal substrate force to an epitaxial layer.
- FIG. 2 is a schematic configuration diagram of a CMP apparatus.
- FIG. 3 is a cross-sectional view showing an example of a pn diode formed using a SiC substrate with an epitaxial film whose surface has been treated by the method according to the present embodiment.
- FIG. 4 is a graph showing the measurement results of the basal plane dislocation density in the epitaxial films of the example and the comparative example.
- FIG. 5 is a diagram illustrating a mechanism of suppressing basal plane dislocation to an epitaxy film in the present invention.
- the SiC single crystal substrate a substrate obtained by slicing a Balta crystal obtained by the sublimation method or the CVD method is used.
- the sublimation method improved Rayleigh method
- To grow balta The obtained ingot is sliced to a predetermined thickness so that a desired crystal plane is exposed, and the surface is polished with the use of abrasive grains harder than, for example, SiC, with the progress of polishing.
- the polishing process is carried out while changing the abrasive grains into fine abrasive grains, and a mirror-like smoothing is performed.
- Examples of the crystal type of the SiC single crystal include 4H—SiC, 3C—SiC, 2H—SiC, 6H—SiC, and 15R—SiC, and anisotropy with high breakdown strength and mobility. 4H—SiC is preferably used, and the basal plane dislocation density in the epitaxy layer is significantly reduced by the hydrogen etching treatment described later or the combined use of the chemical mechanical polishing treatment and the hydrogen etching treatment.
- Crystal planes on which epitaxial growth is performed include, for example, (OOOOl) Si plane, (000-1) C plane, (
- the substrate force is extremely reduced in the propagation of basal plane dislocations to the epitaxial layer.
- the crystal plane for epitaxial growth on the substrate is the (000-1) C plane
- the propagation of basal plane dislocations to the epitaxial layer is reduced even at a relatively large off angle.
- the propagation of basal plane dislocations from the substrate to the epitaxial layer is extremely reduced within the range of the off angle of 118 °!
- the surface of this SiC single crystal substrate is treated by hydrogen etching.
- Hydrogen etching can be performed, for example, in a reactor for epitaxial growth. After introducing the substrate into the furnace, hydrogen gas or hydrogen gas added with hydrogen chloride is supplied into the furnace at a rate of 100 LZmin, preferably 5-20 LZmin, and a gas atmosphere of 10-250 Torr, preferably 20-50 Torr is supplied. Under the atmosphere, 1300-1700. C, preferably 1350-1450. Treat at a temperature of C for about 10-60 minutes.
- the release rate of Si is mainly determined by the evaporation rate
- the release rate of C is mainly determined by the reaction rate with hydrogen.
- Etching at a temperature and pressure at which the speeds are almost equal will greatly reduce the basal plane dislocation density of the SiC epitaxial layer grown from the substrate surface.
- CMP Chemical Mechanica
- the basal plane dislocation density of the epitaxial layer becomes extremely low.
- Fig. 2 shows the schematic configuration of a general CMP system.
- the SiC single crystal substrate 14 is fixed to the polishing head 11, and the polishing is performed while the polishing slurry 13 is dropped from the slurry supply nozzle 15 while the SiC single crystal substrate 14 is pressed and pressed against the polishing pad 13 on the turntable 12.
- One or both of the pad 13 and the SiC single crystal substrate 14 are rotated by a rotary motor, and polishing is performed by chemical and mechanical actions.
- Abrasive slurries usually also have the power of solvent, cannonball and additives.For example, silica-based fine particles such as colloidal silica are dispersed in water as abrasive particles, and the necessary additives are added and the pH is adjusted. Is done.
- SiC is epitaxially grown on the treated surface by CVD.
- the raw material gas propane, which is a raw material gas of C, and silane, which is a raw material gas of Si, are used.
- hydrogen is used as a carrier gas, and nitrogen or trimethylaluminum is used as a dopant gas.
- SiC is epitaxially grown at a growth rate of 2-20 mZh. As a result, SiC of the same crystal type as the substrate grows in a step flow.
- a vertical hot wall furnace can be used.
- a water-cooled double cylindrical tube made of quartz is installed. Inside the water-cooled double cylindrical tube, a cylindrical heat insulating material, a hot wall made of graphite, and a SiC single tube are installed.
- a wedge-shaped susceptor is provided to hold the crystal substrate in the vertical direction.
- a high-frequency heating coil is installed around the outside of the water-cooled double cylindrical tube. The high-frequency heating coil heats the hot wall with high-frequency induction, and the radiant heat from the hot wall heats the SiC single crystal substrate held by the wedge-shaped susceptor. I do.
- the SiC grows epitaxially on the surface of the SiC single crystal substrate.
- a bipolar element is manufactured using the thus-epitaxially-coated SiC.
- the bipolar element include a pn diode, a bipolar junction transistor (BJT), a thyristor, a GTO thyristor, and an IGBT.
- the region where electrons and holes recombine when energized such as for example, the drift layer or the injection layer near the interface between the drift layer and the injection layer is formed of the above-mentioned epitaxial layer.
- the basal plane dislocation density of the epitaxial layer is very low. For this reason, the generation of stacking faults, which are converted into the basal plane dislocation force by energization, is suppressed, and the deterioration of the forward voltage over time is improved.
- the surface roughness R ms is made 0.1-0.6 nm, preferably 0.1-0.3 nm by the above-described processing, the base surface dislocation is very small in the case of epitaxy growth from the substrate surface.
- an imaging force acts between a dislocation existing in a crystal and a crystal surface.
- This mirror image force can be calculated by considering the mirror image dislocation.
- the mirror surface force increases as the distance d to the dislocation decreases as the crystal surface force decreases.
- the negative value of the image force indicates that an attractive force acts between the dislocation and the surface.
- the basal plane dislocations existing in the SiC single crystal as the basal plane dislocations approach the surface, they gradually become perpendicular to the surface. I power comes to work.
- the basal plane dislocation is converted into a threading edge dislocation that propagates in a direction substantially perpendicular to the surface (a direction parallel to the C axis).
- the basal plane dislocation 41 does not change its direction in a direction substantially perpendicular to the crystal surface (the C-axis direction), and remains oriented in a direction substantially parallel to the crystal surface to form a basal plane dislocation 41 inside the epitaxial single crystal film. Is propagated.
- the state of the atomic steps on the crystal surface of the SiC single crystal substrate during epitaxial growth changes depending on the surface treatment of the SiC single crystal substrate.
- bunching of atomic steps on the substrate surface is suppressed.
- the presence or absence of bunching of atomic steps on the crystal surface and the size of the bunching step can be macroscopically measured as surface roughness Rms.However, by performing these surface treatments before forming an epitaxial film, the surface roughness can be measured. Rms is reduced.
- the propagation of the basal plane dislocation to the epitaxy film becomes critical. It is thought to be less. Further, when there are many crystal imperfections on the substrate surface, new basal plane dislocations may be generated during epitaxy growth that propagates from the substrate to the epitaxy film. . In this case, the density of the basal plane dislocations in the epitaxial film is the sum of the density of the substrate propagating in the epitaxial film and that newly generated during the epitaxial growth.
- Crystal imperfections on the substrate surface can be removed by performing chemical mechanical polishing or hydrogen etching under appropriate conditions and flattening the substrate surface. That is, by performing chemical mechanical polishing or hydrogen etching treatment to reduce the surface roughness of the substrate surface, the density of the basal plane dislocation generated during the epitaxial growth can be reduced.
- the epitaxial growth is performed from the substrate surface having the surface roughness Rms of 0.6 nm or less, particularly 0.3 nm or less, the propagation of the basal plane dislocation to the epitaxy film is critically small.
- it is considered that the density of the newly formed basal plane dislocations during epitaxy growth is also reduced, and as a result, an epitaxy film having an extremely low basal plane dislocation density can be obtained.
- the smaller the off angle ⁇ the closer the basal plane dislocation 41 is to the crystal surface, and the smaller the off angle ⁇ , the smaller the unit angle acting on the basal plane dislocation 41.
- Mirror image power is increased.
- the smaller the off angle ⁇ the greater the proportion of basal plane dislocations that are converted to threading edge dislocations during epitaxial growth.
- Epitaxial growth on a (OOOl) Si plane or a (000-1) C plane of a SiC single crystal substrate becomes difficult if the off angle is too small, so practically an off angle of 1 ° or more is required. Required.
- a substrate cut at an off angle of 111 °, preferably 118 °, and particularly preferably 114 ° is used, the propagation of the basal plane dislocation of the substrate force is small. An epitaxy layer is obtained.
- FIG. 3 is a cross-sectional view showing an example of a pn (pin) diode which is one of the bipolar elements.
- An ingot grown by the Rayleigh method was sliced at a predetermined off-angle, and an n-type 4H—SiC substrate whose surface was mirror-polished was treated with hydrogen etching and silicon dioxide mechanical polishing under the above conditions to obtain a SiC single crystal substrate 21
- a nitrogen-doped n-type SiC layer and an aluminum-doped p-type SiC layer are successively epitaxially grown on the (carrier density 8 ⁇ 10 18 cm— 3 , thickness 400 ⁇ m) by CVD method.
- the drift layer 23 which is an n-type growth layer, has a donor density of 5 ⁇ 10 14 cm 3 and a thickness of 40 ⁇ m.
- the P-type growth layer includes a p-type junction layer 24 and a p + -type contact layer 25.
- the p-type junction layer 24 has an acceptor density of 5 ⁇ 10 17 cm— 3 and a thickness of 1.5 ⁇ m.
- the p + -type contact layer 25 has an ackceptor density of 1 ⁇ 10 18 cm— 3 and a thickness of 0.5 ⁇ m.
- JTE26 junction termination extension
- JTE26 has a total dose of 1.2 x 10 13 cm— 2 , a width of 250 m, and a depth of 0.
- Heat treatment at 1700 ° C to activate. 27 is a thermal oxidation film formed after activating the implanted ions.
- Reference numeral 28 denotes a force source electrode formed by evaporating Ni (350 nm in thickness) on the lower surface of the SiC single crystal substrate 21, and 29 denotes Ti (350 nm in thickness) and A1 on the p + -type contact layer 25.
- This is an anode electrode formed by depositing films (thickness 100 nm) 29a and 29b, respectively. These electrodes are heat treated at 1000 ° C for 20 minutes after deposition to form ohmic electrodes.
- the drift layer 23 is composed of an epitaxial film in which the surface force of the SiC single crystal substrate 21 that has been processed by hydrogen etching and mechanical polishing is also grown. , The basal plane dislocation density is low. For this reason, conversion into stacking faults due to recombination energy of electrons and holes during energization is suppressed, and the life of the device can be extended.
- the ingot grown by the modified Rayleigh method was sliced in the off direction [11 20] at an off angle of 8 °, and the surface was mirror-finished by mechanical polishing with abrasive grains.
- Etching was performed on the SiC (0001) substrate at a temperature of 1400 ° C and a pressure of 30 Torr for 40 minutes while supplying hydrogen gas at a flow rate of lOLZmin.
- the surface roughness Rms of the substrate surface after the treatment was measured using an atomic force microscope SPI3800N manufactured by Seiko Instruments Inc., it was 0.25 nm (area of 10 m ⁇ 10 m).
- SiC was epitaxially grown by a CVD method.
- Epitaxial films with a thickness of 60 ⁇ m were formed by supplying a pan (8 ccZmin), silane (30 ccZmin) and hydrogen (lOLZmin) while supplying step flow at a temperature of 1545 ° C and a pressure of 42 Torr for 4 hours.
- the basal plane dislocation density in the epitaxial film was measured by molten KOH etching and X-ray topography, and the average value was 440 cm ⁇ 2 .
- An SiC single crystal substrate with an epitaxial film was obtained in the same manner as in Example 1 except that the substrate surface was treated by chemical mechanical polishing before performing the hydrogen etching treatment.
- the surface roughness Rms of the substrate surface after the treatment was measured in the same manner as in Example 1, and was found to be 0.20 ⁇ (10 ⁇ ⁇ X 10 m region).
- the basal plane dislocation density in the epitaxy film was measured by molten KOH etching and X-ray topography, and the average value was 60 cm ⁇ 2 .
- An ingot grown by the modified Rayleigh method was sliced in the off direction [11 20] at an off angle of 8 °, and an n-type 4H—SiC (000-1) substrate, whose surface was mirror-finished by mechanical polishing with abrasive grains, was obtained.
- an epitaxy film was grown.
- the surface roughness Rms of the substrate surface after the treatment was measured by the same method as in Example 1, and found to be 0.20 nm (10 mx 10 m area).
- the basal plane dislocation density in the epitaxial film was measured by molten KOH etching and X-ray topography, and the average value was 20 cm ⁇ 2 .
- the ingot grown by the modified Rayleigh method was sliced at an off-direction [11 20] and an off-angle of 4 °, and the surface was mirror-finished by mechanical polishing with abrasive grains. After performing the chemical mechanical polishing treatment and the hydrogen etching treatment in the same manner as in Example 2, an epitaxy film was grown.
- the surface roughness Rms of the substrate surface after the treatment was measured in the same manner as in Example 1, and was found to be 0.28 nm (10 m ⁇ m region).
- the basal plane dislocation density in the epitaxy film was measured by molten KOH etching and X-ray topography, and the average value was 20 cm ⁇ 2 .
- An SiC single crystal substrate with an epitaxial film was obtained in the same manner as in Example 1 except that the hydrogen etching treatment was not performed.
- the surface roughness Rms of the substrate surface to be epitaxially grown was measured by the same method as in Example 1, and it was 1.
- Onm. Tsu the obtained Epitaki tangential film-coated SiC single crystal substrate ⁇ Te, measurement of the basal plane dislocation density in Epitakisharu film by molten KOH etching and X-ray topography, 1700 cm 2 der ivy o
- n-type 4H—SiC substrate obtained by slicing a SiC ingot is processed by chemical mechanical polishing.
- a SiC single crystal substrate with an epitaxial film was prepared by epitaxially growing SiC by CVD. Using this, a pn diode as shown in FIG. 3 was produced, and a pn diode of Example 5 was obtained.
- an SiC single crystal substrate with an epitaxial film was prepared by epitaxially growing SiC without performing these treatments on the surface of the substrate. Using this, a pn diode as shown in Fig. 3 was produced, and a pn diode of Comparative Example 2 was obtained.
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Materials Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
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Abstract
Description
Claims
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EP05721512A EP1739726A4 (en) | 2004-03-26 | 2005-03-25 | BIPOLAR SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME |
US10/594,045 US20070290211A1 (en) | 2004-03-26 | 2005-03-25 | Bipolar Semiconductor Device and Process for Producing the Same |
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EP (1) | EP1739726A4 (ja) |
KR (1) | KR100853991B1 (ja) |
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TW200539318A (en) | 2005-12-01 |
US20070290211A1 (en) | 2007-12-20 |
KR100853991B1 (ko) | 2008-08-25 |
EP1739726A1 (en) | 2007-01-03 |
EP1739726A4 (en) | 2009-08-26 |
CN1938820A (zh) | 2007-03-28 |
KR20070029694A (ko) | 2007-03-14 |
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