WO2001099186A3 - Protection de circuits analogiques sur des substrats semi-conducteurs - Google Patents

Protection de circuits analogiques sur des substrats semi-conducteurs Download PDF

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Publication number
WO2001099186A3
WO2001099186A3 PCT/US2001/019658 US0119658W WO0199186A3 WO 2001099186 A3 WO2001099186 A3 WO 2001099186A3 US 0119658 W US0119658 W US 0119658W WO 0199186 A3 WO0199186 A3 WO 0199186A3
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
shielding
semiconductor substrates
analog circuits
region
Prior art date
Application number
PCT/US2001/019658
Other languages
English (en)
Other versions
WO2001099186A2 (fr
Inventor
Gerhard Kunkel
David Kotecki
Young Jin Park
Alois Gutmann
Jack A Mandelman
Original Assignee
Infineon Technologies Corp
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Corp, Ibm filed Critical Infineon Technologies Corp
Publication of WO2001099186A2 publication Critical patent/WO2001099186A2/fr
Publication of WO2001099186A3 publication Critical patent/WO2001099186A3/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)

Abstract

Cette invention concerne un dispositif semi-conducteur comprenant un substrat semi-conducteur dopé (102). Le dopage du substrat présente une première conductivité et comporte une région de dispositif (110) constituée près de la surface dudit substrat. Cette région dispositif comprend au moins un puits de dispositif. Un puits noyé (104) est situé dans le substrat, sous la région du dispositif. Ce puits noyé est dopé au moyen de dopants caractérisés par une seconde conductivité. Une région de tranchée (124) entoure la région du dispositif et pénètre sous la surface du substrat et va au moins jusqu'au puits noyé de sorte que la région du dispositif se trouve isolée des autres parties du substrat par le puits noyé et la région de tranchée.
PCT/US2001/019658 2000-06-20 2001-06-20 Protection de circuits analogiques sur des substrats semi-conducteurs WO2001099186A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US59711600A 2000-06-20 2000-06-20
US09/597,116 2000-06-20

Publications (2)

Publication Number Publication Date
WO2001099186A2 WO2001099186A2 (fr) 2001-12-27
WO2001099186A3 true WO2001099186A3 (fr) 2002-10-10

Family

ID=24390149

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/019658 WO2001099186A2 (fr) 2000-06-20 2001-06-20 Protection de circuits analogiques sur des substrats semi-conducteurs

Country Status (1)

Country Link
WO (1) WO2001099186A2 (fr)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60105265A (ja) * 1983-11-11 1985-06-10 Toshiba Corp 相補型半導体装置の製造方法
EP0178649A2 (fr) * 1984-10-17 1986-04-23 Hitachi, Ltd. Dispositif semi-conducteur complémentaire
US4926233A (en) * 1988-06-29 1990-05-15 Texas Instruments Incorporated Merged trench bipolar-CMOS transistor fabrication process
JPH07273184A (ja) * 1994-04-01 1995-10-20 Mitsubishi Electric Corp 半導体装置およびその製造方法
EP0817268A1 (fr) * 1996-06-27 1998-01-07 Nec Corporation Dispositif de circuit intégré semi-conducteur comportant un circuit digital et un circuit analogue sur un substrat commun et son procédé de fabrication
JPH11233616A (ja) * 1998-02-17 1999-08-27 Toshiba Corp 半導体装置及びその製造方法
US6051868A (en) * 1996-11-15 2000-04-18 Nec Corporation Semiconductor device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60105265A (ja) * 1983-11-11 1985-06-10 Toshiba Corp 相補型半導体装置の製造方法
EP0178649A2 (fr) * 1984-10-17 1986-04-23 Hitachi, Ltd. Dispositif semi-conducteur complémentaire
US4926233A (en) * 1988-06-29 1990-05-15 Texas Instruments Incorporated Merged trench bipolar-CMOS transistor fabrication process
JPH07273184A (ja) * 1994-04-01 1995-10-20 Mitsubishi Electric Corp 半導体装置およびその製造方法
EP0817268A1 (fr) * 1996-06-27 1998-01-07 Nec Corporation Dispositif de circuit intégré semi-conducteur comportant un circuit digital et un circuit analogue sur un substrat commun et son procédé de fabrication
US6051868A (en) * 1996-11-15 2000-04-18 Nec Corporation Semiconductor device
JPH11233616A (ja) * 1998-02-17 1999-08-27 Toshiba Corp 半導体装置及びその製造方法

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 009, no. 255 (E - 349) 12 October 1985 (1985-10-12) *
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 02 29 February 1996 (1996-02-29) *
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 13 30 November 1999 (1999-11-30) *

Also Published As

Publication number Publication date
WO2001099186A2 (fr) 2001-12-27

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