WO2001011787A3 - Sigma-delta-a/d-wandler - Google Patents

Sigma-delta-a/d-wandler Download PDF

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Publication number
WO2001011787A3
WO2001011787A3 PCT/DE2000/002570 DE0002570W WO0111787A3 WO 2001011787 A3 WO2001011787 A3 WO 2001011787A3 DE 0002570 W DE0002570 W DE 0002570W WO 0111787 A3 WO0111787 A3 WO 0111787A3
Authority
WO
WIPO (PCT)
Prior art keywords
during
signal
analog
output signal
delta
Prior art date
Application number
PCT/DE2000/002570
Other languages
English (en)
French (fr)
Other versions
WO2001011787A2 (de
Inventor
Peter Laaser
Original Assignee
Infineon Technologies Ag
Peter Laaser
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Peter Laaser filed Critical Infineon Technologies Ag
Publication of WO2001011787A2 publication Critical patent/WO2001011787A2/de
Publication of WO2001011787A3 publication Critical patent/WO2001011787A3/de
Priority to US10/067,099 priority Critical patent/US6498573B2/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/32Delta-sigma modulation with special provisions or arrangements for power saving, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains, by selectively turning on stages when needed
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/458Analogue/digital converters using delta-sigma modulation as an intermediate step
    • H03M3/494Sampling or signal conditioning arrangements specially adapted for delta-sigma type analogue/digital conversion systems
    • H03M3/496Details of sampling arrangements or methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

Sigma-Delta-A/D-Wandler mit mindestens einem Analog-Signaleingang (1, 2) zum Anlegen eines analogen Eingangssignals, einem Subtraktionsglied (3), das mehrere Kondensatoren (20) zur Abtastung des Eingangssignals während einer Abtastphase aufweist, wobei die Kondensatoren (20) während einer Integrationsphase an Referenzspannungsquellen (7, 8, 9) in Abhängigkeit von Steuersignalen schaltbar sind, einem Integrator (10) zur Integration des Ausgangssignals des Subtraktionsgliedes (3) während der Integrationsphase, einem Quantisierer (13) zur Analog/Digital-Wandlung des Ausgangssignals des Integrators (10) zur Abgabe eines digitalisierten Ausgangssignals an einen Digital-Signalausgang (14) und mit einer Steuerlogik (16) zur Bildung der Steuersignale derart, daß die Strombelastung der Referenzspannungsquellen (7, 8, 9) während der Integrationsphase minimiert ist.
PCT/DE2000/002570 1999-08-04 2000-08-02 Sigma-delta-a/d-wandler WO2001011787A2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/067,099 US6498573B2 (en) 1999-08-04 2002-02-04 Sigma-delta A/D converter

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19936677A DE19936677A1 (de) 1999-08-04 1999-08-04 Sigma-Delta-A/D-Wandler
DE19936677.2 1999-08-04

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10/067,099 Continuation US6498573B2 (en) 1999-08-04 2002-02-04 Sigma-delta A/D converter

Publications (2)

Publication Number Publication Date
WO2001011787A2 WO2001011787A2 (de) 2001-02-15
WO2001011787A3 true WO2001011787A3 (de) 2001-10-25

Family

ID=7917142

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2000/002570 WO2001011787A2 (de) 1999-08-04 2000-08-02 Sigma-delta-a/d-wandler

Country Status (4)

Country Link
US (1) US6498573B2 (de)
CN (1) CN100362744C (de)
DE (1) DE19936677A1 (de)
WO (1) WO2001011787A2 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003055195A2 (en) * 2001-12-18 2003-07-03 Globespan Virata Incorporated System and method for rate enhanced shdsl
GB2409118B (en) * 2003-11-10 2006-09-13 Global Silicon Ltd A sigma-delta modulator
CN1953181B (zh) * 2005-10-21 2010-10-13 松下电器产业株式会社 模拟数字转换器
JP2009516412A (ja) * 2005-11-11 2009-04-16 エヌエックスピー ビー ヴィ シグマ・デルタ・アナログ/デジタル変換器を備える信号処理回路
TWI318508B (en) * 2006-04-19 2009-12-11 Realtek Semiconductor Corp Sigma-delta modulator
GB0611639D0 (en) * 2006-06-12 2006-07-19 Global Silicon Ltd A sigma-delta modulator
GB0614259D0 (en) * 2006-07-18 2006-08-30 Global Silicon Ltd A debouncing circuit
US7532137B2 (en) * 2007-05-29 2009-05-12 Infineon Technologies Ag Filter with capacitive forward coupling with a quantizer operating in scanning and conversion phases
CN101783687B (zh) * 2009-01-19 2013-06-12 北京大学 一种全数字的开关电容sigma-delta调制器可测性设计电路及方法
US9276469B2 (en) 2009-05-11 2016-03-01 St-Ericsson Sa DC-DC converter for the control of a battery charge current in portable electronic devices
US8009077B1 (en) * 2009-06-08 2011-08-30 Cirrus Logic, Inc. Delta-sigma analog-to-digital converter (ADC) circuit with selectively switched reference
KR101919635B1 (ko) * 2014-02-24 2018-11-19 매그나칩 반도체 유한회사 적분형 아날로그-디지털 변환기
KR102224924B1 (ko) * 2014-11-24 2021-03-08 삼성전자주식회사 차동 출력을 갖는 델타-시그마 모듈레이터
DE102016220861B4 (de) * 2016-10-24 2018-09-06 Infineon Technologies Ag Sigma-Delta-Analog-Digital-Umsetzer
EP3661060A1 (de) * 2018-11-27 2020-06-03 ams AG Sigma-delta-analog-digital-wandler und sensoranordnungen damit
CN111490787B (zh) * 2019-01-29 2023-07-21 江苏润石科技有限公司 一种∑-δ调制器及降低非线性和增益误差的方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5729232A (en) * 1996-04-10 1998-03-17 Asahi Kasei Microsystems Ltd. Combination shared capacitor integrator and digital-to-analog converter circuit with data dependency cancellation

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE6921950U (de) * 1969-05-31 1971-04-29 Hansen Gerhard Vorrichtung zum loesbaren verbinden einer infusionsflasche mit einer infusionsnadel
JP2512349B2 (ja) 1991-03-05 1996-07-03 横河インスツルメンツ株式会社 積分型アナログ・デジタル変換器
US5412387A (en) * 1993-04-06 1995-05-02 Analog Devices, Inc. Error reduction in switched capacitor digital-to-analog converter systems by balanced sampling
US5323158A (en) * 1993-04-06 1994-06-21 Analog Devices, Inc. Switched capacitor one-bit digital-to-analog converter
DE4328974C1 (de) * 1993-08-27 1994-08-25 Siemens Ag Schalter-Kondensator-Netzwerk
US5461381A (en) * 1993-12-13 1995-10-24 Motorola, Inc. Sigma-delta analog-to-digital converter (ADC) with feedback compensation and method therefor
DE4441043C1 (de) * 1994-11-18 1995-12-07 Krohne Messtechnik Kg Verfahren zur Wandlung eines Analogsignals in ein Digitalsignal
DE19630605A1 (de) * 1996-07-29 1998-02-05 Tech Gmbh Antriebstechnik Und Multiplikationsschaltung für Leistungs-Meßgerät
KR100334057B1 (ko) * 1999-06-26 2002-04-26 윤덕용 혼합모드 적분기를 이용한 시그마-델타 아날로그-디지털 변환기
JP2002261615A (ja) * 2001-02-28 2002-09-13 Nagoya Industrial Science Research Inst Δ−σ型モジュレータおよびδ−σ型アナログ−デジタル変換回路

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5729232A (en) * 1996-04-10 1998-03-17 Asahi Kasei Microsystems Ltd. Combination shared capacitor integrator and digital-to-analog converter circuit with data dependency cancellation

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
DAVID B. RIBNER ET AL.: "A Third- Order Multistage Sigma-Delta Modulator with reduced Sensitivity to Nonidealities", IEEE JOURNAL OF SOLID-STATE CIRCUITS., vol. 24, no. 12, December 1991 (1991-12-01), IEEE INC. NEW YORK., US, pages 1764 - 1774, XP002165521, ISSN: 0018-9200 *
FUJIMORI I ET AL: "1.5 V, 4.1 MW DUAL-CHANNEL AUDIO DELTA-SIGMA D/A CONVERTER", IEEE JOURNAL OF SOLID-STATE CIRCUITS,IEEE INC. NEW YORK,US, vol. 33, no. 12, December 1998 (1998-12-01), pages 1863 - 1870, XP000880487, ISSN: 0018-9200 *

Also Published As

Publication number Publication date
CN1636323A (zh) 2005-07-06
WO2001011787A2 (de) 2001-02-15
US6498573B2 (en) 2002-12-24
DE19936677A1 (de) 2001-03-15
CN100362744C (zh) 2008-01-16
US20020140591A1 (en) 2002-10-03

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