WO1997020226A1

WO1997020226A1 - A programmable interface controller

Info

Publication number: WO1997020226A1
Application number: PCT/AU1996/000700
Authority: WO
Inventors: Michael James O'dowd; Murray William Gillett
Original assignee: South East Queensland Electricity Corporation
Priority date: 1995-11-30
Filing date: 1996-11-08
Publication date: 1997-06-05
Also published as: FR2741954A1; CN1203667A; AUPN687095A0; NZ320037A; CA2238821A1

Abstract

A programmable interface controller (30) for testing operation of a protection relay (33). The controller (30) is coupled between a test instrument (32) and the protection relay (33) under test and provides selectable test circuit path configurations for testing the relay (33). A computer (31) is coupled to the test instrument (32), the protection relay (33) and to the controller (30) for monitoring operation of the controller (30) and for providing signals to the controller (30) to allow it to establish the test circuit path configurations. The controller (30) is also operable to allow manual selection to test circuit path configurations.

Description

A PROGRAMMABLE INTERFACE CONTROLLER

THIS INVENTION relates to a programmable interface controller The controller of the invention is particularly useful in the testing of poly phase or multi-element power system protection relays. Such relays are currently tested employing a Doble test instrument manufactured by Doble Engineering Company. The invention will be described by way of example with reference to its use with a Doble test instrument employed to test protection relays.

Protection relays are typically responsive to such conditions as overcurrent, directional overcurrent, overvoltage, undervoltage or function as impedance or distance protection relays in a power system

Doble instruments provide variable current, voltage, frequency, phase angle and timers to test all the various functions of protection relays A test procedure is achieved through the use of ProTesT software developed by Doble.

When a Doble instrument with a single output is used to test a poly phase or multi-element protection relay manual transfer of connections is necessary to test each phase for various operating conditions. These connections include those necessary for A, B and C phase and star point test paths, earth fault and star point test path, A and B phase test path, B and C phase test path, A and C phase test path, phase and earth fault test paths.

With such a Doble instrument, manually establishing the various connections between the testing signal and the relay for the numerous test paths required is particularly tedious and time consuming

SUMMARY OF THE INVENTION It is an object of the present invention to provide a programmable interface controller for use in the testing of protection relays which at least minimises the difficulties referred to above According to one aspect of the invention, there is provided a programmable interface controller for use in testing the operation of a protection relay, the controller providing a plurality of either manually or computer selectable test circuit path configurations for coupling test signals from a test instrument to the protection relay to allow the protection relay to be tested.

The controller of the invention preferably employs controllable switches in the test circuit path configurations connectable to the protection relay to establish various desired test path configurations. The controllable switches may either be solid state or electromagnetic switches. Preferably, the controllable switches are relays which include controlled contacts for establishing the desired test circuit path configurations. A plurality of such relays are present and the controller preferably includes feedback from at least some of the relays to allow their state to be determined. Preferably, at least ten relays are present and at least eight of them have feedback which allows their state to be determined. Feedback may be achieved by connecting current transformers in the circuit path which the particular relays controls.

It is preferred that the controller includes means for ensuring that control signals which define the desired test circuit path configuration can only be obtained, either from the manual or the computer selectable configurations. Tristate buffers may be employed for this purpose. The computer selectable configurations may be achieved by coupling a coded output from a computer to a microprocessor via buffers such as tristate buffers. The manually selectable configurations may be obtained for example, by one or more multi position switches coupled to the microprocessor by buffers such as tristate buffers. Each relay may be controlled by a circuit which receives an address signal from the decoder and at least some of these circuits may include relay confirmation circuitry for conveying information on the state of the relay to the computer.

BRIEF DESCRIPTION OF THE DRAWINGS A particular preferred embodiment of the invention will be described by way of example with reference to the drawings in which

Figure 1 is a block diagram useful in understanding how the controller of the invention may be used;

Figure 2 is a sample test circuit path configuration useful in testing most three phase protection relays;

Figure 3 is a table which lists some of the available test circuit path configurations;

Figure 4 is a circuit diagram of a sample relay configuration for three phase overcurrent and earth fault testing;

Figure 5 is a circuit diagram of a sample relay configuration for two phase overcurrent and earth fault testing; Figures 6 to 17 show sample test circuit path configurations the subject of Figure 3;

Figure 18 is a detailed circuit diagram of a power supply circuit which forms part of the controller of the invention;

Figure 19a is a detailed circuit diagram of part of a relay board of the controller of the invention;

Figure 19b is a detailed circuit diagram of a further part of the relay board shown in Figure 19a;

Figure 20a shows details of a part of a further relay board of the controller of the invention; Figure 20b shows a further part of the relay board of Figure

20a;

Figure 21a to 21 e show details of a main control board of the controller of the invention;

Figure 22a shows detail of part of a auxiliary relay board which forms part of the invention;

Figure 22b shows detail of a further part of the board of Figure 22a;

Figure 23a and 23b show a connection diagram showing how the boards of Figures 18 to 22 are interconnected. DESCRIPTION OF PREFERRED EMBODIMENT

Figure 1 of the drawings shows the interfacing of a programmable interface controller 30 of the invention with a computer 31 , a test instrument 32 such as a Doble test instrument and a protection relay 33 under test. Two control inputs extend between instrument 32 and the controller 30 of the invention. Terminals T1 and T2 allow for this connection. Bus 34 allows terminals T26 and T27 (see Figure 5) of auxiliary relays to be connected to the instrument 32. Bus 35 allows terminals T8 to T25 of the relay 33 to be coupled to the controller 30. Five selectable outputs extend between the controller 30 and the relay 33 and allow various test circuit path configurations to be established. Personal computer 31 controls both the test instrument and the relay 33 via the COM1 and COM2 ports. Relays 33 of the type with which the invention is concerned include a microprocessor. The COM2 connection allows internal settings of the relays 33 to be changed. The LPT1 port of the computer is coupled to the controller 30 via connector CONN10 in Figure 23b.

The computer 31 automatically operates controller 30 to couple outputs from the test instrument 32 to the relay 33. Also, controller 30 may be operated in a manual mode and acts to manually couple outputs from the instrument 32 to the relay under test. The manual mode of operation allows the same operation as the automatic mode. Manual control is achieved via switches SW2 and SW5 when switch SW4 (see Figures 21d and 22b and 21 b) is operated. Switch SW3 in Figure 21d allows for polarity reversal to achieve either the connection of Figure 6 or Figure 7 for relays K9 and K10.

Figure 2 shows a typical test circuit path configuration for testing a three phase protection relay having phase relays J1A, J1B and J1 C, and earth fault relay J1 EF and a star point SP. Contacts extend between test points T3 and T4, T4 and T5, T5 and T6, T6 and T7 and these contacts are the four contacts controlled by relay CO-B in Figure 20b via connector CONN6. When these contacts are closed, terminals T3, T4, T5, T6 and T7 are shorted together. Relay CO-A allows 18VAC to be coupled, via connector CONN4 in Figure 19b to terminals T1 and T2. By operation of relays CO-A and CO-B, it is possible to check to determine correct relay operation using sensing transformers CT1 to CT8. Terminals T1 and T2 are connected as shown via two contacts. These contacts are controlled by relay CO-A shown in Figure 19b.

Current transformers CT1 , CT2, CT5 and CT6 are sensing transforms in series with the phase and earth fault element of the protection relay. Current transformers CT3, CT4 and CT7 are sensing transformers between adjacent phases and the earth line. Current transformer CT8, a sensing transformer in series with the star point. Contacts K1 to K10 are controlled by associated relays to achieve the desired test configuration.

Figure 3 is a table which lists the standard test circuit path configurations which may be achieved with the controller of the invention. Some of these Figures 6 to 17 show various ones of these test configurations.

Figure 4 shows terminals T8 to T25 previously mentioned and the relays R1 to R6 which control contacts K12 to K19 to connect desired ones of the terminals to terminals T26 and T27. This configuration is illustrated in Figure 4 as well as in Figures 5 to 17. Greater detail of relays R1 to R6 is shown in Figures 22a and b. In fact, these relays are implemented by relays K12 to K19.

Terminals T1 and T2 are coupled to the test instrument and terminals T3 to T7 are coupled to the protection relay under test.

Figures 6 to 17 show other possible test configurations.

Figure 18 shows detail of a power supply circuit for the controller of the invention. An AC supply is coupled to connector CONN2 in that figure. Transformer TX1 has two windings for producing separate 18VAC outputs. Fuses F1 and F2 are in series with these AC outputs.

These AC outputs are connected to connector CONN1 in this figure and to bridge rectifier BR1 to provide a 24VDC output filtered by capacitors C1 and

C2. Voltage regulator V1 receives this 24VDC voltage and provides a regulated 5VDC output and a reference or ground which are coupled to the connector CONN1. This connector is coupled to connector CONN1 in

Figure 23a.

Figure 19a shows detail of part of a relay board for controlling relays K1 to K4, K9 and each relay K1 to K4 and K9 has a respective protection diode D1 to D4 and D9 connected across it. Relays K1 to K4 and K9 have indicator LEDs L1 to L4 and L9 respectively in series with them and each of these LEDs has a load resistor R1 to R5 respectively in series with it. Whenever one of the terminals K1 to K4 or K9 goes low, the associated relay is energised and a particular test circuit configuration is achieved.

Connector CONN3 in Figure 19a connects the board of Figures 19a and b to connector CONN3 in Figure 23a. Figure 19b shows the rest of the relay circuit board of Figure 19a. Figure 19b shows sensing current transformers CT1 to CT4. Relay CO-A has a protection diode D10 connected across it and is used to connect 18VAC to connector CONN4. This connector is also shown in Figure 2.

Each current transformers CT1 to CT4 provides feedback signals to indicate that appropriate ones of the contacts controlled by relays K1 to K4 have been operated. Each of the current transformers has a rectifying diode connected to it and a protection resistor connected across the transformers to prevent the transformers from having an open circuit secondary winding. Filter capacitors C4 to C7 provide a DC output at lines CT1 to CT4. These lines are coupled to connector CONN3 in Figure 19a.

Figure 20a shows part of a further relay board and is similar to that shown in Figure 19a. This board has relays K5 to K8 and K10 each shown with a protection diode D11 to D19 connected across it. The relays are controlled by inputs K5 to K8 and K10 obtained from connector CONN5. Connector CONN5 is coupled to connector CONN5 in Figure 23a. An indicating LED L5 to L8 and L10 is associated with a respective one of the relays K5 to K8 and K10 and a resistor R10 to R14 couples the LEDs to lines K5 to K8 and K10. When lines K5 to K8 and K10 go low the respective relay and LED are energised. Figure 20b shows a further part of the relay board of Figure

20a. Figure 20b is similar to what is shown in Figure 19b except that relay CO-B controls four contacts whereas relay CO-A in Figure 19b controls only two contacts. The purpose of relay CO-B has previously been discussed. Connector CONN6 allows this circuit to be connected to terminals T3, T4, T5, T6 and T7 in Figure 2. Protection diode D20 extends across relay CO- B. Current sensing transformers CT5 to CT8 each have a rectifying diode D15 to D18 connected to them. A protection resistor R15 to R18 is coupled across each of the transformers. The capacitors C8 to C11 are filter capacitors.

Figures 21a to 21 e collectively show detail of a main control board of the invention. Figure 21a shows how the parallel port LPT1 from computer

31 is coupled to the controller 30. The parallel port is coupled to the opto isolators OPT01 :A to OPT03:A. The computer is programmed with test switching data to be coupled to the circuit and allows switching control for various ones of the relays to be supplied. In addition, feed back from the sensing current transformers may be coupled to the computer via isolator OPTO3:A.

Inputs DO to D7 are coupled to respective opto isolators and the outputs IPAO to IPA7 are coupled to tristate buffer U5 in Figure 21b which allows an address code to be coupled to microcomputer U1 in Figure 21 c.

Figure 21 b shows tristate buffer U5 which receives an address code from the computer 31 via the opto isolators for automatic computer control of the desired operation of relays K1 to K10 and K12 to K19. In this way desired test paths may be achieved. Switch SW4 in Figure 21 b functions to allow the controller to switch between automatic operation where tristate buffer U5 produces an address code as a consequence of appropriate inputs to the opto isolators in Figure 21a as a consequence of control signals from computer 31. In the other position of switch SW4 tristate buffer U4 is enabled and buffer U5 is disabled. Buffer U4 receives inputs from switches SW2 and SW5 in Figures 21 d and 22b for manual operation. Switches SW5 and SW2 produce manual codes representative of desired manually generated test circuit path configurations. Buffer U4 conveys this manually produced address code to microprocessor U1 to allow it to provide appropriate outputs for controlling relays K1 to K10 and K12 to K19. Resistors RP3:A to RP3H and RP4:A to RP4:H are pull down resistors for the two tristate buffers U5 and U4. Figure 21c shows the microprocessor U1 which decodes signals from one or other of the tristate buffers U4 and U5. These inputs are received on lines PAO to PA2 and PDO to PD4. The sensed signals provided by current transformers CT1 to CT8 are coupled to terminals PEO to PE7. The outputs from the microprocessor PBO to PB7 are applied to line driver U2 in Figure 21 d while outputs PCO to PC7 are applied to line driver U3 in Figure 21d. The outputs from the line drivers of Figure 21d are coupled to connector CONN7 and to connector CONN7 in Figure 23a. In this way, the various relays K1 to K10 and K12 to K19 may be controlled.

Resistors RP5:A to RP5:H in Figure 21c are pull down resistors. Reference signals are secured for the microprocessor employing resistor R26 and capacitor C20. U8 provides a reset signal for the microprocessor U1.

Figure 21 d shows switch SW3. This switch together with switch SW5 in Figure 22b and SW2 in Figure 21 d provide for the manual selection of test circuit path configurations dependant upon the position of switch SW4 in Figure 21 b.

Switch SW3 in Figure 21d functions to achieve the reverse connection of relays K9 and K10 for a reverse polarity test.

Capacitors C12 to C17 are filter capacitors connected in parallel across 5V and signal ground potential.

Figure 21 e shows two line drivers U6 and U7. Drive U6 receives inputs PCO, PC1 , PC4, PC5, PC7 and PD5 from microprocessor Ul and provides outputs L1G to L5G as well as a CHECK output. The CHECK output is high when all sensing current transformers operate correctly. That CHECK output is supplied to opto isolator OPT03:A to provide an acknowledge signal ACK for coupling via connector CONN 10 to the computer 31. LEDs L11 to L15 are three terminal LEDs having two anode terminals and a single cathode terminal. These LEDs produce a green output in response to a high signal at terminals L1 G to L5G or a red output in response to a high signal at terminals L1 R to L5R. Driver U7 receives inputs PA3 to PA7 from the microprocessor U1 and provides outputs L1 R to L5R. The indicator LEDs are red in response to polarity and green in response to non-polarity i.e. A phase to star point, A phase - Red, Star Point - Green, Star Point to A Phase, Star Point - Red, A Phase - Green.

Figures 22a and 22b together show detail of an auxiliary relay board. The auxiliary relays K12 to K19 have respective protection diodes D21 to D28 coupled across them. Respective series connected LEDs and resistor pairs L16 and R28 to L21 and R33 are in series with each of the auxiliary relays. Connector CONN9 is coupled to connector CONN9 in Figure 23a. Whenever one of the lines S1 to S6 goes low, the associated auxiliary relay is energised and the respective LED is illuminated. In this way, the particular desired switching combinations for the auxiliary relays as shown in Figures 4 to 17 may be achieved.

Figure 22a shows the auxiliary relays K12 to K19 and their respective controlled contacts. The connections from these contacts are coupled to connector CONN10. Terminals 1 to 20 of connector CONN 10 correspond to terminals T8 to T27 in Figures 4 to 17.

Figures 23a and b shows connectors CONN1 , 3, 5, 7, 9 and

CONN 10 and the interconnection between them. The various other connectors of Figures 18 to 22 are coupled to various ones of the connectors of Figures 23a and b. The following table provides an indication of the interconnections.

FIG 18 CONN1 FIG 23a CONN1

FIG 19a CONN3 FIG 23a CONN3

FIG 20a CONN5 FIG 23a CONN5 FIG 21d CONN7 FIG 23a CONN7

FIG 22b CONN9 FIG 23a CONN9

FIG 23b CONN10 FIG 1 LPT1

Claims

CLAIMS:

1. A programmable interface controller for use in testing the operation of a protection relay, the controller providing a plurality of either manually or computer selectable test circuit path configurations for coupling test signals from a test instrument to the protection relay to allow the protection relay to be tested.

2. The controller of claim 1 including controllable switches in the test circuit paths for establishing desired test path configurations.

3. The controller of claim 1 or 2 wherein the controllable switches comprise relays including contactor for establishing the desired test circuit path configurations.

4. The device of claim 3 including ten said relays and wherein the protection relay includes a plurality of separate fault protection relays in separate line circuits and the controllable switches are arranged in series with each of the fault protection relays in each of the line circuits and between adjacent ones of the line circuits.

5. The controller of claim 4 in which the protection relay has a star point line circuit and one of the controllable switches is in series with the star point line circuit.

6. The controller of claim 5 including sensors for providing an indication of the state of at least some of the controllable switches.

7. The controller of claim 6 wherein the sensors comprise current transformers for sensing current in the line circuits in which the controllable switches are connected to provide an indication of the state of the controllable switches.

8. The controller of claim 6 or 7 wherein a respective said sensor is in series with the controllable switch in each of the line circuits.

9. The controller of claim 8 including respective said sensors in series with the controllable switches extending between adjacent said separate line circuits.

10. The controller of claim 1 including auxiliary relays associated with the protection relay under test and controllable by the controller for coupling auxiliary terminals of the relay under test to the test instrument.

11. The controller of claim 7 including testing circuitry for testing proper operation of the relay contacts.

12. The controller of claim 11 wherein the testing circuitry includes a first relay for coupling an AC voltage to input terminals of the controller and a second relay for interconnecting one end of each of the current transformers in the separate line circuits.

13. The controller of claim 7 including a rectifying diode in series with each of the current transformers and a respective filter capacitor connected across the diode and an associated said current transformer.

14. The controller of claim 3 wherein the controller is connectable to a computer with the computer having output parts coupled to the test instrument to the controller and to the protection relay under test, the controller derives an address code from the computer indicative of a desired test circuit path of the controller when in the automatic mode.

15. The controller of claim 14 including isolators between the computer and the controller for coupling the address code to a first buffer.

16. The controller of claim 15 including a second buffer, code switches for selecting a manual address code coupled to the second buffer and a control switch between the first and second buffer for enabling one or other of the first or the second buffer, a microcomputer adapted to receive outputs from the first and the second buffer for providing control signals for operation of the controllable switches to achieve a desired test circuit path configuration.

17. The controller of claim 16 including drivers between the microcomputer and the controllable switches.

18. The controller of claim 16 including a reversing switch for cross connecting input terminals of the controller.

19. The controller of claim 16 including LED indicators coupled to the microcomputer via line drivers for providing an indication of the operation of the controller.

20. The controller of claim 3 including an LED indicator in series with each of the relays for indicating energisation of the relays.

21. The controller of claim 10 and 16 including a respective LED in series with each said auxiliary relay and the microcomputer providing control outputs for selective operation of the auxiliary relays.