WO1990016025A3 - Connexion de memoire de donnees - Google Patents

Connexion de memoire de donnees Download PDF

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Publication number
WO1990016025A3
WO1990016025A3 PCT/GB1990/000950 GB9000950W WO9016025A3 WO 1990016025 A3 WO1990016025 A3 WO 1990016025A3 GB 9000950 W GB9000950 W GB 9000950W WO 9016025 A3 WO9016025 A3 WO 9016025A3
Authority
WO
WIPO (PCT)
Prior art keywords
data
data store
storage device
memory device
multibit
Prior art date
Application number
PCT/GB1990/000950
Other languages
English (en)
Other versions
WO1990016025A2 (fr
Inventor
Barry John Walker
Original Assignee
Stratum Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stratum Technology Ltd filed Critical Stratum Technology Ltd
Priority to AT90909158T priority Critical patent/ATE96923T1/de
Publication of WO1990016025A2 publication Critical patent/WO1990016025A2/fr
Publication of WO1990016025A3 publication Critical patent/WO1990016025A3/fr

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4009Coupling between buses with data restructuring
    • G06F13/4018Coupling between buses with data restructuring with data-width conversion
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00Methods or arrangements for data conversion without changing the order or content of the data handled
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • Record Information Processing For Printing (AREA)
  • Bus Control (AREA)

Abstract

L'invention concerne un appareil de connexion d'un dispositif de stockage de données supplémentaire à un point d'accès d'un ordinateur, tel qu'un point d'accès d'imprimante, lequel n'est pas nécessairement adapté pour la connexion d'un dispositif de stockage de données. Un circuit d'interface comprend un moyen permettant de transmettre des données multibits stockées à un dispositif de mémoire, ainsi que la lecture des données multibits à partir du dispositif de mémoire, en une séquence de segments de données pouvant être traités par un moins grand nombre de lignes de données. Dans le cas de points d'accès d'imprimantes parallèles classiques, les données ainsi que les lignes de commande peuvent être commutées afin d'acheminer des signaux et des données de commande respectifs.
PCT/GB1990/000950 1989-06-21 1990-06-20 Connexion de memoire de donnees WO1990016025A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT90909158T ATE96923T1 (de) 1989-06-21 1990-06-20 Verfahren und vorrichtung fuer datenspeicherverbindung.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8914253A GB2234093B (en) 1989-06-21 1989-06-21 Data store connection
GB8914253.3 1989-06-21

Publications (2)

Publication Number Publication Date
WO1990016025A2 WO1990016025A2 (fr) 1990-12-27
WO1990016025A3 true WO1990016025A3 (fr) 1991-02-07

Family

ID=10658816

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB1990/000950 WO1990016025A2 (fr) 1989-06-21 1990-06-20 Connexion de memoire de donnees

Country Status (5)

Country Link
EP (1) EP0478616B1 (fr)
AU (1) AU5837690A (fr)
DE (1) DE69004431D1 (fr)
GB (1) GB2234093B (fr)
WO (1) WO1990016025A2 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5299314A (en) * 1990-03-22 1994-03-29 Xircom, Inc. Network adapter using status inlines and data lines for bi-directionally transferring data between lan and standard p.c. parallel port
GB2255478A (en) * 1991-03-21 1992-11-04 Grey Cell Systems Ltd Apparatus for data transfer between personal computers.
GB2264574B (en) * 1992-02-21 1995-10-18 Kt Technology External data storage device and connection therefor
GB2265480B (en) * 1992-03-24 1995-11-01 Technophone Ltd Microprocessor controlled apparatus
US5394237A (en) * 1992-11-10 1995-02-28 Geophysical & Enviromental Research Corp. Portable multiband imaging spectrometer
US5506958A (en) * 1993-02-10 1996-04-09 Conner Peripherals, Inc. Error detection for parallel data transfer between a processor and a peripheral device by comparing regisgers storing a sum of values in bytes of data transferred
US5671373A (en) * 1995-06-08 1997-09-23 Hewlett-Packard Company Data bus protocol for computer graphics system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0240749A2 (fr) * 1986-04-11 1987-10-14 Symbolics, Inc. Interface de bus pour dispositif de commande d'un disque

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4291370A (en) * 1978-08-23 1981-09-22 Westinghouse Electric Corp. Core memory interface for coupling a processor to a memory having a differing word length
US4309754A (en) * 1979-07-30 1982-01-05 International Business Machines Corp. Data interface mechanism for interfacing bit-parallel data buses of different bit width
JPS59226923A (ja) * 1983-05-27 1984-12-20 インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン バスインタ−フエ−ス装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0240749A2 (fr) * 1986-04-11 1987-10-14 Symbolics, Inc. Interface de bus pour dispositif de commande d'un disque

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Microprocessing and Microprogramming, Volume 17, No. 3, March 1986, (AMSTERDAM, NL), P. LIPPITSCH et al.: "MFD2 - using Serial I/O for a Low Cost Flexible Disk Interface", pages 153-157 see the whole article *
Radio Fernsehen Elektronik, Volume 38, No. 4, April 1989, (Berlin, DE) H. STUHEC et al.: "Universelle Parallelschnittstelle fur A 7100", pages 214-215 see the whole article *

Also Published As

Publication number Publication date
DE69004431D1 (de) 1993-12-09
GB2234093B (en) 1992-01-15
EP0478616A1 (fr) 1992-04-08
GB2234093A (en) 1991-01-23
WO1990016025A2 (fr) 1990-12-27
AU5837690A (en) 1991-01-08
EP0478616B1 (fr) 1993-11-03
GB8914253D0 (en) 1989-08-09

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