US6982584B2 - Phase quadrature and slaved working frequency signal generator - Google Patents

Phase quadrature and slaved working frequency signal generator Download PDF

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Publication number
US6982584B2
US6982584B2 US10/759,530 US75953004A US6982584B2 US 6982584 B2 US6982584 B2 US 6982584B2 US 75953004 A US75953004 A US 75953004A US 6982584 B2 US6982584 B2 US 6982584B2
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phase
frequency
phase quadrature
transconductor
passive elements
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US20040196084A1 (en
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Thierry Melly
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Centre Suisse dElectronique et Microtechnique SA CSEM
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B27/00—Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs

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  • the present invention relates to an in phase quadrature signal generator used particularly in the field of transmissions, for applications such as image frequency rejection receivers or transmitters.
  • This signal generator includes phase shift means formed of passive elements for delivering in phase quadrature signals from a received input signal.
  • FIG. 1 shows a generator whose phase-shifter 1 uses an RC-CR type passive filter stage.
  • An input signal Vin is received at an input terminal 2 of the phase-shifter.
  • This signal Vin is supplied to a first phase-shifter circuit 3 including a resistor R 1 connected between the input terminal 2 and a first output terminal 5 of the generator and a capacitor C 1 connected between said output terminal 5 and a reference potential, for example to the ground.
  • the signal Vout — I delivered at output terminal 5 of this first phase-shifter circuit 3 is phase shifted with respect to the signal Vin supplied at the input.
  • This signal Vin is supplied in parallel to a second phase shifter circuit 4 including a capacitor C 2 connected between the input terminal 2 and a second output terminal 6 of phase shifter 1 and a resistor R 2 connected between said second output and the ground.
  • the signal Vout — Q delivered at output terminal 6 is also phase shifted with respect to the signal Vin supplied at the input.
  • Signals Vout — I and Vout — Q are phase shifted by 90° with respect to each other, which is why one speaks of in phase quadrature signals.
  • Vout_I Vout_Q 1 j ⁇ ⁇ ⁇ ⁇ R2 ⁇ C2 ⁇ 1 + j ⁇ ⁇ ⁇ ⁇ R2 ⁇ C2 + R2 Z2 1 + j ⁇ ⁇ ⁇ ⁇ R1 ⁇ C1 + R1 Z1
  • This type of generator is more advantageous when the in phase quadrature signals Vout — I and Vout — Q have the same amplitude.
  • the transfer function explained hereinbefore has to have a module with a value of 1.
  • Passive elements like resistor or capacitance values, can be matched with an acceptable order of magnitude on the same wafer, of the order of one percent. This order of magnitude varies however, depending on the technology used.
  • Vout_I Vout_Q 1 j ⁇ ⁇ ⁇ ⁇ R ⁇ C
  • the amplitudes of the output signals Vout — I and Vout — Q are thus equal for a single frequency f 0 , also called the cut-off frequency, whose corresponding angular frequency ⁇ 0 has a value of 1 R ⁇ C .
  • phase quadrature signal generator has several drawbacks. Indeed, as mentioned previously, matching of the passive elements of a circuit can only be achieved in an acceptable manner on a same wafer. For such circuits, dispersion between the passive elements from one wafer to another wafer is relatively significant, and can be of the order of ⁇ 30% for example for digital CMOS technology.
  • this dispersion represents a major drawback, in particular in application of the image frequency rejection receiver type.
  • filtering means are provided for filtering the whole range of frequencies capable of containing the image frequency in order to retain only that of the signal generated at the working frequency.
  • a first solution of the prior art consists in using a passive polyphase filter with several stages using different cut-off frequencies. The number of stages and the placing of the poles, defining the different cut-off frequencies, allow the quality of the image frequency rejection to be evaluated as a function of the mismatching of the components and their absolute value. This solution has the drawback of decreasing the amplitude of the signals at the output of each stage.
  • the invention concerns an in phase quadrature signal generator as defined in the preamble, characterised in that it further includes, between the phase shifter means and the output terminals, transconductor means having a transconductance proportional to the passive elements, arranged so as to obtain a transfer function between said first and second in phase quadrature signals delivered at output, independent of said passive elements.
  • the transconductor means include first and second transconductor circuits that each have temperature independent transconductance so as to obtain a temperature independent transfer function between the in phase quadrature signals.
  • the in phase quadrature signals have the same amplitude at a given frequency and this frequency is dependent on a dynamically modifiable parameter, such as the frequency of a clocked signal.
  • the invention also concerns an image frequency rejection receiver including means for receiving external signals at a given frequency, filtering means formed of passive elements, and conversion means including at least two mixers for delivering frequency shifted in phase quadrature signals at a shifted frequency, said receiver being characterised in that it includes transconductor means having a transconductance proportional to the passive elements, arranged so as to obtain a transfer function between the frequency shifted signals, independent of said passive elements.
  • FIG. 1 already described, shows an in phase quadrature signal generator according to the prior art
  • FIG. 2 shows an in phase quadrature signal generator according to a preferred embodiment of the invention
  • FIG. 3 shows an image frequency rejection receiver integrating an in phase quadrature signal generator according to the invention
  • FIG. 3A shows the detail of a mixer used in FIG. 3 ;
  • FIG. 4 shows another image frequency rejection receiver
  • FIG. 4A shows the detail of a passive polyphase filter of FIG. 4 ;
  • FIGS. 5A and 5B show example embodiments of proportional to absolute temperature (PTAT) current sources.
  • PTAT proportional to absolute temperature
  • FIG. 2 shows a block diagram of an in phase quadrature signal generator according to a preferred embodiment of the invention. As in the diagram of the generator of the prior art shown in FIG. 1 , there is an input signal Vin supplied to an input terminal 2 of phase shifter 1 .
  • phase shifter circuit 3 includes a resistor 7 , of value R, connected between input terminal 2 and a first control terminal 5 of the generator and a capacitor 8 , of capacitance C, connected between said control terminal 5 and a reference potential, typically the ground
  • second phase shifter circuit 4 includes a capacitor 9 , of capacitance C matched to that of capacitor 8 , connected between input terminal 2 and a second control terminal 6 of the generator and a resistor 10 , of value R matched to that of resistor 7 , connected between said second control terminal 6 and the ground.
  • the generator further includes transconductor means placed at the output of the phase shifter means.
  • the transconductor means include a first transconductor circuit 11 having a determined transconductance gm 1 , and a second transconductor circuit 12 having a determined transconductance gm 2 . These transconductances are determined so as to remove the passive elements dependence on the transfer function between the two output terminals Out — I and Out — Q.
  • transconductance gm 1 is proportional to a capacitance value C 0
  • transconductance gm 2 is proportional to a conductance value 1/R 0 .
  • the values C 0 and R 0 are matched to the values of passive elements R and C almost perfectly, since all the passive elements are on the same wafer.
  • the first transconductor circuit 11 includes a transistor N 1 whose control terminal G 1 is connected to the first control terminal 5 via a coupling capacitor Cc whose current terminal D 1 , which corresponds to the first output terminal, is connected to a load 13 , such as for example a resistor, and whose current terminal S 1 is connected to the ground.
  • a current is obtained in this form by using a proportional to absolute temperature current source 15 , called PTAT, function of the capacitance value C 0 and the signal clocked at frequency f ck .
  • PTAT proportional to absolute temperature current source 15
  • An example embodiment of such a current source is shown in FIG. 5B .
  • the current I N3 delivered by PTAT current source 15 , is mirrored by means of a current mirror formed by transistors N 1 and N 3 . It should be noted that the ratio between currents I N1 and I N3 can be chosen to be equal to 1 or different from 1 depending upon requirements by sizing transistors N 1 and N 3 .
  • the second transconductor circuit 12 includes a transistor N 2 whose control terminal G 2 is connected to second control terminal 6 via a coupling capacitor Cc, whose current terminal D 2 , which corresponds to the second output terminal, is connected to a load 14 identical to load 13 and whose current terminal S 2 is connected to the ground.
  • I N2 ⁇ 4 ⁇ U T R 0
  • a current is obtained in this form by using a PTAT type current source a function of the conductance value 1/R 0 .
  • An example embodiment of such a current source is shown in FIG. 5A .
  • Current I N4 delivered by PTAT current source 16 is mirrored by means of a current mirror formed by transistors N 2 and N 4 ; the ratio between the currents I N2 and I N4 being selected in accordance with requirements.
  • I N1 I N2 f c ⁇ ⁇ k j ⁇ ⁇ ⁇ ⁇ C 0 ⁇ R 0 C ⁇ R ⁇ ⁇ 3 ⁇ 4
  • the working frequency f 0 for which the transfer function module has a value of 1, i.e. for which output signals Out — I and Out — Q have the same amplitude depends on the frequency f ck of a clocked signal, which is, for example, a clock signal delivered by means of a quartz oscillator.
  • a clocked signal which is, for example, a clock signal delivered by means of a quartz oscillator.
  • this type of in phase quadrature signal generator can be integrated in an image frequency rejection receiver, as shown in FIGS. 3 and 3A .
  • the receiver of FIG. 3 is shown with signals in non-differential form.
  • Such a receiver 20 conventionally includes external signal receiving means, like for example a radio-frequency antenna 21 , able to be connected to a band-pass filter that is not shown, then to a low noise amplifier 22 .
  • the output signal from the low noise amplifier 22 is provided to filtering means, for example to a phase shifter I-Q 23 formed of passive elements for obtaining in phase quadrature signals I RF and Q RF .
  • These signals I RF and Q RF are frequency shifted by means of mixers 24 and 25 .
  • These mixers can have a structure like that detailed in FIG. 3A , the signals appearing, in this case, in differential form.
  • each mixer includes two control terminals and an output terminal.
  • Mixer 24 receives signal I RF at one control terminal and an in phase clock signal I LO at the other control terminal, and delivers, at its output terminal, a frequency shifted (RF ⁇ LO) in phase signal Out — I.
  • Mixer 25 receives signal Q RF at one control terminal and an in phase quadrature clock signal Q LO at the other control terminal, and delivers at its output terminal an in phase quadrature signal Out — Q that is also frequency shifted (RF ⁇ LO).
  • Clock signals I LO and Q LO are obtained from a local oscillator 26 delivering a clock signal at an adjustable frequency (LO), combined with a 90° phase shifter, referenced 27 . It should be noted that it is also possible to use a local oscillator with a double frequency (2LO) combined with a frequency-divider-by 2 stage also for obtaining the desired signals I LO and Q LO .
  • LO adjustable frequency
  • FIG. 3A shows an example embodiment of mixer 24 of FIG. 3 wherein the signals appear in differential form; since mixer 25 has a similar structure it will not be shown in detail here.
  • each of these mixers includes a first control terminal 35 receiving a signal I RF , a second differential control terminal, 36 ⁇ and 36 +, receiving differential signals I LO ⁇ and I LO+ and a differential output terminal, 37 ⁇ and 37 +, whose output current is equivalent to the difference in currents I 1 and I 2 .
  • the mixer includes in particular a first transistor 31 whose control terminal 35 receives signal I RF , the two current terminals of transistor 31 being respectively connected to the ground and to one of the current terminals 38 of a differential pair of second and third transistors, 32 ⁇ and 32 +, whose control terminals correspond to the differential control terminal, 36 ⁇ and 36 +, of the mixer receiving signals I LO ⁇ and I LO+ .
  • the differential output terminal, 37 ⁇ and 37 +, of the mixer delivering in phase opposition signals Out — I ⁇ and Out — I+, is connected, respectively to the other current terminal of the differential pair of transistors 32 ⁇ and 32 +.
  • transistor 31 is polarised by means of a current proportional to absolute temperature and to one of the passive elements of phase shifter I-Q 23 . This current is obtained, as explained within the scope of FIG. 2 , by means of a PTAT current source 34 .
  • the output currents of mixers 24 and 25 are established so as to make the transfer function between output terminals Out — I and Out — Q independent from the passive elements of phase shifters I-Q 23 as was explained hereinbefore.
  • the transistors of the mixers already present in the receiver are used as transconductor means, by adjusting their transconductance so as to be rid of the passive element dispersion.
  • FIG. 4 shows an image frequency rejection receiver having a different structure to that of the receiver of FIG. 3 .
  • the receiver of FIG. 4 is shown with signals in non-differential form.
  • Receiver 40 includes a similar reception stage including external signal reception means like, for example, a radio-frequency antenna 41 , able to be connected to a band-pass filter that is not shown, then to a low noise amplifier 42 .
  • the RF signal is then supplied at the input of a conventional frequency conversion stage including two mixers 44 and 45 similar to that detailed in FIG. 3A .
  • These two mixers 44 and 45 are respectively controlled by in phase quadrature clock signals I LO and Q LO supplied by a local oscillator 46 in combination with a 90° phase shifter 47 , and respectively supply at their output frequency shifted (RF ⁇ LO) in phase quadrature signals I IN and Q IN .
  • Signals I IN and Q IN are then filtered in a passive filter 50 like, for example, a passive polyphase filter the detail of which is given in FIG. 4A , the signals appearing, in this case, in differential form.
  • a passive filter 50 like, for example, a passive polyphase filter the detail of which is given in FIG. 4A , the signals appearing, in this case, in differential form.
  • This type of filter will allow, within the matching limit of the passive elements from one receiver to another, the image frequency (RF+LO) of the quadrature signals I OUT and Q OUT delivered at output, to be removed.
  • FIG. 4A shows an example of a passive polyphase filter, wherein the signals appear in differential form, able to be used for the receiver of FIG. 4 .
  • transconductor means are provided having a similar transconductance to those presented within the scope of FIG. 2 .
  • transconductor means elements that are already present are advantageously used like, for example, transistors operating in amplifier mode.
  • FIG. 5A shows an example embodiment of a current source proportional to absolute temperature (PTAT) and proportional to a conductance value (1/R 0 ).
  • the PTAT current source 60 includes a first pair of NMOS transistors M 1 and M 2 , a second pair of PMOS transistors M 3 and M 4 , and a PMOS transistor M 5 forming a current mirror with transistor M 4 .
  • Transistor M 2 has a channel width K times greater than that of transistor M 1 , and an equal length.
  • One of the current terminals of this transistor M 2 is connected to the ground via a resistor R 0 matched to the resistors used in the passive phase shifter means described hereinbefore.
  • FIG. 5B shows an example embodiment of a current source proportional to absolute temperature (PTAT) and proportional to a capacitance value (C 0 ).
  • PTAT current source 70 differs from the current source of FIG. 5A in that resistor R 0 is replaced by a capacitor C 0 switched by means of two switches S 1 and S 2 controlled, respectively, by signal CK and ⁇ overscore (CK) ⁇ and directly linked to the clock signal frequency f ck .
  • a capacitor that is not shown can be provided between the current terminals of transistor M 2 delivering current I and the ground for the purpose of short-circuiting the high-frequency elements resulting from switching to the ground.
  • FIGS. 2 , 3 and 4 are given solely by way of example, and particularly that the PTAT current sources can be substituted by any means for polarising the transconductor means of the circuit so as to obtain a transfer function independent of the passive elements of the circuit and preferably of the temperature.

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EP03075206A EP1441437B1 (de) 2003-01-21 2003-01-21 Betriebsfrequenzgesteuerte Quadratursignalgenerator
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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060057983A1 (en) * 2004-09-10 2006-03-16 Silicon Laboratories Inc. Low noise image reject mixer and method therefor
US20060125541A1 (en) * 2004-12-09 2006-06-15 Elpida Memory, Inc. Semiconductor device
US20080111607A1 (en) * 2006-11-10 2008-05-15 Hart Robert T Amplitude-linear differential phase shift circuit
US20100157164A1 (en) * 2006-01-16 2010-06-24 Nxp B.V. Filter device
US20110292290A1 (en) * 2010-05-26 2011-12-01 Seiko Epson Corporation Frequency conversion circuit, frequency conversion method, and electronic apparatus
US8872569B2 (en) * 2012-11-19 2014-10-28 Tektronix, Inc. Automatic quadrature network with phase and amplitude detection
KR101881700B1 (ko) * 2017-06-20 2018-07-24 강원대학교산학협력단 쿼드러쳐 신호 생성 장치
US20190103856A1 (en) * 2017-10-02 2019-04-04 Robert Bosch Gmbh Switched Resistance Device With Reduced Sensitivity to Parasitic Capacitance
US11456732B2 (en) * 2018-07-20 2022-09-27 Futurewei Technologies, Inc. Method and apparatus for RC/CR phase error calibration of measurement receiver

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113452345B (zh) * 2021-06-16 2022-06-03 电子科技大学 一种基于iii-v族化合物半导体工艺的宽带有源移相器

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US5939916A (en) * 1997-12-23 1999-08-17 Northern Telecom Limited Phase shifter suitable for clock recovery systems
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US6314279B1 (en) * 1998-06-29 2001-11-06 Philips Electronics North America Corporation Frequency offset image rejection
US6516186B1 (en) * 1998-10-02 2003-02-04 Nippon Telegraph And Telephone Corporation Image-rejection receiver
US6747499B2 (en) * 2001-08-16 2004-06-08 Koninklijke Philips Electronics N.V. Tunable quadrature phase shifter using an all-pass circuit

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US5487015A (en) * 1993-09-13 1996-01-23 Rockwell International Corporation Self-oscillating driver circuit for a quartz resonator of an angular rate sensor
US5644260A (en) 1993-09-22 1997-07-01 Hewlett-Packard Company RC/CR automatic quadrature network
US5896053A (en) * 1995-07-28 1999-04-20 Harris Corporation Single ended to differential converter and 50% duty cycle signal generator and method
EP0837560A2 (de) 1996-10-09 1998-04-22 Nokia Mobile Phones Ltd. Schaltungsanordnung zur Erzeugung von Signalen mit verschiedenen Phasen
US6310502B1 (en) * 1997-11-25 2001-10-30 Rohde & Schwarz Gmbh & Co. Kg Broadband phase shifting circuit having two phase shifter branches connected in parallel
US5939916A (en) * 1997-12-23 1999-08-17 Northern Telecom Limited Phase shifter suitable for clock recovery systems
US6181181B1 (en) * 1998-06-26 2001-01-30 Fujitsu Limited Phase shifter for a quadrature modulator and an image suppression mixer
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Publication number Priority date Publication date Assignee Title
US7457605B2 (en) * 2004-09-10 2008-11-25 Silicon Laboratories, Inc. Low noise image reject mixer and method therefor
US20060057983A1 (en) * 2004-09-10 2006-03-16 Silicon Laboratories Inc. Low noise image reject mixer and method therefor
US20060125541A1 (en) * 2004-12-09 2006-06-15 Elpida Memory, Inc. Semiconductor device
US7400180B2 (en) * 2004-12-09 2008-07-15 Elpida Memory, Inc. Semiconductor device having input circuits activated by clocks having different phases
US8368817B2 (en) * 2006-01-16 2013-02-05 Nxp B.V. Filter device
US20100157164A1 (en) * 2006-01-16 2010-06-24 Nxp B.V. Filter device
US20080111607A1 (en) * 2006-11-10 2008-05-15 Hart Robert T Amplitude-linear differential phase shift circuit
US20110292290A1 (en) * 2010-05-26 2011-12-01 Seiko Epson Corporation Frequency conversion circuit, frequency conversion method, and electronic apparatus
US8872569B2 (en) * 2012-11-19 2014-10-28 Tektronix, Inc. Automatic quadrature network with phase and amplitude detection
KR101881700B1 (ko) * 2017-06-20 2018-07-24 강원대학교산학협력단 쿼드러쳐 신호 생성 장치
US20190103856A1 (en) * 2017-10-02 2019-04-04 Robert Bosch Gmbh Switched Resistance Device With Reduced Sensitivity to Parasitic Capacitance
US10644675B2 (en) * 2017-10-02 2020-05-05 Robert Bosch Gmbh Switched resistance device with reduced sensitivity to parasitic capacitance
US11456732B2 (en) * 2018-07-20 2022-09-27 Futurewei Technologies, Inc. Method and apparatus for RC/CR phase error calibration of measurement receiver
US20230019136A1 (en) * 2018-07-20 2023-01-19 Futurewei Technologies, Inc. Method and Apparatus for RC/CR Phase Error Calibration of Measurement Receiver
US11811412B2 (en) * 2018-07-20 2023-11-07 Futurewei Technologies, Inc. Method and apparatus for RC/CR phase error calibration of measurement receiver

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EP1441437A1 (de) 2004-07-28
DE60307414D1 (de) 2006-09-21
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US20040196084A1 (en) 2004-10-07

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