CN112259452B - Control method of plasma dry etching process - Google Patents

Control method of plasma dry etching process Download PDF

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Publication number
CN112259452B
CN112259452B CN202011130351.6A CN202011130351A CN112259452B CN 112259452 B CN112259452 B CN 112259452B CN 202011130351 A CN202011130351 A CN 202011130351A CN 112259452 B CN112259452 B CN 112259452B
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wafer
area
wafers
edge
etching
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CN112259452A (en
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李光磊
林永顺
吴庆仁
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Shanghai Huali Integrated Circuit Manufacturing Co Ltd
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Shanghai Huali Integrated Circuit Manufacturing Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

The invention discloses a control method of a plasma dry etching process, which comprises the following steps: step one, selecting a reaction cavity for carrying out plasma dry etching on the wafers in the current batch, and determining the influence of a boundary gradual reduction area generated by the consumption of the wafer support ring along with radio frequency time on the etching rate of the edge of the wafer; and step two, placing the wafers of the current batch into the reaction cavity to carry out a plasma dry etching process, and adjusting process parameters of the plasma dry etching process according to the influence of the boundary gradual reduction area determined in the step one on the etching rate of the edge of the wafer so as to compensate the influence of the boundary gradual reduction area on the etching rate of the edge of the wafer. The invention can maintain the etching depth of the wafer edge to be stable, prolong the service life of the parts of the reaction cavity and prolong the process time between two times of cavity opening, thereby reducing the process cost and improving the machine productivity.

Description

Control method of plasma dry etching process
Technical Field
The present invention relates to a method for manufacturing a semiconductor integrated circuit, and more particularly, to a method for controlling a plasma dry etching process.
Background
With the continuous reduction of the key size of the integrated circuit and the continuous improvement of the integration level of the microelectronic device, the wafer manufacturing process introduces an advanced plasma etching process.
In the plasma etching process, the reaction gas is dissociated under the excitation of radio frequency current to generate active plasma. On one hand, the plasma reacts with the part of the wafer which is not covered by the photoresist to transfer the circuit pattern to the wafer; on the other hand, the plasma reacts with the reaction cavity component, so that the component is continuously consumed along with the increase of the radio frequency time, and the distribution of the cavity plasma is changed. Consumption of reaction chamber components ultimately affects the etch rate of the wafer, particularly in the edge region of the wafer. In the existing method, in order to ensure that the etching depth of the edge of the wafer is within a certain specification and ensure the safety of the product, the cavity is usually replaced by opening the cavity and replacing a new component. Thus, the cost is increased, and the productivity of the machine is influenced.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a control method of a plasma dry etching process, which can maintain the etching depth of the edge of a wafer to be stable, prolong the service life of a component of a reaction cavity and increase the process time between two times of cavity opening, thereby reducing the process cost and improving the productivity of a machine.
In order to solve the technical problem, the control method of the plasma dry etching process provided by the invention comprises the following steps:
step one, selecting a reaction cavity for carrying out plasma dry etching on wafers of a current batch, wherein the reaction cavity comprises a wafer placing area and a wafer supporting ring positioned on the peripheral side of the wafer placing area, and the wafer supporting ring is consumed along with the increase of radio frequency time; after the wafer supporting ring is consumed, a boundary gradually-decreasing area is generated on a boundary of a plasma sheath layer formed in the reaction cavity, and the boundary gradually-decreasing area is positioned between the edge of the wafer placing area and the wafer supporting ring; the boundary gradually-decreasing area can increase the etching rate of the edge of the wafer, and the influence of the boundary gradually-decreasing area on the etching rate of the edge of the wafer is determined.
And secondly, placing the wafers of the current batch into the reaction cavity to carry out a plasma dry etching process, and adjusting process parameters of the plasma dry etching process according to the influence of the boundary gradually-decreasing area determined in the step one on the etching rate of the edge of the wafer so as to compensate the influence of the boundary gradually-decreasing area on the etching rate of the edge of the wafer and enable the etching depth of the edge area of the wafers of the current batch to meet the process requirements.
In a further improvement, the APC system is used to implement step one and step two.
A further improvement is that the process parameters of the plasma dry etching process adjusted in the second step are adjustable process parameters, and the adjustable process parameters include the amount of etching gas or the temperature in the edge area of the wafer.
In a further improvement, prior to step one, the method further comprises establishing a first relationship between the adjustable process parameter and the etch rate using the APC system.
In a further improvement, in the first step, the APC system collects the etching depth of the edge region of the previous batch of wafers to determine the influence of the boundary gradual reduction region on the etching rate of the wafer edge.
In a further improvement, in the second step, the adjustable process parameter value is determined according to the difference feedback between the collected etching depth of the edge area of the previous batch of wafers and the target depth.
In the second step, after the plasma dry etching of the wafers in the current batch is finished according to the feedback adjustable process parameter value; and taking the current batch of wafers as the previous batch of wafers and the next batch of wafers as the current batch of wafers, and then repeating the first step and the second step.
The further improvement is that after the second step is completed, the etching depth of the edge area of the current batch of wafers meets the process requirement, which means that: and the etching depth of the edge area of the current batch of wafers is positioned in a specification range corresponding to the target depth, the specification range comprises an upper limit value and a lower limit value, and the target depth is the middle value of the upper limit value and the lower limit value.
In a further improvement, the area inside the edge of the wafer is a wafer bulk area, which is not affected by the area where the boundary is gradually lowered.
In a further improvement, after the second step is completed, the etching depth of the main body region of the current batch of wafers is within a specification range corresponding to the target depth.
A further improvement is that after step two is completed, the etching depths of the main body region and the edge region of the wafers in the current batch tend to be equal.
In a further refinement, the material of the wafer support ring comprises a ceramic.
A further improvement is that when the consumption of the wafer support ring exceeds a value corresponding to the compensation range of the second step, the following steps are required:
and replacing the wafer support ring.
The wafer placing area is provided with an electrostatic chuck, and the wafers of the current batch are fixed on the wafer placing area through the electrostatic chuck.
In a further improvement, an rf source is disposed in the reaction chamber, and the plasma is formed by the action of rf generated by the rf source and process gas, wherein the rf time is an accumulated time of the rf generated by the rf source since the wafer support ring is replaced.
The invention aims at the problem that the boundary of a plasma sheath layer can generate a boundary gradually-reducing area after a wafer support ring is consumed, adds a step of determining the influence of the boundary gradually-reducing area on the etching rate of the edge of the wafer before the current batch of wafers are subjected to plasma dry etching, and then adds a step of adjusting the process parameters of the plasma dry etching process according to the influence of the boundary gradually-reducing area on the etching rate of the edge of the wafer, so as to compensate the influence of the boundary gradually-reducing area on the etching rate of the edge of the wafer, and finally, the etching depth of the edge area of the current batch of wafers can meet the process requirements, thereby maintaining the etching depth of the edge of the wafer stably.
The invention can still keep the etching depth of the edge area of the wafer stable under the condition that the part of the reaction cavity is used for longer radio frequency time, thereby preventing the defect that the part of the reaction cavity needs to be replaced by opening the cavity when the etching depth of the edge area of the wafer deviates to a specification range corresponding to the target depth in the prior method, prolonging the service life of the part of the reaction cavity and increasing the process time between two times of cavity opening, thereby reducing the process cost and improving the productivity of a machine.
The invention can be realized by an APC system, can realize the accurate and stable control of the etching depth of the wafer edge, and improves the uniformity of the etching depth of the wafer edge in batches and among batches and the uniformity of the etching depth of different areas in the wafer surface.
Drawings
The invention is described in further detail below with reference to the following figures and detailed description:
FIG. 1A is a schematic diagram of a plasma sheath boundary during a wafer support ring replacement in a reaction chamber of a plasma dry etch process;
FIG. 1B is a schematic diagram of a plasma sheath boundary after a period of RF time for a wafer support ring in a reaction chamber of a plasma dry etch process;
FIG. 2 is a flow chart of a method for controlling a plasma dry etching process according to an embodiment of the present invention;
FIG. 3 is a flowchart illustrating the control of the APC system according to the preferred embodiment of the present invention;
FIG. 4 is a graph of a first relationship in a method according to a preferred embodiment of the present invention;
FIG. 5 is a graph of the increase in etch depth at the edge of a wafer with increasing radio frequency time in accordance with the preferred embodiment of the present invention and the prior art method.
Detailed Description
The method of the embodiment of the present invention is obtained on the basis of analyzing the technical problems existing in the existing method, and before the technical scheme of the method of the embodiment of the present invention is described in detail, the following description is made for the existing technical problems:
FIG. 1A is a schematic structural diagram of a plasma sheath boundary when a wafer support ring is just replaced in a reaction chamber of a plasma dry etching process; the reaction chamber comprises a wafer placing area 101 and a wafer supporting ring 102 located on the peripheral side of the wafer placing area 101, a wafer 103 is placed on the wafer placing area 101, an electrostatic adsorption disc is arranged on the wafer placing area 101, and the wafer 103 is fixed through the electrostatic adsorption disc.
The reaction cavity also comprises a radio frequency source, after the process gas is introduced, plasma can be formed in the reaction cavity under the action of the radio frequency source, and positive ions 105 and electrons exist in the plasma, so that the electroneutrality is kept; between the plasma and the wafer 103 and the chamber walls of the reaction chamber, a plasma sheath with unbalanced positive and negative charges is formed due to the fast movement speed of electrons, the boundary of the plasma sheath is marked with a mark 104 in fig. 1A, and the thickness of the plasma sheath is t1. In fig. 1A, the wafer support ring 102 has a thickness t2.
As the rf time of the chamber increases, the thickness of the wafer support ring 102 decreases from t2 to t3. As shown in fig. 1B, the height of the top surface of the wafer support ring 102 is decreased, and the thickness t1 of the plasma sheath is kept constant, but there is a boundary decreasing region shown by a dashed line 106 between the edge of the wafer 103 and the edge of the wafer support ring 102, and the thickness t1a of the plasma sheath in the boundary decreasing region 106 is decreased, so as to increase the etching rate of the edge region of the wafer 103. As the rf time increases, the etching depth of the edge region of the wafer 103 increases, as shown by a curve 301 in fig. 5, the abscissa is the rf time, the ordinate is the corresponding wafer edge etching depth, the dashed line 303 is the upper limit of the etching depth specification, i.e., the upper limit of the specification range, the dashed line 304 is the lower limit of the etching depth specification, i.e., the lower limit of the specification range, and the specification range is located between the dashed lines 303 and 304. It can be seen that when the rf time is about 300 hours, the etching depth of the wafer edge corresponding to the existing method tends to reach the upper limit value, and then the cavity needs to be opened for component replacement.
FIG. 2 is a flow chart of a method for controlling a plasma dry etching process according to an embodiment of the present invention; the control method of the plasma dry etching process of the embodiment of the invention comprises the following steps:
step one, selecting a reaction chamber for performing plasma dry etching on a current batch of wafers, wherein the structure of the reaction chamber can also be shown in fig. 1A, the reaction chamber includes a wafer placing area 101 and a wafer supporting ring 102 located on the peripheral side of the wafer placing area 101, and the wafer supporting ring 102 is consumed along with the increase of radio frequency time; after the wafer support ring 102 is consumed, a gradually-decreasing boundary area 106 is generated at the boundary of a plasma sheath formed in the reaction chamber, and the gradually-decreasing boundary area 106 is located between the edge of the wafer placing area 101 and the wafer support ring 102; the tapered boundary region 106 increases the etch rate at the wafer edge and determines the effect of the tapered boundary region 106 on the etch rate at the wafer edge.
And step two, placing the wafers of the current batch into the reaction cavity to carry out a plasma dry etching process, and adjusting process parameters of the plasma dry etching process according to the influence of the boundary gradual reduction region 106 on the etching rate of the edge of the wafer, which is determined in the step one, so as to compensate the influence of the boundary gradual reduction region 106 on the etching rate of the edge of the wafer, so that the etching depth of the edge region of the wafers of the current batch meets the process requirement.
In the method of the embodiment of the present invention, after the second step is completed, if the etching depth of the edge area of the current batch of wafers meets the process requirement, the step is that: and the etching depth of the edge area of the current batch of wafers is positioned in a specification range corresponding to the target depth, the specification range comprises an upper limit value and a lower limit value, and the target depth is the middle value of the upper limit value and the lower limit value.
The area inside the wafer edge is the wafer bulk area, which is not affected by the gradually decreasing boundary area 106.
And after the second step is finished, the etching depth of the main body area of the wafers in the current batch is in the specification range corresponding to the target depth.
And after the second step is finished, the etching depths of the main body area and the edge area of the wafers in the current batch tend to be equal.
The material of the wafer support ring 102 comprises ceramic.
When the consumption of the wafer support ring 102 exceeds the value corresponding to the compensation range in the second step, the following steps are required:
the wafer support ring 102 is replaced.
An electrostatic chuck is arranged in the wafer placing area 101, and the wafers of the current batch are fixed on the wafer placing area 101 through the electrostatic chuck.
The reaction chamber is provided with a radio frequency source, the plasma is formed by the action of the radio frequency generated by the radio frequency source and the process gas, and the radio frequency time is the cumulative time of the radio frequency generated by the radio frequency source from the beginning of replacing the wafer support ring 102.
The method of the preferred embodiment of the invention:
in the method of the preferred embodiment of the present invention, the APC system is used to implement the first step and the second step. FIG. 3 is a flowchart illustrating the control of the APC system according to the preferred embodiment of the present invention;
and step two, the adjusted process parameters of the plasma dry etching process are adjustable process parameters, and the adjustable process parameters comprise the etching gas quantity or the etching gas temperature in the edge area of the wafer.
Before the first step, establishing a first relation curve between the adjustable process parameter and the etching rate by using the APC system. FIG. 4 is a graph showing a first relationship of the method according to the preferred embodiment of the present invention; the first relation 201 in fig. 4 is illustrated by taking the adjustable process parameter as an example of the etching gas flow, the abscissa in fig. 4 is the etching gas flow, the ordinate is the etching rate, and the fitting formula corresponding to the first relation 201 in fig. 4 is as follows: y = -0.6345 x +39.127; r 2 ＝0.9716。
In the first step, as shown in the step corresponding to the mark 2 in fig. 3, the APC system acquires the etching depth of the edge region of the previous lot of wafers to determine the influence of the boundary gradual decrease region 106 on the etching rate of the wafer edge. Generally, when the method of the embodiment of the present invention is used for the first time, the step corresponding to mark 2 may be performed after the step corresponding to mark 1, that is, the previous wafer lot is completed. If the method of the embodiment of the invention is adopted, the wafer of the step corresponding to the mark 4 is directly adopted by the previous batch of wafers corresponding to the mark 2, namely, the current batch of wafers in the step corresponding to the mark 4 is converted into the previous batch of wafers.
In a second step, as shown in the step corresponding to the mark 3 in fig. 3, the adjustable process parameter value is determined according to the difference feedback between the collected etching depth of the edge region of the previous batch of wafers and the target depth.
In the second step, as shown in the step corresponding to the mark 4 in fig. 3, the plasma dry etching of the wafers in the current batch is completed according to the fed back adjustable process parameter value. And finally, taking the current batch of wafers as the previous batch of wafers and the next batch of wafers as the current batch of wafers, and then repeating the first step and the second step.
After the second step is completed, the step of enabling the etching depth of the edge area of the current batch of wafers to meet the process requirement refers to the step of: and the etching depth of the edge area of the current batch of wafers is positioned in a specification range corresponding to the target depth, the specification range comprises an upper limit value and a lower limit value, and the target depth is the middle value of the upper limit value and the lower limit value.
In the method according to the preferred embodiment of the present invention, the region inside the edge of the wafer is the wafer bulk region, and the wafer bulk region is not affected by the region 106 with gradually decreasing boundary.
And after the second step is finished, the etching depth of the main body area of the wafers in the current batch is in the specification range corresponding to the target depth.
And after the second step is finished, the etching depths of the main body area and the edge area of the wafers in the current batch tend to be equal.
The material of the wafer support ring 102 comprises ceramic.
When the consumption of the wafer support ring 102 exceeds the value corresponding to the compensation range in the second step, the following steps are required:
the wafer support ring 102 is replaced.
An electrostatic chuck is arranged in the wafer placing area 101, and the wafers of the current batch are fixed on the wafer placing area 101 through the electrostatic chuck.
The reaction chamber is provided with a radio frequency source, the plasma is formed by the action of the radio frequency generated by the radio frequency source and the process gas, and the radio frequency time is the cumulative time of the radio frequency generated by the radio frequency source from the beginning of replacing the wafer support ring 102.
The embodiment of the invention aims at the problem that the boundary of the plasma sheath layer can generate the boundary gradually-reducing area 106 after the wafer support ring 102 is consumed, the step of determining the influence of the boundary gradually-reducing area 106 on the etching rate of the edge of the wafer is added before the current batch of wafers are subjected to plasma dry etching, and the step of adjusting the process parameters of the plasma dry etching process according to the influence of the boundary gradually-reducing area 106 on the etching rate of the edge of the wafer is also added for compensating the influence of the boundary gradually-reducing area 106 on the etching rate of the edge of the wafer, so that the etching depth of the edge area of the current batch of wafers can meet the process requirements, and the etching depth of the edge of the wafer can be maintained stably.
The embodiment of the invention can still keep the etching depth of the edge area of the wafer stable under the condition that the part of the reaction cavity is used for longer radio frequency time, so the defect that the part of the reaction cavity needs to be replaced by opening the cavity when the etching depth of the edge area of the wafer deviates to a specification range corresponding to the target depth in the conventional method can be prevented, the service life of the part of the reaction cavity can be prolonged, the process time between two times of cavity opening can be prolonged, and the process cost and the machine productivity can be reduced.
The preferred embodiment of the invention can be realized by an APC system, can realize accurate and stable control of the etching depth of the wafer edge, and can improve the uniformity of the etching depth of the wafer edge in batches and among batches and the uniformity of the etching depth of different areas in the wafer surface.
As shown in fig. 5, the curve 302 is the defect of the variation of the etching depth of the wafer edge with the rf time obtained by the method according to the preferred embodiment of the present invention, and it can be seen that each value on the curve 302 can be well stabilized at the target depth, thereby eliminating the defect that the curve 301 increases with the rf time.
The present invention has been described in detail with reference to the specific embodiments, but these should not be construed as limitations of the present invention. Many variations and modifications may be made by one of ordinary skill in the art without departing from the principles of the present invention, which should also be considered as within the scope of the present invention.

Claims (9)

1. A control method of a plasma dry etching process is characterized by comprising the following steps:
step one, selecting a reaction cavity for carrying out plasma dry etching on wafers of a current batch, wherein the reaction cavity comprises a wafer placing area and a wafer supporting ring positioned on the peripheral side of the wafer placing area, and the wafer supporting ring is consumed along with the increase of radio frequency time; after the wafer supporting ring is consumed, a boundary gradually-decreasing area is generated on a boundary of a plasma sheath layer formed in the reaction cavity, and the boundary gradually-decreasing area is positioned between the edge of the wafer placing area and the wafer supporting ring; the boundary gradually-decreasing area can increase the etching rate of the edge of the wafer, and the influence of the boundary gradually-decreasing area on the etching rate of the edge of the wafer is determined;
secondly, placing the wafers of the current batch into the reaction cavity to carry out a plasma dry etching process, and adjusting process parameters of the plasma dry etching process according to the influence of the boundary gradually-decreasing area determined in the step one on the etching rate of the edge of the wafer so as to compensate the influence of the boundary gradually-decreasing area on the etching rate of the edge of the wafer and enable the etching depth of the edge area of the wafers of the current batch to meet the process requirements;
the process parameters of the plasma dry etching process adjusted in the step two are adjustable process parameters, and the adjustable process parameters comprise the etching gas quantity or the etching gas temperature in the edge area of the wafer;
the APC system is adopted to realize the first step and the second step;
before the first step, establishing a first relation curve between the adjustable process parameter and the etching rate by adopting the APC system;
in the first step, the APC system acquires the etching depth of the edge area of the previous batch of wafers to determine the influence of the boundary gradual reduction area on the etching rate of the wafer edge;
step two, determining the adjustable process parameter value according to the acquired difference value between the etching depth of the edge area of the previous batch of wafers and the target depth in a feedback mode;
in the second step, the plasma dry etching of the wafers in the current batch is finished according to the feedback adjustable process parameter value; and taking the current batch of wafers as the previous batch of wafers and the next batch of wafers as the current batch of wafers, and then repeating the first step and the second step.
2. The method for controlling a plasma dry etching process according to claim 1, wherein: after the second step is completed, the step of enabling the etching depth of the edge area of the current batch of wafers to meet the process requirement refers to the step of: the etching depth of the edge area of the current batch of wafers is located in a specification range corresponding to a target depth, the specification range comprises an upper limit value and a lower limit value, and the target depth is the middle value of the upper limit value and the lower limit value.
3. The method for controlling a plasma dry etching process according to claim 2, wherein: the area inside the edge of the wafer is a wafer main body area, and the wafer main body area is not influenced by the area with the gradually-reduced boundary.
4. A method for controlling a plasma dry etching process according to claim 3, wherein: and after the second step is finished, the etching depth of the main body area of the wafers in the current batch is in the specification range corresponding to the target depth.
5. The method of claim 4, wherein the step of controlling the plasma dry etching process comprises: and after the second step is finished, the etching depths of the main body area and the edge area of the current batch of wafers tend to be equal.
6. The method for controlling a plasma dry etching process according to claim 1, wherein: the material of the wafer support ring comprises ceramic.
7. The method of claim 6, wherein: when the consumption of the wafer support ring exceeds the value corresponding to the compensation range in the second step, the following steps need to be carried out:
and replacing the wafer support ring.
8. The method for controlling a plasma dry etching process according to claim 1, wherein: and an electrostatic chuck is arranged in the wafer placing area, and the wafers of the current batch are fixed on the wafer placing area through the electrostatic chuck.
9. The method of claim 6, wherein: and the reaction cavity is internally provided with a radio frequency source, the plasma is formed under the action of radio frequency generated by the radio frequency source and process gas, and the radio frequency time is the accumulated time of the wafer support ring from the replacement to the generation of the radio frequency by the radio frequency source.
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JP5097632B2 (en) * 2008-07-11 2012-12-12 株式会社日立ハイテクノロジーズ Plasma etching processing equipment
KR101559913B1 (en) * 2009-06-25 2015-10-27 삼성전자주식회사 Plasma dry etching apparatus
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CN110246737A (en) * 2018-03-08 2019-09-17 长鑫存储技术有限公司 A kind of lithographic method of semiconductor crystal circle structure

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