US20210193475A1 - Method of manufacturing semiconductor device, and etching gas - Google Patents

Method of manufacturing semiconductor device, and etching gas Download PDF

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Publication number
US20210193475A1
US20210193475A1 US17/197,544 US202117197544A US2021193475A1 US 20210193475 A1 US20210193475 A1 US 20210193475A1 US 202117197544 A US202117197544 A US 202117197544A US 2021193475 A1 US2021193475 A1 US 2021193475A1
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United States
Prior art keywords
gas
chain hydrocarbon
hydrocarbon compound
etching
etching gas
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US17/197,544
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Takaya Ishino
Toshiyuki Sasaki
Mitsuharu SHIMODA
Hisashi Shimizu
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Kanto Denka Kogyo Co Ltd
Kioxia Corp
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Kanto Denka Kogyo Co Ltd
Kioxia Corp
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Publication of US20210193475A1 publication Critical patent/US20210193475A1/en
Assigned to KANTO DENKA KOGYO CO., LTD., KIOXIA CORPORATION reassignment KANTO DENKA KOGYO CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SHIMIZU, HISASHI, SHIMODA, Mitsuharu, SASAKI, TOSHIYUKI, ISHINO, TAKAYA
Priority to US18/325,640 priority Critical patent/US20230307244A1/en
Abandoned legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09KMATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K13/00Etching, surface-brightening or pickling compositions
    • C09K13/04Etching, surface-brightening or pickling compositions containing an inorganic acid
    • C09K13/08Etching, surface-brightening or pickling compositions containing an inorganic acid containing a fluorine compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels

Definitions

  • Embodiments described herein relate to a method of manufacturing a semiconductor device, and etching gas.
  • a concave portion is often formed in a process target film by etching with fluorohydrocarbon (C x H y F z ) gas.
  • FIGS. 1A to 1C are sectional views showing a method of manufacturing a semiconductor device of a first embodiment
  • FIGS. 2A and 2B are sectional views for explaining advantages of the method of manufacturing the semiconductor device of the first embodiment
  • FIG. 3 is a schematic sectional view for explaining advantages of the method of manufacturing the semiconductor device of the first embodiment
  • FIGS. 4A to 4C are tables showing examples of etching gas of the first embodiment
  • FIG. 5 is a graph for explaining characteristics of the etching gas of the first embodiment.
  • FIG. 6 is a sectional view showing a structure of the semiconductor device of the first embodiment.
  • FIGS. 1A to 6 the same or similar components are given the same signs and their duplicated description is omitted.
  • a method of manufacturing a semiconductor device includes etching a film with etching gas that includes a chain hydrocarbon compound expressed as C x H y F z where C, H and F respectively denote carbon, hydrogen and fluorine, “x” denotes an integer of three or more, and “y” and “z” respectively denote integers of one or more. Furthermore, the C x H y F z is the chain hydrocarbon compound in which each of terminal carbon atoms on a carbon chain of the chain hydrocarbon compound is bonded only to fluorine atoms out of hydrogen and fluorine atoms.
  • FIGS. 1A to 1C are sectional views showing a method of manufacturing a semiconductor device of a first embodiment.
  • the semiconductor device of the present embodiment will be described by describing its example “three-dimensional memory.”
  • a lower layer 2 is formed on a substrate 1 , and a stacked film is formed which alternately includes a plurality of sacrificial layers 3 and a plurality of insulating layers 4 , on the lower layer 2 ( FIG. 1A ).
  • the sacrificial layers 3 are examples of first films
  • the insulating layers 4 are examples of second films.
  • an upper layer 5 is formed on this stacked film, and a mask layer 6 is formed on the upper layer 5 ( FIG. 1A ).
  • the substrate 1 is, for example, a semiconductor substrate such as a silicon (Si) substrate.
  • FIG. 1A shows an X-direction and a Y-direction which are parallel to a surface of the substrate 1 and perpendicular to each other, and a Z-direction perpendicular to the surface of the substrate 1 .
  • the +Z-direction is regarded as the upward direction
  • the ⁇ Z-direction is regarded as the downward direction.
  • the ⁇ Z-direction may coincide with the direction of gravity or may not coincide with the direction of gravity.
  • the lower layer 2 is, for example, an insulator such as a silicon oxide film (SiO 2 ) or a silicon nitride film (SiN), or a conducting layer formed between insulators.
  • the sacrificial layers 3 are, for example, silicon nitride films, and the insulating layers 4 are, for example, silicon oxide films.
  • the upper layer 5 is, for example, an insulator such as a silicon oxide film or a silicon nitride film, or a conducting layer formed between insulators.
  • the mask layer 6 is, for example, an organic hard mask layer.
  • an opening pattern for forming a memory hole M is formed in the mask layer 6 by lithography and dry etching ( FIG. 1B ).
  • the memory hole M penetrating the upper layer 5 , the plurality of insulating layers 4 , the plurality of sacrificial layers 3 and the lower layer 2 is formed by dry etching using the mask layer 6 ( FIG. 1B ).
  • An aspect ratio of the memory hole M is, for example, 10 or more.
  • the memory hole M is an example of a concave portion.
  • the memory hole M of the present embodiment is formed by dry etching using etching gas including C x H y F z (fluorohydrocarbon) gas.
  • C, H and F respectively denote carbon, hydrogen and fluorine
  • x”, “y” and “z” respectively denote integers of one or more. Consequently, a protecting film 7 is formed on side faces (lateral faces) of the insulating layers 4 and the sacrificial layers 3 in the memory hole M during the dry etching, and the side faces of the insulating layers 4 and the sacrificial layers 3 are protected by the protecting film 7 .
  • the protecting film 7 of the present embodiment is a C m F n (fluorocarbon) film.
  • the C x H y F z of the present embodiment is, for example, a chain hydrocarbon compound in which “x” is an integer of three or more and “y” and “z” are respectively integers of one or more.
  • each of terminal carbon (C) atoms on a carbon chain of C x H y F z gas is bonded only to fluorine atoms out of hydrogen atoms (H atoms) and fluorine atoms (F atoms).
  • H atoms hydrogen atoms
  • F atoms fluorine atoms
  • none of H atoms are bonded to the terminal C atoms on the carbon chain.
  • the C x H y F z molecule is a linear chain-type chain C 4 H 4 F 6 molecule
  • the C 4 H 4 F 6 molecule includes two terminal C atoms and two non-terminal C atoms. The two terminal C atoms are bonded only to F atoms out of H atoms and F atoms and are not bonded to H atoms.
  • the C x H y F z molecule of the present embodiment may be other than a linear chain-type chain C x H y F z molecule as long as it includes terminal C atoms, and may be, for example, a side chain-type chain C x H y F z molecule.
  • the side chain-type chain C x H y F z molecule includes three or more terminal C atoms.
  • the present embodiment makes it possible to form the memory hole M while preferably protecting the side faces of the insulating layers 4 and the sacrificial layers 3 in the memory hole M with the protecting film 7 , by performing dry etching using the etching gas as above. Details of such an effect of the present embodiment are mentioned later.
  • the block insulator 11 , the charge storage capacitor 12 and the tunnel insulator 13 are removed from a bottom part of the memory hole M, and a channel semiconductor layer 14 and a core insulator 15 are sequentially formed in the memory hole M ( FIG. 1C ).
  • the charge storage capacitor 12 is, for example, a silicon nitride film.
  • the channel semiconductor layer 14 is, for example, a polysilicon layer.
  • the block insulator 11 , the tunnel insulator 13 and the core insulator 15 are, for example, silicon oxide films or metal insulators.
  • the sacrificial layers 3 are removed via a slit or a hole formed at a different position from that of the memory hole M to form a plurality of hollows between the insulating layers 4 , and a plurality of electrode layers are formed in these hollows. Moreover, various plugs, lines and inter layer dielectrics and the like are formed on the substrate 1 . As above, the semiconductor device of the present embodiment is manufactured.
  • FIGS. 2A and 2B are sectional views for explaining advantages of the method of manufacturing the semiconductor device of the first embodiment.
  • FIG. 2A shows the protecting film 7 that is formed down to a deep place in the memory hole M.
  • the side faces of the insulating layers 4 and the sacrificial layers 3 are sufficiently protected by the protecting film 7 , the side faces of the insulating layers 4 and the sacrificial layers 3 are scarcely shaved during etching.
  • FIG. 2B shows the protecting film 7 that is formed only at a shallow place in the memory hole M.
  • the side faces of the insulating layers 4 and the sacrificial layers 3 are not sufficiently protected by the protecting film 7 , the side faces of the insulating layers 4 and the sacrificial layers 3 are shaved during etching by a larger value than a predetermined one. This results in a depression called bowing in these side faces (refer to sign B). This problem is more remarkable with a higher aspect ratio of the memory hole M.
  • the insulating layers 4 and the sacrificial layers 3 of the present embodiment are etched using plasma generated from the C x H y F z gas in the step of FIG. 1B .
  • the protecting film 7 is formed with radicals included in the plasma, and the side faces of the insulating layers 4 and the sacrificial layers 3 are etched with ions included in the plasma. It is therefore considered that the protecting film 7 as shown in FIG. 2A is formed when radicals can reach a deep place in the memory hole M. On the other hand, it is considered that the protecting film 7 as shown in FIG. 2B is formed when radicals cannot reach a deep place in the memory hole M.
  • FIG. 3 is a schematic sectional view for explaining advantages of the method of manufacturing the semiconductor device of the first embodiment.
  • Sign P1 denotes a radical generated by eliminating an H atom from a C 4 HF 5 molecule in which a terminal C atom is bonded to the H atom.
  • Etching gas including this C 4 HF 5 molecule (CF 2 ⁇ CF—CF ⁇ CHF) is, for example, etching gas of a comparative example of the present embodiment.
  • sign P2 denotes a radical generated by eliminating an H atom from a C 4 HF 5 molecule in which a non-terminal C atom is bonded to the H atom (namely, the terminal C atoms are not bonded to the H atom).
  • Etching gas including this C 4 HF 5 molecule (CF 2 ⁇ CF—CH ⁇ CF 2 ) is an example of etching gas of the present embodiment.
  • the bond energy of a C—H bond is smaller than the bond energy of a C—F bond, and the C—H bond is more easily cleaved than the C—F bond. Therefore, when the C x H y F z molecule is made into plasma, a C—H bond is often cleaved to leave an unpaired electron at the place of the C—H bond.
  • Sign P1 denotes the radical that has an unpaired electron at the terminal C atom
  • sign P2 denotes the radical that has an unpaired electron at the non-terminal C atom.
  • Unpaired electrons have high reactivity and this causes radicals to stick onto the side faces of the insulating layers 4 and the sacrificial layers 3 .
  • a radical has an unpaired electron at a non-terminal C atom as denoted by sign P2
  • the radical scarcely sticks onto the side faces of the insulating layers 4 and the sacrificial layers 3 because of large steric hindrance around the unpaired electron.
  • F atoms around the unpaired electron disturb the reaction of the unpaired electron with the side faces of the insulating layers 4 and the sacrificial layers 3 .
  • the radical with sign P1 scarcely reach the deep place in the memory hole M since it has a high sticking possibility onto the side faces of the insulating layers 4 and the sacrificial layers 3 .
  • the radical with sign P2 easily reaches the deep place in the memory hole M since it has a low sticking possibility onto the side faces of the insulating layers 4 and the sacrificial layers 3 .
  • the present embodiment therefore makes it possible to form the protecting film 7 down to a deep place in the memory hole M by using radicals as denoted by sign P2 (see FIG. 2A ).
  • FIGS. 4A to 4C are tables showing examples of the etching gas of the first embodiment.
  • FIGS. 4A to 4C show various kinds of C x H y F z gas where the value of “x” is an integer from 3 to 5 and y ⁇ z.
  • the reason why the value of “x” is 3 to 5 is that C x H y F z with the value of “x” being 6 or more has low vapor pressure and is hard to feed as gas at the normal temperature.
  • Each value of “D.B.” in the tables represents the number of double bond(s) in a C x H y F z molecule.
  • FIG. 4A also shows cyclic C 4 F 8 for reference.
  • FIG. 5 is a graph for explaining characteristics of the etching gas of the first embodiment.
  • FIG. 5 shows deposition rates of the protecting film 7 as bars and uniformities (evennesses) of the protecting film 7 as points for the various kinds of C x H y F z gas.
  • the molecular structures of the C x H y F z gas are as shown in FIGS. 4A to 4C .
  • the uniformities of the protecting film 7 were evaluated with the protecting film 7 in the case using the cyclic C 4 F 8 gas, which was often used in processing insulators, being as a reference.
  • the uniformity was evaluated to be better as a change in film thickness of the protecting film 7 in the depth direction (Z-direction) was smaller, and specifically, the uniformity was evaluated to be better as the value of uniformity was lower.
  • the etching gas of the present embodiment therefore desirably includes at least any of these kinds of gas as the C x H y F z gas.
  • the C 4 HF 5 gas, the C 4 H 2 F 4 gas or the C 4 H 2 F 6 gas is desirably used when it is desirable to make the deposition rate of the protecting film 7 high while making the uniformity of the protecting film 7 good.
  • the terminal C atoms of the C 4 HF 5 gas, the C 4 H 2 F 4 gas, the C 4 H 2 F 6 gas, the C 4 H 4 F 6 gas, the C 3 HF 5 gas and the C 5 H 2 F 10 gas shown in FIG. 5 are bonded only to F atoms.
  • the dry etching of the present embodiment is therefore desirably performed using the C x H y F z gas in which the terminal C atoms are bonded only to F atoms.
  • a molecular structure of C 4 HF 5 is expressed as CF 2 ⁇ CF—CH ⁇ CF 2
  • a molecular structure of C 4 H 2 F 4 is expressed as CF 2 ⁇ CH—CH ⁇ CF 2
  • a molecular structure of C 4 H 2 F 6 is expressed as CF 3 —CH ⁇ CH—CF 3 .
  • a molecular structure of C 4 H 4 F 6 is expressed as CF 3 —CH 2 —CH 2 —CF 3
  • a molecular structure of C 3 HF 5 is expressed as CF 2 ⁇ CH—CF 3
  • a molecular structure of C 5 H 2 F 10 is expressed as CF 3 —CHF—CHF—CF 2 —CF 3 .
  • Examples of the C x H y F z gas of the present embodiment are not limited to these.
  • Other examples of the C x H y F z gas of the present embodiment include C 4 H 4 F 6 (CF 3 —CH 2 —CH 2 —CF 3 ) gas, C 4 H 3 F 7 (CF 3 —CHF—CH 2 —CF 3 ) gas, C 4 H 2 F 8 (CF 3 —CHF—CHF—CF 3 or CF 3 —CF 2 —CH 2 —CF 3 ) gas, C 4 HF 9 (CF 3 —CHF—CF 2 —CF 3 ) gas and C 5 H 6 F 6 (CF 3 —CH 2 —CH 2 —CH 2 —CF 3 ) gas.
  • C x H y F z gas of the present embodiment include some kinds of isomers of C 5 H 5 F 7 gas, C 5 H 4 F 8 gas, C 5 H 3 F 9 gas, C 5 H 2 F 10 gas, C 5 HF 11 gas and the like, the terminal C atoms in these isomers being bonded only to F atoms.
  • the etching gas of the present embodiment may be mixture gas including the C x H y F z gas and other gas or may be mixture gas including two or more kinds of C x H y F z gas.
  • the etching gas of the present embodiment may include oxygen gas, rare gas or C a F b (fluorocarbon (fluorocarbon compound)) gas along with the C x H y F z gas.
  • a and “b” denote integers of one or more.
  • Examples of the C a F b gas include CF 4 gas, C 2 F 4 gas, C 3 F 6 gas, C 4 F 6 gas and C 4 F 8 gas.
  • the insulating layers 4 and the sacrificial layers 3 of the present embodiment are etched using plasma generated from the C x H y F z gas in the step of FIG. 1B .
  • the protecting film 7 is formed with radicals included in the plasma, and the side faces of the insulating layers 4 and the sacrificial layers 3 are etched with ions included in the plasma.
  • An average density (concentration) of the plasma in the etching treatment process chamber in this stage is, for example, 5.0 ⁇ 10 9 to 3.0 ⁇ 10 11 quantity/cm 3 .
  • the plasma of the present embodiment can include first to third radicals below.
  • the first radical is generated by eliminating only H atom(s) out of H and F atoms from a C x H y F z molecule.
  • the second radical is generated by eliminating only F atom(s) out of H and F atoms from a C x H y F z molecule.
  • the third radical is generated by eliminating both of H and F atoms from a C x H y F z molecule.
  • the radical denoted by sign P2 in FIG. 3 is an example of the first radical.
  • the C x H y F z gas is desirably made into the plasma such that many first radicals are generated and not so many second and third radicals are generated.
  • the C x H y F z gas is desirably made into the plasma such that a concentration of first radicals in the plasma is larger than a total concentration of second and third radicals in the plasma. The reason is that the steric hindrances around unpaired electrons of the second and third radicals are smaller than the steric hindrance around an unpaired electron of the first radical in many cases, which makes sticking possibilities of the second and third radicals higher than a sticking possibility of the first radical.
  • FIG. 6 is a sectional view showing a structure of a semiconductor device of the first embodiment.
  • FIG. 6 shows an example of the semiconductor device manufactured by the method of the present embodiment.
  • FIG. 6 shows a memory cell part and a step-like contact part of a three-dimensional memory.
  • the lower layer 2 is constituted of a first insulator 2 a , a source-side conducting layer 2 b and a second insulator 2 c
  • the upper layer 5 is constituted of a cover insulator 5 a , a drain-side conducting layer 5 b , a first inter layer dielectric 5 c and a second inter layer dielectric 5 d .
  • the channel semiconductor layers 14 are electrically connected to a diffusion layer L in the substrate 1 .
  • the sacrificial layers 3 are replaced by electrode layers 3 ′ including tungsten (W) layers or the like.
  • the electrode layers 3 ′ are examples of the first films.
  • FIG. 6 further shows contact plugs 16 formed in contact holes H of the upper layer 5 .
  • the contact plugs 16 are formed so as to be electrically connected to the corresponding electrode layers 3 ′.
  • the memory holes M of the present embodiment are formed using the etching gas including the C x H y F z gas, and each of terminal C atoms on a carbon chain of the C x H y F z gas is bonded only to F atoms out of H atoms and F atoms.
  • the present embodiment therefore makes it possible to form the protecting films 7 down to deep places in the memory holes M and to preferably protect the side faces of the insulating layers 4 and the sacrificial layers 3 in the memory holes M with the protecting films 7 .
  • the present embodiment therefore makes it possible to preferably etch the insulating layers 4 and the sacrificial layers 3 to form the memory holes M.
  • the present embodiment makes it possible to form even the memory holes M having a high aspect ratio, for example, of 10 or more into preferable shapes.
  • the plurality of electrode layers 3 ′ and the plurality of insulating layers 4 may be alternately formed on the lower layer 2 instead of alternately forming the plurality of sacrificial layers 3 and the plurality of insulating layers 4 on the lower layer 2 .
  • the step is unnecessary in which the sacrificial layers 3 are replaced by the electrode layers 3 ′.
  • the dry etching of the present embodiment can be applied to a step other than the processing of the memory holes M, for example, can be applied to a step of processing concave portions other than the memory holes M.

Abstract

In one embodiment, a method of manufacturing a semiconductor device includes etching a film with etching gas that includes a chain hydrocarbon compound expressed as CxHyFz where C, H and F respectively denote carbon, hydrogen and fluorine, “x” denotes an integer of three or more, and “y” and “z” respectively denote integers of one or more. Furthermore, the CxHyFz is the chain hydrocarbon compound in which each of terminal carbon atoms on a carbon chain of the chain hydrocarbon compound is bonded only to fluorine atoms out of hydrogen and fluorine atoms.

Description

    CROSS REFERENCE TO RELATED APPLICATION
  • This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2018-169983, filed on Sep. 11, 2018, and the prior International Patent Application No. PCT/JP2019/027316, filed on Jul. 10, 2019, the entire contents of which are incorporated herein by reference.
  • FIELD
  • Embodiments described herein relate to a method of manufacturing a semiconductor device, and etching gas.
  • BACKGROUND
  • When a semiconductor device such as a three-dimensional memory is manufactured, a concave portion is often formed in a process target film by etching with fluorohydrocarbon (CxHyFz) gas.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIGS. 1A to 1C are sectional views showing a method of manufacturing a semiconductor device of a first embodiment;
  • FIGS. 2A and 2B are sectional views for explaining advantages of the method of manufacturing the semiconductor device of the first embodiment;
  • FIG. 3 is a schematic sectional view for explaining advantages of the method of manufacturing the semiconductor device of the first embodiment;
  • FIGS. 4A to 4C are tables showing examples of etching gas of the first embodiment;
  • FIG. 5 is a graph for explaining characteristics of the etching gas of the first embodiment; and
  • FIG. 6 is a sectional view showing a structure of the semiconductor device of the first embodiment.
  • DETAILED DESCRIPTION
  • Embodiments will now be explained with reference to the accompanying drawings. In FIGS. 1A to 6, the same or similar components are given the same signs and their duplicated description is omitted.
  • In one embodiment, a method of manufacturing a semiconductor device includes etching a film with etching gas that includes a chain hydrocarbon compound expressed as CxHyFz where C, H and F respectively denote carbon, hydrogen and fluorine, “x” denotes an integer of three or more, and “y” and “z” respectively denote integers of one or more. Furthermore, the CxHyFz is the chain hydrocarbon compound in which each of terminal carbon atoms on a carbon chain of the chain hydrocarbon compound is bonded only to fluorine atoms out of hydrogen and fluorine atoms.
  • First Embodiment
  • FIGS. 1A to 1C are sectional views showing a method of manufacturing a semiconductor device of a first embodiment. The semiconductor device of the present embodiment will be described by describing its example “three-dimensional memory.”
  • First, a lower layer 2 is formed on a substrate 1, and a stacked film is formed which alternately includes a plurality of sacrificial layers 3 and a plurality of insulating layers 4, on the lower layer 2 (FIG. 1A). The sacrificial layers 3 are examples of first films, and the insulating layers 4 are examples of second films. Next, an upper layer 5 is formed on this stacked film, and a mask layer 6 is formed on the upper layer 5 (FIG. 1A).
  • The substrate 1 is, for example, a semiconductor substrate such as a silicon (Si) substrate. FIG. 1A shows an X-direction and a Y-direction which are parallel to a surface of the substrate 1 and perpendicular to each other, and a Z-direction perpendicular to the surface of the substrate 1. In the present specification, the +Z-direction is regarded as the upward direction, and the −Z-direction is regarded as the downward direction. The −Z-direction may coincide with the direction of gravity or may not coincide with the direction of gravity.
  • The lower layer 2 is, for example, an insulator such as a silicon oxide film (SiO2) or a silicon nitride film (SiN), or a conducting layer formed between insulators. The sacrificial layers 3 are, for example, silicon nitride films, and the insulating layers 4 are, for example, silicon oxide films. The upper layer 5 is, for example, an insulator such as a silicon oxide film or a silicon nitride film, or a conducting layer formed between insulators. The mask layer 6 is, for example, an organic hard mask layer.
  • Next, an opening pattern for forming a memory hole M is formed in the mask layer 6 by lithography and dry etching (FIG. 1B). Next, the memory hole M penetrating the upper layer 5, the plurality of insulating layers 4, the plurality of sacrificial layers 3 and the lower layer 2 is formed by dry etching using the mask layer 6 (FIG. 1B). An aspect ratio of the memory hole M is, for example, 10 or more. The memory hole M is an example of a concave portion.
  • The memory hole M of the present embodiment is formed by dry etching using etching gas including CxHyFz (fluorohydrocarbon) gas. Note that C, H and F respectively denote carbon, hydrogen and fluorine, and “x”, “y” and “z” respectively denote integers of one or more. Consequently, a protecting film 7 is formed on side faces (lateral faces) of the insulating layers 4 and the sacrificial layers 3 in the memory hole M during the dry etching, and the side faces of the insulating layers 4 and the sacrificial layers 3 are protected by the protecting film 7. The protecting film 7 of the present embodiment is a CmFn (fluorocarbon) film. Note that “m” and “n” respectively denote integers of one or more. The CxHyFz of the present embodiment is, for example, a chain hydrocarbon compound in which “x” is an integer of three or more and “y” and “z” are respectively integers of one or more.
  • In the present embodiment, each of terminal carbon (C) atoms on a carbon chain of CxHyFz gas is bonded only to fluorine atoms out of hydrogen atoms (H atoms) and fluorine atoms (F atoms). In other words, none of H atoms are bonded to the terminal C atoms on the carbon chain. For example, when the CxHyFz molecule is a linear chain-type chain C4H4F6 molecule, the C4H4F6 molecule includes two terminal C atoms and two non-terminal C atoms. The two terminal C atoms are bonded only to F atoms out of H atoms and F atoms and are not bonded to H atoms. All the four H atoms are bonded to the non-terminal C atoms. The CxHyFz molecule of the present embodiment may be other than a linear chain-type chain CxHyFz molecule as long as it includes terminal C atoms, and may be, for example, a side chain-type chain CxHyFz molecule. The side chain-type chain CxHyFz molecule includes three or more terminal C atoms.
  • The present embodiment makes it possible to form the memory hole M while preferably protecting the side faces of the insulating layers 4 and the sacrificial layers 3 in the memory hole M with the protecting film 7, by performing dry etching using the etching gas as above. Details of such an effect of the present embodiment are mentioned later.
  • Next, the protecting film 7 and the mask layer 6 are removed, and a block insulator 11, a charge storage capacitor 12 and a tunnel insulator 13 are sequentially formed in the memory hole M (FIG. 1C). Next, the block insulator 11, the charge storage capacitor 12 and the tunnel insulator 13 are removed from a bottom part of the memory hole M, and a channel semiconductor layer 14 and a core insulator 15 are sequentially formed in the memory hole M (FIG. 1C). The charge storage capacitor 12 is, for example, a silicon nitride film. The channel semiconductor layer 14 is, for example, a polysilicon layer. The block insulator 11, the tunnel insulator 13 and the core insulator 15 are, for example, silicon oxide films or metal insulators.
  • After that, the sacrificial layers 3 are removed via a slit or a hole formed at a different position from that of the memory hole M to form a plurality of hollows between the insulating layers 4, and a plurality of electrode layers are formed in these hollows. Moreover, various plugs, lines and inter layer dielectrics and the like are formed on the substrate 1. As above, the semiconductor device of the present embodiment is manufactured.
  • FIGS. 2A and 2B are sectional views for explaining advantages of the method of manufacturing the semiconductor device of the first embodiment.
  • FIG. 2A shows the protecting film 7 that is formed down to a deep place in the memory hole M. In this case, since the side faces of the insulating layers 4 and the sacrificial layers 3 are sufficiently protected by the protecting film 7, the side faces of the insulating layers 4 and the sacrificial layers 3 are scarcely shaved during etching.
  • On the other hand, FIG. 2B shows the protecting film 7 that is formed only at a shallow place in the memory hole M. In this case, since the side faces of the insulating layers 4 and the sacrificial layers 3 are not sufficiently protected by the protecting film 7, the side faces of the insulating layers 4 and the sacrificial layers 3 are shaved during etching by a larger value than a predetermined one. This results in a depression called bowing in these side faces (refer to sign B). This problem is more remarkable with a higher aspect ratio of the memory hole M.
  • The insulating layers 4 and the sacrificial layers 3 of the present embodiment are etched using plasma generated from the CxHyFz gas in the step of FIG. 1B. Specifically, the protecting film 7 is formed with radicals included in the plasma, and the side faces of the insulating layers 4 and the sacrificial layers 3 are etched with ions included in the plasma. It is therefore considered that the protecting film 7 as shown in FIG. 2A is formed when radicals can reach a deep place in the memory hole M. On the other hand, it is considered that the protecting film 7 as shown in FIG. 2B is formed when radicals cannot reach a deep place in the memory hole M.
  • FIG. 3 is a schematic sectional view for explaining advantages of the method of manufacturing the semiconductor device of the first embodiment.
  • Sign P1 denotes a radical generated by eliminating an H atom from a C4HF5 molecule in which a terminal C atom is bonded to the H atom. Etching gas including this C4HF5 molecule (CF2═CF—CF═CHF) is, for example, etching gas of a comparative example of the present embodiment.
  • On the other hand, sign P2 denotes a radical generated by eliminating an H atom from a C4HF5 molecule in which a non-terminal C atom is bonded to the H atom (namely, the terminal C atoms are not bonded to the H atom). Etching gas including this C4HF5 molecule (CF2═CF—CH═CF2) is an example of etching gas of the present embodiment.
  • In a CxHyFz molecule, the bond energy of a C—H bond is smaller than the bond energy of a C—F bond, and the C—H bond is more easily cleaved than the C—F bond. Therefore, when the CxHyFz molecule is made into plasma, a C—H bond is often cleaved to leave an unpaired electron at the place of the C—H bond. Sign P1 denotes the radical that has an unpaired electron at the terminal C atom, and sign P2 denotes the radical that has an unpaired electron at the non-terminal C atom.
  • Unpaired electrons have high reactivity and this causes radicals to stick onto the side faces of the insulating layers 4 and the sacrificial layers 3. In this case, when a radical has an unpaired electron at a non-terminal C atom as denoted by sign P2, the radical scarcely sticks onto the side faces of the insulating layers 4 and the sacrificial layers 3 because of large steric hindrance around the unpaired electron. In other words, F atoms around the unpaired electron disturb the reaction of the unpaired electron with the side faces of the insulating layers 4 and the sacrificial layers 3. On the other hand, when a radical has an unpaired electron at a terminal C atom as denoted by sign P1, the radical easily sticks onto the side faces of the insulating layers 4 and the sacrificial layers 3 because of small steric hindrance around the unpaired electron.
  • It is consequently considered that the radical with sign P1 scarcely reach the deep place in the memory hole M since it has a high sticking possibility onto the side faces of the insulating layers 4 and the sacrificial layers 3. On the other hand, it is considered that the radical with sign P2 easily reaches the deep place in the memory hole M since it has a low sticking possibility onto the side faces of the insulating layers 4 and the sacrificial layers 3. The present embodiment therefore makes it possible to form the protecting film 7 down to a deep place in the memory hole M by using radicals as denoted by sign P2 (see FIG. 2A).
  • FIGS. 4A to 4C are tables showing examples of the etching gas of the first embodiment.
  • FIGS. 4A to 4C show various kinds of CxHyFz gas where the value of “x” is an integer from 3 to 5 and y≤z. The reason why the value of “x” is 3 to 5 is that CxHyFz with the value of “x” being 6 or more has low vapor pressure and is hard to feed as gas at the normal temperature. FIG. 4A shows examples with four C atoms (x=4), FIG. 4B shows an example with three C atoms (x=3), and FIG. 4C shows an example with five C atoms (x=5). Each value of “D.B.” in the tables represents the number of double bond(s) in a CxHyFz molecule. FIG. 4A also shows cyclic C4F8 for reference.
  • FIG. 5 is a graph for explaining characteristics of the etching gas of the first embodiment.
  • FIG. 5 shows deposition rates of the protecting film 7 as bars and uniformities (evennesses) of the protecting film 7 as points for the various kinds of CxHyFz gas. The molecular structures of the CxHyFz gas are as shown in FIGS. 4A to 4C.
  • From experiments of etching for the various kinds of CxHyFz gas, the results shown in FIG. 5 were obtained. The uniformities of the protecting film 7 were evaluated with the protecting film 7 in the case using the cyclic C4F8 gas, which was often used in processing insulators, being as a reference. The uniformity was evaluated to be better as a change in film thickness of the protecting film 7 in the depth direction (Z-direction) was smaller, and specifically, the uniformity was evaluated to be better as the value of uniformity was lower.
  • Consequently, it was found that the uniformity of the protecting film 7 was better in the cases using C4HF5 gas, C4H2F4 gas, C4H2F6 gas, C4H4F6 gas, C3HF5 gas and C5H2F10 gas shown in FIG. 5 than in the case using the cyclic C4F8 gas. The etching gas of the present embodiment therefore desirably includes at least any of these kinds of gas as the CxHyFz gas. Moreover, the C4HF5 gas, the C4H2F4 gas or the C4H2F6 gas is desirably used when it is desirable to make the deposition rate of the protecting film 7 high while making the uniformity of the protecting film 7 good.
  • Referring to FIGS. 4A to 4C, it is clear that the terminal C atoms of the C4HF5 gas, the C4H2F4 gas, the C4H2F6 gas, the C4H4F6 gas, the C3HF5 gas and the C5H2F10 gas shown in FIG. 5 are bonded only to F atoms. The dry etching of the present embodiment is therefore desirably performed using the CxHyFz gas in which the terminal C atoms are bonded only to F atoms.
  • In FIGS. 4A to 4C, a molecular structure of C4HF5 is expressed as CF2═CF—CH═CF2, a molecular structure of C4H2F4 is expressed as CF2═CH—CH═CF2, and a molecular structure of C4H2F6 is expressed as CF3—CH═CH—CF3. Moreover, a molecular structure of C4H4F6 is expressed as CF3—CH2—CH2—CF3, a molecular structure of C3HF5 is expressed as CF2═CH—CF3, and a molecular structure of C5H2F10 is expressed as CF3—CHF—CHF—CF2—CF3.
  • Examples of the CxHyFz gas of the present embodiment are not limited to these. Other examples of the CxHyFz gas of the present embodiment include C4H4F6 (CF3—CH2—CH2—CF3) gas, C4H3F7 (CF3—CHF—CH2—CF3) gas, C4H2F8 (CF3—CHF—CHF—CF3 or CF3—CF2—CH2—CF3) gas, C4HF9 (CF3—CHF—CF2—CF3) gas and C5H6F6 (CF3—CH2—CH2—CH2—CF3) gas. Still other examples of the CxHyFz gas of the present embodiment include some kinds of isomers of C5H5F7 gas, C5H4F8 gas, C5H3F9 gas, C5H2F10 gas, C5HF11 gas and the like, the terminal C atoms in these isomers being bonded only to F atoms.
  • The etching gas of the present embodiment may be mixture gas including the CxHyFz gas and other gas or may be mixture gas including two or more kinds of CxHyFz gas. For example, the etching gas of the present embodiment may include oxygen gas, rare gas or CaFb (fluorocarbon (fluorocarbon compound)) gas along with the CxHyFz gas. Note that “a” and “b” denote integers of one or more. Examples of the CaFb gas include CF4 gas, C2F4 gas, C3F6 gas, C4F6 gas and C4F8 gas.
  • Herein, plasma generated from the CxHyFz gas is described.
  • The insulating layers 4 and the sacrificial layers 3 of the present embodiment are etched using plasma generated from the CxHyFz gas in the step of FIG. 1B. Specifically, the protecting film 7 is formed with radicals included in the plasma, and the side faces of the insulating layers 4 and the sacrificial layers 3 are etched with ions included in the plasma. An average density (concentration) of the plasma in the etching treatment process chamber in this stage is, for example, 5.0×109 to 3.0×1011 quantity/cm3.
  • The plasma of the present embodiment can include first to third radicals below. The first radical is generated by eliminating only H atom(s) out of H and F atoms from a CxHyFz molecule. The second radical is generated by eliminating only F atom(s) out of H and F atoms from a CxHyFz molecule. The third radical is generated by eliminating both of H and F atoms from a CxHyFz molecule. The radical denoted by sign P2 in FIG. 3 is an example of the first radical.
  • In the present embodiment, the CxHyFz gas is desirably made into the plasma such that many first radicals are generated and not so many second and third radicals are generated. Specifically, the CxHyFz gas is desirably made into the plasma such that a concentration of first radicals in the plasma is larger than a total concentration of second and third radicals in the plasma. The reason is that the steric hindrances around unpaired electrons of the second and third radicals are smaller than the steric hindrance around an unpaired electron of the first radical in many cases, which makes sticking possibilities of the second and third radicals higher than a sticking possibility of the first radical.
  • FIG. 6 is a sectional view showing a structure of a semiconductor device of the first embodiment.
  • FIG. 6 shows an example of the semiconductor device manufactured by the method of the present embodiment. FIG. 6 shows a memory cell part and a step-like contact part of a three-dimensional memory. In FIG. 6, the lower layer 2 is constituted of a first insulator 2 a, a source-side conducting layer 2 b and a second insulator 2 c, and the upper layer 5 is constituted of a cover insulator 5 a, a drain-side conducting layer 5 b, a first inter layer dielectric 5 c and a second inter layer dielectric 5 d. The channel semiconductor layers 14 are electrically connected to a diffusion layer L in the substrate 1. The sacrificial layers 3 are replaced by electrode layers 3′ including tungsten (W) layers or the like. The electrode layers 3′ are examples of the first films.
  • FIG. 6 further shows contact plugs 16 formed in contact holes H of the upper layer 5. The contact plugs 16 are formed so as to be electrically connected to the corresponding electrode layers 3′.
  • As above, the memory holes M of the present embodiment are formed using the etching gas including the CxHyFz gas, and each of terminal C atoms on a carbon chain of the CxHyFz gas is bonded only to F atoms out of H atoms and F atoms. The present embodiment therefore makes it possible to form the protecting films 7 down to deep places in the memory holes M and to preferably protect the side faces of the insulating layers 4 and the sacrificial layers 3 in the memory holes M with the protecting films 7. The present embodiment therefore makes it possible to preferably etch the insulating layers 4 and the sacrificial layers 3 to form the memory holes M. The present embodiment makes it possible to form even the memory holes M having a high aspect ratio, for example, of 10 or more into preferable shapes.
  • In the step of FIG. 1A, the plurality of electrode layers 3′ and the plurality of insulating layers 4 may be alternately formed on the lower layer 2 instead of alternately forming the plurality of sacrificial layers 3 and the plurality of insulating layers 4 on the lower layer 2. In this case, the step is unnecessary in which the sacrificial layers 3 are replaced by the electrode layers 3′.
  • Moreover, the dry etching of the present embodiment can be applied to a step other than the processing of the memory holes M, for example, can be applied to a step of processing concave portions other than the memory holes M.
  • While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel methods and gases described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and gases described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.

Claims (20)

1. A method of manufacturing a semiconductor device, comprising:
etching a film with etching gas that includes a chain hydrocarbon compound expressed as CxHyFz where C, H and F respectively denote carbon, hydrogen and fluorine, “x” denotes an integer of three or more, and “y” and “z” respectively denote integers of one or more,
wherein the CxHyFz is the chain hydrocarbon compound in which each of terminal carbon atoms on a carbon chain of the chain hydrocarbon compound is bonded only to fluorine atoms out of hydrogen and fluorine atoms.
2. The method of claim 1, wherein the etching gas includes the chain hydrocarbon compound expressed as the CxHyFz where a value of “x” is an integer from 3 to 5 and y≤z.
3. The method of claim 1, wherein the CxHyFz includes at least any of C3HF5, C4H4F6, C4H3F7, C4H2F8, C4HF9, C5H6F6, C5H5F7, C5H4F8, C5H3F9, C5H2F10 and C5HF11.
4. The method of claim 1, wherein the etching gas further includes at least any of oxygen gas, rare gas, and fluorocarbon compound gas expressed as CaFb where“a” and “b” respectively denote integers of one or more.
5. The method of claim 4, wherein the CaFb includes at least any of CF4, C2F4, C3F6, C4F6 and C4F8.
6. The method of claim 1, wherein the etching gas includes two or more kinds of chain hydrocarbon compounds expressed as the CxHyFz.
7. The method of claim 1, wherein the etching gas includes a linear chain-type chain hydrocarbon compound expressed as the CxHyFz.
8. The method of claim 1, wherein the film is etched with plasma generated from the etching gas including the chain hydrocarbon compound expressed as the CxHyFz.
9. The method of claim 8, wherein
the plasma includes a first radical generated by eliminating only hydrogen atom(s) out of hydrogen and fluorine atoms from a molecule of the chain hydrocarbon compound expressed as the CxHyFz, a second radical generated by eliminating only fluorine atom(s) out of hydrogen and fluorine atoms from a molecule of the chain hydrocarbon compound expressed as the CxHyFz, and a third radical generated by eliminating both hydrogen and fluorine atoms from a molecule of the chain hydrocarbon compound expressed as the CxHyFz, and
a concentration of the first radicals in the plasma is larger than a total concentration of the second and third radicals in the plasma.
10. The method of claim 8, wherein a density of the plasma in a chamber is 5.0×109 to 3.0×1011 quantity/cm3.
11. The method of claim 1, wherein the film includes a plurality of first films and a plurality of second films alternately formed on a substrate.
12. The method of claim 1, wherein a concave portion with 10 or more of aspect ratio is formed in the film during the etching.
13. The method of claim 1, wherein during the etching, a concave portion is formed in the film and another film including a fluorocarbon compound expressed as CmFn is formed in the concave portion where “m” and “n” respectively denote integers of one or more.
14. Etching gas comprising:
a chain hydrocarbon compound expressed as CxHyFz where C, H and F respectively denote carbon, hydrogen and fluorine, “x” denotes an integer of three or more, and “y” and “z” respectively denote integers of one or more,
wherein the CxHyFz is the chain hydrocarbon compound in which each of terminal carbon atoms on a carbon chain of the chain hydrocarbon compound is bonded only to fluorine atoms out of hydrogen and fluorine atoms, and
wherein the CxHyFz includes at least any of C3HF5, C4H4F6, C4H3F7, C4H2F8, C4HF9, C5H6F6, C5H5F7, C5H4F8, C5H3F9, C5H2F10 and C5HF11.
15. The gas of claim 14, wherein the etching gas includes the chain hydrocarbon compound expressed as the CxHyFz where a value of “x” is an integer from 3 to 5 and y≤z.
16. The gas of claim 14, wherein the etching gas further includes at least any of oxygen gas, rare gas, and fluorocarbon compound gas expressed as CaFb where “a” and “b” respectively denote integers of one or more.
17. The gas of claim 16, wherein the CaFb includes at least any of CF4, C2F4, C3F6, C4F6 and C4F8.
18. The gas of claim 14, wherein the etching gas includes two or more kinds of chain hydrocarbon compounds expressed as the CxHyFz.
19. The gas of claim 14, wherein the etching gas includes a linear chain-type chain hydrocarbon compound expressed as the CxHyFz.
20. The gas of claim 14, wherein the etching gas is capable of being used so as to generate plasma from the chain hydrocarbon compound expressed as the CxHyFz.
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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008000616A (en) * 1996-06-14 2008-01-10 American Sterilizer Co Continuous-operation, closed-loop decontamination system and method

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5827464Y2 (en) 1978-11-07 1983-06-15 東芝熱器具株式会社 thermostat
JPS5569416U (en) 1978-11-08 1980-05-13
US5935877A (en) * 1995-09-01 1999-08-10 Applied Materials, Inc. Etch process for forming contacts over titanium silicide
JPH10199865A (en) * 1996-10-30 1998-07-31 Agency Of Ind Science & Technol Gas composition for dry etching and dry etching method
JP5569353B2 (en) 2000-04-28 2014-08-13 ダイキン工業株式会社 Dry etching gas and dry etching method
US7008808B2 (en) * 2004-05-05 2006-03-07 Taiwan Semiconductor Manufacturing Co Ltd Method of manufacturing LCOS spacers
KR20070009729A (en) * 2004-05-11 2007-01-18 어플라이드 머티어리얼스, 인코포레이티드 Carbon-doped-si oxide etch using h2 additive in fluorocarbon etch chemistry
JP2006128245A (en) 2004-10-27 2006-05-18 Sony Corp Method of processing insulating film
JP2006156539A (en) 2004-11-26 2006-06-15 National Institute Of Advanced Industrial & Technology Gas for plasma reaction
JP5131436B2 (en) * 2007-05-31 2013-01-30 日本ゼオン株式会社 Etching method
JP5152521B2 (en) * 2009-02-19 2013-02-27 日本ゼオン株式会社 Method for dehydrohalogenating halogenated compounds
WO2012023537A1 (en) * 2010-08-19 2012-02-23 株式会社 アルバック Dry etching method and method of manufacturing semiconductor device
JP2013030531A (en) * 2011-07-27 2013-02-07 Central Glass Co Ltd Dry etching agent
JP2013175605A (en) 2012-02-24 2013-09-05 Toshiba Corp Manufacturing method for nonvolatile semiconductor memory device and nonvolatile semiconductor memory device
WO2014070838A1 (en) * 2012-10-30 2014-05-08 L'air Liquide, Societe Anonyme Pour L'etude Et L'exploitation Des Procedes Georges Claude Fluorocarbon molecules for high aspect ratio oxide etch
CN104871298A (en) * 2012-12-27 2015-08-26 日本瑞翁株式会社 Dry etching method
CN107108411B (en) * 2015-01-22 2020-01-03 日本瑞翁株式会社 Method for purifying fluorinated hydrocarbon compound
US9728422B2 (en) * 2015-01-23 2017-08-08 Central Glass Company, Limited Dry etching method
JP6544215B2 (en) * 2015-01-23 2019-07-17 セントラル硝子株式会社 Dry etching method
JP6636250B2 (en) 2015-02-12 2020-01-29 関東電化工業株式会社 Dry etching gas composition and dry etching method
JP6514138B2 (en) * 2016-03-10 2019-05-15 東芝メモリ株式会社 Semiconductor device manufacturing method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008000616A (en) * 1996-06-14 2008-01-10 American Sterilizer Co Continuous-operation, closed-loop decontamination system and method

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PubChem 1,1,1,4,4,4-Hexafluorobutane (Year: 2005) *
PubChem, 1,1,1,2,2,3,4,5,5,5-Decafluoropentane (Year: 2005) *

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