US20140231265A1 - Electronic Packages and Components Thereof Formed by Co-Deposited Carbon Nanotubes - Google Patents

Electronic Packages and Components Thereof Formed by Co-Deposited Carbon Nanotubes Download PDF

Info

Publication number
US20140231265A1
US20140231265A1 US14/262,958 US201414262958A US2014231265A1 US 20140231265 A1 US20140231265 A1 US 20140231265A1 US 201414262958 A US201414262958 A US 201414262958A US 2014231265 A1 US2014231265 A1 US 2014231265A1
Authority
US
United States
Prior art keywords
carbon nanotubes
nanotubes
deposited
deposition
functionalized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US14/262,958
Inventor
Vijay S. Wakharkar
Nachiket R. Raravikar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to US14/262,958 priority Critical patent/US20140231265A1/en
Publication of US20140231265A1 publication Critical patent/US20140231265A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/12Semiconductors
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D13/00Electrophoretic coating characterised by the process
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D13/00Electrophoretic coating characterised by the process
    • C25D13/02Electrophoretic coating characterised by the process with inorganic material
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D15/00Electrolytic or electrophoretic production of coatings containing embedded materials, e.g. particles, whiskers, wires
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D15/00Electrolytic or electrophoretic production of coatings containing embedded materials, e.g. particles, whiskers, wires
    • C25D15/02Combined electrolytic and electrophoretic processes with charged materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3677Wire-like or pin-like cooling fins or heat sinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/642Capacitive arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00011Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01012Magnesium [Mg]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0242Shape of an individual particle
    • H05K2201/026Nanotubes or nanowires
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24273Structurally defined web or sheet [e.g., overall dimension, etc.] including aperture
    • Y10T428/24322Composite web or sheet
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]

Definitions

  • This relates generally to electronic packages and, particularly, to packages for integrated circuit chips such as microprocessors.
  • Integrated circuit packages connect to contacts on an integrated circuit chip.
  • the integrated circuit package provides connections to the chip through the package. Because of the large number of inputs and outputs that may be involved and, in some cases, the high frequencies involved, there are numerous complexities in forming integrated circuit packages. Ideally, to obtain the greatest possible speed it is desirable to have relatively low resistance packaging. This means that a large number of connections can be made with relatively little resistance.
  • FIG. 1 is an enlarged, cross-sectional view of an electronic package in accordance with one embodiment of the present invention
  • FIG. 2 is a depiction of an electrolytic bath in accordance with one embodiment of the present invention.
  • FIG. 3 is a system depiction.
  • an integrated circuit electronic package 10 may have superior properties by virtue of the use of co-deposited carbon nanotubes. That is, carbon nanotubes may be deposited to form various structures of the package 10 . Carbon nanotubes may have, in given applications, superior properties to those achievable with conventional metals. For example, carbon nanotubes may have superior mechanical strength, superior conductivity, or superior thermal conductivity.
  • the carbon nanotubes may be co-deposited with another material.
  • the materials that may be co-deposited may include at least the following general types: metals, polymers, and ceramics.
  • co-depositions of a metal with carbon nanotubes may be used to form thermal interface materials, silicon trenches, and vias for sensors and interconnect applications, first and second level package interconnects, substrate vias and trenches, interconnects, and memory cells.
  • Co-deposition of polymers with carbon nanotubes may be used to make substrate cores with high strength carbon nanotube based epoxy composites, ultra-thin capacitors with carbon nanotube interconnect terminals, carbon nanotube polymer composites for high adhesion surfaces where the projecting carbon nanotubes act as mechanical entanglements, conducting polymer carbon nanotubes interconnects based on polyaniline and carbon nanotube components as bond/electrode pads for low end applications requiring ultra small interconnects.
  • Composites of ceramics and carbon nanotubes may be used for magnetic nanoparticles with the carbon nanotubes offering conducting properties for magnetic memories and electromagnetic switches in microelectromechanical devices.
  • the nanotube electrodeposition may be done by electroplating, electroless plating, or electrophoresis, as examples. Selectivity of deposition of nanotubes and their composites may be achieved by masking unwanted areas of electrodes with Teflon or photoresist polymer such as polymethylmethacrylate (PMMA). Electrodeposition of nanotubes in the case of composites may be via electrodeposition owing to the charge on the nanotubes and adsorption of the nanotubes due to their high surface energy.
  • PMMA polymethylmethacrylate
  • Electroless plating may be used where nanotubes need to be co-deposited with other materials.
  • the co-deposited metals such as nickel or copper, may be plated by electroless plating.
  • the nanotubes are plated purely due to surface absorption along with the nickel. This process may have applications in second level thermal interface materials in semiconductor packages.
  • Electrophoresis may be utilized for selective deposition of nanotubes in silicon trenches, or microelectric substrate trenches. Electrophoresis works for deposition of pure nanotubes, as well as for co-depositions of nanotubes with metals, polymers, or ceramics. Particularly, copper and carbon nanotube composites may be formed, for example.
  • Vapor grown carbon nanotube nanofibers formed by a catalyst assisted chemical vapor deposition may be deposited by electroplating.
  • the carbon nanofiber filler may have a diameter of 100 to 200 nanometers or lower, the fibers being about 20 microns long.
  • a base plating bath of sulfuric acid may be used, together with polyacrylic acid, with mean molecular weights of 5000 and 25,000 to aid in dispersion of the fibers in the bath in one embodiment.
  • Aeration under galvanic conditions may be used at temperatures of 25° C. Pure copper and stainless steel plates with exposed surface areas may be used as the substrates.
  • a phosphorus containing copper plate may act as the anode.
  • Electrophoresis deposition may be done by mixing 60 weight percent of single walled carbon nanotubes in 200 milliliters concentrated nitric/sulfuric acid solution for a few minutes.
  • the suspension may be refluxed with magnetic stirring at 100 to 120° C. for a few hours.
  • the suspension may then be filtered and the wet powder cleaned with distilled water and dried at room temperature.
  • the powder may then be mixed with distilled water during sonication.
  • a surface charge may be applied to the particle by adding 10 ⁇ 6 to 10 ⁇ 2 mole of Mg(NO 3 ) 2 6H 2 O.
  • Carbon nanotubes may be patterned onto metal cathodes with a negative bias of 10 to 50 volts DC applied to a patterned metal plate.
  • the package 10 may include a substrate 12 coupled to a substrate core 16 .
  • thermal vias 14 may extend through the substrate 12 , including its core 16 .
  • Also formed on the substrate may be capacitors or dynamic random access memories 18 .
  • the integrated circuit may include vias 14 through the silicon known as through silicon vias (TSVS) 20 .
  • the integrated circuit may also include a silicon dynamic random access memory or integrated voltage regulator 22 .
  • the integrated circuit itself may, for example, be a microprocessor.
  • a first thermal interface material 24 may couple the integrated circuit to an integrated heat spreader 26 .
  • nanotubes may either be pristine or functionalized with one or more functional groups.
  • pristine nanotubes are not functionalized as used herein and functionalized carbon nanotubes are nanotubes reacted with another material which has either a positive or negative charge.
  • the nanotubes become electrically charged and charged nanotubes are described herein as functionalized.
  • nanotubes may be reacted with a carboxyl or OH group to form negatively charged functionalized carbon nanotubes.
  • Carbon nanotubes may be reacted with an amine to form positively charged carbon nanotube groups.
  • the carbon nanotubes may be deposited by themselves or with metals or ceramics or polymers.
  • Useful polymers include polyaniline, epoxy, and polyimide. Ceramics may include silica.
  • Metals may include solder, copper, and gold.
  • the composite may include a functionalizing agent to provide a charge, together with a material to be deposited with the carbon nanotube or only the carbon nanotubes themselves.
  • Pristine carbon nanotubes may be electroplated using an electrolytic bath as shown in FIG. 2 .
  • the electrolytic bath may include an electrolytic solution 30 with one or more solvents, such as sulfuric acid, copper sulfate, nitric acid, acetone, or toluene, to mention a few examples.
  • Pristine or functionalized nanotubes are dispersed in these solvents with appropriate functionalizations.
  • the nanotubes may be electrodeposited onto anode or cathode 32 , depending on their functionalized charge. Although pristine nanotubes are known to be electron donors, the nanotube surface charge and polarity can be tailored by functionalization.
  • the electrode surface may, for example, be pure silicon, Integrated Heat Spreader (IH-S), or organic or ceramic substrates, depending on the application.
  • IH-S Integrated Heat Spreader
  • Co-deposition of metal with carbon nanotubes may be achieved by dispersing the carbon nanotubes in electrolyte solution such as sulfuric acid.
  • the carbon nanotubes may be functionalized with carboxyl or thiol groups which are suitable for bonding with metals and then dissolved in an acid bath.
  • Metals such as solder or copper may also be dissolved directly into the same bath, for example, with sulfuric acid and then co-deposited along with the nanotubes.
  • Suitable solders include indium or tin or tin silver alloys or tin silver copper alloys, to mention a few examples.
  • Carbon nanotubes or carbon nanotube metal functionalized structures may be co-deposited with metals in the electrolytic bath onto electrodes.
  • the choice of electrode depends on the charge of the carbon nanotube functionalization.
  • the electrodes may be Integrated Heat Spreader (IH-S), silicon, or any other conductive surface used for microelectronic packaging applications.
  • the co-deposition of a carbon nanotube with ceramic material may involve the use of silica, alumina, zirconia, or magnetic iron oxide, functionalized with ionic groups such as alkyl sulfonate and potassium, R(OCH 2 CH 2 ) 7 —O—(CH 2 ) 3 SO 3 ⁇ K + , where R is the alkyl chain C 13 H 27 to C 15 H 29 .
  • ionic groups such as alkyl sulfonate and potassium, R(OCH 2 CH 2 ) 7 —O—(CH 2 ) 3 SO 3 ⁇ K + , where R is the alkyl chain C 13 H 27 to C 15 H 29 .
  • Pristine or functionalized carbon nanotubes may be dispersed in that bath.
  • the functionalized ceramic nanoparticles and carbon nanotubes may then be co-deposited onto an electrode, suitable for the particular packaging application.
  • Carbon nanotubes may be co-deposited with polymers, including both conducting and non-conducting polymers.
  • conducting and non-conducting polymers include, but are not limited to, conducting polymers with polyaniline or poly-m-phenylene vinylene or polyethylene oxide.
  • Non-conducting polymers may include epoxies or polyimides.
  • Aniline monomer may be dissolved into a sulfuric acid bath to be co-deposited along with negatively charged carbon nanotubes on a suitable electrode.
  • Epoxy or non-conducting polymers may be chemically bonded to water soluble functional groups or radicals, such as silanes, and then dissolved in the acid bath.
  • the non-conducting polymers can also be attached to nanotube surfaces via amine functionalization prior to the dispersion of the latter into electrolytic solvents.
  • the amine functionalization may be by acid reflux, together with ammonium plasma of carbon nanotubes.
  • the co-deposition of carbon nanotubes and epoxy or other non-conducting polymers can occur purely by statistical probability of nanotube adsorption onto the electrode surface owing to the high surface energy of nanotubes.
  • the substrate 12 may be formed of high strength carbon nanotube based epoxy composites.
  • the thermal via 14 may be formed by a metal carbon nanotube composite.
  • the capacitors or dynamic random access memories 18 may also be made by metal carbon nanotube co-deposition.
  • the capacitors and memories 18 may also be made of carbon nanotube electrodes with magnetic ceramics or metals.
  • the through silicon via 20 may be made of a carbon nanotube metal co-deposition such as a carbon nanotube/copper composite for high current density applications.
  • the thermal interface material 24 may be made of carbon nanotubes and polymers or carbon nanotubes and metal composites.
  • the substrate core 16 may be made of carbon nanotube polymer composites from mechanical stability including high structural strength, low coefficient of thermal expansion, and high stiffness.
  • electro co-deposition of carbon nanotubes and nanotube composites may offer advantages in terms of scalability, structural stability, selectivity, and enhancement of properties such as thermal conductivity, coefficient of thermal expansion, or electrical conductivity owing to interface tailoring and dispersion.
  • the processes may be implemented, in some embodiments, near room temperature and thereby are compatible with packaging applications.
  • an electro co-deposition process may enable the use of existing scalable infrastructure, such as electroplating baths used for high volume silicon processing, in some cases.
  • Suitable nanotubes may have low coefficients of thermal expansion, for example, about 10 ⁇ 6 /K, high thermal conductivity, for example, 3000 W-mK or higher, high current carrying capacity (approximately 10 9 A/cm 2 ), and high surface area due to high aspect ratios greater than 1000. Due to such unique structure and property characteristics, nanotubes may have a range of applications in microelectronic packaging including thermal interface materials, interconnects, vias, substrate trenches, microchannel walls for enhanced fluid wicking, reversible adhesive structures for mobile thermal interface materials, high strength composites for substrates, and substrate cores.
  • a computer system 40 may be formed using the package 10 shown in FIG. 1 .
  • a packaged processor may be coupled by a bus 34 to various other components such as dynamic random access memory (DRAM) 44 , input/output (I/O) devices 38 , and static random access memory (SRAM) 36 .
  • DRAM dynamic random access memory
  • I/O input/output
  • SRAM static random access memory
  • a suitable power supply 42 may supply power to the processor 10 and the other components.
  • any processor-based system may be formed.
  • the embodiment shown in FIG. 3 is merely an example.
  • the performance of an integrated circuit at high frequencies may be improved. In some embodiments, this may be done at relatively low cost and with relatively low process complexity.
  • references throughout this specification to “one embodiment” or “an embodiment” mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one implementation encompassed within the present invention. Thus, appearances of the phrase “one embodiment” or “in an embodiment” are not necessarily referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be instituted in other suitable forms other than the particular embodiment illustrated and all such forms may be encompassed within the claims of the present application.

Abstract

Microelectronic packages may be formed using the co-deposition of carbon nanotubes. The carbon nanotubes may be functionalized to have an appropriate charge so they can be combined with other materials to give suitable properties. The other materials that are co-deposited may include metals, ceramics, and polymers. The electronic package components may be formed including thermal interface materials, vias, trenches, capacitors, memories, substrates, and substrate cores, as a few examples.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • This application is a divisional of U.S. patent application Ser. No. 11/633,821, filed on Dec. 5, 2006.
  • BACKGROUND
  • This relates generally to electronic packages and, particularly, to packages for integrated circuit chips such as microprocessors.
  • Integrated circuit packages connect to contacts on an integrated circuit chip. The integrated circuit package, in turn, provides connections to the chip through the package. Because of the large number of inputs and outputs that may be involved and, in some cases, the high frequencies involved, there are numerous complexities in forming integrated circuit packages. Ideally, to obtain the greatest possible speed it is desirable to have relatively low resistance packaging. This means that a large number of connections can be made with relatively little resistance.
  • Conventional integrated circuit packages are made of conductors formed of metals. Generally, these metals are limited in terms of conductivity. Moreover, with existing metals, certain thermal dissipation may be achieved, but there are limits to those possible thermal dissipations inherent in the type of material. Likewise, the metal materials have a given strength for a size at which they are deposited, but, again, this size is relatively limited by the nature of the metals used.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is an enlarged, cross-sectional view of an electronic package in accordance with one embodiment of the present invention;
  • FIG. 2 is a depiction of an electrolytic bath in accordance with one embodiment of the present invention; and
  • FIG. 3 is a system depiction.
  • DETAILED DESCRIPTION
  • Referring to FIG. 1, an integrated circuit electronic package 10 may have superior properties by virtue of the use of co-deposited carbon nanotubes. That is, carbon nanotubes may be deposited to form various structures of the package 10. Carbon nanotubes may have, in given applications, superior properties to those achievable with conventional metals. For example, carbon nanotubes may have superior mechanical strength, superior conductivity, or superior thermal conductivity.
  • In order to achieve the desired results, the carbon nanotubes may be co-deposited with another material. The materials that may be co-deposited may include at least the following general types: metals, polymers, and ceramics.
  • As non-limiting examples, co-depositions of a metal with carbon nanotubes may be used to form thermal interface materials, silicon trenches, and vias for sensors and interconnect applications, first and second level package interconnects, substrate vias and trenches, interconnects, and memory cells. Co-deposition of polymers with carbon nanotubes may be used to make substrate cores with high strength carbon nanotube based epoxy composites, ultra-thin capacitors with carbon nanotube interconnect terminals, carbon nanotube polymer composites for high adhesion surfaces where the projecting carbon nanotubes act as mechanical entanglements, conducting polymer carbon nanotubes interconnects based on polyaniline and carbon nanotube components as bond/electrode pads for low end applications requiring ultra small interconnects. Composites of ceramics and carbon nanotubes may be used for magnetic nanoparticles with the carbon nanotubes offering conducting properties for magnetic memories and electromagnetic switches in microelectromechanical devices.
  • The nanotube electrodeposition may be done by electroplating, electroless plating, or electrophoresis, as examples. Selectivity of deposition of nanotubes and their composites may be achieved by masking unwanted areas of electrodes with Teflon or photoresist polymer such as polymethylmethacrylate (PMMA). Electrodeposition of nanotubes in the case of composites may be via electrodeposition owing to the charge on the nanotubes and adsorption of the nanotubes due to their high surface energy.
  • Electroless plating may be used where nanotubes need to be co-deposited with other materials. The co-deposited metals, such as nickel or copper, may be plated by electroless plating. The nanotubes are plated purely due to surface absorption along with the nickel. This process may have applications in second level thermal interface materials in semiconductor packages.
  • Electrophoresis may be utilized for selective deposition of nanotubes in silicon trenches, or microelectric substrate trenches. Electrophoresis works for deposition of pure nanotubes, as well as for co-depositions of nanotubes with metals, polymers, or ceramics. Particularly, copper and carbon nanotube composites may be formed, for example.
  • Vapor grown carbon nanotube nanofibers formed by a catalyst assisted chemical vapor deposition may be deposited by electroplating. The carbon nanofiber filler may have a diameter of 100 to 200 nanometers or lower, the fibers being about 20 microns long. A base plating bath of sulfuric acid may be used, together with polyacrylic acid, with mean molecular weights of 5000 and 25,000 to aid in dispersion of the fibers in the bath in one embodiment. Aeration under galvanic conditions may be used at temperatures of 25° C. Pure copper and stainless steel plates with exposed surface areas may be used as the substrates. A phosphorus containing copper plate may act as the anode.
  • Electrophoresis deposition may be done by mixing 60 weight percent of single walled carbon nanotubes in 200 milliliters concentrated nitric/sulfuric acid solution for a few minutes. The suspension may be refluxed with magnetic stirring at 100 to 120° C. for a few hours. The suspension may then be filtered and the wet powder cleaned with distilled water and dried at room temperature. The powder may then be mixed with distilled water during sonication. A surface charge may be applied to the particle by adding 10−6 to 10−2 mole of Mg(NO3)26H2O. Carbon nanotubes may be patterned onto metal cathodes with a negative bias of 10 to 50 volts DC applied to a patterned metal plate.
  • Continuing with FIG. 1, the package 10 may include a substrate 12 coupled to a substrate core 16. Thus, thermal vias 14 may extend through the substrate 12, including its core 16. Also formed on the substrate may be capacitors or dynamic random access memories 18.
  • Formed on the substrate may be an integrated heat spreader 26 which encloses an integrated circuit having solder balls 28 to couple it electrically and mechanically to the substrate 12. The integrated circuit may include vias 14 through the silicon known as through silicon vias (TSVS) 20. The integrated circuit may also include a silicon dynamic random access memory or integrated voltage regulator 22. The integrated circuit itself may, for example, be a microprocessor. A first thermal interface material 24 may couple the integrated circuit to an integrated heat spreader 26.
  • Various materials may be co-deposited with nanotubes. The nanotubes may either be pristine or functionalized with one or more functional groups. Thus, pristine nanotubes are not functionalized as used herein and functionalized carbon nanotubes are nanotubes reacted with another material which has either a positive or negative charge. As a result of the reaction with another material, the nanotubes become electrically charged and charged nanotubes are described herein as functionalized.
  • For example, nanotubes may be reacted with a carboxyl or OH group to form negatively charged functionalized carbon nanotubes. Carbon nanotubes may be reacted with an amine to form positively charged carbon nanotube groups. The carbon nanotubes may be deposited by themselves or with metals or ceramics or polymers. Useful polymers include polyaniline, epoxy, and polyimide. Ceramics may include silica. Metals may include solder, copper, and gold. Thus, the composite may include a functionalizing agent to provide a charge, together with a material to be deposited with the carbon nanotube or only the carbon nanotubes themselves.
  • Pristine carbon nanotubes may be electroplated using an electrolytic bath as shown in FIG. 2. The electrolytic bath may include an electrolytic solution 30 with one or more solvents, such as sulfuric acid, copper sulfate, nitric acid, acetone, or toluene, to mention a few examples. Pristine or functionalized nanotubes are dispersed in these solvents with appropriate functionalizations. The nanotubes may be electrodeposited onto anode or cathode 32, depending on their functionalized charge. Although pristine nanotubes are known to be electron donors, the nanotube surface charge and polarity can be tailored by functionalization. The electrode surface may, for example, be pure silicon, Integrated Heat Spreader (IH-S), or organic or ceramic substrates, depending on the application.
  • Co-deposition of metal with carbon nanotubes may be achieved by dispersing the carbon nanotubes in electrolyte solution such as sulfuric acid. The carbon nanotubes may be functionalized with carboxyl or thiol groups which are suitable for bonding with metals and then dissolved in an acid bath. Metals such as solder or copper may also be dissolved directly into the same bath, for example, with sulfuric acid and then co-deposited along with the nanotubes. Suitable solders include indium or tin or tin silver alloys or tin silver copper alloys, to mention a few examples.
  • Carbon nanotubes or carbon nanotube metal functionalized structures may be co-deposited with metals in the electrolytic bath onto electrodes. The choice of electrode depends on the charge of the carbon nanotube functionalization. The electrodes may be Integrated Heat Spreader (IH-S), silicon, or any other conductive surface used for microelectronic packaging applications.
  • The co-deposition of a carbon nanotube with ceramic material may involve the use of silica, alumina, zirconia, or magnetic iron oxide, functionalized with ionic groups such as alkyl sulfonate and potassium, R(OCH2CH2)7—O—(CH2)3SO3 K+, where R is the alkyl chain C13H27 to C15H29. These particles may be directly dispersed into the electrolytic acid bath. Pristine or functionalized carbon nanotubes may be dispersed in that bath. The functionalized ceramic nanoparticles and carbon nanotubes may then be co-deposited onto an electrode, suitable for the particular packaging application.
  • Carbon nanotubes may be co-deposited with polymers, including both conducting and non-conducting polymers. Examples of conducting and non-conducting polymers include, but are not limited to, conducting polymers with polyaniline or poly-m-phenylene vinylene or polyethylene oxide. Non-conducting polymers may include epoxies or polyimides. Aniline monomer may be dissolved into a sulfuric acid bath to be co-deposited along with negatively charged carbon nanotubes on a suitable electrode. Epoxy or non-conducting polymers may be chemically bonded to water soluble functional groups or radicals, such as silanes, and then dissolved in the acid bath.
  • The non-conducting polymers can also be attached to nanotube surfaces via amine functionalization prior to the dispersion of the latter into electrolytic solvents. The amine functionalization may be by acid reflux, together with ammonium plasma of carbon nanotubes. The co-deposition of carbon nanotubes and epoxy or other non-conducting polymers can occur purely by statistical probability of nanotube adsorption onto the electrode surface owing to the high surface energy of nanotubes.
  • Thus, the substrate 12, shown in FIG. 1, may be formed of high strength carbon nanotube based epoxy composites. The thermal via 14 may be formed by a metal carbon nanotube composite. The capacitors or dynamic random access memories 18 may also be made by metal carbon nanotube co-deposition. The capacitors and memories 18 may also be made of carbon nanotube electrodes with magnetic ceramics or metals. The through silicon via 20 may be made of a carbon nanotube metal co-deposition such as a carbon nanotube/copper composite for high current density applications. The thermal interface material 24 may be made of carbon nanotubes and polymers or carbon nanotubes and metal composites. The substrate core 16 may be made of carbon nanotube polymer composites from mechanical stability including high structural strength, low coefficient of thermal expansion, and high stiffness.
  • In some embodiments, electro co-deposition of carbon nanotubes and nanotube composites may offer advantages in terms of scalability, structural stability, selectivity, and enhancement of properties such as thermal conductivity, coefficient of thermal expansion, or electrical conductivity owing to interface tailoring and dispersion. The processes may be implemented, in some embodiments, near room temperature and thereby are compatible with packaging applications. Also, an electro co-deposition process may enable the use of existing scalable infrastructure, such as electroplating baths used for high volume silicon processing, in some cases.
  • Suitable nanotubes may have low coefficients of thermal expansion, for example, about 10−6/K, high thermal conductivity, for example, 3000 W-mK or higher, high current carrying capacity (approximately 109 A/cm2), and high surface area due to high aspect ratios greater than 1000. Due to such unique structure and property characteristics, nanotubes may have a range of applications in microelectronic packaging including thermal interface materials, interconnects, vias, substrate trenches, microchannel walls for enhanced fluid wicking, reversible adhesive structures for mobile thermal interface materials, high strength composites for substrates, and substrate cores.
  • Referring to FIG. 3, in accordance with some embodiments of the present invention, a computer system 40 may be formed using the package 10 shown in FIG. 1. Particularly, a packaged processor may be coupled by a bus 34 to various other components such as dynamic random access memory (DRAM) 44, input/output (I/O) devices 38, and static random access memory (SRAM) 36. A suitable power supply 42 may supply power to the processor 10 and the other components.
  • In some embodiments of the present invention, any processor-based system may be formed. Thus, the embodiment shown in FIG. 3 is merely an example. By improving the power delivery network performance, the performance of an integrated circuit at high frequencies may be improved. In some embodiments, this may be done at relatively low cost and with relatively low process complexity.
  • References throughout this specification to “one embodiment” or “an embodiment” mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one implementation encompassed within the present invention. Thus, appearances of the phrase “one embodiment” or “in an embodiment” are not necessarily referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be instituted in other suitable forms other than the particular embodiment illustrated and all such forms may be encompassed within the claims of the present application.
  • While the present invention has been described with respect to a limited number of embodiments, those skilled in the art will appreciate numerous modifications and variations therefrom. It is intended that the appended claims cover all such modifications and variations as fall within the true spirit and scope of this present invention.

Claims (10)

What is claimed is:
1. A method comprising:
forming a microelectronic package using co-deposition of carbon nanotubes and another material.
2. The method of claim 1 including functionalizing said carbon nanotubes.
3. The method of claim 2 including co-depositing functionalized carbon nanotubes with a metal.
4. The method of claim 2 including co-depositing functionalized carbon nanotubes with a polymer.
5. The method of claim 2 including co-depositing functionalized carbon nanotubes with ceramic.
6. The method of claim 1 including co-depositing the carbon nanotubes in an electrolytic bath.
7. The method of claim 1 including using selective co-deposition of carbon nanotubes.
8. The method of claim 1 including co-depositing carbon nanotubes with a conductive material.
9. The method of claim 1 including co-depositing carbon nanotubes with a non-conductive material.
10. The method of claim 1 including co-depositing carbon nanotubes in a depression in a substrate.
US14/262,958 2006-12-05 2014-04-28 Electronic Packages and Components Thereof Formed by Co-Deposited Carbon Nanotubes Abandoned US20140231265A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/262,958 US20140231265A1 (en) 2006-12-05 2014-04-28 Electronic Packages and Components Thereof Formed by Co-Deposited Carbon Nanotubes

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/633,821 US20080131658A1 (en) 2006-12-05 2006-12-05 Electronic packages and components thereof formed by co-deposited carbon nanotubes
US14/262,958 US20140231265A1 (en) 2006-12-05 2014-04-28 Electronic Packages and Components Thereof Formed by Co-Deposited Carbon Nanotubes

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US11/633,821 Division US20080131658A1 (en) 2006-12-05 2006-12-05 Electronic packages and components thereof formed by co-deposited carbon nanotubes

Publications (1)

Publication Number Publication Date
US20140231265A1 true US20140231265A1 (en) 2014-08-21

Family

ID=39476150

Family Applications (2)

Application Number Title Priority Date Filing Date
US11/633,821 Abandoned US20080131658A1 (en) 2006-12-05 2006-12-05 Electronic packages and components thereof formed by co-deposited carbon nanotubes
US14/262,958 Abandoned US20140231265A1 (en) 2006-12-05 2014-04-28 Electronic Packages and Components Thereof Formed by Co-Deposited Carbon Nanotubes

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US11/633,821 Abandoned US20080131658A1 (en) 2006-12-05 2006-12-05 Electronic packages and components thereof formed by co-deposited carbon nanotubes

Country Status (1)

Country Link
US (2) US20080131658A1 (en)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7534648B2 (en) * 2006-06-29 2009-05-19 Intel Corporation Aligned nanotube bearing composite material
US8138588B2 (en) * 2006-12-21 2012-03-20 Texas Instruments Incorporated Package stiffener and a packaged device using the same
CA2680147A1 (en) * 2007-03-07 2008-11-06 Massachusetts Institute Of Technology Functionalization of nanoscale articles including nanotubes and fullerenes
US8410602B2 (en) * 2007-10-15 2013-04-02 Intel Corporation Cooling system for semiconductor devices
KR101435074B1 (en) * 2007-10-17 2014-08-27 에이전시 포 사이언스, 테크놀로지 앤드 리서치 Composite films comprising carbon nanotubes and polymer
US8951473B2 (en) * 2008-03-04 2015-02-10 Massachusetts Institute Of Technology Devices and methods for determination of species including chemical warfare agents
WO2010123482A2 (en) 2008-12-12 2010-10-28 Massachusetts Institute Of Technology High charge density structures, including carbon-based nanostructures and applications thereof
TWI366890B (en) * 2008-12-31 2012-06-21 Ind Tech Res Inst Method of manufacturing through-silicon-via and through-silicon-via structure
TWI404749B (en) * 2009-03-05 2013-08-11 Chung Shan Inst Of Science Polyaniline/c-mwnt nanocomposite and method for fabricating the same
US8048340B2 (en) * 2009-04-07 2011-11-01 Chung-Shan Institute of Science and Technology Armaments Bureau, Ministry of National Defense Polyaniline/c-MWNT nanocomposite and method for fabricating the same
US8456073B2 (en) 2009-05-29 2013-06-04 Massachusetts Institute Of Technology Field emission devices including nanotubes or other nanoscale articles
US8187887B2 (en) 2009-10-06 2012-05-29 Massachusetts Institute Of Technology Method and apparatus for determining radiation
WO2011056936A2 (en) * 2009-11-04 2011-05-12 Massachusetts Institute Of Technology Nanostructured devices including analyte detectors, and related methods
EP2635525A2 (en) 2010-11-03 2013-09-11 Massachusetts Institute Of Technology Compositions comprising functionalized carbon-based nanostructures and related methods
DE102010056562B4 (en) 2010-12-30 2018-10-11 Snaptrack, Inc. Electroacoustic component and method for producing the electroacoustic component
WO2013072687A2 (en) * 2011-11-16 2013-05-23 Nanoridge Materials, Incorporated Conductive metal enhanced with conductive nanomaterial
US9683306B2 (en) 2014-08-25 2017-06-20 Infineon Techologies Ag Method of forming a composite material and apparatus for forming a composite material
WO2016205722A1 (en) * 2015-06-17 2016-12-22 Stc.Unm Metal matrix composites for contacts on solar cells
KR102385549B1 (en) 2017-08-16 2022-04-12 삼성전자주식회사 Semiconductor package and method of manufacturing the semiconductor package
WO2019090323A1 (en) 2017-11-06 2019-05-09 Massachusetts Institute Of Technology High functionalization density graphene

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030102222A1 (en) * 2001-11-30 2003-06-05 Zhou Otto Z. Deposition method for nanostructure materials
US20040021139A1 (en) * 2002-07-31 2004-02-05 Jackson Timothy L. Semiconductor dice having backside redistribution layer accessed using through-silicon vias, methods of fabrication and assemblies
US20050000830A1 (en) * 2003-04-28 2005-01-06 Glatkowski Paul J. Sensor device utilizing carbon nanotubes
US20060210466A1 (en) * 2005-03-11 2006-09-21 Somenath Mitra Microwave induced functionalization of single wall carbon nanotubes and composites prepared therefrom
US20070036978A1 (en) * 2005-05-20 2007-02-15 University Of Central Florida Carbon nanotube reinforced metal composites

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020020898A1 (en) * 2000-08-16 2002-02-21 Vu Quat T. Microelectronic substrates with integrated devices
US6848177B2 (en) * 2002-03-28 2005-02-01 Intel Corporation Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
US6856016B2 (en) * 2002-07-02 2005-02-15 Intel Corp Method and apparatus using nanotubes for cooling and grounding die
WO2004070349A2 (en) * 2002-11-27 2004-08-19 William Marsh Rice University Functionalized carbon nanotube-polymer composites and interactions with radiation
US7112472B2 (en) * 2003-06-25 2006-09-26 Intel Corporation Methods of fabricating a composite carbon nanotube thermal interface device
US7109581B2 (en) * 2003-08-25 2006-09-19 Nanoconduction, Inc. System and method using self-assembled nano structures in the design and fabrication of an integrated circuit micro-cooler
TWI251916B (en) * 2003-08-28 2006-03-21 Phoenix Prec Technology Corp Semiconductor assembled heat sink structure for embedding electronic components
US20050127489A1 (en) * 2003-12-10 2005-06-16 Debendra Mallik Microelectronic device signal transmission by way of a lid
US7402909B2 (en) * 2005-04-28 2008-07-22 Intel Corporation Microelectronic package interconnect and method of fabrication thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030102222A1 (en) * 2001-11-30 2003-06-05 Zhou Otto Z. Deposition method for nanostructure materials
US20040021139A1 (en) * 2002-07-31 2004-02-05 Jackson Timothy L. Semiconductor dice having backside redistribution layer accessed using through-silicon vias, methods of fabrication and assemblies
US20050000830A1 (en) * 2003-04-28 2005-01-06 Glatkowski Paul J. Sensor device utilizing carbon nanotubes
US20060210466A1 (en) * 2005-03-11 2006-09-21 Somenath Mitra Microwave induced functionalization of single wall carbon nanotubes and composites prepared therefrom
US20070036978A1 (en) * 2005-05-20 2007-02-15 University Of Central Florida Carbon nanotube reinforced metal composites

Also Published As

Publication number Publication date
US20080131658A1 (en) 2008-06-05

Similar Documents

Publication Publication Date Title
US20140231265A1 (en) Electronic Packages and Components Thereof Formed by Co-Deposited Carbon Nanotubes
Morris Nanopackaging: Nanotechnologies and electronics packaging
Li et al. Electrical conductive adhesives with nanotechnologies
US7651766B2 (en) Carbon nanotube reinforced metal composites
TW200537528A (en) Conductive particle and anisotropic conductive material
US8663446B2 (en) Electrochemical-codeposition methods for forming carbon nanotube reinforced metal composites
Bo et al. Gallium–indium–tin liquid metal nanodroplet-based anisotropic conductive adhesives for flexible integrated electronics
KR20180037046A (en) METHOD FOR PRODUCING CARBON NANOTUBE CONDUCTIVE BALL AND METHOD FOR MANUFACTURING CARBON NANOTUBE BALL CONDUCTIVE ADHESIVE
JPH02288396A (en) Construction of multilayer circuit card
JP2006513041A (en) Coated magnetic particles and their applications
Oh et al. Silver-plated carbon nanotubes for silver/conducting polymer composites
Daniel Lu et al. Recent advances in nano-conductive adhesives
US8911821B2 (en) Method for forming nanometer scale dot-shaped materials
Lu et al. Electrically conductive adhesives (ECAs)
Li et al. Nano-conductive adhesives for nano-electronics interconnection
CN101908388B (en) Forming method of nano-dotted materials
JP2013251099A (en) Conductive particle and process of manufacturing the same
KR20100101886A (en) A structure of circuit layers including cnt and a fabricating method of circuit layers including cnt
JP6119130B2 (en) Composite particles and anisotropic conductive adhesive
JP2014071962A (en) Anisotropic conductive member, and multilayer wiring board
JP2013038094A (en) Thermally conductive insulating substrate with copper foil
TW202209352A (en) Structure, method for manufacturing structure, method for manufacturing assembly, and method for manufacturing device
CN109735890B (en) Nano TiO (titanium dioxide)2Preparation method of (E) -Sn micro bump
Palaniappa et al. Effect of zincation/sonication on electroplated gold deposited on aluminum substrate
Iwashige et al. Effect of W content in Co-WP metallization on both oxidation resistance and resin adhesion

Legal Events

Date Code Title Description
STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION