US20140158546A1 - Electrolytic copper plating solution for filling for forming microwiring of copper for ulsi - Google Patents

Electrolytic copper plating solution for filling for forming microwiring of copper for ulsi Download PDF

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US20140158546A1
US20140158546A1 US14/101,457 US201314101457A US2014158546A1 US 20140158546 A1 US20140158546 A1 US 20140158546A1 US 201314101457 A US201314101457 A US 201314101457A US 2014158546 A1 US2014158546 A1 US 2014158546A1
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Prior art keywords
microwiring
plating solution
copper
ulsi
electrolytic copper
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US14/101,457
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Junnosuke Sekiguchi
Hirofumi Takahashi
Akihiro Aiba
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JX Nippon Mining and Metals Corp
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JX Nippon Mining and Metals Corp
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    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00—Electroplating: Baths therefor
    • C25D3/02—Electroplating: Baths therefor from solutions
    • C25D3/38—Electroplating: Baths therefor from solutions of copper
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/06—Wires; Strips; Foils
    • C25D7/0607—Wires
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/12—Semiconductors
    • C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to an electrolytic copper plating solution for filling for forming microwiring of copper for ULSI.
  • Electrolytic copper plating for filling ULSI microwiring is usually carried out with sulfuric acid-based strongly acidic plating solutions (pH of 1.2 or lower). Seed layers upon plating are sputtered copper films, of which thickness in trenches/vias have become very thin due to miniaturization of wiring. Oxidation of the outermost layer of the seed layer is unavoidable because the outermost layer is atmospherically exposed prior to electrolytic plating. Accordingly, the oxidized parts of the seed layer are easily dissolved when it is immersed in a strongly acidic electrolytic plating solution leading to formation of defects on the thin seed layer. When a copper wiring layer is formed by electrolytic copper plating thereafter, the copper plating is unsatisfactorily absent in spots. Particularly, the inner wall of trenches/vias tends to have problematic voids.
  • An object of the present invention is to provide an electrolytic copper plating solution which can suppress, upon electrolytic copper plating on a copper seed layer during fabrication of ULSI copper microwiring (damascene copper wiring) having trends to further miniaturization, dissolution of the copper seed layer and accordingly can suppress occurrence of voids on the inner wall of vias/trenches.
  • the present inventors have attempted to suppress dissolution of copper seed layers upon being immersed in the plating solution by using carboxylic acids and the like instead of sulfuric acid usually used for sulfuric acid-based strongly acidic copper plating solutions and to change pH of the plating solution from conventional strong acid to around weak acid. As a result, they have found that formation of voids on the side wall of trenches which may be generated with the sulfuric acid-based strongly acidic plating solutions can be avoided with the carboxylic acid-based plating solution, thereby accomplished the present invention which solves the above-mentioned problems.
  • the present invention provides the followings:
  • formation of a copper wiring layer on a copper seed layer using the electrolytic copper plating solution of the present invention can suppress dissolution of the copper seed layer and accordingly formation of voids on the inner wall of vias/trenches.
  • FIG. 1 is a cross-sectional SEM photograph illustrating that voids were not formed in the side wall portion of trenches using the method of the present invention.
  • FIG. 2 is a cross-sectional SEM photograph illustrating that voids were formed in the side wall portion of trenches using the method of Comparative Example 1.
  • the electrolytic copper plating solution for filling for forming microwiring for ULSI of the present invention has a pH of 1.8 or higher and 3.0 or lower.
  • Conventional sulfuric acid-based copper plating solutions are strongly acidic at pH 1.2 or lower.
  • the present plating solution can have a pH of 1.8 or higher and 3.0 or lower because carboxylic acid such as acetic acid is used instead of sulfuric acid.
  • pH is more preferably 2.0 or higher and 2.2 or lower.
  • pH is lower than 1.8, copper seed layers are easily dissolved due to low pH and as a result, voids are also easily formed. If pH is higher than 3.0, copper ions in the plating solution may be converted to oxides or hydroxides to cause precipitations.
  • the carboxylic acid may be any carboxylic acid that can be dissolved in the plating solution and adjust pH to the above range, and is preferably a saturated carboxylic acid having 1 or more and 4 or less carbon atoms such as formic acid, acetic acid, propionic acid, butyric acid, oxalic acid and the like, with acetic acid being particularly preferable.
  • the plating solution preferably contains the carboxylic acid at 0.01 to 2.0 mol/L and more preferably 0.2 to 1.0 mol/L.
  • the concentration of the carboxylic acid in the plating solution affects filling properties and pH such that the concentration of carboxylic acid at more than 2.0 mol/L reduces pH of the plating solution to lower than 1.8, causing increased formation of voids.
  • the concentration of carboxylic acid in the plating solution is less than 0.01 mmol/L, the plating solution has a pH of higher than 3.0, which may cause precipitations as described above.
  • the electrolytic copper plating solution of the present invention is aqueous and may comprise other components such as copper salts, chloride ions, trace additives and the like, which may be well known and are not particularly limited.
  • Copper salts may include copper sulfate, copper nitrate, copper chloride and the like, with copper sulfate being preferable.
  • the plating solution preferably contains the copper salt at 0.05 to 1.5 mol/L and more preferably 0.2 to 0.8 mol/L.
  • the plating solution preferably contains chloride ions at a concentration of 0.3 to 3.0 mmol/L and more preferably 1.0 to 2.0 mmol/L.
  • Trace additives may include promoters, inhibitors, leveling agents and the like.
  • Promoters may include bis(3-sulfopropyl)-disulfide, disodium salt, 3-mercaptopropanesulfonic acid and the like, which are preferably contained in the plating solution at 1 to 30 mg/L.
  • Inhibitors may include polyethylene glycol, polypropylene glycol, copolymers thereof and the like, which are preferably contained in the plating solution at 10 to 500 mg/L.
  • Leveling agents may include Janus Green B, polyethyleneimine, polyvinylpyrrolidone and the like, which are preferably contained in the plating solution at 0.1 to 50 mg/L.
  • Plating operations using the electrolytic copper plating solution of the present invention are preferably carried out at a bath temperature of 20 to 30° C. in view of stability of bath and deposition speed of copper.
  • the cathode current density is preferably 0.1 to 5 A/dm2.
  • a material to be plated by electrolytic copper plating is a microwiring substrate such as semiconductor wafers and is preferably a silicon substrate having ULSI microwiring such as trenches/vias onto which a copper seed layer is provided.
  • the copper seed layer may be formed by well-known methods such as sputtering and electroless plating.
  • the electrolytic copper plating solution of the present invention allows to carry out plating without voids even when the copper seed layer in trenches/vias has a thickness of 2 nm or less.
  • a silicon substrate having ULSI microwiring was subjected to electrolytic copper plating using the following plating solution.
  • the silicon substrate which is to be plated, has fine trench patterns (line width: 180 nm and depth: 500 nm) and a Cu seed layer is provided on its outermost surface by sputtering.
  • the Cu seed layer had a thinnest thickness of 2 nm in trenches.
  • Plating was carried out at 25° C. and 1 A/dm 2 for 30 seconds.
  • FIG. 1 Cross-sectional SEM observation is shown in FIG. 1 . Void was not formed at anywhere including the side wall part of trenches.
  • a silicon substrate having ULSI microwiring was subjected to electrolytic copper plating using the following plating solution.
  • the silicon substrate to be plated was the same as the one used in Example 1, in which Cu seed layer had a thinnest thickness of 2 nm in trenches.
  • Plating was carried out at 25° C. and 1 A/dm 2 for 30 seconds.
  • a silicon substrate having ULSI microwiring was subjected to electrolytic copper plating using the following plating solution.
  • the silicon substrate to be plated was the same as the one used in Example 1 except that its Cu seed layer had a thinnest thickness of 1.8 nm in trenches.
  • Plating was carried out at 25° C. and 1 A/dm 2 for 30 seconds.
  • Electrolytic copper plating was carried out in the same manner as Example 1 except that composition of the plating solution was changed as follows.
  • FIG. 2 Cross-sectional SEM observation is shown in FIG. 2 . Voids (dark shadowy parts in circles) were observed in at least some of the side wall part of trenches.

Abstract

An electrolytic copper plating solution for filling for forming microwiring for ULSI, is characterized in that it has a pH of from 1.8 to 3.0. The electrolytic copper plating solution preferably contains a saturated carboxylic acid having from 1 to 4 carbon atoms at a concentration from 0.01 to 2.0 mol/L.

Description

  • This is a division of Ser. No. 13/378 529, filed Dec. 15, 2011, which was the national stage of International Application No. PCT/JP2010/060545, filed Jun. 22, 2010, which International Application was not published in English.
    • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The present invention relates to an electrolytic copper plating solution for filling for forming microwiring of copper for ULSI.
  • 2. Description of the Related Art
  • Electrolytic copper plating for filling ULSI microwiring is usually carried out with sulfuric acid-based strongly acidic plating solutions (pH of 1.2 or lower). Seed layers upon plating are sputtered copper films, of which thickness in trenches/vias have become very thin due to miniaturization of wiring. Oxidation of the outermost layer of the seed layer is unavoidable because the outermost layer is atmospherically exposed prior to electrolytic plating. Accordingly, the oxidized parts of the seed layer are easily dissolved when it is immersed in a strongly acidic electrolytic plating solution leading to formation of defects on the thin seed layer. When a copper wiring layer is formed by electrolytic copper plating thereafter, the copper plating is unsatisfactorily absent in spots. Particularly, the inner wall of trenches/vias tends to have problematic voids.
    • SUMMARY OF THE INVENTION
  • An object of the present invention is to provide an electrolytic copper plating solution which can suppress, upon electrolytic copper plating on a copper seed layer during fabrication of ULSI copper microwiring (damascene copper wiring) having trends to further miniaturization, dissolution of the copper seed layer and accordingly can suppress occurrence of voids on the inner wall of vias/trenches.
  • The present inventors have attempted to suppress dissolution of copper seed layers upon being immersed in the plating solution by using carboxylic acids and the like instead of sulfuric acid usually used for sulfuric acid-based strongly acidic copper plating solutions and to change pH of the plating solution from conventional strong acid to around weak acid. As a result, they have found that formation of voids on the side wall of trenches which may be generated with the sulfuric acid-based strongly acidic plating solutions can be avoided with the carboxylic acid-based plating solution, thereby accomplished the present invention which solves the above-mentioned problems.
  • Thus, the present invention provides the followings:
      • (1) an electrolytic copper plating solution for filling for forming microwiring for ULSI, characterized in that it has a pH of 1.8 or higher and 3.0 or lower;
      • (2) the electrolytic copper plating solution for filling for forming microwiring for ULSI according to the above (1), wherein it has a pH of 2.0 or higher and 2.2 or lower;
      • (3) the electrolytic copper plating solution for filling for forming microwiring for ULSI according to the above (1) or (2), wherein it comprises a saturated carboxylic acid having 1 or more and 4 or less carbon atoms at 0.01 mol/L or more and 2.0 mol/L or less;
      • (4) the electrolytic copper plating solution for ULSI microwiring according to the above (3), wherein the carboxylic acid is acetic acid;
      • (5) a method for electrolytic copper plating for ULSI microwiring, characterized in that it uses the electrolytic copper plating solution for filling for forming microwiring for ULSI according to any of the above (1) to (4); and
      • (6) a ULSI microwiring substrate characterized in that a ULSI microwiring is formed by the method for electrolytic copper plating for ULSI microwiring according to the above (5).
  • In ULSI copper microwiring (damascene copper wiring) fabrication, formation of a copper wiring layer on a copper seed layer using the electrolytic copper plating solution of the present invention can suppress dissolution of the copper seed layer and accordingly formation of voids on the inner wall of vias/trenches.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a cross-sectional SEM photograph illustrating that voids were not formed in the side wall portion of trenches using the method of the present invention.
  • FIG. 2 is a cross-sectional SEM photograph illustrating that voids were formed in the side wall portion of trenches using the method of Comparative Example 1.
    •  DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • The electrolytic copper plating solution for filling for forming microwiring for ULSI of the present invention has a pH of 1.8 or higher and 3.0 or lower. Conventional sulfuric acid-based copper plating solutions are strongly acidic at pH 1.2 or lower. However, the present plating solution can have a pH of 1.8 or higher and 3.0 or lower because carboxylic acid such as acetic acid is used instead of sulfuric acid. By employing pH of 1.8 or higher and 3.0 or lower, dissolution of copper seed layers can be suppressed and accordingly formation of voids on the inner wall of vias/trenches can be suppressed. pH is more preferably 2.0 or higher and 2.2 or lower.
  • If pH is lower than 1.8, copper seed layers are easily dissolved due to low pH and as a result, voids are also easily formed. If pH is higher than 3.0, copper ions in the plating solution may be converted to oxides or hydroxides to cause precipitations.
  • The carboxylic acid may be any carboxylic acid that can be dissolved in the plating solution and adjust pH to the above range, and is preferably a saturated carboxylic acid having 1 or more and 4 or less carbon atoms such as formic acid, acetic acid, propionic acid, butyric acid, oxalic acid and the like, with acetic acid being particularly preferable.
  • The plating solution preferably contains the carboxylic acid at 0.01 to 2.0 mol/L and more preferably 0.2 to 1.0 mol/L. The concentration of the carboxylic acid in the plating solution affects filling properties and pH such that the concentration of carboxylic acid at more than 2.0 mol/L reduces pH of the plating solution to lower than 1.8, causing increased formation of voids. When the concentration of carboxylic acid in the plating solution is less than 0.01 mmol/L, the plating solution has a pH of higher than 3.0, which may cause precipitations as described above.
  • The electrolytic copper plating solution of the present invention is aqueous and may comprise other components such as copper salts, chloride ions, trace additives and the like, which may be well known and are not particularly limited.
  • Copper salts may include copper sulfate, copper nitrate, copper chloride and the like, with copper sulfate being preferable. The plating solution preferably contains the copper salt at 0.05 to 1.5 mol/L and more preferably 0.2 to 0.8 mol/L.
  • The plating solution preferably contains chloride ions at a concentration of 0.3 to 3.0 mmol/L and more preferably 1.0 to 2.0 mmol/L.
  • Trace additives may include promoters, inhibitors, leveling agents and the like.
  • Promoters may include bis(3-sulfopropyl)-disulfide, disodium salt, 3-mercaptopropanesulfonic acid and the like, which are preferably contained in the plating solution at 1 to 30 mg/L.
  • Inhibitors may include polyethylene glycol, polypropylene glycol, copolymers thereof and the like, which are preferably contained in the plating solution at 10 to 500 mg/L.
  • Leveling agents may include Janus Green B, polyethyleneimine, polyvinylpyrrolidone and the like, which are preferably contained in the plating solution at 0.1 to 50 mg/L.
  • Plating operations using the electrolytic copper plating solution of the present invention are preferably carried out at a bath temperature of 20 to 30° C. in view of stability of bath and deposition speed of copper. The cathode current density is preferably 0.1 to 5 A/dm2.
  • A material to be plated by electrolytic copper plating is a microwiring substrate such as semiconductor wafers and is preferably a silicon substrate having ULSI microwiring such as trenches/vias onto which a copper seed layer is provided.
  • The copper seed layer may be formed by well-known methods such as sputtering and electroless plating.
  • The electrolytic copper plating solution of the present invention allows to carry out plating without voids even when the copper seed layer in trenches/vias has a thickness of 2 nm or less.
    • Examples Example 1
  • A silicon substrate having ULSI microwiring was subjected to electrolytic copper plating using the following plating solution. The silicon substrate, which is to be plated, has fine trench patterns (line width: 180 nm and depth: 500 nm) and a Cu seed layer is provided on its outermost surface by sputtering. The Cu seed layer had a thinnest thickness of 2 nm in trenches.
  • Composition of plating solution:
  •
    Copper (copper sulfate) 0.63 mol/L;
    Acetic acid 0.5 mol/L
    HCl 1.4 mmol/L
    Bis(3-sulfopropyl)-disulfide, disodium salt 10 mg/L
    Polypropylene glycol 80 mg/L
    Polyvinylpyrrolidone 10 mg/L
    pH 2.1
  • Plating was carried out at 25° C. and 1 A/dm2 for 30 seconds.
  • Cross-sectional SEM observation is shown in FIG. 1. Void was not formed at anywhere including the side wall part of trenches.
    • Example 2
  • A silicon substrate having ULSI microwiring was subjected to electrolytic copper plating using the following plating solution. The silicon substrate to be plated was the same as the one used in Example 1, in which Cu seed layer had a thinnest thickness of 2 nm in trenches.
  • Composition of plating solution:
  •
    Copper (copper sulfate) 0.63 mol/L;
    Formic acid 1.0 mol/L
    HCl 1.4 mmol/L
    Bis(3-sulfopropyl)-disulfide, disodium salt 10 mg/L
    Polypropylene glycol 80 mg/L
    Polyvinylpyrrolidone 10 mg/L
    pH 1.9
  • Plating was carried out at 25° C. and 1 A/dm2 for 30 seconds.
  • Cross-sectional SEM observation showed that void was not formed at anywhere including the side wall part of trenches.
    • Example 3
  • A silicon substrate having ULSI microwiring was subjected to electrolytic copper plating using the following plating solution.
  • The silicon substrate to be plated was the same as the one used in Example 1 except that its Cu seed layer had a thinnest thickness of 1.8 nm in trenches.
  • Composition of plating solution:
  •
    Copper (copper sulfate) 0.63 mol/L;
    Oxalic acid 0.1 mol/L
    HCl 1.4 mmol/L
    Bis(3-sulfopropyl)-disulfide, disodium salt 10 mg/L
    Polypropylene glycol 80 mg/L
    Polyvinylpyrrolidone 10 mg/L
    pH 2.5
  • Plating was carried out at 25° C. and 1 A/dm2 for 30 seconds.
  • Cross-sectional SEM observation showed that void was not formed at anywhere including the side wall part of trenches.
  • Comparative example 1
  • Electrolytic copper plating was carried out in the same manner as Example 1 except that composition of the plating solution was changed as follows.
  • Composition of plating solution:
  •
    Copper (copper sulfate) 0.63 mol/L
    Sulfuric acid 0.5 mol/L
    HCl 1.4 mmol/L
    Bis(3-sulfopropyl)-disulfide, disodium salt 10 mg/L
    Polypropylene glycol 80 mg/L
    Polyvinylpyrrolidone 10 mg/L
    <pH 1.0
  • Cross-sectional SEM observation is shown in FIG. 2. Voids (dark shadowy parts in circles) were observed in at least some of the side wall part of trenches.

Claims (5)

1. A method for electrolytic copper plating for ULSI microwiring comprising the step of forming damascene microwiring for ULSI with an electrolytic copper plating aqueous solution for forming damascene microwiring for ULSI, characterized in that the plating solution has a pH of from 1.8 to 3.0, contains copper sulfate at 0.05 to 1.5 mol/L and chloride ions at a concentration of 0.3 to 3.0 mmol/L, and comprises a saturated carboxylic acid at a concentration of from 0.01 to 2.0 mol/L.
2. The method of claim 1, wherein the plating aqueous solution has a pH of 2.0 to 2.2.
3. The method of claim 1, wherein the saturated carboxylic acid contains from 1 to 4 carbon atoms.
4. The method of claim 3, wherein the saturated carboxylic acid is acetic acid.
5. A ULSI microwiring substrate in which the formation of voids on inner walls of vias/trenches has been suppressed, characterized in that USLI microwiring is formed by the method of claim 1.
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KR20140135007A (en) * 2013-05-15 2014-11-25 삼성전기주식회사 Copper plating solution composition for printed circuit board and via hole filling method using the same
US11624120B2 (en) 2017-08-31 2023-04-11 Adeka Corporation Additive for electrolytic plating solutions, electrolytic plating solution containing additive for electrolytic plating solutions, and electrolytic plating method using electrolytic plating solution
TWI636245B (en) * 2017-11-21 2018-09-21 財團法人金屬工業研究發展中心 System and method for monitoring metal collision
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