US20060082712A1 - Display panel and liquid crystal display including signal lines - Google Patents
Display panel and liquid crystal display including signal lines Download PDFInfo
- Publication number
- US20060082712A1 US20060082712A1 US11/297,781 US29778105A US2006082712A1 US 20060082712 A1 US20060082712 A1 US 20060082712A1 US 29778105 A US29778105 A US 29778105A US 2006082712 A1 US2006082712 A1 US 2006082712A1
- Authority
- US
- United States
- Prior art keywords
- area
- signal lines
- display panel
- lines
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 16
- 239000000758 substrate Substances 0.000 claims description 6
- 239000010409 thin film Substances 0.000 claims description 5
- 239000010408 film Substances 0.000 description 15
- 239000011159 matrix material Substances 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000005401 electroluminescence Methods 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 2
- 229910001316 Ag alloy Inorganic materials 0.000 description 1
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 230000008450 motivation Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
Definitions
- the driving circuits are located near edges of the display device and connected to end portions of the signal lines, which are clustered in a small area (referred to as “connection area” hereinafter) for the connection.
- connection area a small area
- the distances between the signal lines in an area (referred to as “display area”) including the pixels have a value determined by the size of the pixels to have larger values than the distances between their end portions connected to the driving circuits. Accordingly, a plurality of fan-out areas in which the distances between the signal lines gradually increase or decrease like a fan are provided between the connection area and the display area.
- the third portion of each signal line has a single-layered structure while the fourth portion of each signal line has a double-layered structure.
- FIG. 1 is a schematic layout view of an LCD according to an embodiment of the present invention.
- LCDs liquid crystal displays
- FIG. 1 is a schematic layout view of an LCD according to an embodiment of the present invention
- FIG. 2 is a schematic layout view of an LCD according to another embodiment of the present invention
- FIG. 3 is a schematic perspective view of an LCD according to another embodiment of the present invention.
- the lower panel 1 includes a plurality of pixel electrodes 190 arranged in a matrix, a plurality of switching elements Q connected to the pixel electrodes 190 , a plurality of gate lines 121 connected to the switching elements Q and transmitting gate signals (also referred to as “scanning signals”), and a plurality of data lines 171 connected to the switching elements Q and transmitting data signals.
- the switching elements Q includes three-terminal thin film transistors (TFTs), each switching element Q having control and input terminals respectively connected to the gate line 121 and the data line 171 and an output terminal connected to the pixel electrode 190 such that the switching element Q selectively transmits the data signals from the data lines 171 responsive to the gate signals from the gate lines 121 .
- TFTs thin film transistors
- a plurality of gate driver integrated circuits (ICs) 410 and a plurality of data driver ICs are chip-mounted on the gate FPC films 410 and the data FPC films 510 , respectively.
- a plurality of leads 420 and 520 for electrical connection to an external device are formed on the FPC films 410 and 510 , respectively.
- each signal line SL 1 -SL n include a single-layered portion L 1 -L n which extends to the connection area CA.
- the length of the single-layered portions L 1 -L n of the signal lines SL 1 -SL n becomes shorter as the length of the corresponding signal lines SL 1 -SL n becomes longer.
- the length of the single-layered portion L 1 -L n is inverse proportional to the length of the corresponding signal line SL 1 -SL n .
- the resistance of the signal lines SL 1 -SL n in the fan-out area F is uniform. That is, the resistance difference of the length of portions in the fan-out area F or of the entire length of the signal lines SL 1 -SL n is compensated by making the single-layered portions L 1 -L n of longer signal lines SL 1 -SL n shorter, while making those of shorter signal lines SL 1 -SL n longer since the single-layered portion L 1 -L n has larger resistance than other portions including two layers N 1 -N n and M 1 -M n electrically connected in parallel.
- the length of a portion of a signal line SL i in a fan-out area F and the length of the single-layered portion L i of the signal line SL i are indicated by t i and s i , respectively
- the resistivities of the lower layer N i and the upper layer M i are indicated by ⁇ N and ⁇ M , respectively
- the areas of the sections of the lower layer N i and the upper layer M i are equal and indicated by A.
- the lengths s 1 -s n of the single-layered portion L 1 -L n of the signal lines SL 1 -SL n are adjusted such that the resistances R 1 -R n of all the signal lines given by Equation 3 are the same.
- the embodiments of the present invention provide dual-layered signal lines for reducing the resistance difference due to the length difference in a fan-out area, thereby effectively removing image deterioration due to the resistance difference.
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
Abstract
A liquid crystal display includes a plurality of signal lines. The signal lines are parallel to each other in a display area, the distances between the signal lines vary such that the signal lines are arranged like a fan in a fan-out area, and the signal lines are connected to a driving circuit in a connection area. Each signal line includes a single-layered portion and a double-layered portion located in the fan-out area, and the length of the single-layered portion of relatively longer signal line is relatively shorter.
Description
- (a) Field of the Invention
- The present invention relates to a display panel including a plurality of signal line, and particularly to a liquid crystal display including a plurality of lines having different length.
- (b) Description of Related Art
- A display device such as a liquid crystal display (LCD) or an organic electroluminescence (EL) display includes a plurality of pixels as basic elements for displaying an image. Each pixel includes a switching element for independent operation.
- The switching elements include a tri-terminal element including a control terminal, an input terminal, and an output terminal, which is turned on or off in response to a signal applied to the control terminal and selectively transmits a signal entering into the input terminal via the output terminal. For this purpose, a plurality of signal lines for applying the signals to the control terminals and the input terminals of the switching elements and a plurality of driving circuits for supplying the signals to the signal lines are provided at a display device.
- The TFT array panel includes a plurality of scanning signal lines or gate lines for transmitting scanning signals, a plurality of image signal lines or data lines for transmitting image signals, a plurality of TFTs connected to the gate lines and the data lines, a plurality of pixel electrodes connected to the TFTs, a gate insulating layer covering the gate lines for insulation, and a passivation layer covering the TFTs and the data lines for insulation.
- The TFT includes a gate electrode, which is a part of the gate line, a semiconductor layer for a channel, source and drain electrode, which are parts of the data line, a gate insulating layer, and a passivation layer. The TFT is a switching element for transmitting or blocking the image signal from the data line to the pixel electrode in response to the scanning signal from the gate line.
- The driving circuits are located near edges of the display device and connected to end portions of the signal lines, which are clustered in a small area (referred to as “connection area” hereinafter) for the connection. On the contrary, the distances between the signal lines in an area (referred to as “display area”) including the pixels have a value determined by the size of the pixels to have larger values than the distances between their end portions connected to the driving circuits. Accordingly, a plurality of fan-out areas in which the distances between the signal lines gradually increase or decrease like a fan are provided between the connection area and the display area.
- Although the signal lines near the center of the fan-out area extends straight without curving, the signal lines closer to edges of the fan-out area have larger curving angles. This configuration of the fan-out area results in the difference in the length between the signal lines such that the line length near the center of the fan-out area is shorter than the line length near the edges of the fan-out area. The length difference differentiates the resistances of the signal lines, which results in the deteriorated image quality.
- In particular, since a liquid crystal display uses a voltage control scheme which controls voltages applied to the pixels, the voltage difference due to the resistance difference causes a severe problem in image quality.
- A motivation of the present invention is to reduce resistance difference due to length difference of signal lines.
- A display panel including a plurality of signal lines is provided. Each signal line includes a first portion and a second portion, and the display panel includes a first area including the first portions of the signal lines and a second area including the second portions of the signal lines. The first portions of the signal lines have substantially the same length and the second portions of the signal lines have different lengths. The second portion of each signal line includes a third portion and a fourth portion and the third and the fourth portion include at least one layer. The number of layers in the third portion is smaller than the number of layers in the fourth portion.
- The length of the third portion of each signal line preferably depends on the entire length of the signal line. Preferably, the length of the third portion of relatively longer signal line is relatively shorter, and in particular, the length of the third portion of each signal line is inversely proportional to the entire length of the signal line.
- It is preferable that each signal line further includes a fifth portion for connection with outside, and the display panel further includes a third area including the fifth portions of the signal lines and located opposite the first area with respect to the second area.
- The signal lines may be arranged like a fan in the second area, and the length of the signal line closer to edges of the second area is longer.
- The display panel may further include a driving circuit connected to the signal lines in the third area and supplying signals to the signal lines. The driving circuit is chip-mounted on the display panel or mounted on a separately provided printed circuit. The printed circuit includes a plurality of conductive lines for electrical connection between the driving circuit and an external device, and the conductive lines are connected to the signal lines in the third area.
- Preferably, the third portion of each signal line has a single-layered structure while the fourth portion of each signal line has a double-layered structure.
- A display panel including a plurality of signal lines is provided, the display panel includes: a first area where distances between the signal lines are substantially the same, and a second area where distances between the signal lines vary. Each signal line includes a first portion and a second portion, the first and the second portion of each signals line are located in the second area and include at least one layer, and the number of layers in the first portion is smaller than the number of layers in the second portion.
- It is preferable that the lengths of the signal lines in the second area are different, the length of the first portion of relatively longer signal line is relatively shorter, and the signal lines are arranged like a fan in the second area.
- Preferably, the display panel further includes a third area located opposite the first area with respect to the second area, and the distances between the signal lines in the third area are shorter than the distances between the signal lines in the first area.
- The display panel may further include a driving circuit connected to the signal lines in the third area and supplying signals to the signal lines.
- A liquid crystal display according to an embodiment of the present invention includes a display area, first and second fan-out areas, and first and second connection areas. The liquid crystal display includes: an insulating substrate; a plurality of gate lines formed on the substrate, each gate line including a connecting portion; a plurality of data lines insulated from the gate lines and intersecting the gate lines in the display area, each data line including a connecting portion; a gate driving circuit connected to the connecting portions of the gate lines in the first connection areas; and a data driving circuit connected to the connecting portions of the data lines in the second connection areas. Each gate line or data line include a lower portion including at least one layer and located in the first or the second fan-out area, and the number of layers in the lower portion is smaller than the number of layers in other portions.
- It is preferable that the length of the lower portion of relatively longer gate line or data line is relatively shorter, and the length of the lower portion closer to a center of the driving circuits is longer.
- Preferably, the liquid crystal display further includes a plurality of thin film transistors connected to the gate lines and the data lines and a plurality of pixel electrodes connected to the thin film transistors.
- The above and other advantages of the present invention will become more apparent by describing preferred embodiments thereof in detail with reference to the accompanying drawings in which:
-
FIG. 1 is a schematic layout view of an LCD according to an embodiment of the present invention; -
FIG. 2 is a schematic layout view of an LCD according to another embodiment of the present invention; -
FIG. 3 is a schematic perspective view of an LCD according to another embodiment of the present invention; -
FIG. 4 is an enlarged layout view of a fan-out area shown inFIGS. 1 and 2 ; -
FIG. 5 is a sectional view of the fan-out area shown inFIG. 4 taken along the line V-V′; -
FIG. 6 is a sectional view of the fan-out area shown inFIG. 4 taken along the line VI-VI′; and -
FIG. 7 is a graph showing resistances of signal lines in a fan-out area of a panel according to an embodiment of the present invention. - The present invention now will be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the present invention are shown. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.
- In the drawings, the thickness of layers and regions are exaggerated for clarity. Like numerals refer to like elements throughout. It will be understood that when an element such as a layer, region, panel or substrate is referred to as being “on” another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.
- Now, display panels and liquid crystal displays (LCDs) according to embodiments of the present invention will be described in detail with reference to the drawings.
-
FIG. 1 is a schematic layout view of an LCD according to an embodiment of the present invention,FIG. 2 is a schematic layout view of an LCD according to another embodiment of the present invention, andFIG. 3 is a schematic perspective view of an LCD according to another embodiment of the present invention. - Referring to
FIG. 1 , an LCD according to an embodiment of the present invention includes a liquidcrystal panel assembly 300, a plurality of gate flexible printed circuit (FPC)films 410 and a plurality ofdata FPC films 510 attached to thepanel assembly 300, and a printed circuit board (PCB) 550 attached to thedata FPC film 510. - Referring to
FIG. 3 , thepanel assembly 300 includes alower panel 1 and anupper panel 2 facing each other and a liquid crystal layer 3 interposed between the twopanels - The
upper panel 2 includes ablack matrix 220 having a plurality of apertures arranged in a matrix, a plurality ofprimary color filters 230 such as red, green, and blue color filters disposed in respective apertures in theblack matrix 220, and acommon electrode 270 formed on an entire surface of the upper panel. These elements such as theblack matrix 220, thecolor filters 230, and thecommon electrode 270 may be provided on thelower panel 1. - The
lower panel 1 includes a plurality ofpixel electrodes 190 arranged in a matrix, a plurality of switching elements Q connected to thepixel electrodes 190, a plurality ofgate lines 121 connected to the switching elements Q and transmitting gate signals (also referred to as “scanning signals”), and a plurality ofdata lines 171 connected to the switching elements Q and transmitting data signals. - The
pixel electrodes 190 face the apertures of theblack matrix 220 and are preferably made of a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO) or of a reflective metal. - The switching elements Q includes three-terminal thin film transistors (TFTs), each switching element Q having control and input terminals respectively connected to the
gate line 121 and thedata line 171 and an output terminal connected to thepixel electrode 190 such that the switching element Q selectively transmits the data signals from thedata lines 171 responsive to the gate signals from the gate lines 121. - Referring back to
FIG. 1 , a plurality of gate driver integrated circuits (ICs) 410 and a plurality of data driver ICs are chip-mounted on thegate FPC films 410 and thedata FPC films 510, respectively. A plurality ofleads FPC films - Various circuit elements for driving and controlling the
panel assembly 300 are provided on thePCB 550. The circuit elements are connected to thedata driver ICs 540 via signal lines (not shown) provided on thePCB 550 and theleads 520 on thedata FPC films 510. The electrical connection between thegate driver ICs 440 and thePCB 550 is made by signal lines (not shown) separately provided on thedata PCB 550 and thelower panel 1 and theleads 420 on thegate FPC films 410. - Another embodiment shown in
FIG. 2 mounts thedriver ICs lower panel 1 of thepanel assembly 300, and the gate FPC film is not required. ThePCB 550 and thedata FPC film 510 are not shown inFIG. 2 for descriptive convenience. - According to another embodiment, an additional PCB (not shown) is attached to the
gate FPC films 410, and some circuit elements of thePCB 550 are provided on the additional PCB. - According to an embodiment of the present invention, the
driver ICs 440 and/or 540 are integrated into thelower panel 1, instead of being chip-mounted. - Referring to
FIGS. 1 and 2 , thelower panel 1 is divided into a display area D including the array of thepixel electrodes 190, and a peripheral area located outside the display area D and including the connections between thedisplay signal lines FPC films 410 and 510 (as shown inFIG. 1 ) or the drivingICs 440 and 540 (as shown inFIG. 2 ). - The
display signal lines pixel electrodes 190 through the switching elements Q in the display area and extend substantially parallel to each other. The signal lines 121 and 171 have one ends connected to theFPC films driver ICs FIG. 1 , the distance between theleads 420 of theFPC films driver ICs display signal lines signal lines driver ICs display signal lines FIG. 2 , than the distance between thesignal lines signal lines signal lines - Now, a fan-out area of a panel according to an embodiment of the present invention is described in detail with reference to
FIGS. 4-6 . -
FIG. 4 is an enlarged layout view of a fan-out area shown inFIGS. 1 and 2 ,FIG. 5 is a sectional view of the fan-out area shown inFIG. 4 taken along the line V-V′, andFIG. 6 is a sectional view of the fan-out area shown inFIG. 4 taken along the line VI-VI′. - As shown in
FIG. 4 , signal lines SL1-SLn such asgate lines 121 ordata lines 171 are arranged like a fan in a fan-out area located between a display area D and a connection area CA. The connection area CA is an area where end portions of the signal lines SL1-SLn are connected toFPC films driver ICs - Each of the display signal lines SL1-SLn includes at least one of a lower layer N1-Nn and an upper layer M1-Mn, which are sequentially deposited on a
substrate 40 and made of conductive material such as metal. The two layers N1-Nn and M1-Mn may have different resistivity. It is preferable that one of the two layers N1-Nn and M1-Mn are made of low resistivity metal such as Al, Al alloy, Ag and Ag alloy, and the other of the two layers N1-Nn and M1-Mn are made of Cr, Ti, Ta, Mo or their alloys such as MoW alloy having good physical, chemical and electrical contact characteristics with other materials such as indium tin oxide (ITO) and indium zinc oxide (IZO). - Referring to
FIGS. 5 and 6 , each signal line SL1-SLn include a single-layered portion L1-Ln which extends to the connection area CA. The length of the single-layered portions L1-Ln of the signal lines SL1-SLn becomes shorter as the length of the corresponding signal lines SL1-SLn becomes longer. For example, the length of the single-layered portion L1-Ln is inverse proportional to the length of the corresponding signal line SL1-SLn. - As a result, the resistance of the signal lines SL1-SLn in the fan-out area F is uniform. That is, the resistance difference of the length of portions in the fan-out area F or of the entire length of the signal lines SL1-SLn is compensated by making the single-layered portions L1-Ln of longer signal lines SL1-SLn shorter, while making those of shorter signal lines SL1-SLn longer since the single-layered portion L1-Ln has larger resistance than other portions including two layers N1-Nn and M1-Mn electrically connected in parallel.
- For example, it is assumed that the length of a portion of a signal line SLi in a fan-out area F and the length of the single-layered portion Li of the signal line SLi are indicated by ti and si, respectively, the resistivities of the lower layer Ni and the upper layer Mi are indicated by ρN and ρM, respectively, and the areas of the sections of the lower layer Ni and the upper layer Mi are equal and indicated by A.
- The resistance Ri(single) of the single-layered portion Li of the signal layer SLi is given by,
- The resistance Ri(double) of the remaining double-layered portion of the signal layer SLi, which equals to the combined resistance of the resistance Ri(lower) of the lower layer Ni and the resistance Ri(upper) of the upper layer Mi connected in parallel, is given by,
- Accordingly, the total resistance Ri of the portion of the signal line SLi in the fan-out area F is obtained such that:
- Since the resistances of the portions of the signal lines SL1-SLn in the fan-out area F are preferably equal to each other, the lengths s1-sn of the single-layered portion L1-Ln of the signal lines SL1-SLn are adjusted such that the resistances R1-Rn of all the signal lines given by Equation 3 are the same.
-
FIG. 7 is a graph showing resistances of signal lines in a fan-out area of a display panel having a signal line configuration. The line shown inFIG. 2 illustrates that the resistances of all the signal lines are the same. The term “substantially the same” means “the same” if the resistance deviation due to device error of a manufacturing device for manufacturing the signal lines SL1-SLn and or operation error of the manufacturing device is ignored. - As described above, the embodiments of the present invention provide dual-layered signal lines for reducing the resistance difference due to the length difference in a fan-out area, thereby effectively removing image deterioration due to the resistance difference.
- Although the embodiments focus on LCDs, the present invention is also applicable to any display devices having fan-out areas.
- While the present invention has been described in detail with reference to the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the sprit and scope of the appended claims.
Claims (20)
1. A display panel including a plurality of signal lines, each signal line including a first portion and a second portion, the display panel comprising:
a first area including the first portions of the signal lines; and
a second area including the second portions of the signal lines,
where the first portions of the signal lines have substantially the same length, the second portions of the signal lines have different lengths, the second portion of each signal line includes a third portion and a fourth portion including at least one layer, and the number of layers in the third portion is smaller than the number of layers in the fourth portion.
2. The display panel of claim 1 , wherein the length of the third portion of each signal line depends on the entire length of the signal line.
3. The display panel of claim 2 , wherein the length of the third portion of relatively longer signal line is relatively shorter.
4. The display panel of claim 3 , wherein the length of the third portion of each signal line is inversely proportional to the entire length of the signal line.
5. The display panel of claim 4 , wherein each signal line further comprises a fifth portion for connection with outside, and the display panel further comprises a third area including the fifth portions of the signal lines and located opposite the first area with respect to the second area.
6. The display panel of claim 5 , wherein the signal lines are arranged like a fan in the second area.
7. The display panel of claim 6 , wherein the length of the signal line closer to edges of the second area is longer.
8. The display panel of claim 5 , further comprising a driving circuit connected to the signal lines in the third area and supplying signals to the signal lines.
9. The display panel of claim 8 , wherein the driving circuit is chip-mounted on the display panel.
10. The display panel of claim 8 , further comprising a printed circuit mounting the driving circuit and including a plurality of conductive lines for electrical connection between the driving circuit and an external device, the conductive lines connected to the signal lines in the third area.
11. The display panel of claim 2 , wherein the third portion of each signal line has a single-layered structure and the fourth portion of each signal line has a double-layered structure.
12. A display panel including a plurality of signal lines, the display panel comprising:
a first area where distances between the signal lines are substantially the same, and
a second area where distances between the signal lines vary,
where each signal line includes a first portion and a second portion, the first and the second portion of each signals line are located in the second area and include at least one layer, and the number of layers in the first portion is smaller than the number of layers in the second portion.
13. The display panel of claim 12 , wherein the lengths of the signal lines in the second area are different, and the length of the first portion of relatively longer signal line is relatively shorter.
14. The display panel of claim 13 , further comprising a third area located opposite the first area with respect to the second area, the distances between the signal lines in the third area being shorter than the distances between the signal lines in the first area.
15. The display panel of claim 14 , wherein the signal lines are arranged like a fan in the second area.
16. The display panel of claim 15 , further comprising a driving circuit connected to the signal lines in the third area and supplying signals to the signal lines.
17. A liquid crystal display including a display area, first and second fan-out areas, and first and second connection areas, the liquid crystal display comprising:
an insulating substrate;
a plurality of gate lines formed on the substrate, each gate line including a connecting portion;
a plurality of data lines insulated from the gate lines and intersecting the gate lines in the display area, each data line including a connecting portion;
a gate driving circuit connected to the connecting portions of the gate lines in the first connection areas; and
a data driving circuit connected to the connecting portions of the data lines in the second connection areas,
wherein each gate line or data line include a lower portion including at least one layer and located in the first or the second fan-out area, and the number of layers in the lower portion is smaller than the number of layers in other portions.
18. The liquid crystal display of claim 17 , wherein the length of the lower portion of relatively longer gate line or data line is relatively shorter.
19. The liquid crystal display of claim 18 , wherein the length of the lower portion closer to a center of the driving circuits is longer.
20. The liquid crystal display of claim 17 , further comprising:
a plurality of thin film transistors connected to the gate lines and the data lines; and
a plurality of pixel electrodes connected to the thin film transistors.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/297,781 US20060082712A1 (en) | 2002-12-30 | 2005-12-07 | Display panel and liquid crystal display including signal lines |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2002-87435 | 2002-12-30 | ||
KR1020020087435A KR20040060619A (en) | 2002-12-30 | 2002-12-30 | Liquid crystal display |
US10/714,727 US7012664B2 (en) | 2002-12-30 | 2003-11-17 | Display panel and liquid crystal display including signal lines |
US11/297,781 US20060082712A1 (en) | 2002-12-30 | 2005-12-07 | Display panel and liquid crystal display including signal lines |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/714,727 Continuation US7012664B2 (en) | 2002-12-30 | 2003-11-17 | Display panel and liquid crystal display including signal lines |
Publications (1)
Publication Number | Publication Date |
---|---|
US20060082712A1 true US20060082712A1 (en) | 2006-04-20 |
Family
ID=36180348
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/714,727 Expired - Lifetime US7012664B2 (en) | 2002-12-30 | 2003-11-17 | Display panel and liquid crystal display including signal lines |
US11/297,781 Abandoned US20060082712A1 (en) | 2002-12-30 | 2005-12-07 | Display panel and liquid crystal display including signal lines |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/714,727 Expired - Lifetime US7012664B2 (en) | 2002-12-30 | 2003-11-17 | Display panel and liquid crystal display including signal lines |
Country Status (5)
Country | Link |
---|---|
US (2) | US7012664B2 (en) |
JP (1) | JP2004213020A (en) |
KR (1) | KR20040060619A (en) |
CN (1) | CN1512251A (en) |
TW (1) | TW200424715A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140291846A1 (en) * | 2013-03-28 | 2014-10-02 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Array substrate and fanout line structure of the array substrate |
Families Citing this family (44)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100831306B1 (en) * | 2004-03-17 | 2008-05-22 | 엘지디스플레이 주식회사 | Liquid Crystal Display Device |
KR20070031620A (en) * | 2005-09-15 | 2007-03-20 | 삼성전자주식회사 | Liquid crystal display |
TWI276878B (en) * | 2006-03-02 | 2007-03-21 | Au Optronics Corp | Display panel capable of reducing mismatching RC effect during signal transmission and method of manufacturing the same |
JP4254883B2 (en) * | 2006-05-29 | 2009-04-15 | エプソンイメージングデバイス株式会社 | Wiring board, mounting structure, and manufacturing method thereof |
TWI401493B (en) | 2008-12-24 | 2013-07-11 | Au Optronics Corp | Liquid crystal display panel |
TWI403790B (en) * | 2009-10-19 | 2013-08-01 | Au Optronics Corp | Touch substrate and touch display panel |
CN102402963B (en) * | 2011-12-02 | 2013-06-05 | 深圳市华星光电技术有限公司 | Drive circuit and drive method for liquid crystal display |
KR101987384B1 (en) * | 2012-11-23 | 2019-06-11 | 엘지디스플레이 주식회사 | Display device |
KR20140068592A (en) * | 2012-11-28 | 2014-06-09 | 삼성디스플레이 주식회사 | Display device |
CN103149753B (en) * | 2013-03-28 | 2016-03-30 | 深圳市华星光电技术有限公司 | Array base palte and Fanout line structure thereof |
CN103336395B (en) * | 2013-06-18 | 2016-08-17 | 南京中电熊猫液晶显示科技有限公司 | A kind of distribution structure |
KR20150011583A (en) * | 2013-07-23 | 2015-02-02 | 엘지디스플레이 주식회사 | Display apparatus |
CN103560134B (en) * | 2013-10-31 | 2016-11-16 | 京东方科技集团股份有限公司 | A kind of array base palte and preparation method thereof, display device |
WO2015092945A1 (en) * | 2013-12-20 | 2015-06-25 | パナソニック液晶ディスプレイ株式会社 | Display device |
CN103761950B (en) * | 2013-12-31 | 2016-02-24 | 深圳市华星光电技术有限公司 | For compensating the method for the data line impedance of liquid crystal display |
TWI537641B (en) | 2014-04-09 | 2016-06-11 | 群創光電股份有限公司 | Fan-out structure and display panel using the same |
KR102219516B1 (en) * | 2014-04-10 | 2021-02-25 | 삼성디스플레이 주식회사 | Display substrate |
CN104134406A (en) | 2014-07-17 | 2014-11-05 | 京东方科技集团股份有限公司 | Wiring board, flexible display screen and display device |
US20160018711A1 (en) * | 2014-07-21 | 2016-01-21 | Shenzhen China Star Optoelectronics Technology Co. Ltd. | Display device |
CN104216182B (en) | 2014-08-22 | 2017-03-01 | 京东方科技集团股份有限公司 | Array base palte and its manufacture method and display floater |
CN104407477A (en) * | 2014-12-02 | 2015-03-11 | 深圳市华星光电技术有限公司 | Array substrate and display devices |
CN104614887A (en) * | 2015-02-02 | 2015-05-13 | 深圳市华星光电技术有限公司 | Array substrate, liquid crystal display panel and liquid crystal display device |
KR102384650B1 (en) * | 2015-04-14 | 2022-04-11 | 삼성디스플레이 주식회사 | Organic light-emitting display apparatus and manufacturing the same |
KR102378551B1 (en) | 2015-06-25 | 2022-03-25 | 삼성디스플레이 주식회사 | Display device |
CN105389058B (en) | 2015-12-07 | 2018-11-06 | 上海中航光电子有限公司 | A kind of integrated touch-control display panel and integrated touch control display apparatus |
US10490122B2 (en) | 2016-02-29 | 2019-11-26 | Samsung Display Co., Ltd. | Display device |
CN105679744A (en) * | 2016-03-29 | 2016-06-15 | 京东方科技集团股份有限公司 | Fan-out line structure, display panel and manufacturing method thereof |
KR102666831B1 (en) | 2016-04-15 | 2024-05-21 | 삼성디스플레이 주식회사 | Display device |
US10354578B2 (en) | 2016-04-15 | 2019-07-16 | Samsung Display Co., Ltd. | Display device |
KR102605283B1 (en) | 2016-06-30 | 2023-11-27 | 삼성디스플레이 주식회사 | Display device |
KR102613863B1 (en) | 2016-09-22 | 2023-12-18 | 삼성디스플레이 주식회사 | Display device |
KR102611958B1 (en) | 2016-09-23 | 2023-12-12 | 삼성디스플레이 주식회사 | Display device |
KR102559096B1 (en) | 2016-11-29 | 2023-07-26 | 삼성디스플레이 주식회사 | Display device |
KR20180061568A (en) | 2016-11-29 | 2018-06-08 | 삼성디스플레이 주식회사 | Display device |
KR102643154B1 (en) * | 2016-12-08 | 2024-03-05 | 삼성디스플레이 주식회사 | Display apparatus |
JP2018128498A (en) * | 2017-02-06 | 2018-08-16 | セイコーエプソン株式会社 | Electrooptical device and electronic apparatus |
KR20180096875A (en) | 2017-02-21 | 2018-08-30 | 삼성디스플레이 주식회사 | Display device |
KR102417989B1 (en) | 2017-05-23 | 2022-07-07 | 삼성디스플레이 주식회사 | Display device |
CN107783344B (en) | 2017-10-26 | 2020-07-10 | 惠科股份有限公司 | Display panel and display device using same |
CN107608104B (en) * | 2017-11-03 | 2020-09-11 | 惠科股份有限公司 | Display panel and display device using same |
CN110262148B (en) * | 2019-07-03 | 2022-06-03 | 昆山龙腾光电股份有限公司 | Array substrate, display panel and display device |
CN111258132A (en) * | 2020-03-31 | 2020-06-09 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and liquid crystal display panel |
CN111427211A (en) * | 2020-04-21 | 2020-07-17 | 昆山龙腾光电股份有限公司 | Array substrate and display device |
CN113539114B (en) * | 2021-07-30 | 2023-04-21 | 惠科股份有限公司 | Flip chip film and display device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6683669B1 (en) * | 1999-08-06 | 2004-01-27 | Sharp Kabushiki Kaisha | Apparatus and method for fabricating substrate of a liquid crystal display device and interconnects therein |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2776231B2 (en) * | 1993-12-31 | 1998-07-16 | カシオ計算機株式会社 | Display device |
US5835177A (en) * | 1995-10-05 | 1998-11-10 | Kabushiki Kaisha Toshiba | Array substrate with bus lines takeout/terminal sections having multiple conductive layers |
JP3525918B2 (en) * | 2000-10-31 | 2004-05-10 | セイコーエプソン株式会社 | Electro-optical device, inspection method thereof, and electronic apparatus |
-
2002
- 2002-12-30 KR KR1020020087435A patent/KR20040060619A/en not_active Application Discontinuation
-
2003
- 2003-11-17 US US10/714,727 patent/US7012664B2/en not_active Expired - Lifetime
- 2003-11-20 TW TW092132573A patent/TW200424715A/en unknown
- 2003-11-25 CN CNA2003101154418A patent/CN1512251A/en active Pending
-
2004
- 2004-01-05 JP JP2004000647A patent/JP2004213020A/en not_active Abandoned
-
2005
- 2005-12-07 US US11/297,781 patent/US20060082712A1/en not_active Abandoned
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6683669B1 (en) * | 1999-08-06 | 2004-01-27 | Sharp Kabushiki Kaisha | Apparatus and method for fabricating substrate of a liquid crystal display device and interconnects therein |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140291846A1 (en) * | 2013-03-28 | 2014-10-02 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Array substrate and fanout line structure of the array substrate |
Also Published As
Publication number | Publication date |
---|---|
JP2004213020A (en) | 2004-07-29 |
US20040125258A1 (en) | 2004-07-01 |
TW200424715A (en) | 2004-11-16 |
US7012664B2 (en) | 2006-03-14 |
KR20040060619A (en) | 2004-07-06 |
CN1512251A (en) | 2004-07-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7012664B2 (en) | Display panel and liquid crystal display including signal lines | |
US7466387B2 (en) | Integrated circuit and display device including integrated circuit | |
US6774414B2 (en) | Thin film transistor array panel for a liquid crystal display | |
US7855767B2 (en) | Transflective liquid crystal display | |
US8797491B2 (en) | Display device having fanout wiring | |
US6833890B2 (en) | Liquid crystal display | |
US7714820B2 (en) | Contact structure of conductive films and thin film transistor array panel including the same | |
US8525817B2 (en) | Pixel array module and flat display apparatus | |
US7851799B2 (en) | Thin film transistor substrate | |
US20100207935A1 (en) | Display device and driving apparatus thereof | |
WO2011052258A1 (en) | Display panel and display apparatus | |
US20060046374A1 (en) | Conducting line terminal structure for display device | |
KR100840329B1 (en) | Liquid crystal display | |
WO2021251323A1 (en) | Array substrate and display device | |
KR20020069414A (en) | A thin film transistor array panel for liquid crystal display and a method for manufacturing the same | |
KR20060011587A (en) | Liquid crystal display device and the fabrication method thereof | |
KR20080050678A (en) | Contact and thin film transistor substrate including the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |