TWI815356B - 三維焊盤結構、互連結構和半導體封裝 - Google Patents

三維焊盤結構、互連結構和半導體封裝 Download PDF

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TWI815356B
TWI815356B TW111109768A TW111109768A TWI815356B TW I815356 B TWI815356 B TW I815356B TW 111109768 A TW111109768 A TW 111109768A TW 111109768 A TW111109768 A TW 111109768A TW I815356 B TWI815356 B TW I815356B
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pad
conductive
dimensional
base
substrate
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TW111109768A
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TW202240818A (zh
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張晉強
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聯發科技股份有限公司
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Abstract

本發明公開一種三維焊盤結構，包括：基板；焊盤，設置於該基板上，其中該焊盤的周邊覆蓋有阻焊層；以及至少一個導電柱，從該焊盤的上表面凸出。

Description

三維焊盤結構、互連結構和半導體封裝
本發明涉及半導體技術領域，尤其涉及一種三維焊盤結構、互連結構和半導體封裝。
球柵陣列(Ball grid array，BGA)封裝作為細間距(fine pitch)引腳封裝(leaded package)的低成本、高良率替代品正在迅速獲得電子行業的認可。形成導電焊點(solder joint)以將部件/器件上的焊盤或焊墊(pad)與基板上的對應焊盤或焊墊機械的及電性互連。無論是機械結構的還是電性的，所有焊點都必須為應用提供必要的可靠性水平。
眾所周知，金屬間化合物(inter-metallic compound，IMC)層是形成良好焊接的關鍵，但也是整個焊接結構中最薄弱的層。即使製程應變水平在設計規範內，機械強度差的IMC層在承受製程機械應力時也很容易損壞。
因此，需要提供一種改進的互連結構，能夠在不改變任何BGA生產製程的情況下解決當前印刷電路板組件(printed circuit board assembly，PCBA)上的裂紋現象。
有鑑於此，本發明提供一種三維焊盤結構、互連結構和半導體封裝，以解決上述問題。
根據本發明的第一方面，公開一種三維焊盤結構，包括： 基板；焊盤，設置於該基板上，其中該焊盤的周邊覆蓋有阻焊層；以及至少一個導電柱，從該焊盤的上表面凸出。
根據本發明的第二方面，公開一種三維焊盤結構，包括：基板；焊盤，設置於該基板上，其中該焊盤的周邊覆蓋有阻焊層；凹陷區域，設置在該焊盤的上表面上；以及至少一個突出特徵，在該凹陷區域之間。
根據本發明的第三方面，公開一種互連結構，包括：基板；焊盤，設置於該基板上，其中該焊盤的周邊覆蓋有阻焊層；至少一個導電柱，凸出於接墊的上表面；以及導電球，設置在該焊盤上並且圍繞該導電柱，其中該至少一個導電柱和該導電球互鎖，並且其中該導電球錨固到該焊盤。
根據本發明的第四方面，公開一種半導體封裝，其中，該半導體封裝包括如上述任意一項之三維焊盤結構或如上述任意一項之互連結構。
本發明的三維焊盤結構由於包括：基板；焊盤，設置於該基板上，其中該焊盤的周邊覆蓋有阻焊層；以及至少一個導電柱，從該焊盤的上表面凸出。採用上述方式可以增加導電球與導電球焊盤和導電柱的組合結構之間的接觸面積，從而使導電球與導電球焊盤和導電柱的組合結構之間的連接更加穩定和緊密，本發明的三維焊盤結構的機械強度比普通的焊球直接形成在焊盤上的結構更加穩固，從而在碰撞時可以避免機械連接和電性連接的不穩固，更不容易發生焊球脫落等意外情況，提高半導體封裝的結構穩定性，可以顯著提高板級可靠性。
1:半導體封裝
100:封裝基板
100a:元件側
110:半導體晶粒
111:連接元件
104:互連結構
100b:板側
130:阻焊層
h1:高度
w1,w2:寬度
102:導電球焊盤
102a,130a,202a:上表面
103p:開口
140:導電球
202:導電柱
202b:基部
202h:頭部
202n:頸部
202s:底切
120r:環形凹槽
140:導電球
102s:凹陷區域
302:突出特徵
透過閱讀後續的詳細描述和實施例可以更全面地理解本發明，本實施例參照附圖給出，其中：圖1是顯示根據本發明的一個實施例的示例性半導體封裝的有密切關係的部分(germane portion)的透視俯視圖；圖2是沿圖1中線I-I'截取的示意性截面圖；圖3展示了根據本發明另一實施例的示例性半導體封裝的導電球焊盤(conductive ball pad)的示意性俯視圖；圖4是沿圖3中I-I'線的剖面示意圖；圖5是圖4的半導體封裝件在導電球焊盤上安裝導電球後的導電球焊盤；圖6和圖7示出了根據一些實施例的導電球焊盤上的各種凹陷圖案；圖8是示出根據本發明另一實施例的示例性半導體封裝的有密切關係的部分的透視俯視圖；圖9是沿圖8中的線I-I'截取的示意性橫截面。
在下面對本發明的實施例的詳細描述中，參考了附圖，這些附圖構成了本發明的一部分，並且在附圖中透過圖示的方式示出了可以實踐本發明的特定的優選實施例。對這些實施例進行了足夠詳細的描述，以使所屬技術領域具有通常知識者能夠實踐它們，並且應當理解，在不脫離本發明的精神和範圍的情況下，可以利用其他實施例，並且可以進行機械，結構和程式上的改變。本發明。因此，以下詳細描述不應被理解為限制性的，並且本發明的實施例的 範圍僅由所附申請專利範圍限定。
將理解的是，儘管術語“第一”、“第二”、“第三”、“主要”、“次要”等在本文中可用於描述各種元件、組件、區域、層和/或部分，但是這些元件、組件、區域、這些層和/或部分不應受到這些術語的限制。這些術語僅用於區分一個元件、組件、區域、層或部分與另一區域、層或部分。因此，在不脫離本發明構思的教導的情況下，下面討論的第一或主要元件、組件、區域、層或部分可以稱為第二或次要元件、組件、區域、層或部分。
此外，為了便於描述，本文中可以使用諸如“在…下方”、“在…之下”、“在…下”、“在…上方”、“在…之上”之類的空間相對術語，以便於描述一個元件或特徵與之的關係。如圖所示的另一元件或特徵。除了在圖中描述的方位之外，空間相對術語還意圖涵蓋設備在使用或運行中的不同方位。該裝置可以以其他方式定向(旋轉90度或以其他定向)，並且在此使用的空間相對描述語可以同樣地被相應地解釋。另外，還將理解的是，當“層”被稱為在兩層“之間”時，它可以是兩層之間的唯一層，或者也可以存在一個或複數個中間層。
術語“大約”、“大致”和“約”通常表示規定值的±20%、或所述規定值的±10%、或所述規定值的±5%、或所述規定值的±3%、或規定值的±2%、或規定值的±1%、或規定值的±0.5%的範圍內。本發明的規定值是近似值。當沒有具體描述時，所述規定值包括“大約”、“大致”和“約”的含義。本文所使用的術語僅出於描述特定實施例的目的，並不旨在限制本發明。如本文所使用的，單數術語“一”，“一個”和“該”也旨在包括複數形式，除非上下文另外明確指出。本文所使用的術語僅出於描述特定實施例的目的，並不旨在限制本發明構思。如本文所使用的，單數形式“一個”、“一種”和“該”也旨在包括複數形式，除非上下文另外明確指出。
將理解的是，當將“元件”或“層”稱為在另一元件或層“上”、“連接至”、“耦接至”或“鄰近”時，它可以直接在其他元件或層上、與其連接、耦接或相鄰、或者可以存在中間元件或層。相反，當元件稱為“直接在”另一元件或層“上”、“直接連接至”、“直接耦接至”或“緊鄰”另一元件或層時，則不存在中間元件或層。
注意：(i)在整個附圖中相同的特徵將由相同的附圖標記表示，並且不一定在它們出現的每個附圖中都進行詳細描述，並且(ii)一系列附圖可能顯示單個專案的不同方面，每個方面都與各種參考標籤相關聯，這些參考標籤可能會出現在整個序列中，或者可能只出現在序列的選定圖中。
在球柵陣列(ball grid array，BGA)封裝中，通常使用有機基板(organic substrate)來代替引線框架或引腳框架(lead frame)。基板一般由雙馬來醯亞胺三嗪或聚醯亞胺製成。晶片安裝在基板的頂部，基板底部的導電球(conductive ball)與電路板連接。這種設計允許更短的電路互連長度，從而提高電氣性能，以及具有更小的封裝尺寸。在BGA封裝中，積體電路(integrated circuit，IC)元件、焊點和印刷電路板(printed circuit board，PCB)形成三層(three-layer)結構。
跌落或碰撞引起的互連故障是可擕式電子應用的主要可靠性問題。故障通常發生在角落(或拐角)BGA球(或焊球)的封裝/焊料接口(界面)處，這會導致I/O密度降低，因為考慮到板級可靠性(board level reliability，BLR)問題，角落(或拐角)BGA球不是I/O球(因此先前技術需要留出更大的位置佈置I/O焊球，使封裝面積較大)。BLR一直是在汽車中使用BGA封裝的關鍵問題之一。BLR所需的規格在各種標準(AEC-Q100、Q104等)中列出，並且因汽車應用客戶而異。
本發明涉及一種用於電子元件/器件的相對電極(opposing electrode)、功能模組(functional module)和基板之間的機械的和電性互連的新型三維(three-dimensional，3D)導電球焊盤(conductive ball pad)，以及由導電接頭(conductive joint)和3D導電球焊盤形成的互連結構。電子元件/器件可以包括半導體封裝，印刷電路板等等。
請參考圖1和圖2。圖1是根據本發明的一個實施例的示例性半導體封裝1的有密切關係的部分的透視俯視圖。圖2是沿圖1中的線I-I'截取的示意性截面圖。如圖1和圖2所示，半導體封裝1包括封裝基板(或基板)100，封裝基板100具有元件側(或晶片側)100a和板側(或PCB側)100b。封裝基板100可以是有芯基板(具有核心層)或無芯基板。根據一個實施例，半導體晶粒(或晶粒)110可以設置在封裝基板100的元件側100a上。半導體晶粒110透過諸如銅柱、微凸塊或焊料凸塊的連接元件111的物理的(或機械的)和電連接到封裝基板100，但不限於此。板側(或PCB側)100b可以用於連接到PCB板。
根據一個實施例，半導體晶粒110可以由諸如包括環氧樹脂的模塑料(molding compound)之類的密封劑(encapsulant)120包覆成型(over-molded)。密封劑120與封裝基板100直接接觸。可以理解，半導體封裝1可以以某種方式包括複數個晶片或晶粒。為了簡單起見，圖中僅示出了半導體晶粒110的一部分。
在封裝基板100的板側100b上，設置有至少一個導電球墊(或導電球焊盤)102。根據一個實施例，例如，導電球焊盤(或焊墊)102可以位於半導體封裝1的拐角處。也就是說，當從封裝1的底部觀察時，導電球焊盤102可以是鄰近矩形半導體封裝的頂點設置的拐角球焊盤(corner ball pad)。例如，半導體封裝的平面形狀為矩形，導電球焊盤102可以位於該矩形的半導體封裝的四個角落或拐角處，靠近直角的區域。導電球焊盤102可以設置有複數個，除了在拐角處之外，其他區域也可以設置導電球焊盤102，這些可以根據需求自由設置，並不僅限定於設置在拐角處。根據一個實施例，例如，導電球焊盤102可以是銅焊盤。 根據設計要求，可在導電球焊盤102的上表面上形成表面可焊塗層(surface solderable coatihg)，例如鎳和/或金塗層或有機可焊性防腐劑(orgahic solderability preservative，OSP)，從而加強導電球焊盤102與導電球140(如後文所述)之間的連接強度和連接穩定性。根據一個實施例，導電球焊盤102可以透過封裝基板100中的互連結構104電連接到對應的連接元件111。例如，互連結構104可以包括銅跡線和電鍍通孔，但不限於此。
根據一個實施例，封裝基板100的板側100b和導電球焊盤102的周邊可以覆蓋有阻焊層(solder mask)130。阻焊層130的開口103p部分地暴露出導電球焊盤102的中央上表面(或至少部分上表面)。根據一個實施例，導電球焊盤102包括至少一個導電柱202，例如從導電球焊盤102的上表面突出的銅柱。例如，導電柱202在導電球墊102上表面上方的高度h1約等於阻焊層130在導電球墊102上表面上方的高度h2(從導電球墊102的上表面102a到阻焊層130的上表面130a的距離)。其中約等於可以是幾乎相等，但是可能會有誤差範圍內的誤差，例如在測量範圍內的誤差。根據一個實施例，導電柱202的上表面202a可以與阻焊層130的上表面130a齊平(或幾乎齊平)。在一些實施例中，可以在導電球焊盤102上設置複數個導電柱，例如2~3個或更多(圖1中僅示出了三個示例性導電柱或銅柱)。根據一個實施例，為了形成導電柱202，可以執行額外的電鍍製程和濕法蝕刻製程。本實施例中，導電球焊盤102為銅焊盤，導電柱202為銅柱時，可以是兩者結合更加緊密和穩定，提高兩者的連接強度和穩定性。導電柱202也可以是其他金屬柱，例如鎳柱等等，其中鎳柱可以便於形成及提高連接的穩定性。導電球焊盤102也可以包括其他金屬，例如鋁、鎳等等。
根據一個實施例，如圖2所示在導電柱202的側壁上提供底切(undercut)202s，從而形成彎曲的側壁輪廓。可以透過執行具有更快橫向蝕刻速率的濕法蝕刻製程來形成底切202s，這提供了比導電柱202的頭部202h和基部 202b更薄的頸部202n。根據一個實施例，頸部部分(或頸部)202n可以具有光滑的彎曲表面。例如濕法蝕刻製程之後形成的光滑的彎曲表面，光滑的彎曲表面與後續形成的焊球(例如導電球140)可以結合的更加緊密，保證結構的穩定。根據一個實施例，導電柱202的基部202b的寬度w1可以大於導電柱202的頭部202h的寬度w2。例如，頭部202b的寬度(或直徑)w2導電柱202可為約50微米，但不以此為限。在濕法蝕刻製程完成後，可以在導電球焊盤102上和導電柱202周圍形成環形凹槽120r。其中基部202b的寬度w1可以是基部202b的直徑，頭部202h的寬度w2可以是頭部202h的直徑。基部202b較寬的寬度或較大的直徑w1可以使導電柱202與導電球焊盤102之間連接強度較高，提高結構穩定性。頭部202b的寬度(或直徑)w2較小可以使導電柱202自身的結構更加穩定，並且有利於及方便導電球140的形成。本實施例中，導電柱202的側面截面形狀不限於如圖2所示的形狀，導電柱還可以是例如直桿形狀的(也即導電柱為圓柱狀)、或者基底較小而頭部較大等等。
根據一個實施例，導電球(或導電焊球)140例如焊球可以設置在導電球焊盤102上並完全圍繞導電柱202。根據一個實施例，導電球140、導電柱202和導電球焊盤102可以進行回流製程並且可以在導電柱202和導電球140之間的界面處形成金屬間化合物(IMC)層(未明確示出)。根據一個實施例，導電柱202和導電球140互鎖(interlock)，並且導電球140錨固(anchored)到導電球焊盤102。實驗結果表明，具有導電柱202的3D(三維)導電球焊盤102使焊點的強度增加至少20%，也即本實施例所形成的導電球焊盤102、導電柱202和導電球140的組合結構機械強度比普通的焊球直接形成在焊盤上的結構更加穩固，從而在碰撞時可以避免機械連接和電性連接的不穩固，更不容易發生焊球脫落等意外情況，提高半導體封裝的結構穩定性。具有這種導電柱202的導電球焊盤可以顯著提高板級可靠性。本實施例的上述方式可以增加導電球140與導電球焊盤102和導 電柱202的組合結構之間的接觸面積，從而使導電球與導電球焊盤和導電柱的組合結構之間的連接更加穩定和緊密。
根據一個實施例，只有半導體封裝1的拐角處的導電球焊盤上具有這樣的導電柱202。根據一些實施例，半導體封裝1的每個導電球焊盤上可以具有這樣的導電柱202。根據一些實施例，半導體封裝1的部分導電球焊盤上可以具有這樣的導電柱202。本實施例中，所提出的三維焊盤結構可以包括導電球焊盤102、導電柱202和導電球140組成的結構，當然還可以包括其他結構，例如基板、阻焊層等。本實施例中，互連結構可以包括導電球焊盤102、導電柱202和導電球140組成的結構，當然還可以包括其他結構，例如基板、阻焊層等。本實施例中，半導體封裝1可以包括上述三維焊盤結構，或者，半導體封裝1可以包括上述互連結構。在一些實施例中，三維焊盤結構又可稱為互連結構。
請參考圖3至圖7。圖3展示根據本發明另一實施例的示範性半導體封裝2的導電球焊盤的示意俯視圖，其中相同的層、區域或元件由相同的數位編號或標籤表示。圖4為沿圖3中線I-I'的剖面示意圖，為簡潔起見，圖4省略了封裝基板下方的詳細結構。圖5示出了在導電球安裝在導電球焊盤上之後的圖4中的半導體封裝件的導電球焊盤。圖6和圖7示出了根據某種原因在導電球焊盤上的各種凹陷圖案。
如圖3和圖4所示，在導電球焊盤102的上表面提供凹陷區域(recessed region)102s。透過使用本領域已知的光刻製程和濕法或乾法蝕刻方法將預定圖案選擇性地蝕刻到導電球焊盤102的上表面102a中來形成凹陷區域102s，從而在它們之間形成突出特徵(protruding feature)302。例如，每個凹陷區域102s在俯視時可以具有交叉圖案。根據一個實施例，凹陷區域102s透過突出特徵302彼此隔離或間隔開。在一些實施例中，凹陷區域102s可以相互連通以形成網路或交錯圖案。在一個實施例中，凹陷區域102s的內表面是不光滑的表面，例如內表面具 有規則或不規則的凹凸物，或內表面具有網格圖案或其他圖案，或者如圖7所示，凹陷區域102s是溝槽，或者內表面具有磨砂表面等等。此外，如圖3所示，從俯視方向看，凹陷區域102s的平面形狀可以是十字形，也可以是其他形狀，例如三角形、四邊形、八邊形或其他規則或不規則的形狀；本實施例中凹陷區域102s可以具有一個或複數個，其中當具有複數個時，每個凹陷區域102s的平面形狀可以相同或者不同，或者至少有兩個凹陷區域102s的平面形狀相同，等等。
可以理解，凹陷區域102s的空中圖案僅用於說明目的。其他圖案，例如圖6中描繪的圓形圖案和圖7中描繪的網格型(或網路型)圖案也可應用。凹陷區域102s之間的突出部件302可以具有與導電球焊盤102的上表面102a齊平的上表面302a。圖7中描繪的網格型圖案中，凹陷區域102s可以是相互連通或不連通的溝槽，溝槽的形狀可以是規則或不規則的，可以根據需求自由設置。
根據一個實施例，如圖6所示，同樣地，導電球140設置在導電球焊盤102上並完全圍繞突出部件302。凹陷區域102s填充有導電球140。根據一個實施例，導電球140、突出部件302和導電球焊盤102可以進行回流製程，並且金屬間化合物(IMC)層(未明確示出)可以形成在突出部件302和導電球140之間的界面處。根據一個實施例，突出特徵(或突出部件)302和導電球140互鎖並且導電球140被錨定(或錨固)到導電球焊盤102。本實施例中，由於凹陷區域102s的內表面是不光滑的表面，這樣在形成導電球140之後，導電球140與導電球焊盤102之間的連接更加穩定，更不容易發生焊球脫落等意外情況。在一個實施例中，凹陷區域102s的內表面也可以是光滑的。總之，本實施例的上述方式可以增加導電球140與導電球焊盤102(該導電球焊盤102具有凹陷區域102s)之間的接觸面積，從而使導電球與導電球焊盤之間的連接更加穩定和緊密。
請參考圖8和圖9。圖8是根據本發明另一實施例的示例性半導體封裝3的有密切關係的部分的透視俯視圖。圖9是沿圖8中的線I-I'截取的示意性截面 圖。如圖8和圖9所示，同樣地，半導體封裝3包括封裝基板100，該封裝基板100具有元件側(或晶片側)100a和板側(或PCB側)100b。封裝基板100可以是有芯基板(具有核心層)或無芯基板。根據一個實施例，半導體晶粒(或晶粒)110可以設置在封裝基板100的元件側100a上。半導體晶粒110透過諸如諸如銅柱、微凸塊或焊料凸塊，但不限於此。
根據一個實施例，半導體晶粒110可以由諸如包括環氧樹脂的模塑料之類的密封劑120包覆成型。密封劑120與封裝基板100直接接觸。應當理解，在一些實施例中，半導體封裝3可以包括複數個晶片或晶粒。為了簡單起見，圖中僅示出了半導體晶粒110的一部分。
在封裝基板100的板側100b上，設置有至少一個導電球焊盤102。根據一個實施例，例如，導電球焊盤102可以位於半導體封裝3的拐角處。也就是說，當從封裝3的底部觀察時，導電球焊盤102可以是鄰近矩形半導體封裝的頂點設置的拐角球焊盤。根據一個實施例，例如，導電球焊盤102可以是銅焊盤。根據設計要求，可在導電球焊盤102的上表面上形成表面可焊塗層，例如鎳和/或金塗層或有機可焊性防腐劑(OSP)。根據一個實施例，導電球焊盤102可以透過封裝基板100中的互連結構104電連接到對應的連接元件111。例如，互連結構104可以包括銅跡線和電鍍通孔，但不限於此。
根據一個實施例，封裝基板100的板側100b和導電球焊盤102的周邊可以覆蓋有阻焊層130。阻焊層130的開口103p部分地暴露出導電球的中央上表面。根據一個實施例，導電球焊盤102包括至少一個導電柱202，例如從導電球焊盤102的上表面突出的銅柱。例如，導電柱(或銅柱)202在導電球墊102上表面上方的高度h1約等於阻焊層130在導電球墊102上表面上方的高度h2。根據一個實施例，導電柱202的上表面202a可以與阻焊層130的上表面130a齊平。在一些實施例中，可以在導電球墊102上設置複數個導電柱，例如2~3個柱(圖8中僅示出了三個示例 性銅柱)。根據一個實施例，為了形成導電柱202，進行額外的電鍍製程和濕法蝕刻製程。
根據一個實施例，如圖9所示，在導電柱202的側壁上提供底切202s，從而形成彎曲的側壁輪廓。可以透過執行具有更快橫向蝕刻速率的濕法蝕刻製程來形成底切202s，這提供了比其頭部202h和基部202b更薄的頸部202n。根據一個實施例，頸部部分202n可以具有光滑的彎曲表面。根據一個實施例，導電柱202的基部202b的寬度w1可以大於導電柱202的頭部202h的寬度w2。例如，頭部202b的寬度(或直徑)w2導電柱202可為約50微米，但不以此為限。在濕法蝕刻製程完成後，可以在導電球焊盤102上和導電柱202周圍形成環形凹槽120r(參考圖2所示)。
根據一個實施例，導電球140例如焊球可以設置在導電球焊盤102上並完全圍繞導電柱202。根據一個實施例，導電球140、導電柱202和導電球焊盤102可以進行回流製程並且可以在導電柱202和導電球140之間的界面處形成金屬間化合物(IMC)層(未明確示出)。根據一個實施例，導電柱202和導電球140互鎖，並且導電球140錨固到導電球焊盤102。
根據一個實施例，凹陷區域102r設置在導電球焊盤102的上表面上並且圍繞導電柱202。可以透過使用本領域已知的光刻製程和濕法或乾法蝕刻方法將預定圖案選擇性地蝕刻到導電球焊盤102的上表面102a中來形成凹陷區域102r。本實施例中，可以將上述實施例中的導電柱與凹陷區域的實施例進行結合使用，從而進一步加強導電球焊盤、導電柱和導電球的組合結構的穩定性，防止焊球的意外脫落或連接不穩定。本實施例的上述方式可以增加導電球140與導電球焊盤(該導電球焊盤具有導電柱和/或凹陷區域)102之間的接觸面積，從而使導電球與導電球焊盤(該導電球焊盤具有導電柱和/或凹陷區域)之間的連接更加穩定和緊密。其中，凹陷區域102r可以採用如圖3-7任意所示的凹陷區域102s 的一種或幾種，導電柱可以採用上述任意所述的導電柱。凹陷區域102r的數量並不做限制，導電柱202的數量也不作限制，均可以根據需要自由設置。
儘管已經對本發明實施例及其優點進行了詳細說明，但應當理解的是，在不脫離本發明的精神以及申請專利範圍所定義的範圍內，可以對本發明進行各種改變、替換和變更。所描述的實施例在所有方面僅用於說明的目的而並非用於限制本發明。本發明的保護範圍當視所附的申請專利範圍所界定者為准。本領域技術人員皆在不脫離本發明之精神以及範圍內做些許更動與潤飾。
以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍所做之均等變化與修飾，皆應屬本發明之涵蓋範圍。
1:半導體封裝
102:導電球焊盤
102a,130a,202a:上表面
103p:開口
140:導電球
202:導電柱
202b:基部
202h:頭部

Claims (18)

  1. 一種三維焊盤結構，包括：基板；焊盤，設置於該基板上，其中該焊盤的周邊覆蓋有阻焊層；以及至少一個導電柱，從該焊盤的上表面凸出；其中，該至少一個導電柱包括基部和頭部，該基部連接至該焊盤，該導電柱還包括位於該基部與該頭部之間的頸部；其中，該基部的直徑大於該頭部的直徑，並且該頸部比該頭部及該基部更薄。
  2. 如請求項1之三維焊盤結構，其中，該基板為封裝基板，該封裝基板具有元件側與板側，其中該焊盤設置於該封裝基板的該板側。
  3. 如請求項1之三維焊盤結構，其中，該焊盤為銅焊盤。
  4. 如請求項1之三維焊盤結構，其中，該導電柱為銅柱或鎳柱。
  5. 如請求項1之三維焊盤結構，其中，該導電柱在該焊盤的上表面上方的高度約等於該阻焊層在該焊盤的上表面上方的高度。
  6. 如請求項1之三維焊盤結構，還包括：表面可焊塗層或有機可焊性防腐劑，在該焊盤的上表面上。
  7. 如請求項1之三維焊盤結構，其中，該導電柱的側壁設有底切，從而構成彎曲的側壁輪廓。
  8. 如請求項1之三維焊盤結構，其中，該頸部具有光滑的曲面。
  9. 如請求項1之三維焊盤結構，其中，該導電柱的頭部的直徑約為50微米。
  10. 如請求項1之三維焊盤結構，還包括：環形凹槽，在該焊盤上，以及在該導電柱周圍。
  11. 一種三維焊盤結構，包括： 基板；焊盤，設置於該基板上，其中該焊盤的周邊覆蓋有阻焊層；凹陷區域，設置在該焊盤的上表面上；以及至少一個突出特徵，在該凹陷區域之間；至少一個導電柱，從該焊盤的上表面凸出；其中，該至少一個導電柱包括基部和頭部，該基部連接至該焊盤，該導電柱還包括位於該基部與該頭部之間的頸部；其中，該基部的直徑大於該頭部的直徑，並且該頸部比該頭部及該基部更薄。
  12. 如請求項11之三維焊盤結構，其中，該凹陷區域透過該突出特徵相互隔離。
  13. 如請求項11之三維焊盤結構，其中，該凹陷區域相互連通以形成網路或交錯圖案。
  14. 如請求項11之三維焊盤結構，其中，該凹陷區域之間的該突出特徵具有與該焊盤的上表面齊平的上表面。
  15. 一種互連結構，包括：基板；焊盤，設置於該基板上，其中該焊盤的周邊覆蓋有阻焊層；至少一個導電柱，凸出於該焊盤的上表面；其中，該至少一個導電柱包括基部和頭部，該基部連接至該焊盤，該導電柱還包括位於該基部與該頭部之間的頸部；其中，該基部的直徑大於該頭部的直徑，並且該頸部比該頭部及該基部更薄；以及導電球，設置在該焊盤上並且圍繞該導電柱，其中該至少一個導電柱和該導電球互鎖，並且其中該導電球錨固到該焊盤。
  16. 如請求項15之互連結構，其中，該導電球完全圍繞該導電柱。
  17. 如請求項15之互連結構，其中，該焊盤是拐角焊盤。
  18. 一種半導體封裝，其中，該半導體封裝包括如請求項1-14任意一項之三維焊盤結構或如請求項15-17任意一項之互連結構。
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