TWI691001B - 用於3d共形處理的原子層製程腔室 - Google Patents

用於3d共形處理的原子層製程腔室 Download PDF

Info

Publication number
TWI691001B
TWI691001B TW105107923A TW105107923A TWI691001B TW I691001 B TWI691001 B TW I691001B TW 105107923 A TW105107923 A TW 105107923A TW 105107923 A TW105107923 A TW 105107923A TW I691001 B TWI691001 B TW I691001B
Authority
TW
Taiwan
Prior art keywords
substrate
temperature
substance
process chamber
processing
Prior art date
Application number
TW105107923A
Other languages
English (en)
Other versions
TW201705293A (zh
Inventor
煒 劉
艾伯希拉許Ｊ 梅爾
菲利普 史特德
Original Assignee
美商應用材料股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 美商應用材料股份有限公司 filed Critical 美商應用材料股份有限公司
Publication of TW201705293A publication Critical patent/TW201705293A/zh
Application granted granted Critical
Publication of TWI691001B publication Critical patent/TWI691001B/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523—Pulsed gas flow or change of composition over time
    • C23C16/45525—Atomic layer deposition [ALD]
    • C23C16/45544—Atomic layer deposition [ALD] characterized by the apparatus
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/48—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation
    • C23C16/482—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation using incoherent light, UV to IR, e.g. lamps
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/48—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation
    • C23C16/483—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation using coherent light, UV to IR, e.g. lasers
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/52—Controlling or regulating the coating process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02167—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02329—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
    • H01L21/02332—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen into an oxide layer, e.g. changing SiO to SiON
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/3115—Doping the insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67109—Apparatus for thermal treatment mainly by convection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67115—Apparatus for thermal treatment mainly by radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67248—Temperature monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68771—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by supporting more than one semiconductor substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Optics & Photonics (AREA)
  • Drying Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
  • Solid-Phase Diffusion Into Metallic Material Surfaces (AREA)

Abstract

本文所描述實施例係關於用於在半導體基板上形成或處理材料層之方法。在一個實施例中，用於執行原子層製程之方法包括輸送物質至處於第一溫度的基板之表面，繼之以將基板之表面尖峰退火至第二溫度以引發物質與基板之表面上的分子之間的反應。第二溫度高於第一溫度。藉由重複輸送及尖峰退火製程，在基板之表面上形成共形層或對基板之表面執行共形蝕刻製程。

Description

用於3D共形處理的原子層製程腔室
本文所描述實施例係關於半導體製造製程。更特定言之，揭示用於在半導體基板上形成或處理材料層的方法。
自從半導體元件面世數十年以來其幾何形狀已在尺寸上顯著減小。現代半導體製造設備通常生產具有45 nm、32 nm及28 nm特徵尺寸的元件，而新設備正在研製並實施來生產具有小於12 nm之尺寸的元件。另外，晶片架構正處於從二維(2D)到三維(3D)結構的轉折點，以便獲得效能更佳功率消更低的元件。因此，形成此等元件的材料之共形沉積正變得日益重要。
可在高溫下執行形成3D結構的材料之共形沉積。然而，減少的熱預算及更嚴格的臨界尺寸需求使得高溫熱製程不適用於進階的元件節點。在減少的熱預算下，可藉由使用電漿或光執行反應物鍵之預斷裂。然而，基於電漿或光產生的離子或自由基之製程大體上不為3D共形，因為存在電漿鞘及低壓（通常小於約5托）用於維持電漿。
因此，本技術領域中需要用於形成或處理材料層的改良方法。
本文所描述實施例係關於用於在半導體基板上形成或處理材料層之方法。在一個實施例中，方法包括輸送物質至基板之表面。基板處於第一溫度，且物質被吸附在基板之表面上。方法進一步包括將基板之表面加熱至第二溫度，且在第二溫度下，物質與基板之表面反應。方法進一步包括重複輸送及加熱製程。
在另一實施例中，方法包括輸送物質至基板之表面。基板處於第一溫度，且物質被吸附在基板之表面上。方法進一步包括將基板之表面加熱至第二溫度，且在第二溫度下，物質擴散至基板之表面中。方法進一步包括重複輸送及加熱製程。
在另一實施例中，方法包括將基板置放在製程腔室中，且輸送第一物質至基板之表面。基板處於第一溫度，且第一物質被吸附在基板之表面上。方法進一步包括移除未被吸附在基板之表面上的過量第一物質，且加熱基板之表面至第二溫度。在第二溫度下，第一物質與基板之表面反應。方法進一步包括重複輸送及加熱製程。
本文所描述實施例係關於用於在半導體基板上形成或處理材料層之方法。在一個實施例中，用於執行原子層製程之方法包括輸送物質至處於第一溫度的基板之表面，繼之以將基板之表面尖峰退火至第二溫度以引發物質與基板之表面上的分子之間的反應。第二溫度高於第一溫度。藉由重複輸送及尖峰退火製程，在基板之表面上形成共形層或對基板之表面執行共形蝕刻製程。
第1圖圖示根據各種實施例的處理序列100。處理序列100可為對基板之表面執行的原子層製程。處理序列100從方塊102開始。在方塊102處，輸送物質至基板之表面。基板可為任何適宜基板，諸如矽基板，且基板之表面可包括矽分子。在一些實施例中，可在基板上形成介電層（諸如氧化層），且基板之表面可包括氧化物分子。基板之表面可包括複數個特徵。可將基板安置在製程腔室之內部。在一個實施例中，製程腔室包括一個處理站。在另一實施例中，製程腔室包括兩個處理站。在其他實施例中，製程腔室包括兩個以上的處理站。可在具有兩個或更多個處理站的製程腔室中的一個處理站處執行物質至基板表面的輸送。
物質可為任何適宜物質，諸如一或更多種氣體或自由基。可在遠端形成自由基並隨後輸送至基板之表面。或者，可藉由激勵引入到製程腔室中的氣體來形成自由基。用於激勵製程腔室內的氣體之電漿源可為任何適宜電漿源，諸如電容耦合電漿源、電感耦合電漿源或微波電漿源。可將物質引入到基板之表面，同時將基板加熱或冷卻至第一溫度。在第一溫度下，物質不會與基板之表面上的分子反應。實情為，物質被吸附在基板之表面上，直至物質使表面飽和。基板之第一溫度高到足以引發物質被吸附在基板之表面上並低到足以避免物質與基板之表面上的分子之間的反應。在基板之表面處物質的飽和係一種自限製程，因為歸因於第一溫度下物質與基板之表面上的分子之間無反應。
在方塊104處，對基板執行尖峰退火製程。尖峰退火製程能夠將基板表面之溫度快速增加至第二溫度，而無需實質上增加基板剩餘部分之溫度。可在相同製程腔室中對基板執行尖峰退火製程。在一個實施例中，製程腔室包括兩個處理站，在一個處理站處執行物質至基板表面的輸送並將基板移送至執行尖峰退火製程的另一處理站。可在輸送物質至基板之表面之後且在尖峰退火製程之前執行淨化製程，以便移除未被吸附在基板之表面上的過量物質。
停留時間或利用閃熱源（諸如雷射或閃光燈）加熱基板的時間可為短時間，諸如約1微秒。由於停留時間短及基板主體之溫度並未實質增加，確保在冷卻期期間熱量穿過基板主體之快速耗散。在基板表面處自第二溫度返回至起始溫度的冷卻期亦為短時間，諸如自約10至100微秒。
當將基板之表面快速加熱至第二溫度（諸如1000攝氏度以上）時，被吸附在基板之飽和表面上的物質變得與基板之表面之分子具有反應性。第二溫度的範圍可自約1000攝氏度至約1300攝氏度。在一個實施例中，使物質擴散至基板之表面中。在另一實施例中，物質藉由與基板之表面的一部分形成產物而共形脫離基板之表面的此部分。在又一實施例中，將第二物質引入到製程腔室中，且在第二溫度下，第二物質與基板之表面上的物質反應，從而在基板之表面上形成共形層。
接著，在方塊106處，重複方塊102及104處描述的製程。作為方塊102及104處描述之重複製程的結果，可在基板之表面上形成共形層或共形層擴散至基板之表面中。或者，重複方塊102及104處描述的製程可共形移除表面的一部分。
第2A圖至第2C圖圖示根據一個實施例的處理序列100。如第2A圖所示，基板（未圖示）之表面204可包括特徵202。如第2A圖所示，特徵202由二氧化矽製成。然而，特徵202之材料可不限於二氧化矽。在一些實施例中，特徵202由矽製成。在製程腔室內的基板支撐件上置放具有表面204的基板。在一些實施例中，在製程腔室中的第一處理站處的基板支撐件上置放具有表面204的基板。可已藉由清洗製程清洗表面204以自表面204移除任何污染物。清洗製程可為任何適宜清洗製程，諸如使用基於鹵素的清洗氣體或自由基（諸如基於氯或氟的氣體或自由基）之清洗製程。基板可藉由形成於基板支撐件中的溫度控制裝置達到第一溫度。第一溫度可基於物質類型及表面204之材料而變化。第一溫度足夠低，使得物質與表面204之間無反應。
如第2B圖所示，將物質206引入到製程腔室中或製程腔室之處理站中。物質206吸附在表面204上，直至物質206使表面204飽和。又，物質可為任何適宜物質，諸如一或更多種氣體或自由基。在一個實施例中，物質206為含氮自由基，諸如NH* 自由基。在另一實施例中，物質206為含硼物質，諸如含硼氣體或含硼自由基。含硼自由基可為B* 、BHx * 或任何適宜含硼自由基。
在一個實施例中，藉由將含硼氣體引入到製程腔室之處理區域中來形成物質206，製程腔室包括安置有表面204的基板。含硼氣體可為任何適宜含硼氣體（諸如B2 H6 ）。可藉由電漿源（諸如電容耦合電漿源、電感耦合電漿源或微波電漿源）活化含硼氣體以形成含有物質206的電漿。物質206可為含硼自由基，諸如B* 或BHx * ，其中x可為1、2或3。在另一實施例中，藉由使含硼氣體流動到耦接至處理腔室的遠端電漿源來形成物質206，製程腔室包括安置有表面204的基板。含硼氣體可為任何適宜含硼氣體（諸如B2 H6 ）。可藉由遠端電漿源活化含硼氣體來形成含有物質206的電漿。物質206可為含硼自由基，諸如B* 或BHx * ，其中x可為1、2或3。使物質206流動到處理腔室之處理區域中。
接著，如第2C圖所示，將表面204之溫度快速增加至第二溫度，且物質206變得與表面204之分子具有反應性。在一個實施例中，使物質206擴散至特徵202中。可藉由尖峰退火製程快速增加基板之表面204之溫度。可在相同製程腔室中執行尖峰退火製程。在一些實施例中，將基板移送至處理腔室內的第二處理站，且在第二處理站處執行尖峰退火製程。作為重複第2B圖及第2C圖所描述之製程的結果，將特徵202之部分208改質（諸如氮化）。
第3A圖至第3C圖圖示根據另一實施例的處理序列100。如第3A圖所示，基板（未圖示）之表面304可包括特徵302。如第3A圖所示，特徵302由矽製成。然而，特徵302之材料可不限於矽。在製程腔室內的基板支撐件上置放具有表面304的基板。在一些實施例中，在製程腔室中的第一處理站處的基板支撐件上置放具有表面304的基板。基板可藉由形成於基板支撐件中的溫度控制裝置達到第一溫度。第一溫度可基於物質類型及表面304之材料而變化。第一溫度足夠低，使得物質與表面304之間無反應。
如第3B圖所示，將物質306引入到製程腔室中或製程腔室之處理站中。物質306吸附在表面304上，直至物質306使表面304飽和。又，物質可為任何適宜反應性物質，諸如一或更多種氣體或自由基。在一個實施例中，物質306為Br* 或其他鹵素自由基。
接著，如第3C圖所示，將表面304之溫度快速增加至第二溫度，且物質306變得與表面304之分子具有反應性。在一個實施例中，物質306及表面304之矽分子形成產物308（諸如SiBrx ），且自表面304移除產物308。可藉由尖峰退火製程快速增加基板之表面304之溫度。可在相同製程腔室中執行尖峰退火製程。在一些實施例中，將基板移送至處理腔室內的第二處理站，且在第二處理站處執行尖峰退火製程。作為重複第3B圖及第3C圖所描述之製程的結果，可對表面304執行共形蝕刻製程，且可移除具有實質均勻厚度的特徵302之一部分。
第4A圖至第4C圖圖示根據另一實施例的處理序列100。如第4A圖所示，基板（未圖示）之表面304可包括特徵302。如第4A圖所示，特徵302由矽製成。然而，特徵302之材料可不限於矽。在製程腔室內的基板支撐件上置放具有表面304的基板。在一些實施例中，在製程腔室中的第一處理站處的基板支撐件上置放具有表面304的基板。基板可藉由形成於基板支撐件中的溫度控制裝置達到第一溫度。第一溫度可基於物質類型及表面304之材料而變化。第一溫度足夠低，使得物質與表面304之間無反應。
如第4B圖所示，將物質406引入到製程腔室中或製程腔室之處理站中。物質406吸附在表面304上，直至物質406使表面304飽和。又，物質可為任何適宜物質，諸如一或更多種氣體或自由基。在一個實施例中，物質406為含氮自由基或氣體，諸如NH*自由基或氨氣。
接著，如第4C圖所示，使表面304之溫度快速增加至第二溫度，且將第二物質408引入到製程腔室或製程腔室之第二處理站。第二物質408可為三甲基矽烷。在第二溫度下，物質406變得與第二物質408具有反應性。在一個實施例中，物質406及第二物質408在表面304上形成產物(諸如SiCN)。可藉由尖峰退火製程快速增加基板之表面304之溫度，使得表面304達到第二溫度。可在相同製程腔室中執行尖峰退火製程。在一些實施例中，將基板移送至處理腔室內的第二處理站，且在第二處理站處執行尖峰退火製程。作為重複第4B圖及第4C圖中描述之製程的結果，可在表面304上形成共形層。共形層可為SiCN。
第5圖係根據一個實施例的製程腔室500之示意性橫截面視圖。可在製程腔室500中執行處理序列100。製程腔室500包括底部502、側壁504及頂部506，從而界定處理區域507。可在處理區域507中安置基板支撐件508，且可在基板支撐件508上安置基板512。可在基板支撐件508中形成溫度控制元件510(諸如加熱元件或冷卻通道)以便控制基板512之溫度。可在基板支撐件508上方安置閃熱源514以便執行尖峰退火製程。閃熱源514可包括複數個雷射或閃光燈。可在側壁504中形成物質注射埠516，且可將物質源518連接至物質注射埠516。可在製程腔室500中執行上文所描述之物質至基板表面的輸送及尖峰退火之序列。製程腔室500可包括淨化氣體注射埠（未圖示），將此淨化氣體注射埠連接至淨化氣源（未圖示）以便淨化處理區域507。
第6圖係根據一個實施例的製程腔室600之示意性橫截面視圖。可在製程腔室600中執行處理序列100。製程腔室600包括底部602、側壁604及頂部606。可在製程腔室600中安置分隔件608且可形成兩個處理站610、611。分隔件608可為實體分隔件或空氣幕。第一處理站610可包括基板支撐件612及嵌入基板支撐件612中的溫度控制元件614。溫度控制元件614可與第5圖所描述之溫度控制元件510相同。可在第一處理站610處的側壁中形成物質注射埠622，且可將物質源624耦接至物質注射埠622。第一處理站610可進一步包括淨化氣體注射埠（未圖示），將此淨化氣體注射埠連接至淨化氣源（未圖示）以便淨化處理站610。
第二處理站611可包括基板支撐件618以便支撐基板616。基板支撐件618可包括溫度控制元件（未圖示），此溫度控制元件與溫度控制元件614相同。可在基板支撐件618上方安置閃熱源620。閃熱源620可與第5圖所描述之閃熱源514相同。第二處理站611可進一步包括物質注射埠626，且可將物質源628耦接至物質注射埠626。可使用物質源628及物質注射埠626輸送第二物質至基板616之表面。可將基板616移動至第一處理站610及第二處理站611，以便對基板執行處理序列100。
第7圖係根據一個實施例的製程腔室700之示意性橫截面俯視圖。製程腔室700可包括複數個處理站702、704、706、708、710、712（圖示六個，但不限於六個）。每一處理站702、704、706、708、710、712包括用於支撐基板（未圖示）的基板固持件714。基板固持件714可形成於基板支撐件716上。基板支撐件716可包括溫度控制元件（未圖示），以便控制安置在基板固持件714上的基板之溫度。可藉由分隔件718分離複數個處理站702、704、706、708、710、712，分隔件可為實體分隔件或空氣幕。複數個處理站中的一些處理站可能夠執行輸送物質至處於第一溫度的基板之表面，而剩餘處理站可能夠執行尖峰退火製程。在一個實施例中，在處理站702、706、710處執行物質至基板表面的輸送。在物質使基板之表面飽和之後，基板支撐件716旋轉以在可執行尖峰退火製程的處理站704、708、712處置放基板。可旋轉基板支撐件716以在選定處理站處置放基板以便執行處理序列100。
儘管前述係針對實施例，但是在不脫離本發明之基本範疇的情況下可設計出其他及進一步實施例，且本發明之範疇由隨後之申請專利範圍決定。
100‧‧‧處理序列 102‧‧‧方塊 104‧‧‧方塊 106‧‧‧方塊 202‧‧‧特徵 204‧‧‧表面 206‧‧‧物質 208‧‧‧部分 302‧‧‧特徵 304‧‧‧表面 306‧‧‧物質 308‧‧‧產物 406‧‧‧物質 408‧‧‧第二物質 500‧‧‧製程腔室 502‧‧‧底部 504‧‧‧側壁 506‧‧‧頂部 507‧‧‧處理區域 508‧‧‧基板支撐件 510‧‧‧溫度控制元件 512‧‧‧基板 514‧‧‧閃熱源 516‧‧‧物質注射埠 518‧‧‧物質源 600‧‧‧製程腔室 602‧‧‧底部 604‧‧‧側壁 606‧‧‧頂部 608‧‧‧分隔件 610‧‧‧第一處理站 611‧‧‧第二處理站 612‧‧‧基板支撐件 614‧‧‧溫度控制元件 616‧‧‧基板 618‧‧‧基板支撐件 620‧‧‧閃熱源 622‧‧‧物質注射埠 624‧‧‧物質源 626‧‧‧物質注射埠 628‧‧‧物質源 700‧‧‧製程腔室 702‧‧‧處理站 704‧‧‧處理站 706‧‧‧處理站 708‧‧‧處理站 710‧‧‧處理站 712‧‧‧處理站 714‧‧‧基板固持件 716‧‧‧基板支撐件 718‧‧‧分隔件
因此，以可詳細理解本發明之上述特徵之方式，可參照實施例獲得上文簡要概述之本發明之更特定描述，其中一些實施例圖示於隨附圖式中。然而，應注意，隨附圖式僅圖示出本發明之典型實施例，且因此此等圖式不欲視為本發明範疇之限制，因為本發明可允許其他同等有效之實施例。
第1圖圖示根據各種實施例的處理序列。
第2A圖至第2C圖圖示根據一個實施例的製程式列。
第3A圖至第3C圖圖示根據另一實施例的製程式列。
第4A圖至第4C圖圖示根據另一實施例的製程式列。
第5圖係根據一個實施例的製程腔室之示意性橫截面視圖。
第6圖係根據另一實施例的製程腔室之示意性橫截面視圖。
第7圖係根據另一實施例的製程腔室之示意性橫截面俯視圖。
為了促進理解，相同元件符號已儘可能用於指代諸圖共有之相同元件。應設想，一個實施例中所揭示之元件可有益地用於其他實施例，而無需贅述。
國內寄存資訊 (請依寄存機構、日期、號碼順序註記) 無
國外寄存資訊 (請依寄存國家、機構、日期、號碼順序注記) 無
(請換頁單獨記載) 無
100‧‧‧處理序列
102‧‧‧方塊
104‧‧‧方塊
106‧‧‧方塊

Claims (10)

  1. 一種用於處理一基板之方法，該方法包含以下步驟：輸送包含氮或鹵素的自由基至一基板之一表面，其中該基板處於一第一溫度；吸附該等自由基在該基板之該表面上，其中該第一溫度使該等自由基被吸附於該基板之該表面上，同時避免該等自由基與該基板之該表面之間的一反應；藉由將該基板之該表面加熱至1000攝氏度或更高的一第二溫度以化學反應該等自由基與該基板之該表面；以及重複該輸送、該吸附及該化學反應製程。
  2. 如請求項1所述之方法，其中該第二溫度高於該第一溫度，且該第二溫度的範圍自約1000攝氏度至約1300攝氏度。
  3. 如請求項1所述之方法，其中該基板之該表面包含矽，且在該第二溫度下，該等自由基與該基板之該表面化學反應以形成一產物，其中自該基板之該表面移除該產物。
  4. 如請求項3所述之方法，其中該重複該輸送、該吸附及該化學反應製程之步驟係一共形蝕刻製程。
  5. 一種用於處理一基板之方法，該方法包含以下步驟：將一基板置放在一製程腔室中；輸送包含氮或鹵素的自由基至該基板之一表面，其中該基板處於一第一溫度，其中該第一溫度避免該等自由基與該基板之該表面之間的一反應；吸附該等自由基在該基板之該表面上；由該製程腔室移除未被吸附在該基板之該表面上的過量自由基；藉由將該基板之該表面加熱至1000攝氏度或更高的一第二溫度以反應該等自由基與該基板之該表面；以及重複該輸送、該吸附及該反應製程。
  6. 如請求項5所述之方法，其中在該製程腔室之一第一處理站處執行該等自由基至該基板之該表面的該輸送步驟，及在該製程腔室之一第二處理站處執行該等自由基與該基板之該表面的該反應步驟。
  7. 如請求項6所述之方法，其中該製程腔室包括六個處理站，其中該六個處理站的三個處理站用於輸送該等自由基至該基板之該表面且該六個處理站的三個處理站用於反應該等自由基與該基板之該表面。
  8. 如請求項7所述之方法，進一步包含以下步驟：在一基板支撐件上置放六個基板且將該基板支撐件置放在該製程腔室中。
  9. 如請求項8所述之方法，進一步包含以下步驟：旋轉該基板支撐件以在該製程腔室內的一相應處理站處置放一基板。
  10. 如請求項5所述之方法，其中該第二溫度的範圍自約1000攝氏度至約1300攝氏度。
TW105107923A 2015-03-20 2016-03-15 用於3d共形處理的原子層製程腔室 TWI691001B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201562135836P 2015-03-20 2015-03-20
US62/135,836 2015-03-20

Publications (2)

Publication Number Publication Date
TW201705293A TW201705293A (zh) 2017-02-01
TWI691001B true TWI691001B (zh) 2020-04-11

Family

ID=56925242

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105107923A TWI691001B (zh) 2015-03-20 2016-03-15 用於3d共形處理的原子層製程腔室

Country Status (6)

Country Link
US (1) US20160276162A1 (zh)
JP (1) JP6807860B2 (zh)
KR (1) KR102494614B1 (zh)
CN (2) CN113981414A (zh)
TW (1) TWI691001B (zh)
WO (1) WO2016153716A1 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10573532B2 (en) 2018-06-15 2020-02-25 Mattson Technology, Inc. Method for processing a workpiece using a multi-cycle thermal treatment process
JP7018849B2 (ja) * 2018-08-17 2022-02-14 東京エレクトロン株式会社 成膜方法及び成膜装置
JP7065728B2 (ja) * 2018-08-17 2022-05-12 東京エレクトロン株式会社 成膜方法及び成膜装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201635383A (zh) * 2015-01-06 2016-10-01 蘭姆研究公司 使用一氧化氮活化之矽氧化物的同向性原子層蝕刻

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5024724A (en) * 1987-03-27 1991-06-18 Sanyo Electric Co., Ltd. Dry-etching method
JPH01103840A (ja) * 1987-10-16 1989-04-20 Sanyo Electric Co Ltd ドライエツチング方法
JPH01289121A (ja) * 1988-05-16 1989-11-21 Nec Corp ３‐５族化合物半導体のデジタルエッチング方法
JP3184988B2 (ja) * 1991-12-10 2001-07-09 科学技術振興事業団 結晶面異方性ドライエッチング方法
US6143082A (en) * 1998-10-08 2000-11-07 Novellus Systems, Inc. Isolation of incompatible processes in a multi-station processing chamber
US6450116B1 (en) * 1999-04-22 2002-09-17 Applied Materials, Inc. Apparatus for exposing a substrate to plasma radicals
US6303518B1 (en) * 1999-09-30 2001-10-16 Novellus Systems, Inc. Methods to improve chemical vapor deposited fluorosilicate glass (FSG) film adhesion to metal barrier or etch stop/diffusion barrier layers
US6686298B1 (en) * 2000-06-22 2004-02-03 Micron Technology, Inc. Methods of forming structures over semiconductor substrates, and methods of forming transistors associated with semiconductor substrates
KR20020083767A (ko) * 2001-04-30 2002-11-04 주식회사 하이닉스반도체 선택적 에피택셜 성장 공정에서의 기판 세정 방법
US7172792B2 (en) 2002-12-20 2007-02-06 Applied Materials, Inc. Method for forming a high quality low temperature silicon nitride film
US7056773B2 (en) * 2004-04-28 2006-06-06 International Business Machines Corporation Backgated FinFET having different oxide thicknesses
US7629267B2 (en) * 2005-03-07 2009-12-08 Asm International N.V. High stress nitride film and method for formation thereof
US20070281082A1 (en) * 2006-06-02 2007-12-06 Nima Mokhlesi Flash Heating in Atomic Layer Deposition
US7416989B1 (en) * 2006-06-30 2008-08-26 Novellus Systems, Inc. Adsorption based material removal process
US7837790B2 (en) * 2006-12-01 2010-11-23 Applied Materials, Inc. Formation and treatment of epitaxial layer containing silicon and carbon
JP5564311B2 (ja) * 2009-05-19 2014-07-30 株式会社日立国際電気 半導体装置の製造方法、基板処理装置及び基板の製造方法
US8748259B2 (en) * 2010-03-02 2014-06-10 Applied Materials, Inc. Method and apparatus for single step selective nitridation
US20130196078A1 (en) * 2012-01-31 2013-08-01 Joseph Yudovsky Multi-Chamber Substrate Processing System
US20130344688A1 (en) * 2012-06-20 2013-12-26 Zhiyuan Ye Atomic Layer Deposition with Rapid Thermal Treatment
CN105103271B (zh) * 2013-03-15 2018-05-22 应用材料公司 用于脉冲式光激发沉积与蚀刻的装置与方法
CN111211074B (zh) * 2013-04-30 2023-09-22 应用材料公司 具有空间分布的气体通道的气流控制衬垫
WO2015080985A1 (en) * 2013-11-27 2015-06-04 Entegris, Inc. Dopant precursors for mono-layer doping
US9401273B2 (en) * 2013-12-11 2016-07-26 Asm Ip Holding B.V. Atomic layer deposition of silicon carbon nitride based materials

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201635383A (zh) * 2015-01-06 2016-10-01 蘭姆研究公司 使用一氧化氮活化之矽氧化物的同向性原子層蝕刻

Also Published As

Publication number Publication date
KR102494614B1 (ko) 2023-02-02
CN113981414A (zh) 2022-01-28
TW201705293A (zh) 2017-02-01
CN107431033B (zh) 2021-10-22
KR20170129912A (ko) 2017-11-27
JP2018514943A (ja) 2018-06-07
WO2016153716A1 (en) 2016-09-29
JP6807860B2 (ja) 2021-01-06
US20160276162A1 (en) 2016-09-22
CN107431033A (zh) 2017-12-01

Similar Documents

Publication Publication Date Title
JP7158616B2 (ja) ＳｉＮの堆積
TWI641046B (zh) 積體電路的製造方法
JP6661625B2 (ja) 高温酸化ケイ素原子層堆積技術
CN104813450B (zh) 使用等离子体预处理和高温蚀刻剂沉积的方向性二氧化硅蚀刻
CN105900214B (zh) 通过使用远程等离子体pecvd的fcvd硬件形成的可流动碳膜
JP2016127285A (ja) 活性化を使用しない、シリコン酸化物のための異方性原子層エッチング
TW201337027A (zh) 原子層沉積微影技術
TWI691001B (zh) 用於3d共形處理的原子層製程腔室
CN105977134B (zh) 具有用于改变衬底温度的衬底托盘的预清洗腔室和借助所述衬底托盘进行的预清洗工艺
US9502263B2 (en) UV assisted CVD AlN film for BEOL etch stop application
TWI636503B (zh) 氧化矽膜的選擇性蝕刻方法
TW202205394A (zh) 處理裝置及處理系統
TW200822188A (en) Film formation apparatus and method for using the same
KR102244356B1 (ko) 기판 처리 방법
TW202002080A (zh) 蝕刻處理方法及蝕刻處理裝置
KR20170074766A (ko) 수소 플라즈마 처리된 표면에 대한 도펀트 가스를 사용한 컨포멀한 도핑
JP2014514780A (ja) 酸化銅除去技法
TWI313893B (zh)
CN103184438B (zh) 薄膜的热处理方法及热处理装置、化学气相沉积装置
JP5193488B2 (ja) 酸化膜の形成方法及びその装置
US20130095665A1 (en) Systems and methods for processing substrates
JP6242283B2 (ja) 成膜方法
TWI837045B (zh) 具有氣體分佈及個別泵送的批次固化腔室
CN117187788A (zh) 用于可流动间隙填充的方法和设备
JP2007201507A (ja) 基板処理方法および基板処理装置