TWI687130B - Integrated circuit with a multi-output-current input and output circuit - Google Patents

Integrated circuit with a multi-output-current input and output circuit Download PDF

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TWI687130B
TWI687130B TW107104401A TW107104401A TWI687130B TW I687130 B TWI687130 B TW I687130B TW 107104401 A TW107104401 A TW 107104401A TW 107104401 A TW107104401 A TW 107104401A TW I687130 B TWI687130 B TW I687130B
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circuit
output
pin
input
unit
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TW107104401A
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TW201936008A (en
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謝文裕
楊琇如
黃正樟
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義隆電子股份有限公司
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/40—Details of LED load circuits

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Abstract

The present invention relates to an integrated circuit with a multi-output-current input and output circuit and has an internal circuit, a system DC power and multiple input and output circuits. Each input and output circuit is connected between a pin and the internal circuit of the integrated circuit and has an output buffer unit and a load driving circuit. When an optical load is connected to two pins of the integrated circuit, the internal circuit may control the output buffer unit to output a driving current to the optical load or control the load driving circuit to provide a different driving current to a different optical load. Therefore, the input and output circuit of the integrated circuit of the present invention has multi-output-current function.

Description

具多段輸出電流之輸入輸出電路的積體電路Integrated circuit with input and output circuit of multi-section output current

本發明係關於一種積體電路的輸入輸出電路改良，尤指一種具多段輸出電流之輸入輸出電路。 The invention relates to an improvement of an input and output circuit of an integrated circuit, in particular to an input and output circuit with multiple output currents.

不同應用的處理器，其積體電路中的各輸入輸出接腳(以下簡稱I/O接腳)所連接的輸入輸出電路推動負載的電流大小並不相同，假設該輸入輸出電路的推動負載電流為ILOAD，若將低於負載電流ILOAD之驅動電流ILED的負載(如發光二極體)直接連接至I/O接腳，會因負載電流過大而使發光二極體過亮；因此，會進一步於I/O接腳與各該發光二極體之間串接一電阻，作為限流用，連接的方式可如圖8所示，將發光二極體LED1~LED7的陽極連接至一外部直流電源的正電位VLED，其陰極則透過限流電阻R1~R7再連接至對應的I/O接腳P11~P17，亦可如圖9所示，將發光二極體LED1~LED9的陽極透過限流電阻R1~R7連接至對應的I/O接腳P11~P17，其陰極再接地GND。 For processors of different applications, the input and output pins (hereinafter referred to as I/O pins) connected to the integrated circuit of the integrated circuit are not the same as the current pushed by the load. Assume that the input and output circuit pushes the load current. For I LOAD , if a load (such as a light emitting diode) with a driving current I LED lower than the load current I LOAD is directly connected to the I/O pin, the light emitting diode will be too bright due to the excessive load current; therefore , A resistor will be further connected in series between the I/O pin and each of the light-emitting diodes, as a current limit, the connection method can be as shown in FIG. 8, the anodes of the light-emitting diodes LED1~LED7 are connected to a The positive potential V LED of the external DC power supply, the cathode is connected to the corresponding I/O pins P11~P17 through the current limiting resistors R1~R7, or as shown in FIG. 9, the light-emitting diodes LED1~LED9 The anode is connected to the corresponding I/O pins P11~P17 through current limiting resistors R1~R7, and the cathode is then grounded to GND.

由於目前電子產品越趨小型化，嚴重壓縮電路板元件佈設空間，若以圖8及圖9所示的電路，除必要的發光二極體LED1~LED7外，限流電阻R1~R7亦佔據不少空間；是以，有必要進一步改良之。 Due to the current miniaturization of electronic products, the layout space of circuit board components is severely compressed. If the circuits shown in FIGS. 8 and 9 are used, in addition to the necessary light-emitting diodes LED1 to LED7, the current limiting resistors R1 to R7 also occupy no Less space; therefore, it is necessary to further improve it.

有鑑於上述作處理器用的積體電路驅動光學負載外接電阻的缺點，本發明主要目的係提出一種具多段輸出電流之輸入輸出電路的積體電路。 In view of the above-mentioned shortcomings of the integrated circuit used as a processor for driving an external load of an optical load, the main object of the present invention is to propose an integrated circuit with an input and output circuit having multiple output currents.

欲達上述目的所使用主要技術手段係令該具多段輸出電流之輸入輸出電路的積體電路包含有一內部電路、一系統直流電源、一第一輸入輸出電路以及一第二輸入輸出電路；其中：上述該第一輸入輸出電路係連接於一第一接腳與該內部電路之間，其包含有：一輸出緩衝單元，係連接至該系統直流電源，且其輸入端係透過一預驅動電路連接至該內部電路，其輸出端係連接至該第一接腳；以及一輸入緩衝單元，其輸出端係連接至該內部電路，其輸入端係連接至該第一接腳；一第一負載驅動電路，係包含有一電流產生單元及一開關單元；其中該電流產生單元係透過該開關單元電性連接於該系統直流電源與該第一接腳之間；以及上述該第二輸入輸出電路係連接於一第二接腳與該內部電路之間，其包含有：一輸出緩衝單元，係連接至該系統直流電源，且其輸入端係透過一預驅動電路連接至該內部電路，其輸出端係連接至該第二接腳；以及一輸入緩衝單元，其輸出端係連接至該內部電路，其輸入端係連接至該第二接腳。 The main technical means used to achieve the above purpose is that the integrated circuit of the input-output circuit with multiple output currents includes an internal circuit, a system DC power supply, a first input-output circuit and a second input-output circuit; wherein: The above-mentioned first input-output circuit is connected between a first pin and the internal circuit, which includes: an output buffer unit connected to the system DC power supply, and its input terminal is connected through a pre-driving circuit To the internal circuit, its output terminal is connected to the first pin; and an input buffer unit, its output terminal is connected to the internal circuit, and its input terminal is connected to the first pin; a first load drive The circuit includes a current generating unit and a switching unit; wherein the current generating unit is electrically connected between the system DC power supply and the first pin through the switching unit; and the second input and output circuit is connected Between a second pin and the internal circuit, it includes: an output buffer unit connected to the system DC power supply, and its input terminal is connected to the internal circuit through a pre-driving circuit, and its output terminal is Connected to the second pin; and an input buffer unit, the output of which is connected to the internal circuit, and the input of which is connected to the second pin.

由上述說明可知，本發明積體電路的至少一輸入輸出電路主要包含有一輸出緩衝單元及一負載驅動電路，當一光學負載連接至該積體電路其中二接腳時，除可透過該內部電路選擇由原本輸出緩衝單元提供驅動電流予該光學負載外，亦可選擇由該負載驅動電路提供不同的驅動電流予不同的光學負 載，使本發明積體電路的輸入輸出電路具有具多段輸出電流驅動功能，而不必外加限流電阻，加上積體電路中的電子元件在相同製程中完成，其誤差值差異小，可令外接的光學負載發光的均勻度提升。 It can be seen from the above description that at least one input and output circuit of the integrated circuit of the present invention mainly includes an output buffer unit and a load driving circuit. When an optical load is connected to one of the two pins of the integrated circuit, the internal circuit In addition to the original output buffer unit providing the drive current to the optical load, the load drive circuit can also be selected to provide a different drive current to different optical negative Load, so that the input and output circuit of the integrated circuit of the present invention has a multi-segment output current driving function, without the need to add a current limiting resistor, plus the electronic components in the integrated circuit are completed in the same process, the difference in error value is small, can make The uniformity of the luminescence of the external optical load is improved.

本發明另一積體電路係包含有分別連接一光學負載之兩端的一第一接腳與一第二接腳，其中該積體電路進一步包括：一第一電壓源；一負載驅動電路，係耦接至該第一電壓源與該第一接腳之間，該負載驅動電路係包含有一電流產生單元及一開關單元；其中該電流產生單元係透過該開關單元電性連接於該第一電壓源與該第一接腳之間；以及一第二電壓源，係耦接至該第二接腳，其中該第二電壓源的電位與該第一電壓源的電位不同。 Another integrated circuit of the present invention includes a first pin and a second pin respectively connected to both ends of an optical load, wherein the integrated circuit further includes: a first voltage source; a load driving circuit Coupled between the first voltage source and the first pin, the load driving circuit includes a current generating unit and a switching unit; wherein the current generating unit is electrically connected to the first voltage through the switching unit Between the source and the first pin; and a second voltage source coupled to the second pin, wherein the potential of the second voltage source is different from the potential of the first voltage source.

由上述說明可知，本發明積體電路的二支第一及第二接腳係供一光學負載連接，其中該第一接腳透過該負載驅動電路連接至該第一電壓源，而第二腳連接與第二電壓源；當該負載驅動電路的開關單元將第一接腳與該第一電壓源耦接，即可驅動電流予該光學負載，不必外加限流電阻，即可順利驅動光學負載。 As can be seen from the above description, the two first and second pins of the integrated circuit of the present invention are provided for an optical load connection, wherein the first pin is connected to the first voltage source through the load driving circuit, and the second pin Connected to the second voltage source; when the switch unit of the load driving circuit couples the first pin to the first voltage source, the current can be driven to the optical load, and the optical load can be driven smoothly without the addition of a current limiting resistor .

1、1a、1b:積體電路 1, 1a, 1b: integrated circuit

10:內部電路 10: Internal circuit

20:輸入輸出電路 20: input and output circuit

20a:第一輸入輸出電路 20a: the first input and output circuit

20b:第二輸入輸出電路 20b: Second input and output circuit

21、21a:輸出緩衝單元 21, 21a: output buffer unit

211:前驅動電路 211: Front drive circuit

212:第一輸出緩衝器 212: First output buffer

213:第二輸出緩衝器 213: Second output buffer

22:輸入緩衝單元 22: Input buffer unit

30、30a、30b:負載驅動單元 30, 30a, 30b: load drive unit

31:電流產生單元 31: Current generation unit

32:開關單元 32: switch unit

圖1：本發明積體電路的第一實施例的一電路方塊圖。 Figure 1: A circuit block diagram of the first embodiment of the integrated circuit of the present invention.

圖2：本發明積體電路的第二實施例的一電路方塊圖。 Figure 2: A circuit block diagram of the second embodiment of the integrated circuit of the present invention.

圖3：本發明積體電路的第三實施例的一電路方塊圖。 Figure 3: A circuit block diagram of a third embodiment of the integrated circuit of the present invention.

圖4A：圖1之積體電路其中一輸入輸出電路之一電路圖。 4A: A circuit diagram of one of the input and output circuits of the integrated circuit of FIG.

圖4B：圖1之積體電路其中一輸入輸出電路之另一電路圖。 4B: Another circuit diagram of one of the input and output circuits of the integrated circuit of FIG.

圖4C：圖1之積體電路其中一輸入輸出電路之再一電路圖。 4C: Another circuit diagram of one of the input and output circuits of the integrated circuit of FIG.

圖5A：圖2之積體電路其中一輸入輸出電路之一電路圖。 5A: A circuit diagram of one of the input and output circuits of the integrated circuit of FIG. 2.

圖5B：圖2之積體電路其中一輸入輸出電路之另一電路圖。 5B: Another circuit diagram of one of the input and output circuits of the integrated circuit of FIG. 2.

圖5C：圖2之積體電路其中一輸入輸出電路之再一電路圖。 5C: Another circuit diagram of one of the input and output circuits of the integrated circuit of FIG. 2.

圖6：本發明積體電路連接光學負載的一電路圖。 Figure 6: A circuit diagram of the integrated circuit of the present invention connected to an optical load.

圖7：本發明積體電路連接光學負載的另一電路圖。 Figure 7: Another circuit diagram of the integrated circuit of the present invention connected to an optical load.

圖8：既有一作處理器用之積體電路與發光二極體的電路圖。 Figure 8: A circuit diagram of an integrated circuit and a light-emitting diode for a processor.

圖9：既有一作處理器用之積體電路與發光二極體的電路圖。 Figure 9: A circuit diagram of an integrated circuit and a light-emitting diode for a processor.

本發明係針對積體電路的輸入輸出電路進行改良，令使該輸入輸出電路增加多段推動光學負載的能力，以下謹以複數實施例配合前揭圖式詳加說明本發明的技術內容。 The present invention is to improve the input and output circuit of the integrated circuit, so that the input and output circuit can increase the ability of pushing the optical load in multiple stages. The technical content of the present invention will be described in detail below with a plurality of embodiments in conjunction with the previous illustration.

首先請參閱圖1所示，係為本發明積體電路1的其中一實施例，其包含有一內部電路10、一系統直流電源、複數輸入輸出電路20及複數輸入輸出接腳(以下簡稱I/O接腳)；其中各該輸入輸出電路20係連接至該內部電路10、系統直流電源的高、低電位VDD、GND，並由該內部電路10設定各該輸入輸出電路20，以定義其所連接的I/O接腳為輸出用接腳或輸入用接腳。 First, please refer to FIG. 1, which is one embodiment of the integrated circuit 1 of the present invention, which includes an internal circuit 10, a system DC power supply, a complex input and output circuit 20, and a complex input and output pin (hereinafter referred to as I/ O pin); wherein each of the input and output circuits 20 is connected to the internal circuit 10, the high and low potentials of the system DC power supply VDD, GND, and the internal circuit 10 sets each input and output circuit 20 to define its The connected I/O pins are output pins or input pins.

上述各該輸入輸出電路20係包含有一輸出緩衝單元21、一輸入緩衝單元22及一負載驅動電路30；其中各該輸出緩衝單元21係透過一預驅動電路211連接至該內部電路10，並與對應的I/O接腳P11…P17、P18連接，由該內部電路10控制該預驅動電路211致能該輸出緩衝單元21後，控制輸出高、低電位訊號予對應的I/O接腳P11…P17、P18，以實現數位數值”0”或”1”的傳送。於本實施例，該輸出緩衝單元21係包含有單一級第一輸出緩衝器212，係由一上開關(PMOS電 晶體)Q11串接一下開關(NMOS電晶體)Q12組成，該上、下開關Q11、Q12的控制端均連接至該預驅動電路211，由該預驅動電路211決定該上、下開關Q11、Q12的啟、閉。同理，該輸入緩衝單元22係連接至該內部電路10，由該內部電路10致能後，接收其對應I/O接腳P11…P17、P18的高、低電位訊號，以將數位數值”0”或”1”輸入至該內部電路10。 Each of the above-mentioned input-output circuits 20 includes an output buffer unit 21, an input buffer unit 22, and a load driving circuit 30; wherein each output buffer unit 21 is connected to the internal circuit 10 through a pre-driving circuit 211, and The corresponding I/O pins P11...P17, P18 are connected, and the internal circuit 10 controls the pre-drive circuit 211 to enable the output buffer unit 21, and then controls the output of high and low potential signals to the corresponding I/O pin P11 …P17, P18 to realize the transmission of digital value “0” or “1”. In this embodiment, the output buffer unit 21 includes a single-stage first output buffer 212, which is composed of an upper switch (PMOS Transistor) Q11 is connected in series with a switch (NMOS transistor) Q12. The control terminals of the upper and lower switches Q11 and Q12 are connected to the pre-driving circuit 211. The pre-driving circuit 211 determines the upper and lower switches Q11 and Q12 Opening and closing. Similarly, the input buffer unit 22 is connected to the internal circuit 10, and after being enabled by the internal circuit 10, it receives the high and low potential signals of its corresponding I/O pins P11...P17, P18 to convert the digital value" 0" or "1" is input to the internal circuit 10.

該負載驅動電路30係連接至該內部電路10、該系統直流電源的高、低電位VDD、GND及對應I/O接腳P11…P17、P18，由該內部電路10控制該負載驅動電路30提供連接至I/O接腳P11…P17、P18的光學負載LED1~LED7所需的驅動電流。於圖1所示的實施例，該負載驅動電路30係連接於該系統直流電源的高電位VDD與各光學負載LED1~LED7之間，於光學負載LED1~LED7的控制應用中係提供一高電流汲取模式(High Sink Mode)，再如圖2所示的另一積體電路1a的實施例，其各該負載驅動電路30係連接於該系統直流電源的低電位GND與各光學負載LED1~LED7之間，於光學負載LED1~LED7的控制應用中係提供一高電流驅動模式(High Drive Mode)；此外，再如圖3所示之又一積體電路1b實施例，其各該輸入輸出電路20亦可包含如圖1及圖2所示的二個負載驅動電路30，該二個負載驅動電路30係分別連接至該系統直流電源之高、低電位VDD、GND，並共同連接至該內部電路10，由該內部電路10選擇以高電流汲取模式或高電流驅動模式驅動光學負載LED1~LED7，或可如圖6所示，部分之該輸入輸出電路20包含圖1所示的負載驅動電路30，部分之該輸入輸出電路20為圖2所示的負載驅動電路30。 The load driving circuit 30 is connected to the internal circuit 10, the high and low potentials of the system DC power supply VDD, GND, and corresponding I/O pins P11...P17, P18. The internal circuit 10 controls the load driving circuit 30 to provide The drive current required for the optical loads LED1~LED7 connected to I/O pins P11...P17, P18. In the embodiment shown in FIG. 1, the load driving circuit 30 is connected between the high potential VDD of the DC power supply of the system and each optical load LED1~LED7, and provides a high current in the control application of the optical load LED1~LED7 High Sink Mode, and another embodiment of the integrated circuit 1a shown in FIG. 2, each of the load driving circuits 30 is connected to the low potential GND of the DC power supply of the system and the optical loads LED1 to LED7 In the control application of the optical load LED1~LED7, a high current drive mode (High Drive Mode) is provided; in addition, another embodiment of the integrated circuit 1b as shown in FIG. 3, each of which has an input and output circuit 20 may also include two load driving circuits 30 as shown in FIG. 1 and FIG. 2, the two load driving circuits 30 are respectively connected to the high and low potentials VDD and GND of the DC power supply of the system, and are commonly connected to the internal Circuit 10, the internal circuit 10 selects to drive the optical loads LED1~LED7 in a high current draw mode or a high current drive mode, or as shown in FIG. 6, some of the input and output circuits 20 include the load drive circuit shown in FIG. 30. Part of the input/output circuit 20 is the load driving circuit 30 shown in FIG.

以下進一步說明上述該負載驅動電路30的各種電路的實施態樣，首先請參閱圖4A所示，係對應圖1中該輸入輸出電路20中的其中一種負載驅動電路30，其包含有一電流產生單元31及一開關單元32，其中該電流產生單元31係透過該開關單元32電性連接於該系統直流電源與該I/O接腳P11…P17、P18 之間，由該內部電路10控制該開關單元32來決定該系統直流電源是否電性連接該對應的I/O接腳P11…P17、P18，以提供連接至I/O接腳P11…P17、P18的光學負載LED1~LED7所需的驅動電流。於本實施態樣，該開關單元32係包含有複數開關SW1、SW2，該開關SW1、SW2係分別經由控制端CT1、CT2連接該內部電路10，該內部電路10控制該開關SW1、SW2的開啟或關閉，其中該開關SW1、SW2係以一電晶體實施。該電流產生單元31係包含有並聯設置的複數電阻Ra、Rb，以便該電阻Ra、Rb能分別透過對應開關SW1、SW2連接至該系統直流電源的高電位VDD；或者，如圖5A對應圖2之負載驅動電路30，其電流產生單元31的複數電阻Ra、Rb則是分別透過對應開關SW1、SW2連接至該系統直流電源的低電位GND。此外，於本實施例中，各該輸出緩衝單元21係包含有二級並聯設置的輸出緩衝器，即該輸出緩衝單元21包含有並聯設置的一第一輸出緩衝器212及一第二輸出緩衝器213，其中該第一輸出緩衝器212之上開關Q11、下開關Q12與該第二輸出緩衝器213之上開關Q21、下開關Q22的控制端均連接至該預驅動電路211。 The following further describes the implementation of the various circuits of the load driving circuit 30. First, please refer to FIG. 4A, which corresponds to one of the load driving circuits 30 in the input and output circuit 20 in FIG. 1, which includes a current generating unit 31 and a switch unit 32, wherein the current generating unit 31 is electrically connected to the system DC power supply and the I/O pins P11...P17, P18 through the switch unit 32 In between, the internal circuit 10 controls the switch unit 32 to determine whether the system DC power supply is electrically connected to the corresponding I/O pins P11...P17, P18 to provide connection to the I/O pins P11...P17, The drive current required by P18's optical load LED1~LED7. In this embodiment, the switch unit 32 includes a plurality of switches SW1 and SW2. The switches SW1 and SW2 are connected to the internal circuit 10 via control terminals CT1 and CT2, respectively, and the internal circuit 10 controls the opening of the switches SW1 and SW2. Or closed, wherein the switches SW1, SW2 are implemented with a transistor. The current generating unit 31 includes a plurality of resistors Ra and Rb arranged in parallel so that the resistors Ra and Rb can be connected to the high potential VDD of the DC power supply of the system through corresponding switches SW1 and SW2, respectively, or, as shown in FIG. 5A and FIG. 2 In the load driving circuit 30, the complex resistors Ra and Rb of the current generating unit 31 are connected to the low potential GND of the DC power supply of the system through corresponding switches SW1 and SW2, respectively. In addition, in this embodiment, each of the output buffer units 21 includes an output buffer arranged in parallel in two stages, that is, the output buffer unit 21 includes a first output buffer 212 and a second output buffer arranged in parallel The control terminals of the upper switch Q11 and the lower switch Q12 of the first output buffer 212 and the upper switch Q21 and the lower switch Q22 of the second output buffer 213 are connected to the pre-driving circuit 211.

再如圖4B所示，係對應圖1中輸入輸出電路20中的另其中一種負載驅動電路30a，其與圖4A同樣包含有一電流產生單元31及一開關單元32，惟與圖4A實施樣態之間的差異在於，該電流產生單元31係包含有一定電流電路單元，其一端係連接至該第一I/O接腳P11，另一端則連接至該開關單元32所對應該開關SW1、SW2的另一端，該定電流電路單元係包含複數產生不同定電流的定電流源Ia、Ib，各該定電流源Ia、Ib同樣透過對應的開關SW1、SW2連接至該系統直流電源的高電位VDD；或者，如圖5B對應圖2之負載驅動電路30a，其電流產生單元31的複數定電流源Ia、Ib則分別透過對應開關SW1、SW2連接至該系統直流電源的低電位GND。 As shown in FIG. 4B, it corresponds to another load driving circuit 30a in the input-output circuit 20 in FIG. 1, which includes a current generating unit 31 and a switching unit 32 as in FIG. 4A, but is implemented in the same manner as FIG. 4A. The difference is that the current generating unit 31 includes a certain current circuit unit, one end of which is connected to the first I/O pin P11, and the other end is connected to the switches SW1, SW2 corresponding to the switch unit 32 At the other end, the constant current circuit unit includes a plurality of constant current sources Ia and Ib that generate different constant currents. Each of the constant current sources Ia and Ib is also connected to the high potential VDD of the system DC power supply through corresponding switches SW1 and SW2 Or, as shown in FIG. 5B corresponding to the load driving circuit 30a of FIG. 2, the complex constant current sources Ia and Ib of the current generating unit 31 are connected to the low potential GND of the DC power supply of the system through corresponding switches SW1 and SW2, respectively.

再請參閱圖4C所示，係對應圖1中輸入輸出電路20中的其中一種負載驅動電路30b，其與圖4A大致相同，均包含有一電流產生單元31及一開關單元32，惟該電流產生單元31係包含有一定電流電路單元，該定電流電路單元係為一可調電流源11，該內部電路10可控制該可調電流源11產生不同的輸出電流，且該開關單元32包含單一開關SW1，該可調電流源I1可透過該開關SW1連接至該系統直流電源的高電位VDD；或者，如圖5C對應圖2之負載驅動電路30b，其電流產生單元31的可調電流源I1係分別透過對應開關SW1連接至該系統直流電源的低電位GND。 Referring again to FIG. 4C, it corresponds to one of the load driving circuits 30b in the input-output circuit 20 in FIG. 1, which is substantially the same as FIG. 4A, and each includes a current generating unit 31 and a switching unit 32, but the current generating The unit 31 includes a certain current circuit unit, the constant current circuit unit is an adjustable current source 11, the internal circuit 10 can control the adjustable current source 11 to generate different output currents, and the switch unit 32 includes a single switch SW1, the adjustable current source I1 can be connected to the high potential VDD of the DC power supply of the system through the switch SW1; or, as shown in FIG. 5C corresponding to the load driving circuit 30b of FIG. 2, the adjustable current source I1 of the current generating unit 31 is Connected to the low potential GND of the DC power supply of the system through corresponding switches SW1.

以下為方便詳細說明本發明積體電路1應用於驅動光學負載的電路動作，以下以第一及第二輸入輸出電路20a、20b驅動單一發光二極體為例加以說明之。 In order to facilitate the detailed description of the circuit operation of the integrated circuit 1 of the present invention applied to drive an optical load, the following uses the first and second input-output circuits 20a and 20b to drive a single light-emitting diode as an example.

首先請參閱圖6所示，將該發光二極體LED1的陽極連接至該第一I/O接腳P11，其陰極則連接至該第二I/O接腳P18；此時，該內部電路10設定與該第一I/O接腳P11的第一輸入輸出電路20a相連接的預驅動電路211，不作動該輸出緩衝單元21a，但控制該開關單元32的第一開關SW1導通，使該發光二極體LED1的陽極透過該第一開關SW1所連接之電阻Ra連接至該系統直流電源的高電位VDD，同時，該內部電路10亦控制該第二輸入輸出電路20b的預驅動電路211，令其輸出緩衝單元21a的第一輸出緩衝器212的下開關Q12’導通，使該發光二極體LED1的陰極連接到該系統直流電源的低電位GND，藉此構成迴路而產生驅動電流ILED1來使該發光二極體LED1點亮；此外，若欲提供不同之驅動電流來驅動該發光二極體LED1，則亦可選擇控制該開關單元32的第二開關SW2導通，以產生不同之驅動電流予該發光二極體LED1。再請配合圖1所示，若欲驅動複數發光二極體LED1~LED7，即將該些發光二極體LED1~LED7的陽極分別連接至對應的I/O接腳P11~P17後，該些發光二極體LED1~LED7的陰極則可共同連接至其 中一I/O接腳P18，由該內部電路10依據前揭控制方式，即可點亮全部或部分之該發光二極體LED1~LED7。 First, referring to FIG. 6, the anode of the light emitting diode LED1 is connected to the first I/O pin P11, and the cathode thereof is connected to the second I/O pin P18; at this time, the internal circuit 10 Set the pre-driving circuit 211 connected to the first input/output circuit 20a of the first I/O pin P11, do not activate the output buffer unit 21a, but control the first switch SW1 of the switch unit 32 to be turned on, so that the The anode of the light emitting diode LED1 is connected to the high potential VDD of the system DC power supply through the resistor Ra connected to the first switch SW1, and at the same time, the internal circuit 10 also controls the pre-driving circuit 211 of the second input/output circuit 20b, The lower switch Q 12 ′ of the first output buffer 212 of the output buffer unit 21a is turned on, so that the cathode of the light emitting diode LED1 is connected to the low potential GND of the system DC power supply, thereby forming a loop to generate the driving current I LED1 to light the light-emitting diode LED1; in addition, if you want to provide different driving current to drive the light-emitting diode LED1, you can also choose to control the second switch SW2 of the switch unit 32 to turn on to produce different The driving current is given to the light emitting diode LED1. In addition, as shown in FIG. 1, if you want to drive a plurality of light-emitting diodes LED1~LED7, connect the anodes of the light-emitting diodes LED1~LED7 to the corresponding I/O pins P11~P17. The cathodes of the diodes LED1~LED7 can be connected to one of the I/O pins P18, and the internal circuit 10 can light up all or part of the light-emitting diodes LED1~LED7 according to the pre-release control method.

再請參閱圖7所示，為另一種驅動方式，該發光二極體LED1的陽極及陰極同樣連接於第一及第二I/O接腳P11、P18，此時，該內部電路10設定連接第一I/O接腳P11的第一輸入輸出電路20a的預驅動電路211致能該輸出緩衝單元21a，使其第一輸出緩衝器212的上開關Q11導通，以便該發光二極體LED1的陽極透過該上開關Q11連接至該系統直流電源的高電位VDD，同時，該內部電路10亦控制該第二輸入輸出電路20b的預驅動電路211，不作動該輸出緩衝單元21a，但控制該開關單元32的第一開關SW1’導通，使該發光二極體LED1的陰極透過該第一開關SW1’所連接之電阻Ra連接至該系統直流電源的低電位GND，藉此構成迴路而產生驅動電流ILED1來使該發光二極體LED1點亮；此外，若欲提供不同之驅動電流來驅動該發光二極體LED1，則亦可選擇控制該開關單元32的第二開關SW2’導通，以產生不同之驅動電流予該發光二極體LED1。請配合圖2所示，若欲驅動複數發光二極體LED1~LED7，即將該些發光二極體LED1~LED7的陽極分別連接至對應的I/O接腳P11~P17後，該些發光二極體LED1~LED7的陰極則可共同連接至其中一I/O接腳P18，由該內部電路10依據前揭控制方式，即可點亮全部或部分之該發光二極體LED1~LED7。 Please refer to FIG. 7 for another driving method. The anode and cathode of the light emitting diode LED1 are also connected to the first and second I/O pins P11 and P18. At this time, the internal circuit 10 is set to connect the first I / O pin P11 of the first input-output circuit 20a of the pre-driver circuit 211 enabling the output buffer unit 21a, a first output buffer 212 so that the switch Q 11 is turned on, so that the light emitting diode LED1 anode through the switch Q 11 connected to the DC power supply in the high-potential the VDD, while the internal circuit 10 also controls the second input-output circuit 20b of the pre-driver circuit 211, is not fixed to the output buffer unit 21a, but the control The first switch SW1' of the switch unit 32 is turned on, so that the cathode of the light emitting diode LED1 is connected to the low potential GND of the system DC power supply through the resistor Ra connected to the first switch SW1', thereby forming a loop to generate Drive the current I LED1 to light the light-emitting diode LED1; in addition, if you want to provide a different drive current to drive the light-emitting diode LED1, you can also choose to control the second switch SW2' of the switch unit 32 to turn on, To generate different driving currents to the light emitting diode LED1. As shown in FIG. 2, if you want to drive a plurality of light-emitting diodes LED1~LED7, connect the anodes of the light-emitting diodes LED1~LED7 to the corresponding I/O pins P11~P17, the light-emitting diodes The cathodes of the diodes LED1~LED7 can be connected to one of the I/O pins P18, and the internal circuit 10 can light up all or part of the light-emitting diodes LED1~LED7 according to the pre-release control method.

綜前所述，本發明積體電路應用於光學負載驅動應用，並不需要額外電阻進行限流，而直接於該積體電路1內的各該輸入輸出電路20中增設一負載驅動電路30，依據所使用之光學負載所需的驅動電流，如圖4A、圖4B、圖5A及圖5B所示，導通該負載驅動電路30的開關電路中的不同開關，以決定不同驅動電流；或者，可如圖4C或圖5C，直接調整該可調電流源的輸出電流來作為光學負載所需的驅動電流。 In summary, the integrated circuit of the present invention is applied to optical load driving applications, and does not require additional resistors for current limiting. Instead, a load drive circuit 30 is directly added to each input/output circuit 20 in the integrated circuit 1, According to the drive current required by the optical load used, as shown in FIGS. 4A, 4B, 5A, and 5B, different switches in the switch circuit of the load drive circuit 30 are turned on to determine different drive currents; or, As shown in FIG. 4C or FIG. 5C, the output current of the adjustable current source is directly adjusted as the driving current required by the optical load.

由於各該輸入輸出電路中的輸出緩衝單元的第一及第二輸出緩衝器亦具有負載推動能力，其中該第一輸出緩衝器的輸出電流值係介於第二輸出緩衝器的輸出電流值與該負載驅動電路的輸出電流值之間；因此，本發明的負載驅動單元30、30a、30b(如圖4A、圖4B、圖5A及圖5B所示)的開關單元32亦可只包含單一開關SW1，而該電流產生單元31亦可只包含單一電阻Ra或定電流Ia，配合該第一輸出緩衝器122及/或該第二輸出緩衝器123，同樣可提供不同光學負載所需的多段驅動電流。 Since the first and second output buffers of the output buffer unit in each of the input and output circuits also have load pushing capability, the output current value of the first output buffer is between the output current value of the second output buffer and Between the output current values of the load driving circuit; therefore, the switch unit 32 of the load driving units 30, 30a, 30b (as shown in FIGS. 4A, 4B, 5A, and 5B) of the present invention may also include only a single switch SW1, and the current generating unit 31 may also include only a single resistor Ra or constant current Ia, and cooperate with the first output buffer 122 and/or the second output buffer 123, which can also provide multi-segment driving required for different optical loads Current.

由上述說明可知，本發明積體電路的至少一輸入輸出電路主要包含有一輸出緩衝單元及一負載驅動電路，當一光學負載連接至該積體電路其中二接腳時，除可透過該內部電路選擇由原本輸出緩衝單元提供驅動電流予該光學負載外，亦可選擇由該負載驅動電路提供不同的驅動電流予不同的光學負載，使本發明積體電路的輸入輸出電路具有具多段輸出電流功能，而不必外加限流電阻。 It can be seen from the above description that at least one input and output circuit of the integrated circuit of the present invention mainly includes an output buffer unit and a load driving circuit. When an optical load is connected to one of the two pins of the integrated circuit, the internal circuit In addition to the original output buffer unit providing the drive current to the optical load, the load drive circuit can also be selected to provide different drive currents to different optical loads, so that the input and output circuit of the integrated circuit of the present invention has a multi-stage output current function Without the need for external current limiting resistors.

以上所述僅是本發明的實施例而已，並非對本發明做任何形式上的限制，雖然本發明已以實施例揭露如上，然而並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明技術方案的範圍內，當可利用上述揭示的技術內容作出些許更動或修飾為等同變化的等效實施例，但凡是未脫離本發明技術方案的內容，依據本發明的技術實質對以上實施例所作的任何簡單修改、等同變化與修飾，均仍屬於本發明技術方案的範圍內。 The above is only an embodiment of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field of the art, Within the scope of not departing from the technical solution of the present invention, when the technical contents disclosed above can be used to make some modifications or modifications to equivalent embodiments of equivalent changes, but any content that does not depart from the technical solution of the present invention, based on the technical essence of the present invention Any simple modifications, equivalent changes and modifications made to the above embodiments still fall within the scope of the technical solution of the present invention.

1‧‧‧積體電路 1‧‧‧ Integrated circuit

10‧‧‧內部電路 10‧‧‧Internal circuit

20‧‧‧輸入輸出電路 20‧‧‧I/O circuit

21‧‧‧輸出緩衝單元 21‧‧‧Output buffer unit

211‧‧‧前驅動電路 211‧‧‧Front drive circuit

212‧‧‧第一輸出緩衝器 212‧‧‧ First output buffer

22‧‧‧輸入緩衝單元 22‧‧‧Input buffer unit

30‧‧‧負載驅動單元 30‧‧‧load drive unit

Claims (12)

一種具多段輸出電流之輸入輸出電路的積體電路，包括一內部電路、一系統直流電源、一第一輸入輸出電路以及一第二輸入輸出電路；其中：上述該第一輸入輸出電路係連接於一第一接腳與該內部電路之間，其包含有：一輸出緩衝單元，係連接至該系統直流電源，且其輸入端係透過一預驅動電路連接至該內部電路，其輸出端係連接至該第一接腳；以及一輸入緩衝單元，其輸出端係連接至該內部電路，其輸入端係連接至該第一接腳；一第一負載驅動電路，係包含有一電流產生單元及一開關單元；其中該電流產生單元係透過該開關單元電性連接於該系統直流電源與該第一接腳之間；以及上述該第二輸入輸出電路係連接於一第二接腳與該內部電路之間，其包含有：一輸出緩衝單元，係連接至該系統直流電源，且其輸入端係透過一預驅動電路連接至該內部電路，其輸出端係連接至該第二接腳；以及一輸入緩衝單元，其輸出端係連接至該內部電路，其輸入端係連接至該第二接腳；其中：該第一接腳與第二接腳之間連接有一光學負載，且該第一接腳與第二接腳分別連接該光學負載的一第一極及一第二極。 An integrated circuit with multiple output current input and output circuits, including an internal circuit, a system DC power supply, a first input and output circuit and a second input and output circuit; wherein: the first input and output circuit is connected to Between a first pin and the internal circuit, it includes: an output buffer unit connected to the system DC power supply, and its input terminal is connected to the internal circuit through a pre-driving circuit, and its output terminal is connected To the first pin; and an input buffer unit whose output terminal is connected to the internal circuit and whose input terminal is connected to the first pin; a first load driving circuit including a current generating unit and a A switching unit; wherein the current generating unit is electrically connected between the system DC power supply and the first pin through the switching unit; and the second input/output circuit is connected to a second pin and the internal circuit Between, it includes: an output buffer unit, which is connected to the system DC power supply, and its input terminal is connected to the internal circuit through a pre-driving circuit, and its output terminal is connected to the second pin; and a In the input buffer unit, the output terminal is connected to the internal circuit, and the input terminal is connected to the second pin; wherein: an optical load is connected between the first pin and the second pin, and the first The pin and the second pin are respectively connected to a first pole and a second pole of the optical load. 如請求項1所述之積體電路，其中：該第一負載驅動電路係連接至該系統直流電源的高電位；以及該第二接腳透過該第二輸入輸出電路的該輸出緩衝單元連接至該系統直流電源的低電位。 The integrated circuit according to claim 1, wherein: the first load driving circuit is connected to the high potential of the system DC power supply; and the second pin is connected to the output buffer unit of the second input-output circuit to The low potential of the DC power supply of the system. 如請求項1所述之積體電路，其中：該第一負載驅動電路係連接至該系統直流電源的低電位；以及該第二接腳透過該第二輸入輸出電路的該輸出緩衝單元連接至該系統直流電源的高電位。 The integrated circuit according to claim 1, wherein: the first load driving circuit is connected to a low potential of the system DC power supply; and the second pin is connected to the output buffer unit of the second input-output circuit to The high potential of the DC power supply of the system. 如請求項2所述之積體電路，該第二輸入輸出電路係進一步包含有一第二負載驅動電路，其包含有一電流產生單元及一開關單元；其中該電流產生單元係透過該開關單元電性連接至該系統直流電源的低電位與該第二接腳之間，並由該開關單元決定該系統直流電源的低電位透過該電流產生單元與該第二接腳電性連接。 The integrated circuit according to claim 2, the second input-output circuit further includes a second load driving circuit, which includes a current generating unit and a switching unit; wherein the current generating unit is electrically connected through the switching unit The low potential of the system DC power supply is connected between the second pin and the switch unit determines the low potential of the system DC power supply to be electrically connected to the second pin through the current generating unit. 如請求項3所述之積體電路，該第二輸入輸出電路係進一步包含有一第二負載驅動電路，其包含有一電流產生單元及一開關單元；其中該電流產生單元係透過該開關單元電性連接至該系統直流電源的高電位與該第二接腳之間，並由該開關單元決定該系統直流電源的高電位透過該電流產生單元與該第二接腳電性連接。 The integrated circuit according to claim 3, the second input-output circuit further includes a second load driving circuit, which includes a current generating unit and a switching unit; wherein the current generating unit is electrically connected through the switching unit It is connected between the high potential of the system DC power supply and the second pin, and the high potential of the system DC power supply is determined by the switch unit to be electrically connected to the second pin through the current generating unit. 如請求項4所述之積體電路，其中該第一極為陽極，而該第二極為陰極，該第一接腳係供該光學負載的陽極連接，而該第二接腳則供該光學負載的陰極連接。 The integrated circuit according to claim 4, wherein the first pole is an anode, and the second pole is a cathode, the first pin is used for the anode connection of the optical load, and the second pin is used for the optical load Cathode connection. 如請求項5所述之積體電路，其中該第一極為陰極，而該第二極為陽極，該第一接腳係供該光學負載的陰極連接，而該第二接腳則供該光學負載的陽極連接。 The integrated circuit according to claim 5, wherein the first pole is the cathode and the second pole is the anode, the first pin is used for connecting the cathode of the optical load, and the second pin is used for the optical load Anode connection. 如請求項2或3所述之積體電路，其中：該第一負載驅動電路之開關單元包含至少一開關，其一端係連接至該系統直流電源，其一控制端係連接至該內部電路；以及 The integrated circuit according to claim 2 or 3, wherein: the switch unit of the first load driving circuit includes at least one switch, one end of which is connected to the system DC power supply, and a control end thereof is connected to the internal circuit; as well as 該第一負載驅動電路之電流產生單元係包含至少一電阻元件，其一端係連接至其所對應的第一或第二接腳，另一端則連接至對應的該開關的另一端。 The current generating unit of the first load driving circuit includes at least one resistive element, one end of which is connected to its corresponding first or second pin, and the other end is connected to the corresponding other end of the switch. 如請求項2或3所述之積體電路，其中：該第一負載驅動電路之開關單元，係包含至少一開關，其一端係連接至該系統直流電源，其一控制端係連接至該內部電路；以及該第一負載驅動電路之電流產生單元係包含一定電流電路單元，其一端係連接至其所對應的第一或第二接腳，另一端則連接至對應的該開關的另一端。 The integrated circuit according to claim 2 or 3, wherein: the switch unit of the first load driving circuit includes at least one switch, one end of which is connected to the system DC power supply, and a control end thereof is connected to the internal Circuit; and the current generating unit of the first load driving circuit includes a certain current circuit unit, one end of which is connected to its corresponding first or second pin, and the other end is connected to the corresponding other end of the switch. 如請求項9所述之積體電路，該定電流電路單元包含單一定電流源或一可調電流源。 According to the integrated circuit described in claim 9, the constant current circuit unit includes a single constant current source or an adjustable current source. 如請求項9所述之積體電路，其中：該開關單元包含複數開關；以及該定電流電路單元包含複數定電流源，其同一端係共同連接至其所對應的第一或第二接腳，另一端則分別連接至該開關單元的對應該開關。 The integrated circuit according to claim 9, wherein: the switch unit includes a plurality of switches; and the constant current circuit unit includes a plurality of constant current sources, the same terminal of which is commonly connected to the corresponding first or second pin , The other end is respectively connected to the corresponding switch of the switch unit. 如請求項2或3所述之積體電路，其中：上述該第一輸入輸出電路的該輸出緩衝單元係進一步包含有並聯連接的一第一輸出緩衝電路及一第二輸出緩衝電路；其中該第一及第二輸出緩衝電路的輸出端係共同連接至該第一接腳，且該第一輸出緩衝電路輸出的驅動電流係小於該第二輸出緩衝電路輸出的驅動電流。The integrated circuit according to claim 2 or 3, wherein: the output buffer unit of the first input-output circuit further includes a first output buffer circuit and a second output buffer circuit connected in parallel; wherein the The output terminals of the first and second output buffer circuits are commonly connected to the first pin, and the drive current output by the first output buffer circuit is smaller than the drive current output by the second output buffer circuit.
TW107104401A 2018-02-07 2018-02-07 Integrated circuit with a multi-output-current input and output circuit TWI687130B (en)

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