TWI635594B - 半導體裝置及其製造方法 - Google Patents

半導體裝置及其製造方法 Download PDF

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Publication number
TWI635594B
TWI635594B TW106130435A TW106130435A TWI635594B TW I635594 B TWI635594 B TW I635594B TW 106130435 A TW106130435 A TW 106130435A TW 106130435 A TW106130435 A TW 106130435A TW I635594 B TWI635594 B TW I635594B
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Taiwan
Prior art keywords
conductive portion
dielectric
conductive
semiconductor element
semiconductor
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TW106130435A
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English (en)
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TW201832338A (zh
Inventor
Po-Chun Lin
林柏均
Chin-Lung Chu
朱金龍
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Nanya Technology Corporation
南亞科技股份有限公司
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Publication of TW201832338A publication Critical patent/TW201832338A/zh
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Publication of TWI635594B publication Critical patent/TWI635594B/zh

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Abstract

本揭露係關於一種半導體裝置及其製造方法，該半導體裝置具有由融熔接合技術形成之複數個接合的半導體元件。該等半導體元件具有複數個傳導部，其熱膨脹係數大於介電部的熱膨脹係數。在融熔接合技術之熱處理製程中，具有較高熱膨脹係數的傳導部的體積膨脹，可藉由凹部提供的膨脹空間予以容納。如此，藉由融熔接合技術接合該等半導體元件而形成的半導體裝置在兩個介電部之間的界面中不具有一橫向突出。因此，可以有效排除橫向突出造成的電性功能故障。

Description

半導體裝置及其製造方法
本揭露係關於一種半導體裝置及其製造方法，特別關於一種半導體裝置，具有藉由融熔接合技術形成之複數個接合的半導體元件及其製造方法。
半導體元件對於許多現代應用而言是重要的。隨著電子技術的進展，半導體元件的尺寸越來越小，而功能越來越大且整合的電路量越來越多。由於半導體元件的尺度微小化，目前晶片上覆晶片(chip-on-chip)技術廣泛用於製造半導體元件。在此半導體封裝的生產中，實施許多製造製程，例如磊晶生長製程(epitaxial growing process)或是後插塞製程(post via formation)。 然而，在微小化規模中，半導體元件的製造變得越來越複雜。製造半導體元件的複雜度增加可能造成缺陷，例如電互連不良、產生破裂、或是組件脫層。據此，修飾半導體元件的結構與製造製程仍有許多挑戰。 上文之「先前技術」說明僅係提供背景技術，並未承認上文之「先前技術」說明揭示本揭露之標的，不構成本揭露之先前技術，且上文之「先前技術」之任何說明均不應作為本案之任一部分。
本揭露的實施例提供一種半導體裝置，包含一第一半導體元件，具有一第一傳導部、與該第一傳導部相鄰的一第一介電部、以及位在該第一傳導部之一上表面的一凹部，其中該第一傳導部的一熱膨脹係數大於該第一介電部的一熱膨脹係數，以及該凹部的一體積與該第一傳導部自一第一溫度至高於該第一溫度的一第二溫度之一體積膨脹實質相同。 在本揭露的一些實施例中，該第一傳導部的一上端低於該第一介電部的一上端。 在本揭露的一些實施例中，該第一傳導部的一厚度小於該第一介電部的一厚度。 在本揭露的一些實施例中，該半導體裝置另包括一第二半導體元件，具有一第二傳導部以及與該第二傳導部相鄰的一第二介電部，其中該第一傳導部面對該第二傳導部，該凹部分離該第一傳導部與該第二傳導部，以及該第一介電部接觸該第二介電部。 在本揭露的一些實施例中，該第一傳導部的一中心對準該第二傳導部的一中心。 本揭露的另一實施例提供一種半導體裝置，包括：一第一半導體元件，具有一第一傳導部以及與該第一傳導部相鄰的一第一介電部；以及一第二半導體元件，具有一第二傳導部以及與該第二傳導部相鄰的的一第二介電部。該第一傳導部直接接合至該第二傳導部，該第一傳導部與該第二傳導部之間實質未有一焊接材料，以及該第一介電部直接接合至該第二介電部。 在本揭露的一些實施例中，該第一傳導部的一熱膨脹係數大於該第一介電部的一熱膨脹係數。 在本揭露的一些實施例中，該第一半導體元件與該第二半導體元件垂直接合，以及該第一傳導部接觸該第二傳導部，實質未有一橫向突出至該第一介電部與該第二介電部之間的一界面。 在本揭露的一些實施例中，該第一傳導部的一中心對準該第二傳導部的一中心。 本揭露的另一實施例提供一種半導體裝置的製造方法，包含：形成一第一半導體元件，具有一第一傳導部、與該第一傳導部相鄰的一第一介電部、以及位於該第一傳導部之一上表面的一凹部；形成一第二半導體元件，具有一第二傳導部以及與該第二傳導部相鄰的一第二介電部；配置該第一半導體元件與該第二半導體元件，使得該第一傳導部面對該第二傳導部；以及膨脹該第一傳導部與該第二傳導部至少其中之一，以填充該凹部。 在本揭露的一些實施例中，形成該第一半導體元件包括：形成一第一介電層於一半導體基板上方；形成一開口於該第一介電層中；以及形成該第一傳導部於該開口中。 在本揭露的一些實施例中，形成該第一傳導部於該開口中包括：形成一傳導層於該第一介電層上方並且填充該開口；進行一平坦化製程，以自該第一介電層的一上表面移除該傳導部的一部分；以及進行一選擇性蝕刻，以移除該開口中的該傳導層的一上部，以形成該凹部。 在本揭露的一些實施例中，形成該第一傳導部於該開口中包括：形成一傳導層於該第一介電層上方並且填充該開口；進行一第一平坦化製程，以自該第一介電層的一上表面移除該傳導層的一部分；形成一遮罩覆蓋該開口中的該傳導層；形成一第二介電層於該第一介電層上方並且覆蓋該遮罩；進行一第二平坦化製程以移除該第二介電層的一部分並且暴露該遮罩；以及移除該遮罩以形成一凹部。 在本揭露的一些實施例中，該第一傳導部的一熱膨脹係數大於該第一介電部的一熱膨脹係數，以及膨脹該第一傳導部與該第二傳導部至少其中之一包括進行一熱處理製程，其膨脹該第一傳導部的一厚度大於該第一介電部的一厚度。 在本揭露的一些實施例中，在一第一溫度，形成具有該凹部的該第一傳導部，以及該熱處理製程加熱該第一傳導部與該第二傳導部至少其中之一至一第二溫度，該第二溫度高於該第一溫度。 在本揭露的一些實施例中，該凹部分離該第一傳導部與該第二傳導部，以及該第一介電部接觸該第二介電部。 本揭露係關於一種半導體裝置及其製造方法，該半導體裝置具有融熔接合技術形成之複數個接合的半導體元件。該等半導體元件具有多個傳導部，其熱膨脹係數大於介電部的熱膨脹係數。在融熔接合技術之熱處理製程中，具有較高熱膨脹係數的傳導部的體積膨脹，可藉由凹部提供的膨脹空間予以容納。如此，藉由融熔接合技術接合該等半導體元件而形成的半導體裝置在兩個介電部之間的界面中不具有一橫向突出。因此，可以有效排除橫向突出造成的電性功能故障。 上文已相當廣泛地概述本揭露之技術特徵及優點，俾使下文之本揭露詳細描述得以獲得較佳瞭解。構成本揭露之申請專利範圍標的之其它技術特徵及優點將描述於下文。本揭露所屬技術領域中具有通常知識者應瞭解，可相當容易地利用下文揭示之概念與特定實施例可作為修改或設計其它結構或製程而實現與本揭露相同之目的。本揭露所屬技術領域中具有通常知識者亦應瞭解，這類等效建構無法脫離後附之申請專利範圍所界定之本揭露的精神和範圍。
本揭露之以下說明伴隨併入且組成說明書之一部分的圖式，說明本揭露之實施例，然而本揭露並不受限於該實施例。此外，以下的實施例可適當整合以下實施例以完成另一實施例。 「一實施例」、「實施例」、「例示實施例」、「其他實施例」、「另一實施例」等係指本揭露所描述之實施例可包含特定特徵、結構或是特性，然而並非每一實施例必須包含該特定特徵、結構或是特性。再者，重複使用「在實施例中」一語並非必須指相同實施例，然而可為相同實施例。 本揭露係關於一種半導體結構裝置及其製造方法，該半導體裝置具有藉由融熔接合技術形成之複數個接合的半導體元件。為了使得本揭露可被完全理解，以下說明提供詳細的步驟與結構。顯然，本揭露的實施不會限制該技藝中的技術人士已知的特定細節。此外，已知的結構與步驟不再詳述，以免不必要地限制本揭露。本揭露的較佳實施例詳述如下。然而，除了詳細說明之外，本揭露亦可廣泛實施於其他實施例中。本揭露的範圍不限於詳細說明的內容，而是由申請專利範圍定義。 圖1剖面示意圖，例示本揭露比較例將半導體元件10A變形為半導體元件10A'。半導體元件10A包含基板11、傳導部13以及與傳導部13相鄰的介電部15，其中在平坦化製程之後，傳導部13的上端與介電部15的上端實質齊平，該平坦化製程例如廣泛應用於製造半導體元件的化學機械研磨製程。在一些實施例中，基板11為矽基板，傳導部13由銅製成，以及介電部15由氧化矽製成。 矽的熱膨脹係數約為2.6 ppm/ oC，銅的熱膨脹係數約為17.0 ppm/ oC，以及氧化矽的熱膨脹係數小於1.5 ppm/ oC。換言之，隨著溫度增加，傳導部13的銅比介電部15的氧化矽膨脹更多。因此，當加熱半導體元件10A時，傳導部13的體積(厚度)膨脹大於介電部15，並且在半導體元件10A'中，傳導部13'的上端變得高於介電部15'的上端。 圖2為剖面示意圖，例示本揭露比較例的半導體裝置100。藉由使用融熔接合技術於兩個垂直堆疊的半導體元件10A與10B，形成半導體裝置100。在一些實施例中，半導體元件10A與10B可具有相同的架構。融熔接合技術包含熱處理製程，使得傳導部13的膨脹體積(厚度)大於介電部15；因此，半導體裝置100的傳導部13'產生橫向突出17於半導體裝置100的兩個介電部15'之間的界面中。然而，橫向突出15可能造成半導體裝置100無法實現其原有的電性功能。 圖3為剖面示意圖，例示本揭露實施例將半導體元件20A變形為半導體元件20A'。半導體元件20A包含基板21、傳導部23、與傳導部23相鄰的介電部25、以及在傳導部23之非平面(曲線的)上表面上方的凹部27，其中傳導部23的熱膨脹係數大於介電部25。在一些實施例中，基板21為矽基板，傳導部23由銅製成，以及介電部25由氧化矽製成。在一些實施例中，以傳導部23的上表面定義凹部27的底端，以及以自介電部25的上端橫向延伸之虛線定義凹部27的上端。 在熱處理製程之前，傳導部23的上端低於介電部25的上端，以及傳導部23的厚度小於介電部25的厚度。在熱處理製程中，隨著溫度增加，銅的傳導部23膨脹得比氧化矽的介電部25更大。因此，當加熱半導體元件20A時，傳導部23的體積(厚度)膨脹大於介電部25的體積(厚度)膨脹，傳導部23填充凹部27，半導體元件20A之傳導部23'的上端變得與介電部25的上端實質齊平，並且傳導部23的厚度變得與介電部25的厚度實質相同。 圖4為剖面示意圖，例示本揭露實施例將半導體元件30A變形為半導體元件30'。半導體元件30包含基板31、傳導部33、與傳導部33相鄰的介電部35、以及在傳導部33之平面上表面上方的凹部37，其中傳導部33的熱膨脹係數大於介電部35。在一些實施例中，基板31為矽基板、傳導部33由銅製成，以及介電部35由氧化矽製成。在一些實施例中，以傳導部33的上表面定義凹部37的底端，並且以自介電部35的上端延伸之虛線定義凹部37的上端。 在熱處理製程中，隨著溫度增加，銅的傳導部33膨脹得比氧化矽的介電部35更大。因此，當加熱半導體元件30A時，傳導部33的體積(厚度)膨脹大於介電部35的體積(厚度)膨脹，傳導部33填充凹部37，半導體元件30A'之傳導部33'的上端與介電部35'的上端實質齊平。 圖5為剖面示意圖，例示本揭露實施例的半導體裝置200。應用融熔接合技術於兩個垂直堆疊的半導體元件20A與20B，形成半導體裝置200。在一些實施例中，半導體元件20A與20B可具有相同的架構。融熔接合技術包含熱處理製程，使得傳導部23的體積(厚度)膨脹大於介電部25；因此，半導體裝置200的傳導部23'填充凹部27。 在一些實施例中，配置兩個半導體元件20A與20B使得上方半導體元件20A的傳導部23面對下方半導體元件20B的傳導部23，並且上方半導體元件20A的傳導部23之中心對準下方半導體元件20B的傳導部23之中心。由於使用融熔接合技術，基本上不需要在垂直堆疊的半導體元件20A與20B之間配置焊接材料或類似物。 同樣地，可應用融熔接合技術於兩個垂直堆疊的半導體元件30A與30B，形成半導體裝置300'，如圖6所示。融熔接合技術的細節如「An Overview of Patterned Metal / Dielectric Surface Bonding: Mechanism, Alignment and Characterization, J. Electrochem. Soc. 1011 volume 158, issue 6, P81-P86」文章中所述，其全文併入本文作為參考並且不再重述。 圖7為流程圖，例示本揭露實施例之半導體裝置的製造方法。在一些實施例中，可藉由圖7的方法300形成半導體裝置。方法300包含一些操作，並且描述與說明不被視為操作順序的限制。方法300包含一些步驟(301、303、305與307)。 圖8至14為示意圖，例示本揭露實施例藉由圖7之方法製造半導體裝置的製程。在步驟301中，製造半導體元件30A，如圖8至13所示。在一些實施例中，如圖13所示，半導體元件30A具有傳導部33、與傳導部33相鄰的介電部35、以及位於傳導部33之平面上表面上方的凹部37。在一些實施例中，以傳導部33的上表面定義凹部37的底端，以及以自介電部35之上端延伸的虛線定義凹部37的上端。 在圖8中，藉由在基板31上進行沉積製程，形成介電層41在基板31上。在一些實施例中，基板31例如矽基板，介電層41為氧化矽層。 在圖9中，藉由在介電層41上進行沉積、微影與蝕刻製程，形成圖案化的遮罩43。在一些實施例中，圖案化的遮罩43為具有孔洞45的光阻層。 在圖10中，藉由使用圖案化的遮罩43作為蝕刻遮罩進行蝕刻製程，移除孔洞45下方之介電層31的一部分，以於介電層41中形成開口47。 在圖11中，移除圖案化的遮罩43，並且藉由在基板31與介電層41上進行沉積製程而形成傳導層49，其中傳導層49填充開口47並且覆蓋介電層41的上表面。 在圖12中，進行平坦化製程，自介電層41的上表面移除傳導層49的一部分，同時保留開口47中的傳導層49。在一些實施例中，該平坦化製程為化學機械研磨製程，並且在該平坦化製程之後，開口47中之傳導層49的上端與介電層41的上端實質齊平。 在圖13中，進行選擇性蝕刻製程，移除開口47中之傳導層49的上部，以形成凹部37。在一些實施例中，開口47中的剩餘傳導層49形成傳導部33，剩餘的介電層41形成與傳導部33相鄰的介電部35，其中凹部37形成於傳導部33的上表面上方。在一些實施例中，該選擇性蝕刻製程為非等向性蝕刻製程，例如乾蝕刻製程，並且在該非等向性蝕刻製程之後，半導體元件30A的傳導部33之上表面實質為平面。 在一些實施例中，參閱圖14，可實質藉由圖8至13所揭露之製造製程（除了圖13的選擇性蝕刻製程），而製造半導體元件20A。在一些實施例中，製造半導體元件20A之選擇性蝕刻製程為等向性蝕刻製程，例如濕蝕刻製程，並且在該等向性蝕刻製程之後，半導體元件20A的傳導部23之上表面實質為非平面(曲線的)。 在步驟303中，製造半導體元件30B，如圖15所示。在一些實施例中，類似於半導體元件30A，半導體元件30B具有傳導部33以及與傳導部33相鄰的介電部35。在一些實施例中，半導體元件30B具有凹部37，位於傳導部33的上表面上方，其中半導體元件30B的製造可與圖8至13所示之半導體晶粒30A的製造相同。 在步驟305中，組合半導體元件30A與半導體元件30B使得半導體元件30A的傳導部33面對半導體元件30B的傳導部33，如圖16所示。在一些實施例中，凹部37分離半導體元件30A的傳導部33與半導體元件30B的傳導部33，以及半導體元件30A的介電部35接觸半導體元件30B的介電部35。 在步驟307中，參閱圖16，半導體元件30A的傳導部33與半導體元件30B的傳導部33至少其中之一膨脹以填充凹部37；因此，半導體元件30A的傳導部33接觸半導體元件30B的傳導部33，以形成電連接。在一些實施例中，半導體元件30A的傳導部33的中心對準半導體元件30B的傳導部33的中心。 在一些實施例中，傳導部33的熱膨脹係數大於介電部35的熱膨脹係數，融熔接合技術的熱處理製程實現傳導部33的體積膨脹，使得傳導部33的體積(厚度)增加大於介電部35的體積(厚度)增加，因而凹部37被傳導部33的導體填充。藉由融熔接合技術，基本上不需要在垂直堆疊的半導體元件30A與30B之間配置焊接材料或類似物。 在一些實施例中，在第一溫度，形成定義凹部37之底部的傳導部33；後續熱處理製程將半導體元件30A的傳導部33與半導體元件30B的傳導部至少其中之一加熱至高於第一溫度的第二溫度。在一些實施例中，傳導部33包括銅，以及第二溫度實質為300 oC與450 oC之間；並且第一溫度為圖13之選擇性蝕刻製程的處理溫度。在一些實施例中，凹部37的體積與傳導部33自第一溫度至第二溫度的膨脹體積實質相同。 凹部37經設計提供膨脹空間，在融熔接合之熱處理製程中，提供較高熱膨脹係數的傳導部33'之體積膨脹；因此，半導體裝置300'在兩個介電部35'之間的界面中不具有橫向突出。因此，有效排除因橫向突出造成的電性功能故障。 圖17至20為示意圖，例示本揭露實施例對應於圖7步驟301之製造半導體元件30A的製程。在一些實施例中，進行圖8至12所揭露的製造製程，而後藉由在傳導層49上進行沉積、微影與蝕刻製程，形成遮罩51，如圖17所示。在一些實施例中，遮罩51為圖案化的光阻層，選擇性覆蓋開口47中的傳導層49，以及遮罩51的上端實質高於介電層41的上端。 在圖18中，介電層53形成於介電層41上方並且覆蓋遮罩51。在一些實施例中，介電層53由氧化矽製成，與介電層41相同材料。 在圖19中，進行平坦化製程，以移除介電層53的上部並且暴露遮罩51。在一些實施例中，該平坦化製程為化學機械研磨製程，並且在平坦化製程之後，遮罩51的上端與介電層53的上端實質齊平。 在圖20中，自開口47中的傳導層49移除遮罩51，因而於開口47中的傳導層49的上表面上方形成凹部37。因此，開口47中的傳導層49作為半導體元件30A的傳導部33，以及剩餘介電層53與介電層41作為半導體元件30A的介電部35。 本揭露係關於一種半導體裝置及其製造方法，該半導體裝置具有融熔接合技術形成之複數個接合的半導體元件。該等半導體元件的傳導部之熱膨脹係數高於介電部。在融熔接合技術之熱處理製程中，具有較高熱膨脹係數的傳導部的體積膨脹，可藉由凹部提供的膨脹空間予以容納。如此，藉由融熔接合技術接合該等半導體元件而形成的半導體裝置在兩個介電部之間的界面中不具有一橫向突出。因此，可以有效排除橫向突出造成的電性功能故障。 本揭露的一實施例提供一種半導體裝置，包含一第一半導體元件，具有一第一傳導部、與該第一傳導部相鄰的一第一介電部、以及位於該第一傳導部之上表面上方的一凹部，其中該第一傳導部的一熱膨脹係數大於該第一介電部的一熱膨脹係數，以及自一第一溫度至高於該第一溫度的一第二溫度，該凹部的體積與該第一傳導部的一體積膨脹實質相同。 本揭露的另一實施例提供一種半導體裝置，包含：一第一半導體元件，具有一第一傳導以及與該第一傳導部相鄰的一第一介電部；以及一第二半導體元件，具有一第二傳導部以及與該第二傳導部相鄰的一第二介電部。該第一傳導部直接接合至該第二傳導部，實質上沒有一焊接材料於該第一傳導部與該第二傳導部之間，以及該第一介電部直接接合至該第二介電部。 本揭露的另一實施例提供一種半導體裝置的製造方法，包含：形成一第一半導體元件，具有一第一傳導部、與該第一傳導部相鄰的一第一介電部、以及一凹部，位於該第一傳導部的一上表面；形成一第二半導體元件， 具有一第二傳導部以及與該第二傳導部相鄰的一第二介電部；配置該第一半導體元件與該第二半導體元件，使得該第一傳導部面對該第二傳導部；以及膨脹該第一傳導部與該第二傳導部至少其中之一以填充該凹部。 雖然已詳述本揭露及其優點，然而應理解可進行各種變化、取代與替代而不脫離申請專利範圍所定義之本揭露的精神與範圍。例如，可用不同的方法實施上述的許多製程，並且以其他製程或其組合替代上述的許多製程。 再者，本申請案的範圍並不受限於說明書中所述之製程、機械、製造、物質組成物、手段、方法與步驟之特定實施例。該技藝之技術人士可自本揭露的揭示內容理解可根據本揭露而使用與本文所述之對應實施例具有相同功能或是達到實質相同結果之現存或是未來發展之製程、機械、製造、物質組成物、手段、方法、或步驟。據此，此等製程、機械、製造、物質組成物、手段、方法、或步驟係包含於本申請案之申請專利範圍內。
<TABLE border="1" borderColor="#000000" width="85%"><TBODY><tr><td> 10A </td><td> 半導體元件 </td></tr><tr><td> 10A' </td><td> 半導體元件 </td></tr><tr><td> 10B </td><td> 半導體元件 </td></tr><tr><td> 10B' </td><td> 半導體元件 </td></tr><tr><td> 11 </td><td> 基板 </td></tr><tr><td> 13 </td><td> 傳導部 </td></tr><tr><td> 13' </td><td> 傳導部 </td></tr><tr><td> 15 </td><td> 介電部 </td></tr><tr><td> 15' </td><td> 介電部 </td></tr><tr><td> 17 </td><td> 突出 </td></tr><tr><td> 20A </td><td> 半導體元件 </td></tr><tr><td> 20A' </td><td> 半導體元件 </td></tr><tr><td> 21 </td><td> 基板 </td></tr><tr><td> 23 </td><td> 傳導部 </td></tr><tr><td> 23' </td><td> 傳導部 </td></tr><tr><td> 25 </td><td> 介電部 </td></tr><tr><td> 25' </td><td> 介電部 </td></tr><tr><td> 27 </td><td> 凹部 </td></tr><tr><td> 30A </td><td> 半導體元件 </td></tr><tr><td> 30A' </td><td> 半導體元件 </td></tr><tr><td> 31 </td><td> 基板 </td></tr><tr><td> 33 </td><td> 傳導部 </td></tr><tr><td> 33' </td><td> 傳導部 </td></tr><tr><td> 35 </td><td> 介電部 </td></tr><tr><td> 35' </td><td> 介電部 </td></tr><tr><td> 37 </td><td> 凹部 </td></tr><tr><td> 41 </td><td> 介電層 </td></tr><tr><td> 43 </td><td> 遮罩 </td></tr><tr><td> 45 </td><td> 孔洞 </td></tr><tr><td> 47 </td><td> 開口 </td></tr><tr><td> 49 </td><td> 傳導層 </td></tr><tr><td> 51 </td><td> 遮罩 </td></tr><tr><td> 53 </td><td> 介電層 </td></tr><tr><td> 100 </td><td> 半導體裝置 </td></tr><tr><td> 200 </td><td> 半導體裝置 </td></tr><tr><td> 300' </td><td> 半導體裝置 </td></tr></TBODY></TABLE>
參閱詳細說明與申請專利範圍結合考量圖式時，可得以更全面了解本申請案之揭示內容，圖式中相同的元件符號係指相同的元件。 圖1為剖面示意圖，例示本揭露比較例經由熱處理使得半導體元件變形(transforming)。 圖2為剖面示意圖，例示本揭露比較例的半導體裝置。 圖3為剖面示意圖，例示本揭露實施例經由熱處理使得半導體元件變形(transforming)。 圖4為剖面示意圖，例示本揭露實施例經由熱處理使得半導體元件變形(transforming)。 圖5為剖面示意圖，例示本揭露實施例的半導體裝置。 圖6為剖面示意圖，例示本揭露實施例的半導體裝置。 圖7為流程圖，例示本揭露實施例之半導體裝置的製造方法。 圖8至圖20為示意圖，例示本揭露實施例藉由圖7的方法製造半導體裝置的製程。

Claims (4)

  1. 一種半導體裝置的製造方法，包括：形成一第一半導體元件，具有一第一傳導部、與該第一傳導部相鄰之一第一介電部、以及位於該第一傳導部之一上表面上方之一凹部；形成一第二半導體元件，具有一第二傳導部以及與該第二傳導部相鄰之一第二介電部；配置該第一半導體元件與該第二半導體元件，使得該第一傳導部面對該第二傳導部；以及膨脹該第一傳導部與該第二傳導部至少其中之一，以填充該凹部；其中形成該第一半導體元件包括：形成一第一介電層於一半導體基板上方；形成一開口於該第一介電層中；以及形成該第一傳導部於該開口中；其中形成該第一傳導部於該開口中包括：形成一傳導層於該第一介電層上方並且填充該開口；進行一第一平坦化製程，以自該第一介電層的一上表面移除該傳導層的一部分，使得該開口中之該傳導層的上端與該第一介電層的上端實質齊平；形成一遮罩，覆蓋該開口中的該傳導層；形成一第二介電層於該第一介電層上方並且覆蓋該遮罩；進行一第二平坦化製程，以移除該第二介電層的一部分並且暴露該遮罩；以及移除該遮罩以形成該凹部。
  2. 如請求項1所述之製造方法，其中該第一傳導部的一熱膨脹係數大於該第一介電部的一熱膨脹係數，以及膨脹該第一傳導部與該第二傳導部至少其中之一包括進行一熱處理製程，以膨脹該第一傳導部的一厚度大於該第一介電部的一厚度。
  3. 如請求項2所述之製造方法，其中在一第一溫度，形成具有該凹部的該第一傳導部，以及該熱處理製程加熱該第一傳導部與該第二傳導部至少其中之一至一第二溫度，該第二溫度高於該第一溫度。
  4. 如請求項1所述之製造方法，其中該凹部分離該第一傳導部與該第二傳導部，以及該第一介電部接觸該第二介電部。
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