TWI630854B - Method for making circuit board - Google Patents
Method for making circuit board Download PDFInfo
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- TWI630854B TWI630854B TW105114799A TW105114799A TWI630854B TW I630854 B TWI630854 B TW I630854B TW 105114799 A TW105114799 A TW 105114799A TW 105114799 A TW105114799 A TW 105114799A TW I630854 B TWI630854 B TW I630854B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/098—Special shape of the cross-section of conductors, e.g. very thick plated conductors
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- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
一種電路板的製備方法，包括：提供覆銅基板，包括基層及銅箔層；在銅箔層中蝕刻出導電線路，得到導電線路層；在導電線路層上覆蓋第一覆蓋膜，使其填充於導電線路層所形成的間隙中；移除基層以暴露導電線路層，在其暴露的表面上覆蓋感光層，感光層包括與填充於間隙中的第一覆蓋膜所對應的第一部分以及除第一部分外的第二部分；以導電線路層作為光罩和底片進行曝光顯影以移除第二部分以暴露導電線路層；在暴露的導電線路層上形成鍍銅層；剝離第一部分以暴露填充於間隙中的第一覆蓋膜；在鍍銅層上覆蓋第二覆蓋膜使其與暴露的第一覆蓋膜結合。 A method for preparing a circuit board includes: providing a copper-clad substrate, including a base layer and a copper foil layer; etching a conductive circuit in the copper foil layer to obtain a conductive circuit layer; and covering the conductive circuit layer with a first cover film to fill it In the gap formed by the conductive circuit layer; removing the base layer to expose the conductive circuit layer, and covering the exposed surface with a photosensitive layer, the photosensitive layer includes a first portion corresponding to the first cover film filled in the gap, and The second part outside a part; exposure and development using the conductive circuit layer as a photomask and a negative film to remove the second part to expose the conductive circuit layer; forming a copper plating layer on the exposed conductive circuit layer; peeling off the first part to expose the filling in The first cover film in the gap; the second cover film is covered on the copper plating layer to be combined with the exposed first cover film.
Description
本發明涉及一種電路板的製備方法。 The invention relates to a method for preparing a circuit board.
隨著手機等可擕式電子設備的功能的不斷增加，電路板也朝向多元化多類別的方向發展。雖然電路板的輕、薄、短、小為未來發展的趨勢，在一些特殊領域(例如，電子設備電源消耗的增加導致電源不能滿足電子設備的續航要求，由於快速充電技術在一定程度上解決了這一問題，因此需要電路板可滿足大電流充電的需求)，也需要電路板具有較大的銅厚以及較小的線寬線距。 As the functions of portable electronic devices such as mobile phones continue to increase, circuit boards have also evolved toward diversified and diverse categories. Although the circuit board is light, thin, short, and small for the future development trend, in some special areas (for example, the increase in power consumption of electronic equipment causes the power supply to meet the endurance requirements of electronic equipment, due to the rapid charging technology to some extent This problem requires a circuit board to meet the needs of high-current charging), and also requires the circuit board to have a larger copper thickness and a smaller line width and space.
目前，單層板通常為由下料、壓合乾膜、曝光顯影、蝕刻、壓合覆蓋膜等步驟製備。然而，由於蝕刻能力的限制，此類製備方法並不能用於製備銅厚較大(如大於30μm)的單層板。 At present, single-layer boards are generally prepared by steps such as blanking, laminating dry film, exposure development, etching, and laminating cover film. However, due to the limitation of the etching ability, such a preparation method cannot be used to prepare a single-layer board with a large copper thickness (for example, greater than 30 μm).
有鑑於此，本發明提供一種能夠用於製備具有較大銅厚的電路板。 In view of this, the present invention provides a circuit board that can be used to prepare a circuit board having a large copper thickness.
本發明提供一種電路板的製備方法，包括：提供一覆銅基板，其包括一絕緣的基層以及形成於該基層表面上的一銅箔層；在該銅箔層中蝕刻出所需的導電線路，從而得到一導電線路層；在該導電線路層遠離該基層的表面上覆蓋一透明的第一覆蓋膜，使該第一覆蓋膜填充於該導電線路層所形成的間隙中；移除該基層以暴露該導電線路層，並在該導電線路層所暴露的表面上覆蓋一感光層，其中，該感光層包括一與填充於該間隙中的第一覆蓋膜所對應的第一部分以及除該第一部分之外的第二部分；以該導電線路層作為光罩和底片，進行曝光顯影以移除該感光層的第二部分以暴露該導電線路層；在該暴露的導電線路層上鍍銅以形成一與該導電線路層對應的鍍銅層；剝離該感光層的第一部分以暴露填充於該間隙中的第一覆蓋膜；以及在該鍍銅層遠離該第一覆蓋膜的表面上覆蓋一第二覆蓋膜，使該第二覆蓋膜與該暴露的第一覆蓋膜結合，從 而得到該電路板。 The invention provides a method for preparing a circuit board, which includes: providing a copper-clad substrate, which includes an insulating base layer and a copper foil layer formed on a surface of the base layer; and etching a desired conductive circuit in the copper foil layer. Thus, a conductive circuit layer is obtained; a surface of the conductive circuit layer away from the base layer is covered with a transparent first cover film, so that the first cover film fills a gap formed by the conductive circuit layer; the base layer is removed The conductive circuit layer is exposed, and a photosensitive layer is covered on the exposed surface of the conductive circuit layer, wherein the photosensitive layer includes a first portion corresponding to a first cover film filled in the gap, and A second part other than a part; using the conductive circuit layer as a photomask and a negative film, performing exposure and development to remove the second part of the photosensitive layer to expose the conductive circuit layer; and plating copper on the exposed conductive circuit layer to Forming a copper plating layer corresponding to the conductive circuit layer; peeling off a first portion of the photosensitive layer to expose a first cover film filled in the gap; and keeping the copper plating layer away from the first cover A cover film covering the second surface of the film so that the second film is combined with a first cover covering the exposed film, from And the circuit board is obtained.
本發明還提供一種電路板的製備方法，包括：提供一銅箔層；在該銅箔層的其中一表面上覆蓋一透明的第一覆蓋膜；在該銅箔層中蝕刻出所需的導電線路，從而得到一導電線路層；在該導電線路層上覆蓋一感光層，使該感光層填充於該導電線路層所形成的間隙中，其中，該感光層包括一與該導電線路層所形成的間隙所對應的第一部分以及除該第一部分之外的第二部分；以該導電線路層作為光罩和底片，進行曝光顯影以移除該感光層的第二部分以暴露該導電線路層；在該暴露的導電線路層上鍍銅以形成一與該導電線路層對應的鍍銅層；剝離該感光層的第一部分以暴露與該間隙所對應的第一覆蓋膜；以及在該鍍銅層遠離該第一覆蓋膜的表面上覆蓋一第二覆蓋膜，使該第二覆蓋膜與該暴露的第一覆蓋膜結合，從而得到該電路板。 The invention also provides a method for preparing a circuit board, which includes: providing a copper foil layer; covering one surface of the copper foil layer with a transparent first cover film; and etching a desired conductivity in the copper foil layer. Circuit to obtain a conductive circuit layer; covering the conductive circuit layer with a photosensitive layer so that the photosensitive layer fills a gap formed by the conductive circuit layer, wherein the photosensitive layer includes a layer formed with the conductive circuit layer The first portion corresponding to the gap and the second portion except the first portion; using the conductive circuit layer as a photomask and a negative film, performing exposure and development to remove the second portion of the photosensitive layer to expose the conductive circuit layer; Copper plating on the exposed conductive circuit layer to form a copper plating layer corresponding to the conductive circuit layer; peeling off a first portion of the photosensitive layer to expose a first cover film corresponding to the gap; and on the copper plating layer A second cover film is covered on a surface remote from the first cover film, so that the second cover film is combined with the exposed first cover film, thereby obtaining the circuit board.
由本發明的製備方法製備的電路板的銅厚為該銅箔層的厚度和該鍍銅層的厚度之和，由於該鍍銅層的厚度可藉由控制鍍銅時間來調整，因此，該電路板的銅厚可控，即，可根據具體需求獲得銅厚較大的電路板。 The copper thickness of the circuit board prepared by the preparation method of the present invention is the sum of the thickness of the copper foil layer and the thickness of the copper plating layer. Since the thickness of the copper plating layer can be adjusted by controlling the copper plating time, the circuit The copper thickness of the board can be controlled, that is, a circuit board with a larger copper thickness can be obtained according to specific requirements.
100‧‧‧電路板 100‧‧‧Circuit Board
10‧‧‧覆銅基板 10‧‧‧ Copper-clad substrate
11‧‧‧基層 11‧‧‧ Grassroots
12‧‧‧銅箔層 12‧‧‧ Copper foil layer
120‧‧‧導電線路層 120‧‧‧ conductive circuit layer
20‧‧‧第一覆蓋膜 20‧‧‧The first cover film
21‧‧‧第一膠合層 21‧‧‧The first glue layer
22‧‧‧第一覆蓋層 22‧‧‧first cover
30‧‧‧感光層 30‧‧‧ Photosensitive layer
31‧‧‧第一部分 31‧‧‧ Part I
32‧‧‧第二部分 32‧‧‧ Part Two
40‧‧‧鍍銅層 40‧‧‧ copper plating
50‧‧‧第二覆蓋膜 50‧‧‧second cover film
51‧‧‧第二膠合層 51‧‧‧Second glued layer
52‧‧‧第二覆蓋層 52‧‧‧second cover
圖1為本發明一較佳實施方式提供的一覆銅基板的剖視圖。 FIG. 1 is a cross-sectional view of a copper-clad substrate provided by a preferred embodiment of the present invention.
圖2為在圖1所示的雙面覆銅基板上進行影像轉移以形成導電線路層後的剖視圖。 FIG. 2 is a cross-sectional view after image transfer is performed on the double-sided copper-clad substrate shown in FIG. 1 to form a conductive circuit layer.
圖3為在圖2所示的導電線路層上壓合一第一覆蓋膜後的剖視圖。 FIG. 3 is a cross-sectional view after laminating a first cover film on the conductive circuit layer shown in FIG. 2.
圖4為在圖3所示的導電線路層上覆蓋一感光層後的剖視圖。 FIG. 4 is a cross-sectional view after a conductive layer is covered on the conductive circuit layer shown in FIG. 3.
圖5為將圖4所示的部分感光層移除以暴露導電線路層後的剖視圖。 FIG. 5 is a cross-sectional view after removing a part of the photosensitive layer shown in FIG. 4 to expose the conductive circuit layer.
圖6為在圖5所示的在導電線路層上形成鍍銅層後的剖視圖。 FIG. 6 is a cross-sectional view after a copper plating layer is formed on the conductive circuit layer shown in FIG. 5.
圖7為將圖6所示的剩餘的感光層剝離以暴露部分第一覆蓋膜後的剖視圖。 FIG. 7 is a cross-sectional view after peeling off the remaining photosensitive layer shown in FIG. 6 to expose a portion of the first cover film.
圖8為在圖7所示的鍍銅層上覆蓋第二覆蓋膜後得到的電路板的剖視圖。 8 is a cross-sectional view of a circuit board obtained by covering a second cover film on the copper plating layer shown in FIG. 7.
圖9為本發明另一實施方式提供的銅箔層的剖視圖。 FIG. 9 is a cross-sectional view of a copper foil layer according to another embodiment of the present invention.
圖10為在圖9所示的銅箔層上覆蓋第一覆蓋膜後的剖視圖。 FIG. 10 is a cross-sectional view after the first cover film is covered on the copper foil layer shown in FIG. 9.
圖11為在圖10所示的銅箔層上進行影像轉移以得到導電線路層後的剖視圖。 FIG. 11 is a cross-sectional view obtained by performing image transfer on the copper foil layer shown in FIG. 10 to obtain a conductive circuit layer.
圖12為在圖11所示的導電線路層上覆蓋感光層後的剖視圖。 FIG. 12 is a cross-sectional view after covering the photosensitive layer on the conductive circuit layer shown in FIG. 11.
圖13為將圖12所示的部分感光層移除以暴露導電線路層後的剖視圖。 FIG. 13 is a cross-sectional view after removing a part of the photosensitive layer shown in FIG. 12 to expose the conductive circuit layer.
圖14為在圖13所示的暴露的導電線路層上形成鍍銅層後的剖視圖。 14 is a cross-sectional view after a copper plating layer is formed on the exposed conductive circuit layer shown in FIG. 13.
圖15為在圖14所示的剩餘的感光層剝離以暴露第一覆蓋膜後的剖視圖。 FIG. 15 is a cross-sectional view after the remaining photosensitive layer shown in FIG. 14 is peeled to expose the first cover film.
下面將結合圖1~15及實施例對本發明提供的電路板100及其製備方法作進一步說明。其中，所述電路板100可為剛撓結合板、高密度集成板以及IC載板。 The circuit board 100 and the manufacturing method thereof provided by the present invention will be further described below with reference to FIGS. 1 to 15 and embodiments. The circuit board 100 may be a rigid-flex board, a high-density integrated board, and an IC carrier board.
請參閱圖1~8，本發明一較佳實施方式提供的電路板100的製備方法包括如下步驟： Please refer to FIGS. 1 to 8. A method for preparing a circuit board 100 according to a preferred embodiment of the present invention includes the following steps:
步驟一，請參閱圖1，提供一覆銅基板10。 Step one, referring to FIG. 1, a copper-clad substrate 10 is provided.
該覆銅基板10包括一絕緣的基層11以及形成於該基層11的表面上的一銅箔層12。其中，該銅箔層12的厚度為a。該基層11的材質可選自聚醯亞胺(polyimide，PI)、聚對苯二甲酸乙二醇酯(Polyethylene Terephthalate，PET)以及聚萘二甲酸乙二醇酯(Polyethylene Naphthalate，PEN)等中的一種。 The copper-clad substrate 10 includes an insulating base layer 11 and a copper foil layer 12 formed on a surface of the base layer 11. The thickness of the copper foil layer 12 is a. The material of the base layer 11 can be selected from the group consisting of polyimide (PI), polyethylene terephthalate (PET), and polyethylene naphthalate (PEN). Kind of.
步驟二，請參閱圖2，採用影像轉移技術在該銅箔層12中蝕刻出所需的導電線路，從而得到一導電線路層120。其中，該導電線路層120的線寬線距分別為b和c。 Step two, referring to FIG. 2, a desired conductive circuit is etched in the copper foil layer 12 by using an image transfer technology to obtain a conductive circuit layer 120. The line width and line spacing of the conductive circuit layer 120 are b and c, respectively.
步驟三，請參閱圖3，在該導電線路層120遠離該基層11的表面上覆蓋一透明的第一覆蓋膜20，並壓合該第一覆蓋膜20以使其流動並填充於該導電線路層120所形成的間隙中。 Step three, referring to FIG. 3, a surface of the conductive circuit layer 120 away from the base layer 11 is covered with a transparent first cover film 20, and the first cover film 20 is pressed to flow and fill the conductive circuit. In the gap formed by the layer 120.
可以理解的，該第一覆蓋膜20呈半固化狀態，因此，其在壓合過 程中可流動並填充於該導電線路層120所形成的間隙中。 It can be understood that the first cover film 20 is in a semi-cured state. It can flow and fill the gap formed by the conductive circuit layer 120 during the process.
在本實施方式中，該第一覆蓋膜20包括疊層設置的一第一膠合層21以及一第一覆蓋層22，該第一膠合層21覆蓋於該導電線路層120上並填充於該導電線路層120所形成的間隙中，該第一覆蓋層22覆蓋於該第一膠合層21遠離該導電線路層120的表面上。 In the present embodiment, the first cover film 20 includes a first adhesive layer 21 and a first cover layer 22 that are stacked, and the first adhesive layer 21 covers the conductive circuit layer 120 and fills the conductive layer. In the gap formed by the circuit layer 120, the first cover layer 22 covers the surface of the first adhesive layer 21 away from the conductive circuit layer 120.
步驟四，請參閱圖4，移除該基層11以暴露該導電線路層120，並在該導電線路層120所暴露的表面上覆蓋一感光層30。其中，該感光層30包括一與填充於該導電線路層120所形成的間隙中的第一覆蓋膜20所對應的第一部分31以及除該第一部分31之外的第二部分32。 Step 4: Referring to FIG. 4, the base layer 11 is removed to expose the conductive circuit layer 120, and a photosensitive layer 30 is covered on the exposed surface of the conductive circuit layer 120. The photosensitive layer 30 includes a first portion 31 corresponding to the first cover film 20 filled in the gap formed by the conductive circuit layer 120 and a second portion 32 other than the first portion 31.
在本實施方式中，所述感光層30為一光聚合型感光乾膜。 In this embodiment, the photosensitive layer 30 is a photopolymerizable photosensitive dry film.
步驟五，請參閱圖5，以導電線路層120作為光罩和底片，利用曝光顯影技術移除該感光層30的第二部分32以暴露該導電線路層120。 Step 5, referring to FIG. 5, the conductive circuit layer 120 is used as a photomask and a negative film, and the second portion 32 of the photosensitive layer 30 is removed by exposure and development technology to expose the conductive circuit layer 120.
在本實施方式中，該第一覆蓋膜20的透光度大於90%。優選的，該第一覆蓋膜20的第一膠合層21的材質為常用的純膠，第一覆蓋層22的材質為聚對苯二甲酸乙二醇酯，其可藉由低溫傳壓的方式獲得。 In this embodiment, the light transmittance of the first cover film 20 is greater than 90%. Preferably, the material of the first adhesive layer 21 of the first cover film 20 is a commonly used pure glue, and the material of the first cover layer 22 is polyethylene terephthalate, which can be transmitted at a low temperature by pressure. obtain.
具體的，將該移除基層11後的導電線路層120和第一覆蓋膜20放置於一曝光機(圖未示)中，使該第一覆蓋膜20與該曝光機的紫外光光源相對，然後控制紫外光光源朝向該第一覆蓋膜20發射紫外光。由於該第一覆蓋膜20透光度較高而該導電線路層120不透光，因此，在曝光時，紫外線僅可穿過填充於該導電線路層120所形成的間隙中的第一覆蓋膜20並照射至該感光層30的第一部分31上。可以理解的，光聚合型感光乾膜由高分子化合物製成，在曝光時，該第一部分31能夠在紫外線的照射下發生聚合反應並附著於該第一覆蓋膜20。在顯影時，未發生聚合反應的第二部分32在顯影劑的作用被移除，而發生聚合反應的該第一部分31則被保留。此外，由於該導電線路層120不透光，在曝光顯影的過程中，該導電線路層120可直接作為光罩和底片使用，有利於避免線路加工時圖案偏移。 Specifically, the conductive circuit layer 120 and the first cover film 20 after removing the base layer 11 are placed in an exposure machine (not shown), so that the first cover film 20 is opposite to the ultraviolet light source of the exposure machine. Then, the ultraviolet light source is controlled to emit ultraviolet light toward the first cover film 20. Since the first cover film 20 has high light transmittance and the conductive circuit layer 120 is opaque, during exposure, ultraviolet rays can only pass through the first cover film filled in the gap formed by the conductive circuit layer 120. 20 and irradiate the first portion 31 of the photosensitive layer 30. It can be understood that the photopolymerizable photosensitive dry film is made of a polymer compound, and when exposed, the first portion 31 can undergo a polymerization reaction under the irradiation of ultraviolet rays and attach to the first cover film 20. During the development, the second portion 32 that has not undergone the polymerization reaction is removed by the action of the developer, and the first portion 31 that has undergone the polymerization reaction is retained. In addition, since the conductive circuit layer 120 is opaque, during the exposure and development process, the conductive circuit layer 120 can be used directly as a photomask and a negative film, which is beneficial to avoid pattern shift during the processing of the circuit.
步驟六，請參閱圖6，在該暴露的導電線路層120上鍍銅以形成一與該導電線路層120對應的鍍銅層40。 Step six, referring to FIG. 6, copper is plated on the exposed conductive circuit layer 120 to form a copper plating layer 40 corresponding to the conductive circuit layer 120.
可以理解，該鍍銅層40的厚度f可藉由控制鍍銅時間來調整。此外，若該鍍銅層40中存在孤立區域，可藉由鍍銅引線的方式連接該孤立區域。 It can be understood that the thickness f of the copper plating layer 40 can be adjusted by controlling the copper plating time. In addition, if there is an isolated region in the copper-plated layer 40, the isolated region can be connected by a copper-plated lead.
步驟七，請參閱圖7，剝離該感光層30的第一部分31以暴露填充於該導電線路層120所形成的間隙中的第一覆蓋膜20。 Step Seven, referring to FIG. 7, the first portion 31 of the photosensitive layer 30 is peeled off to expose the first cover film 20 filled in the gap formed by the conductive circuit layer 120.
步驟八，請參閱圖8，在該鍍銅層40遠離該第一覆蓋膜20的表面上覆蓋一第二覆蓋膜50，並壓合該第二覆蓋膜50以使其與該暴露的第一覆蓋膜20結合，從而得到該電路板100。 Step 8. Referring to FIG. 8, a surface of the copper plating layer 40 away from the first cover film 20 is covered with a second cover film 50, and the second cover film 50 is pressed against the exposed first layer The cover film 20 is combined to obtain the circuit board 100.
可以理解的，該第二覆蓋膜50呈半固化狀態，其在壓合過程中流動並與該暴露的第一覆蓋膜20結合。 It can be understood that the second cover film 50 is in a semi-cured state, which flows during the lamination process and is combined with the exposed first cover film 20.
在本實施方式中，該第二覆蓋膜50包括疊層設置的一第二膠合層51以及一第二覆蓋層52，該第二膠合層51覆蓋於該鍍銅層40上並填充於該暴露的第一覆蓋膜20上，該第二覆蓋層52覆蓋於該第二膠合層51遠離該鍍銅層40的表面上。其中，該第二膠合層51以及第二覆蓋層52的材質可分別與該第一膠合層21和第一覆蓋層22的材質相同或不同。 In the present embodiment, the second cover film 50 includes a second adhesive layer 51 and a second cover layer 52 that are stacked, and the second adhesive layer 51 covers the copper plating layer 40 and fills the exposed layer. On the first cover film 20, the second cover layer 52 covers the surface of the second adhesive layer 51 away from the copper plating layer 40. The materials of the second glue layer 51 and the second cover layer 52 may be the same as or different from the materials of the first glue layer 21 and the first cover layer 22, respectively.
請參閱圖9~15，本發明另一實施方式提供的電路板100的製備方法包括如下步驟： Referring to FIGS. 9 to 15, a method for preparing a circuit board 100 according to another embodiment of the present invention includes the following steps:
步驟一，請參閱圖9，提供一銅箔層12。 Step one, referring to FIG. 9, a copper foil layer 12 is provided.
步驟二，請參閱圖10，在該銅箔層12的其中一表面上覆蓋一透明的第一覆蓋膜20。 Step two, referring to FIG. 10, a transparent first cover film 20 is covered on one surface of the copper foil layer 12.
在本實施方式中，該第一覆蓋膜20包括疊層設置的一第一膠合層21以及一第一覆蓋層22，該第一膠合層21覆蓋於該銅箔層12上，該第一覆蓋層22覆蓋於該第一膠合層21遠離該銅箔層12的表面上。 In this embodiment, the first cover film 20 includes a first adhesive layer 21 and a first cover layer 22 which are arranged in a stack, the first adhesive layer 21 covers the copper foil layer 12, and the first cover The layer 22 covers the surface of the first adhesive layer 21 away from the copper foil layer 12.
步驟三，請參閱圖11，採用影像轉移技術在該銅箔層12中蝕刻出所需的導電線路，從而得到一導電線路層120。 Step three, referring to FIG. 11, a desired conductive circuit is etched in the copper foil layer 12 by using an image transfer technology to obtain a conductive circuit layer 120.
步驟四，請參閱圖12，在該導電線路層120上覆蓋一感光層30，並壓合該感光層30以使其填充於該導電線路層120所形成的間隙中。其中，該感光層30包括一與該導電線路層120所形成的間隙所對應的第一部分31以及除該第一部分31之外的第二部分32。 Step Four, referring to FIG. 12, a photosensitive layer 30 is covered on the conductive circuit layer 120, and the photosensitive layer 30 is pressed to fill the gap formed by the conductive circuit layer 120. The photosensitive layer 30 includes a first portion 31 corresponding to the gap formed by the conductive circuit layer 120 and a second portion 32 other than the first portion 31.
在本實施方式中，所述感光層30為一光聚合型感光乾膜。 In this embodiment, the photosensitive layer 30 is a photopolymerizable photosensitive dry film.
可以理解的，該感光層30呈半固化狀態，其在壓合過程中流動並填充於該導電線路層120所形成的間隙中。 It can be understood that the photosensitive layer 30 is in a semi-cured state, which flows and fills the gap formed by the conductive circuit layer 120 during the lamination process.
步驟五，請參閱圖13，以導電線路層120作為光罩和底片，利用曝光顯影技術移除該感光層30的第二部分32以暴露該導電線路層120。 Step 5, referring to FIG. 13, the conductive circuit layer 120 is used as a photomask and a negative film, and the second portion 32 of the photosensitive layer 30 is removed by exposure and development technology to expose the conductive circuit layer 120.
步驟六，請參閱圖14，在該暴露的導電線路層120上鍍銅以形成一與該導電線路層120對應的鍍銅層40。 Step six, referring to FIG. 14, copper is plated on the exposed conductive circuit layer 120 to form a copper plating layer 40 corresponding to the conductive circuit layer 120.
步驟七，請參閱圖15，剝離該感光層30的第一部分31以暴露與該導電線路層120所形成的間隙所對應的第一覆蓋膜20。 Step Seven, referring to FIG. 15, the first portion 31 of the photosensitive layer 30 is peeled off to expose the first cover film 20 corresponding to the gap formed by the conductive circuit layer 120.
步驟八，請再次參閱圖8，在該鍍銅層40遠離該第一覆蓋膜20的表面上覆蓋一第二覆蓋膜50，並壓合該第二覆蓋膜50以使其與該暴露的第一覆蓋膜20結合，從而得到該電路板100。 Step eight, please refer to FIG. 8 again. A surface of the copper plating layer 40 away from the first cover film 20 is covered with a second cover film 50, and the second cover film 50 is pressed against the exposed first cover film A cover film 20 is combined to obtain the circuit board 100.
可以理解，由於該實施方式的製備方法不需要移除覆銅基板的基層，從而可避免電路板100表面產生皺褶和斷裂。 It can be understood that, because the manufacturing method of this embodiment does not need to remove the base layer of the copper-clad substrate, wrinkles and fractures on the surface of the circuit board 100 can be avoided.
以上電路板100的銅厚為該銅箔層12的厚度a(即該導電線路層120的厚度)和該鍍銅層40的厚度f之和，由於該鍍銅層40的厚度f可藉由控制鍍銅時間來調整，因此，該電路板100的銅厚可控，即，可根據具體需求獲得銅厚較大的電路板100。此外，該銅箔層12的厚度a可根據蝕刻能力進行選擇，因此可獲得具有較小線寬b和較小線距c的導電線路層120。 The copper thickness of the above circuit board 100 is the sum of the thickness a of the copper foil layer 12 (that is, the thickness of the conductive circuit layer 120) and the thickness f of the copper plating layer 40. Since the thickness f of the copper plating layer 40 can be determined by The copper plating time is controlled to adjust. Therefore, the copper thickness of the circuit board 100 can be controlled, that is, the circuit board 100 with a larger copper thickness can be obtained according to specific requirements. In addition, the thickness a of the copper foil layer 12 can be selected according to the etching ability, so a conductive circuit layer 120 having a smaller line width b and a smaller line pitch c can be obtained.
可以理解，以上實施例僅用來說明本發明，並非用作對本發明的限定。對於本領域的普通技術人員來說，根據本發明的技術構思做出的其它各種相應的改變與變形，都落在本發明權利要求的保護範圍之內。 It can be understood that the above embodiments are only used to illustrate the present invention, and are not intended to limit the present invention. For those of ordinary skill in the art, various other corresponding changes and modifications made according to the technical concept of the present invention fall within the protection scope of the claims of the present invention.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW592007B (en) * | 2003-10-17 | 2004-06-11 | Phoenix Prec Technology Corp | Build-up circuit board with conductive barrier structure and method for fabricating the same |
| CN202998646U (en) * | 2012-12-17 | 2013-06-12 | 四川深北电路科技有限公司 | HDI printed circuit board |
| CN102196668B (en) * | 2010-03-08 | 2013-06-19 | 宏恒胜电子科技（淮安）有限公司 | Method for manufacturing circuit board |
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| JPH04294594A (en) * | 1991-03-25 | 1992-10-19 | Fujitsu Ltd | Method for forming wiring pattern of printed circuit board |
| JP6009300B2 (en) * | 2012-09-27 | 2016-10-19 | 新光電気工業株式会社 | Wiring board and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW592007B (en) * | 2003-10-17 | 2004-06-11 | Phoenix Prec Technology Corp | Build-up circuit board with conductive barrier structure and method for fabricating the same |
| CN102196668B (en) * | 2010-03-08 | 2013-06-19 | 宏恒胜电子科技（淮安）有限公司 | Method for manufacturing circuit board |
| CN202998646U (en) * | 2012-12-17 | 2013-06-12 | 四川深北电路科技有限公司 | HDI printed circuit board |
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